A synthetic aperture radar imaging method based on multi-chip digital signal processors

Abstract

The present invention discloses a synthetic aperture radar imaging method based on multiple digital signal processors, which is applied to the field of synthetic aperture radar imaging technology. The synthetic aperture radar imaging method comprises: dividing the multiple digital signal processors into a first digital signal processor group and a second digital signal processor group, and performing azimuth preprocessing, range scale transformation processing, imaging processing, focus correction processing and amplitude limiting quantization processing on a part of radar echo data by the first digital signal processor group, and performing azimuth preprocessing, range scale transformation processing, imaging processing, focus correction processing and amplitude limiting quantization processing on another part of radar echo data by the second digital signal processor group. The present invention greatly improves the imaging efficiency by adopting parallel computing of multiple digital signal processors.

Description

Technical Field

[0001] The invention relates to the technical field of synthetic aperture radar imaging, and in particular to a synthetic aperture radar imaging method based on multiple digital signal processors. Background Art

[0002] Synthetic aperture radar (SAR) has played an indispensable role in military and civilian fields since its invention, and can achieve long-distance high-resolution image acquisition all day and all weather. Due to the universality of squint SAR and the serious coupling of echo data in range and azimuth, the data processing of large squint is challenging. At the same time, with the advancement of technology, SAR data storage and image output can no longer meet the needs.

[0003] At present, the high-speed digital processing devices commonly used in SAR imaging include Field Programmable Gate Array (FPGA), Graphics Processing Unit (GPU), and Digital Signal Processing (DSP). Among them, the development process of FPGA is relatively long and the imaging efficiency does not have a significant advantage; SAR imaging mainly processes digital echo signals, while GPU is more suitable for image processing; the current existing solution for DSP is to use a single-chip multi-core method for SAR imaging processing, which has the problem of low imaging efficiency. Summary of the invention

[0004] The purpose of the present invention is to provide a synthetic aperture radar imaging method based on a multi-chip digital signal processor, which can solve the problem of low imaging efficiency when performing synthetic aperture radar imaging on radar echo data.

[0005] To achieve the above object, the present invention provides the following solutions:

[0006] A synthetic aperture radar imaging method based on a multi-chip digital signal processor, comprising:

[0007] The first digital signal processor group acquires the first target data in the shared area, and performs azimuth preprocessing on the first target data to obtain first processed data; the second digital signal processor group acquires the second target data in the shared area, and performs azimuth preprocessing on the second target data to obtain second processed data; the first digital signal processor group includes at least one digital signal processor; the second digital signal processor group includes at least one digital signal processor; the first target data is the first half data of each pulse in the radar echo data; the second target data is the second half data of each pulse in the radar echo data; the shared area fuses the first processed data and the second processed data to obtain first fused data;

[0008] The first digital signal processor group obtains the third target data in the shared area, and performs a distance scale transformation process on the third target data to obtain third processed data; the second digital signal processor group obtains the fourth target data in the shared area, and performs a distance scale transformation process on the fourth target data to obtain fourth processed data; the shared area fuses the third processed data and the fourth processed data to obtain second fused data; the third target data is pulse data of one pulse direction in the first fused data; the fourth target data is pulse data of another pulse direction in the first fused data;

[0009] The first digital signal processor group acquires the fifth target data in the shared area, and performs imaging processing on the fifth target data to obtain first imaging data; the second digital signal processor group acquires the sixth target data in the shared area, and performs imaging processing on the sixth target data to obtain second imaging data; the shared area fuses the first imaging data and the second imaging data to obtain fused imaging data; the fifth target data is pulse data of half the number of pulses in the second fused data; the sixth target data is pulse data of the other half the number of pulses in the second fused data;

[0010] The first digital signal processor group and the second digital signal processor group respectively perform focus correction processing and limit quantization processing on the fused imaging data to obtain final synthetic aperture radar imaging image data.

[0011] Optionally, the first digital signal processor group acquires first target data in the shared area, and performs azimuth preprocessing on the first target data to obtain first processed data, specifically including:

[0012] The first digital signal processor group acquires the first target data in the shared area, and performs Doppler shift elimination, pre-filtering, azimuth extraction and Doppler frequency shift recovery phase multiplication operations on the first target data to obtain first processed data.

[0013] Optionally, the first digital signal processor group acquires the third target data in the shared area, and performs range PCS processing on the third target data to obtain third processed data, specifically including:

[0014] The first digital signal processor group acquires the third target data in the shared area, and multiplies the third target data with a scaling function to obtain first operation data;

[0015] Performing frequency domain conversion on the first operation data, and multiplying the first operation data in the frequency domain by a first system function to obtain second operation data;

[0016] Performing time domain conversion on the second operation data, and multiplying the second operation data in the time domain by an inverse scaling function to obtain third operation data;

[0017] The third operation data is converted into a frequency domain, and the third operation data in the frequency domain is multiplied by the second system function to obtain third processed data.

[0018] Optionally, the first digital signal processor group acquires fifth target data in the shared area, and performs imaging processing on the fifth target data to obtain first imaging data; the second digital signal processor group acquires sixth target data in the shared area, and performs imaging processing on the sixth target data to obtain second imaging data, specifically including:

[0019] Dividing the shared area into a plurality of sub-areas according to the responsible area of ​​the first digital signal processor group and the responsible area of ​​the second digital signal processor group, and performing matrix transposition on each of the sub-areas to obtain a transposed shared area;

[0020] The first digital signal processor group obtains the fifth target data in the transposed shared area, and performs azimuth interpolation processing on the fifth target data to obtain first azimuth processed data; the second digital signal processor group obtains the sixth target data in the transposed shared area, and performs azimuth interpolation processing on the sixth target data to obtain second azimuth processed data; the transposed shared area fuses the first azimuth processed data and the second azimuth processed data to obtain third fused data;

[0021] The first digital signal processor group performs fast Fourier transform in range and azimuth directions on the third fused data within the responsible area of ​​the first digital signal processor group in the transposed shared area to obtain first imaging data; the second digital signal processor group performs fast Fourier transform in range and azimuth directions on the third fused data within the responsible area of ​​the second digital signal processor group in the transposed shared area to obtain second imaging data.

[0022] Optionally, the first digital signal processor group and the second digital signal processor group respectively perform focus correction processing and limit quantization processing on the fused imaging data to obtain final synthetic aperture radar imaging image data, specifically including:

[0023] The first digital signal processor group obtains the seventh target data in the shared area, and performs azimuth gradient self-focusing processing on the fused imaging data according to the seventh target data to obtain first focusing data; the second digital signal processor group obtains the seventh target data in the shared area, and performs azimuth gradient self-focusing processing on the fused imaging data according to the seventh target data to obtain second focusing data; the shared area fuses the first focusing data and the second focusing data to obtain fused focusing data; the seventh target data is the screening data that meets the preset threshold in the fused imaging data;

[0024] The responsible area of ​​the first digital signal processor group in the shared area is divided into a plurality of correction networks, and the fused focus data in the responsible area of ​​the first digital signal processor group is subjected to geometric distortion correction processing according to the correction grid to obtain first correction data; the responsible area of ​​the second digital signal processor group in the shared area is divided into a plurality of correction networks, and the fused focus data in the responsible area of ​​the second digital signal processor group is subjected to geometric distortion correction processing according to the correction grid to obtain second correction data; the shared area fuses the first correction data and the second correction data to obtain fused correction data;

[0025] The first digital signal processor group performs limiting quantization processing on the fused corrected data within the responsible area of ​​the first digital signal processor group in the shared area to obtain first image data; the second digital signal processor group performs limiting quantization processing on the fused corrected data within the responsible area of ​​the second digital signal processor group in the shared area to obtain second image data; the shared area fuses the first image data and the second image data to obtain final synthetic aperture radar imaging image data.

[0026] Optionally, the first digital signal processor group acquires seventh target data in the shared area, and performs azimuth gradient self-focusing processing on the fused imaging data according to the seventh target data to obtain first focusing data, specifically including:

[0027] The first digital signal processor group acquires the seventh target data in the shared area, and performs azimuth cyclic shift, windowing, azimuth time domain conversion, and multiplication with shift conjugate data on the seventh target data to obtain a first phase gradient value;

[0028] Determining a phase error value according to the first phase gradient value, and performing error compensation on the fused imaging data according to the phase error value to obtain azimuth error conjugate data;

[0029] The first focusing data is determined according to the azimuth error conjugate data.

[0030] Optionally, dividing the responsible area of ​​the first digital signal processor group in the shared area into a plurality of correction grids, and performing geometric distortion correction processing on the fused focus data in the responsible area of ​​the first digital signal processor group according to the correction grids to obtain first correction data specifically includes:

[0031] Dividing the responsible area of ​​the first digital signal processor group in the shared area into a plurality of correction grids, establishing a two-dimensional coordinate system for the responsible area of ​​the first digital signal processor group, and determining the two-dimensional coordinates of the correction grid according to the two-dimensional coordinate system;

[0032] Performing a coordinate rotation transformation on the two-dimensional coordinates of the correction grid to obtain the visual correction coordinates of the correction grid in a coordinate system established in the line of sight direction;

[0033] An interpolation operation is performed on the visual correction coordinates to obtain first correction data.

[0034] Optionally, the first digital signal processor group performs limiting quantization processing on the fused corrected data in a responsible area of ​​the first digital signal processor group in the shared area to obtain first image data, specifically including:

[0035] The first digital signal processor group performs a modulus operation on the fused correction data in the responsible area of ​​the first digital signal processor group in the shared area to obtain a maximum modulus value and a minimum modulus value;

[0036] When the maximum value of the modulus is greater than the preset clipping threshold, the clipping threshold is updated to the maximum value, and the fused corrected data less than the preset clipping threshold is subjected to difference calculation and quantization calculation with the minimum value of the modulus to obtain the first image data.

[0037] Optionally, the first digital signal processor group includes two digital signal processors, one of which is used to process odd frame data and the other is used to process even frame data; the second digital signal processor group includes two digital signal processors, one of which is used to process odd frame data and the other is used to process even frame data.

[0038] According to the specific embodiments provided by the present invention, the present invention discloses the following technical effects:

[0039] The present invention discloses a synthetic aperture radar imaging method based on a multi-chip digital signal processor, wherein the multi-chip digital signal processor is divided into a first digital signal processor group and a second digital signal processor group, and the first digital signal processor group is used to process a part of radar echo data, and the second digital signal processor group is used to process the other part of radar echo data, so as to realize parallel processing of the two parts of radar echo data, thereby greatly improving the imaging efficiency; wherein the data processing of the digital signal processor group includes azimuth preprocessing, range scale transformation processing, imaging processing, focus correction processing and amplitude limiting quantization processing, and through the above data processing method, the problem of range-azimuth coupling existing in synthetic aperture radar imaging is also solved, thereby improving the imaging quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0041] Figure 1 A schematic diagram of a flow chart of a synthetic aperture radar imaging method based on a multi-chip digital signal processor provided in an embodiment of the present invention;

[0042] Figure 2 A schematic diagram of a flow chart of data parallel processing in a digital signal processor group of a synthetic aperture radar imaging method based on multiple digital signal processors provided by an embodiment of the present invention;

[0043] Figure 3 A schematic diagram of parallel processing of azimuth preprocessing in a multi-chip digital signal processor-based synthetic aperture radar imaging method provided by an embodiment of the present invention within a digital signal processor;

[0044] Figure 4 A schematic diagram of parallel processing of range-to-scale transformation in a multi-chip digital signal processor-based synthetic aperture radar imaging method provided by an embodiment of the present invention within a digital signal processor;

[0045] Figure 5 A schematic diagram of matrix transposition in a synthetic aperture radar imaging method based on multiple digital signal processors provided in an embodiment of the present invention;

[0046] Figure 6 A schematic diagram of parallel processing of azimuth interpolation in a digital signal processor in a synthetic aperture radar imaging method based on multiple digital signal processors provided in an embodiment of the present invention;

[0047] Figure 7 A schematic diagram of parallel processing of azimuth gradient autofocusing processing in a synthetic aperture radar imaging method based on multiple digital signal processors provided in an embodiment of the present invention within a digital signal processor;

[0048] Figure 8 A schematic diagram of parallel processing of geometric distortion correction processing in a synthetic aperture radar imaging method based on multiple digital signal processors provided by an embodiment of the present invention within a digital signal processor;

[0049] Fig. 9 A schematic diagram of parallel processing of limiting quantization processing in a digital signal processor in a synthetic aperture radar imaging method based on multiple digital signal processors provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0050] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0051] The purpose of the present invention is to provide a synthetic aperture radar imaging method based on a multi-chip digital signal processor, which solves the serious range-azimuth coupling problem in echo data and the problem of low imaging efficiency by performing azimuth and range operations through the multi-chip digital signal processor.

[0052] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0053] like Figure 1-Figure 2 As shown, the synthetic aperture radar imaging method based on multiple digital signal processors of the present invention includes: a synthetic aperture radar imaging method based on multiple digital signal processors, including:

[0054] Step 100: The first digital signal processor group obtains the first target data in the shared area, and performs azimuth preprocessing on the first target data to obtain first processed data; the second digital signal processor group obtains the second target data in the shared area, and performs azimuth preprocessing on the second target data to obtain second processed data; the first digital signal processor group includes at least one digital signal processor; the second digital signal processor group includes at least one digital signal processor; the first target data is the first half data of each pulse in the radar echo data; the second target data is the second half data of each pulse in the radar echo data; the shared area fuses the first processed data and the second processed data to obtain first fused data.

[0055] Step 200: The first digital signal processor group obtains the third target data in the shared area, and performs distance scale transformation on the third target data to obtain third processed data; the second digital signal processor group obtains the fourth target data in the shared area, and performs distance scale transformation on the fourth target data to obtain fourth processed data; the shared area fuses the third processed data and the fourth processed data to obtain second fused data; the third target data is pulse data of one pulse direction in the first fused data; the fourth target data is pulse data of another pulse direction in the first fused data.

[0056] Step 300: The first digital signal processor group acquires the fifth target data in the shared area, and performs imaging processing on the fifth target data to obtain first imaging data; the second digital signal processor group acquires the sixth target data in the shared area, and performs imaging processing on the sixth target data to obtain second imaging data; the shared area fuses the first imaging data and the second imaging data to obtain fused imaging data; the fifth target data is pulse data of half the number of pulses in the second fused data; the sixth target data is pulse data of the other half of the number of pulses in the second fused data.

[0057] Step 400: The first digital signal processor group and the second digital signal processor group respectively perform focus correction processing and limit quantization processing on the fused imaging data to obtain final synthetic aperture radar imaging image data.

[0058] In step 100, the first digital signal processor group obtains the first target data in the shared area, performs Doppler shift elimination processing on the first target data, performs pre-filtering on the data after Doppler shift elimination, performs azimuth extraction on the filtered signal to obtain azimuth downsampled data, performs phase multiplication of the azimuth downsampled data to restore Doppler shift, and obtains first processed data. The processing method of the second digital signal processor group for the second target data is the same as the processing method of the first digital signal processor group for the first target data.

[0059] The calculation formula for the order N of the filter during pre-filtering is:

[0060]

[0061] Where PRF stands for pulse repetition frequency; B d Represents the bandwidth of the signal; and the operation result is rounded. In order to obtain a satisfactory noise suppression effect, the data after one filtering is filtered again in the same way to obtain the filtered signal.

[0062] The azimuth extraction is a multiple extraction; the calculation formula of the multiple extraction is:

[0063]

[0064] Where N d represents the decimation multiple; PRF represents the pulse repetition frequency; B d The result of the multiple extraction is rounded down to obtain the azimuth down-sampled data.

[0065] In step 200, the first digital signal processor group obtains the third target data in the shared area, and multiplies the third target data with a scaling function to obtain first operation data; performs frequency domain conversion on the first operation data, and multiplies the first operation data in the frequency domain with a first system function to obtain second operation data; performs time domain conversion on the second operation data, and multiplies the second operation data in the time domain with an inverse scaling function to obtain third operation data; performs frequency domain conversion on the third operation data, and multiplies the third operation data in the frequency domain with a second system function to obtain third processed data. The processing method of the second digital signal processor group for the fourth target data is the same as the processing method of the first digital signal processor group for the third target data.

[0066] in:

[0067] The calculation formula of the scaling function is as follows:

[0068]

[0069] In the formula, Φ scl (t r ) represents the scaling function; t r Indicates distance to fast time; k r Indicates the frequency modulation slope of the linear frequency modulation signal; represents the scaling factor, θ and Respectively represent the elevation angle and azimuth angle of the radar antenna phase center in the coordinate system; θ c and Respectively represent the elevation angle and azimuth angle corresponding to the SAR aperture center; R ta represents the distance between the phase center of the radar antenna and the imaging center; c represents the speed of light.

[0070] The calculation formula of the first system function is as follows:

[0071]

[0072] In the formula, H1(f r ) represents the first system function; f s Indicates the signal distance sampling rate; Indicates the number of shift points required for coarse distance correction; R t0 represents the distance between the center of the aperture and the center of the imaged scene; R ta Represents the distance between the radar antenna phase center and the imaging center; represents the scaling factor, θ and Respectively represent the elevation angle and azimuth angle of the radar antenna phase center in the coordinate system; θ c and They represent the elevation angle and azimuth angle corresponding to the SAR aperture center respectively; k r Indicates the frequency modulation slope f of the linear frequency modulation signal r represents the distance to frequency axis; c represents the speed of light.

[0073] The calculation formula of the inverse scaling function is as follows:

[0074]

[0075] In the formula, Φ ins (t r ) represents the inverse scaling function; f c is the signal carrier frequency; f s Indicates the signal distance sampling rate; k r Indicates the frequency modulation slope of the linear frequency modulation signal; represents the scaling factor, θ and Respectively represent the elevation angle and azimuth angle of the radar antenna phase center in the coordinate system; θ c and They represent the elevation angle and azimuth angle corresponding to the SAR aperture center respectively; t r Indicates distance to fast time; R ta represents the distance between the phase center of the radar antenna and the imaging center; c represents the speed of light.

[0076] The calculation formula of the second system function is as follows:

[0077]

[0078] In the formula, H2(f r ) represents the second system function; f c is the signal carrier frequency; f s Indicates the signal distance sampling rate; Indicates the number of shift points required for coarse distance correction; R t0 represents the distance between the center of the aperture and the center of the imaged scene; R ta Represents the distance between the radar antenna phase center and the imaging center; represents the scaling factor, θ and Respectively represent the elevation angle and azimuth angle of the radar antenna phase center in the coordinate system; θ c and They represent the elevation angle and azimuth angle corresponding to the SAR aperture center respectively; k r Indicates the frequency modulation slope of the linear frequency modulation signal; f r represents the distance to frequency axis; c represents the speed of light.

[0079] In step 300, the first digital signal processor group and the second digital signal processor group include the following three steps when performing imaging processing.

[0080] In the first step, the shared area is divided into a plurality of sub-areas according to the responsible area of ​​the first digital signal processor group and the responsible area of ​​the second digital signal processor group, and matrix transposition is performed on each of the sub-areas to obtain a transposed shared area.

[0081] In the second step, the first digital signal processor group obtains the fifth target data in the transposed shared area, and performs azimuth interpolation processing on the fifth target data to obtain first azimuth processed data; the second digital signal processor group obtains the sixth target data in the transposed shared area, and performs azimuth interpolation processing on the sixth target data to obtain second azimuth processed data; the transposed shared area fuses the first azimuth processed data and the second azimuth processed data to obtain third fused data.

[0082] The azimuth interpolation process uses Sinc interpolation, and after the azimuth Sinc interpolation process, a range gate data g is obtained after the range PCS process. d The sum of the products of (i) and the interpolation function sinc(xi). The specific calculation formula is as follows:

[0083]

[0084] In the formula, sinc(x) is the interpolation kernel, and g(x) corresponding to the interpolation point x is equal to the sample g in the interpolation kernel. d The sum of the products of (i) and sinc(xi). The coordinates before and after interpolation are calculated as t a is the azimuth time variable before Keystone transformation; t a ' is the azimuth time variable after Keystone transformation; f r represents the distance to frequency axis; c represents the speed of light.

[0085] In the third step, the first digital signal processor group performs fast Fourier transform in range and azimuth directions on the third fused data in the responsible area of ​​the first digital signal processor group in the transposed shared area to obtain first imaging data; and the second digital signal processor group performs fast Fourier transform in range and azimuth directions on the third fused data in the responsible area of ​​the second digital signal processor group in the transposed shared area to obtain second imaging data.

[0086] Wherein in step 400, the first digital signal processor group and the second digital signal processor group include the following three steps when performing focus correction processing and limiting quantization processing.

[0087] In the first step, the first digital signal processor group obtains the seventh target data in the shared area, and performs azimuth gradient self-focusing processing on the fused imaging data according to the seventh target data to obtain first focusing data; the second digital signal processor group obtains the seventh target data in the shared area, and performs azimuth gradient self-focusing processing on the fused imaging data according to the seventh target data to obtain second focusing data; the shared area fuses the first focusing data and the second focusing data to obtain fused focusing data; the seventh target data is the screening data in the fused imaging data that meets a preset threshold.

[0088] In the second step, the responsible area of ​​the first digital signal processor group in the shared area is divided into several correction networks, and the fused focused data in the responsible area of ​​the first digital signal processor group is subjected to geometric distortion correction according to the correction grid to obtain first corrected data; the responsible area of ​​the second digital signal processor group in the shared area is divided into several correction networks, and the fused focused data in the responsible area of ​​the second digital signal processor group is subjected to geometric distortion correction according to the correction grid to obtain second corrected data; the shared area fuses the first correction data and the second correction data to obtain fused correction data.

[0089] In the third step, the first digital signal processor group performs limiting quantization processing on the fused corrected data within the responsible area of ​​the first digital signal processor group in the shared area to obtain first image data; the second digital signal processor group performs limiting quantization processing on the fused corrected data within the responsible area of ​​the second digital signal processor group in the shared area to obtain second image data; the shared area fuses the first image data and the second image data to obtain final synthetic aperture radar imaging image data.

[0090] Wherein, when the first digital signal processor group and the second digital signal processor group perform azimuth gradient self-focusing processing on the seventh target data, specifically include: the first digital signal processor group obtains the seventh target data in the shared area, and performs azimuth cyclic shift, windowing, azimuth time domain conversion and multiplication with shift conjugate data on the seventh target data to obtain a first phase gradient value; determines a phase error value according to the first phase gradient value, and performs error compensation on the fused imaging data according to the phase error value to obtain azimuth error conjugate data; determines first focusing data according to the azimuth error conjugate data. The processing method of the second digital signal processor group on the seventh target data is the same as the processing method of the first digital signal processor group on the seventh target data.

[0091] Wherein, when the first digital signal processor group and the second digital signal processor group perform geometric distortion correction processing on the seventh target data, the following specifically include: dividing the responsible area of ​​the first digital signal processor group in the shared area into a plurality of correction grids, and establishing a two-dimensional coordinate system for the responsible area of ​​the first digital signal processor group, and determining the two-dimensional coordinates of the correction grid according to the two-dimensional coordinate system; performing coordinate rotation transformation on the two-dimensional coordinates of the correction grid to obtain the visual correction coordinates of the correction grid in the coordinate system established in the line of sight direction; performing interpolation operation on the visual correction coordinates to obtain the first correction data. The processing method of the second digital signal processor group when obtaining the second correction data is the same as the processing method of the first digital signal processor group when obtaining the first correction data.

[0092] The first digital signal processor group and the second digital signal processor group perform limiting quantization processing on the seventh target data, specifically including: the first digital signal processor group performs a modulus operation on the fused corrected data in the responsible area of ​​the first digital signal processor group in the shared area to obtain the maximum value and the minimum value of the modulus; when the maximum value of the modulus is greater than the preset limiting threshold value, the limiting threshold value is updated to the maximum value, and the fused corrected data less than the preset limiting threshold value is subjected to difference operation and quantization operation with the minimum value of the modulus to obtain the first image data. The processing method of the second digital signal processor group when acquiring the second image data is the same as the processing method of the first digital signal processor group when acquiring the first image data.

[0093] In this embodiment, the first digital signal processor group includes two digital signal processors, one of which is used to process odd frame data and the other is used to process even frame data; the second digital signal processor group includes two digital signal processors, one of which is used to process odd frame data and the other is used to process even frame data. The number of digital signal processors in the digital signal processor group and the selection of odd and even frame processing can be adjusted according to actual conditions.

[0094] In this embodiment, four digital signal processors DSP1, DSP2, DSP3 and DSP4 are used, wherein DSP1 and DSP2 are used to process odd frame data, DSP3 and DSP4 are used to process even frame data, and DSP1 and DSP3 are used as the first digital signal processor group, and DSP2 and DSP4 are used as the second digital signal processor group. After the FPGA chip sends the mode code to the corresponding group DSP through the serial rapid I / O (SRIO), the parameters and arrays of the DSPs in each group are initialized according to the mode code. The external plug-in (Double Data Rate SDRAM, DDR) of DSPx (x = 1, 3) stores the echo data of size Nr*Na sent by FPGA, where Nr is the number of pulse sampling points and Na is the number of pulses. When DSPx (x = 1, 3) receives the echo, it will notify DSPy (y = 2, 4), and the two chips will share the echo data. After completing initialization, DSPx (x=1,3) and DSPy (y=2,4) in the group exchange flag bits with each other through the HyperLink mechanism to achieve synchronization, that is, synchronization in the shared area.

[0095] When performing azimuth preprocessing operations, DSPx (x=1,3) moves the data to the HyperLink data sharing area according to the pulse. After synchronization, DSPx (x=1,3) processes the first half of an Nr-point pulse, and DSPy (y=2,4) processes the second half. The eight cores in the DSP process Nr / 2 points in parallel, that is, each core processes the azimuth preprocessing operations of Nr / 16 points. Finally, DSPn (n=1,2,3,4) moves the data to be processed from the HyperLink data sharing area to L2 in the core, performs azimuth preprocessing, and then moves it to the data sharing area. After each pulse is processed, the two chips in the group are synchronized. After multiple cycles, all pulses are processed, and DSPx (x=1,3) and DSPy (y=2,4) in the group are synchronized to enter the next processing step. Figure 3 shown.

[0096] When performing distance-to-scale transformation, the DSP implementation process is as follows: Figure 4 As shown, the two DSPs in each group divide the data according to the pulse direction. DSPx (x=1,3) processes the first Na / 2 pulses, DSPy (y=2,4) processes the last Na / 2 pulses, and each core in the chip processes Na / 16 pulses. Each core moves the data from the HyperLink shared area to the temporary variable Temp of L2 in the core for distance scale transformation. After completion, the result is moved back to the shared area. The cores in the chip are synchronized, and the group is synchronized after the cycle Na / 2 times. In order to improve the processing efficiency of FFT and IFFT, the DSP chip supporting library function is used to generate the rotation factor during initialization, which can be used directly when needed. As shown Figure 4shown.

[0097] When performing matrix transposition in imaging processing, the two digital signal processors in each group perform the transposition in coordination. Figure 5 As shown in the figure, the HyperLink shared area is divided into four blocks. DSPx (x = 1, 3) is responsible for data blocks ① and ③. When transposing, the data in the small block is transposed first, the storage position of data block ① remains unchanged, and data block ③ is stored in the original area at ②; DSPy (y = 2, 4) is responsible for data blocks ② and ④. When transposing, the data in the small block is transposed first, the storage position of data block ④ remains unchanged, and data block ② is stored in the original area at ③. At this time, the data in the shared area is the result of the transposition of the entire matrix.

[0098] When performing azimuth interpolation processing in imaging processing, in order to improve processing efficiency, the value table generated by the Sinc function is stored in the on-chip shared memory, and a table lookup is used to replace the Sinc function operation. The data before matrix transposition and interpolation is stored according to pulses. At the same time, the efficiency of direct memory access EDMA to move data depends to a large extent on the continuity of the destination address. Therefore, matrix transposition must be performed before interpolation. At this time, DSPx (x=1,3) processes the first Nr / 2 range gate data, DSPy (y=2,4) processes the last Nr / 2, and each core in the chip processes the interpolation of Na point data Nr / 16 times. Each core moves the data from the HyperLink shared area to the L2 in the core, and moves the result back to the shared area after completing the interpolation operation. The cores in the chip are synchronized, and the group is synchronized after Nr / 2 cycles. For example Figure 6 shown.

[0099] When performing fast Fourier transform in range and azimuth in imaging processing, in order to reduce the number of data matrix transpositions and improve efficiency, the fast Fourier transform in azimuth is moved after interpolation. Figure 5 After the matrix transposition is performed as shown, each core moves the data from the HyperLink shared area to the temporary variable Temp of L2 in the core, performs distance-direction fast Fourier transform, and moves the result back to the shared area after completion. The cores in the chip are synchronized, and the group is synchronized after the cycle Na / 2 times.

[0100] When performing the focus correction process and the azimuth gradient self-focusing process in the amplitude limiting quantization process, the following steps are specifically included. Figure 7 shown.

[0101] In the first step, DSPx (x=1,3) selects the required number of range gate data according to the maximum energy principle, which generally accounts for 5%-10% (i.e., the preset threshold), and stores the selected data (i.e., the filtered data) in the HyperLink data sharing area.

[0102] In the second step, DSPx (x=1,3) and DSPy (y=2,4) perform cyclic shift on the selected data in azimuth to maximize the modulus value at the center, perform azimuth IFFT after windowing, and then multiply it with the shifted conjugate data to obtain the phase gradient value corresponding to each range gate, and store the phase gradient matrix in the HyperLink data sharing area.

[0103] In the third step, DSPx (x = 1, 3) and DSPy (y = 2, 4) transpose the phase gradient value matrix, DSPx (x = 1, 3) sums in the distance direction, and the phase angle integral of the sum is the required phase error value, which is shared with DSPy (y = 2, 4).

[0104] In the fourth step, DSPx (x=1, 3) and DSPy (y=2, 4) respectively perform error compensation on the data in the selected data area, and then continue to perform the second and third steps and compensate until the cycle is repeated 6 times.

[0105] In the fifth step, DSPx (x=1,3) and DSPy (y=2,4) respectively conjugate-multiply their responsible areas in the entire block of data with the accumulated azimuth error, and finally store the product in the HyperLink data sharing area.

[0106] When performing the geometric distortion correction process in the focus correction process and the limited quantization process, first, DSPx (x=1,3) and DSPy (y=2,4) divide the responsible area in the shared area into several correction grids, and establish a two-dimensional coordinate system (ground XY coordinate system) for the responsible area in the shared area, so that the correction grids are evenly distributed in the ground XY coordinate system, and the two-dimensional coordinates of the correction grids are determined according to the two-dimensional coordinate system; then each DSP divides it into 8 equal parts according to the distance direction, and distributes them to 8 cores according to the address rule, and converts the two-dimensional coordinates of the correction grid in the scene stable coordinates into the coordinate system established in the line of sight through coordinate rotation transformation, and then calculates the two-dimensional position corresponding to the pixel point represented by each correction grid point by point through interpolation to obtain the fused correction data; finally, the fused correction data is moved to the temporary storage variable. When the temporary storage variable accumulates the data information of a range gate, it is moved to the result storage area using direct memory access EDMA. Figure 8 shown.

[0107] When performing the focusing correction processing and the limiting quantization processing in the limiting quantization processing, DSPx (x=1,3) and DSPy (y=2,4) take the modulus of the data blocks after geometric distortion correction that they are responsible for in the shared area, and obtain the maximum value and the minimum value of the modulus; when the maximum value of the modulus is greater than the preset limiting threshold value, the limiting threshold value is updated to the maximum value; the fused corrected data less than the preset limiting threshold value and the minimum value of the modulus are subjected to difference calculation and quantization calculation; wherein the quantization calculation is to multiply the difference by the quantization interval, and the quantization interval is the ratio of 255 to the difference between the maximum value and the minimum value, and 256-level grayscale quantization is adopted. Then the data modulus is temporarily stored in the L2 variable in the kernel, and the output result after completing the above steps is stored in the HyperLink shared area. Each data of the quantized image has only one byte, which is convenient for transmitting the data to the host computer with the help of auxiliary optical fiber, and the imaging result can be intuitively seen. Fig. 9 shown.

[0108] According to the above process, when performing high squint airborne SAR imaging, farmland, roads, buildings and other scenes in the measured scene can be clearly distinguished, indicating that the image focusing effect is good. At the same time, Table 1 is a statistical comparison of the time for data processing in each step during actual application. Through the interactive data language (IDL), it can be confirmed that this process can significantly improve the efficiency of imaging processing.

[0109] Table 1 Analysis of processing time for each step

[0110]

[0111]

[0112] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0113] The principles and implementation methods of the present invention are described in this article using specific examples. The description of the above embodiments is only used to help understand the method and core idea of ​​the present invention. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A synthetic aperture radar imaging method based on a multi-chip digital signal processor, characterized in that: include: The first digital signal processor group acquires first target data in the shared area, and performs azimuth preprocessing on the first target data to obtain first processed data; The second digital signal processor group acquires the second target data in the shared area, and performs azimuth preprocessing on the second target data to obtain second processed data; the first digital signal processor group includes at least one digital signal processor; the second digital signal processor group includes at least one digital signal processor; the first target data is the first half data of each pulse in the radar echo data; the second target data is the second half data of each pulse in the radar echo data; the shared area fuses the first processed data and the second processed data to obtain first fused data; The first digital signal processor group obtains the third target data in the shared area, and performs a distance-to-scale transformation process on the third target data to obtain third processed data; the second digital signal processor group obtains the fourth target data in the shared area, and performs a distance-to-scale transformation process on the fourth target data to obtain fourth processed data; the shared area fuses the third processed data and the fourth processed data to obtain second fused data; the third target data is a pulse data in a pulse direction in the first fused data; The fourth target data is pulse data of another pulse direction in the first fused data; The first digital signal processor group obtains the fifth target data in the shared area, and performs imaging processing on the fifth target data to obtain first imaging data; the second digital signal processor group obtains the sixth target data in the shared area, and performs imaging processing on the sixth target data to obtain second imaging data; the shared area fuses the first imaging data and the second imaging data to obtain fused imaging data; the fifth target data is pulse data with half the number of pulses in the second fused data; The sixth target data is the pulse data of the other half of the pulse number in the second fused data; The first digital signal processor group and the second digital signal processor group respectively perform focus correction processing and limit quantization processing on the fused imaging data to obtain final synthetic aperture radar imaging image data; The first digital signal processor group and the second digital signal processor group respectively perform focus correction processing and limit quantization processing on the fused imaging data to obtain final synthetic aperture radar imaging image data, specifically including: The first digital signal processor group obtains the seventh target data in the shared area, and performs azimuth gradient self-focusing processing on the fused imaging data according to the seventh target data to obtain first focusing data; the second digital signal processor group obtains the seventh target data in the shared area, and performs azimuth gradient self-focusing processing on the fused imaging data according to the seventh target data to obtain second focusing data; the shared area fuses the first focusing data and the second focusing data to obtain fused focusing data; the seventh target data is the screening data that meets the preset threshold in the fused imaging data; The responsible area of ​​the first digital signal processor group in the shared area is divided into a plurality of correction grids, and the fused focus data in the responsible area of ​​the first digital signal processor group is subjected to geometric distortion correction processing according to the correction grids to obtain first correction data; the responsible area of ​​the second digital signal processor group in the shared area is divided into a plurality of correction grids, and the fused focus data in the responsible area of ​​the second digital signal processor group is subjected to geometric distortion correction processing according to the correction grids to obtain second correction data; the shared area fuses the first correction data and the second correction data to obtain fused correction data; The first digital signal processor group performs limiting quantization processing on the fused corrected data within the responsible area of ​​the first digital signal processor group in the shared area to obtain first image data; the second digital signal processor group performs limiting quantization processing on the fused corrected data within the responsible area of ​​the second digital signal processor group in the shared area to obtain second image data; the shared area fuses the first image data and the second image data to obtain final synthetic aperture radar imaging image data.

2. The synthetic aperture radar imaging method based on multiple digital signal processors according to claim 1, characterized in that: The first digital signal processor group acquires first target data in the shared area and performs azimuth preprocessing on the first target data to obtain first processed data, specifically including: The first digital signal processor group acquires the first target data in the shared area, and performs Doppler shift elimination, pre-filtering, azimuth extraction and Doppler frequency shift recovery phase multiplication operations on the first target data to obtain first processed data.

3. The synthetic aperture radar imaging method based on multiple digital signal processors according to claim 1, characterized in that: The first digital signal processor group acquires the third target data in the shared area and performs distance-to-scale transformation on the third target data to obtain third processed data, specifically including: The first digital signal processor group acquires the third target data in the shared area, and multiplies the third target data with a scaling function to obtain first operation data; Performing frequency domain conversion on the first operation data, and multiplying the first operation data in the frequency domain by a first system function to obtain second operation data; Performing time domain conversion on the second operation data, and multiplying the second operation data in the time domain by an inverse scaling function to obtain third operation data; The third operation data is converted into a frequency domain, and the third operation data in the frequency domain is multiplied by the second system function to obtain third processed data.

4. The synthetic aperture radar imaging method based on multiple digital signal processors according to claim 1, characterized in that: The first digital signal processor group acquires the fifth target data in the shared area, and performs imaging processing on the fifth target data to obtain first imaging data; the second digital signal processor group acquires the sixth target data in the shared area, and performs imaging processing on the sixth target data to obtain second imaging data, specifically including: Dividing the shared area into a plurality of sub-areas according to the responsible area of ​​the first digital signal processor group and the responsible area of ​​the second digital signal processor group, and performing matrix transposition on each of the sub-areas to obtain a transposed shared area; The first digital signal processor group obtains the fifth target data in the transposed shared area, and performs azimuth interpolation processing on the fifth target data to obtain first azimuth processed data; the second digital signal processor group obtains the sixth target data in the transposed shared area, and performs azimuth interpolation processing on the sixth target data to obtain second azimuth processed data; the transposed shared area fuses the first azimuth processed data and the second azimuth processed data to obtain third fused data; The first digital signal processor group performs fast Fourier transform in range and azimuth directions on the third fused data within the responsible area of ​​the first digital signal processor group in the transposed shared area to obtain first imaging data; the second digital signal processor group performs fast Fourier transform in range and azimuth directions on the third fused data within the responsible area of ​​the second digital signal processor group in the transposed shared area to obtain second imaging data.

5. The synthetic aperture radar imaging method based on multiple digital signal processors according to claim 1, characterized in that: The first digital signal processor group acquires the seventh target data in the shared area, and performs azimuth gradient self-focusing processing on the fused imaging data according to the seventh target data to obtain first focusing data, specifically including: The first digital signal processor group acquires the seventh target data in the shared area, and performs azimuth cyclic shift, windowing, azimuth time domain conversion, and multiplication with shift conjugate data on the seventh target data to obtain a first phase gradient value; Determining a phase error value according to the first phase gradient value, and performing error compensation on the fused imaging data according to the phase error value to obtain azimuth error conjugate data; The first focusing data is determined according to the azimuth error conjugate data.

6. The synthetic aperture radar imaging method based on multiple digital signal processors according to claim 1, characterized in that: The step of dividing the responsible area of ​​the first digital signal processor group in the shared area into a plurality of correction grids, and performing geometric distortion correction processing on the fused focus data in the responsible area of ​​the first digital signal processor group according to the correction grids to obtain first correction data specifically includes: Dividing the responsible area of ​​the first digital signal processor group in the shared area into a plurality of correction grids, establishing a two-dimensional coordinate system for the responsible area of ​​the first digital signal processor group, and determining the two-dimensional coordinates of the correction grid according to the two-dimensional coordinate system; Performing a coordinate rotation transformation on the two-dimensional coordinates of the correction grid to obtain the visual correction coordinates of the correction grid in a coordinate system established in the line of sight direction; An interpolation operation is performed on the visual correction coordinates to obtain first correction data.

7. The synthetic aperture radar imaging method based on multiple digital signal processors according to claim 1, characterized in that: The first digital signal processor group performs limiting quantization processing on the fused corrected data in the responsible area of ​​the first digital signal processor group in the shared area to obtain first image data, specifically including: The first digital signal processor group performs a modulus operation on the fused correction data in the responsible area of ​​the first digital signal processor group in the shared area to obtain a maximum modulus value and a minimum modulus value; When the maximum value of the modulus is greater than the preset clipping threshold, the clipping threshold is updated to the maximum value, and the fused corrected data less than the preset clipping threshold is subjected to difference calculation and quantization calculation with the minimum value of the modulus to obtain the first image data.

8. The synthetic aperture radar imaging method based on multiple digital signal processors according to claim 1, characterized in that: The first digital signal processor group includes two digital signal processors, one of which is used to process odd frame data and the other is used to process even frame data; the second digital signal processor group includes two digital signal processors, one of which is used to process odd frame data and the other is used to process even frame data.

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