Dual-frequency tunable SMASH delta-sigma modulator

Abstract

The application discloses a dual-frequency adjustable SMASH delta-sigma modulator. The modulator comprises a first stage and a second stage which are of the same structure; the first stage and the second stage are both two-order delta-sigma modulators; from the whole architecture, an input signal X is input into the first stage, after quantization of a first quantizer Q1 of the first stage, the input Y1 of the first quantizer Q1 and the output of the first quantizer Q1, that is, the output of the first stage, are subtracted to obtain first quantization noise E1 of the first quantizer Q1 and input into the second stage, and the output of the first stage and the output of the second stage are added and subtracted to obtain an output signal V; the application realizes that the dual frequency is arbitrarily adjustable in the range of 0-f s / 2, ensures that the two signals do not affect each other, realizes the transmission of the dual-frequency signal, and improves the integrity of the signal.

Description

Technical Field

[0001] This invention relates to the field of multi-band system applications, and specifically to a dual-frequency adjustable SMASH (Sturdy-MASH) delta-sigma modulator. Background Technology

[0002] With the rapid development of wireless communication technology, wireless communication devices are becoming increasingly miniaturized, highly integrated, efficient, and low-power. Compared to traditional analog transmitters, digital transmitters offer advantages such as flexible configuration, reconfigurability, high integration, high efficiency, and low power consumption. Therefore, digital transmitters represent the future trend for wireless transmitter systems.

[0003] In recent years, various digital transmitter schemes have been proposed. From the perspective of quantization coding, common methods include delta-sigma coding and PWM coding. However, both methods have their own advantages and disadvantages. Delta-sigma modulation can achieve high conversion accuracy and signal-to-noise ratio. At the same time, oversampling and noise shaping techniques can reduce in-band noise, achieving a good noise shaping effect. However, delta-sigma modulators have feedback loops, so the frequency of delta-sigma modulation is always limited, and it also introduces a lot of out-of-band quantization noise. In addition, higher-order delta-sigma can lead to instability. While PWM modulation does not have feedback loops and has a more stable structure, the harmonic frequencies of its output signal are closer to the signal frequency, requiring high-precision filters to remove them. At the same time, PWM modulation does not have the noise shaping characteristics of Delta-sigma, which introduces in-band distortion and high-power harmonic components. To eliminate these noises, high-performance narrowband filters must be designed, increasing the design difficulty.

[0004] Currently, there is limited literature on fully digital transmitters based on dual-frequency tunable delta-sigma. One paper proposes a delta-sigma modulator based on error feedback. This modulator has a simple structure, and by changing the coefficients, the arbitrary center frequency of the delta-sigma modulator can be easily adjusted. Its single-frequency tunable structure is simple and easy to implement, but when extended to dual-frequency, the structure becomes complex and begins to destabilize. Therefore, poles need to be added to stabilize the structure. However, adding corresponding poles leads to a deterioration in modulation performance and consumes a large amount of resources. Summary of the Invention

[0005] The purpose of this invention is to propose, for the first time, a dual-frequency adjustable SMASH delta-sigma modulator that achieves better performance with less resource consumption. This delta-sigma modulator can be used in a dual-frequency adjustable all-digital transmitter, enabling a better realization of an all-digital transmitter with arbitrarily adjustable dual frequencies.

[0006] The objective of this invention is achieved by at least one of the following technical solutions.

[0007] A dual-frequency adjustable SMASH delta-sigma modulator, comprising a first stage (stage 1) and a second stage (stage 2) with identical structures;

[0008] Both the first stage (stage 1) and the second stage (stage 2) are two-order delta-sigma modulators.

[0009] From the perspective of the overall architecture, the input signal X is input to the first stage 1. After quantization by the first quantizer Q1 of the first stage 1, the input Y1 and the output of the first quantizer Q1 are the output of the first stage 1. Subtracting the two values ​​yields the first quantization noise E1 of the first quantizer Q1, which is then input into the second stage (stage 2). This is the output of the first stage (stage 1). Output of Stage 2 The output signal V is obtained by addition and subtraction.

[0010] Furthermore, the first stage 1 includes a first integrator, a second integrator, and a first quantizer Q1;

[0011] In the first stage 1, the first feedback proportional coefficient a1, the first feedforward channel coefficient b1, and the first resonant coefficient g1 are set;

[0012] The first stage (stage 1) receives the input signal X and obtains the output of the first stage (stage 1). Specifically as follows:

[0013]

[0014]

[0015] Among them, U 1_1 and U 1_2 These are the outputs of the first integrator and the second integrator, respectively; E1 is the first quantization noise generated by the first quantizer Q1; Y1 is the input signal of the first quantizer Q1; z -1 Delay representing one unit of time; and These are the operations of the first integrator and the second integrator, respectively. This represents the output of the first quantizer Q1, which is also the output of the first stage 1.

[0016] Furthermore, the second stage 2 includes a third integrator, a fourth integrator, and a second quantizer Q2;

[0017] In the second stage 2, the second feedback proportional coefficient a2, the second feedforward channel coefficient b2, and the second resonant coefficient g2 are set.

[0018] The second stage (stage 2) receives the first quantization noise E1 and obtains the output of the second stage (stage 2). Specifically as follows:

[0019]

[0020]

[0021] Among them, U 2_1 and U 2_2 These are the outputs of the third and fourth integrators, respectively; E2 is the second quantization noise generated by the second quantizer; Y2 is the input signal of the second quantizer Q2; and These are the operations of the third and fourth integrators, respectively. This represents the output of the second quantizer Q2, which is also the output of the second stage 2.

[0022] Furthermore, in order to minimize the number of bits in the output, both the first quantizer Q1 and the second quantizer Q2 are single-bit quantizers.

[0023] Furthermore, for the classic CRFB delta-sigma structure, the delta-sigma modulators in the first stage (stage 1) and the second stage (stage 2) are both classic resonator structures with distributed feedback (CRFB). To ensure system stability, the zeros and poles of the noise transfer function are all located within the unit element. In the first stage (stage 1) and the second stage (stage 2), a is set... i =b i , i = 1, 2.

[0024] Based on the traditional SMASH architecture, the following formula can be obtained:

[0025] V=STF1×X-NTF1×NTF2×E2+NTF1(1-STF2)×E1;

[0026] Wherein, STF1 is the signal transfer function of stage 1, NTF1 is the noise transfer function of stage 1, STF2 is the signal transfer function of stage 2, and NTF2 is the noise transfer function of stage 2.

[0027] In summary, based on the structure of this invention and the traditional SMASH architecture, the following formula can be obtained:

[0028]

[0029]

[0030] Among them, L 2_1 It is the transfer function of the feedback signal of the second-stage loop filter, L 2_0 It is the transfer function of the input signal of the second-stage loop filter;

[0031] The output of stage 2 is as follows:

[0032]

[0033] The signal transfer function STF2 and noise transfer function NTF2 of stage 2 can be expressed as:

[0034]

[0035]

[0036] Similarly, the signal transfer function STF1 and noise transfer function NTF1 of stage 1 can be expressed as:

[0037] STF1=1

[0038]

[0039] The overall output of this SMASH architecture can be derived:

[0040] V=STF1×X-NTF1×NTF2×E2+NTF1×(1-STE2)×E1

[0041] =X - NTF1 × NTF2 × E2

[0042] Based on the formula for the overall output, the following conclusions can be drawn: First, for the input signal X, the overall signal transfer function STF = STF1·STF2 = 1, and the amplitude-frequency response is also 1 in the entire frequency band. The signal can propagate in the entire frequency band without delay, thus realizing real-time signal transmission.

[0043] Then, by analyzing the noise, it can be seen that the final overall output signal V is only related to the second quantization noise E2. The second quantization noise E2 is closer to white noise and smaller than the first quantization noise E1. At the same time, the first quantization noise E1 has been eliminated.

[0044] The noise transfer function (NTF) of the overall modulator is analyzed. Since NTF = NTF1 × NTF2, two dips can be generated using NTF1 and NTF2 to modulate two different signals.

[0045] First, let's analyze the noise transfer function NTF1 of stage 1, as follows:

[0046] Known This is clearly an IIR filter. Let r1 = 1 - g1 - a1. When g1 and a1 are configured such that r1 = 0, then NTF1 = 1, which is an FIR function. The purpose of the noise transfer function is to make the noise transfer function zero at the frequency of signal transmission. For ease of analysis, r1 = 0. First, simplify by letting ratio1 = -(2 - g1), then NTF1 = 1 + ratio1 × Z. -1 +Z -2 ,make Will Substitute NTF1 and simplify, as follows:

[0047]

[0048] That is, ratio1 = -2cos(2πf1 / f) s ).

[0049] Therefore, when the sampling frequency is constant, the coefficient ratio1 corresponding to the zero point of the noise transfer function can be obtained at different carrier frequencies. When the carrier frequency changes, the corresponding coefficient ratio1 also changes, and the notch of the noise transfer function will be located exactly at the signal carrier frequency, reducing the impact of quantization noise on the transmitted signal. Thus, by changing the value of the delta-sigma coefficient, the center frequency of the delta-sigma modulator can be adjusted arbitrarily.

[0050] The above analysis pertains to the noise transfer function NTF1 of stage 1. The noise transfer function NTF2 of stage 2 is similar to NTF1, and it's easy to derive ratio2 = -2cos(2πf² / f). s Therefore, two notch filters can appear, f1 and f2 being the desired center frequencies for signal transmission, f s It is the oversampling frequency. This allows two different signals to be transmitted simultaneously using a single delta-sigma architecture, and simultaneously upconverted to different frequency points.

[0051] The above scenario assumes the absence of poles. However, analysis shows that if the signals before the quantizer undergo multiple additions, exceeding the quantizer's capacity, the entire system will become unstable. Further analysis reveals that the two zeros of the transfer function lie on the unit circle and have no poles. At any zero location, system instability is inevitable. To suppress the gain of NTF(Z) and stabilize the system, NTF1 and NTF2 must contain corresponding poles. Therefore, NTF(Z) can be expressed as:

[0052]

[0053] Where ratio1 = -(2-g1), r1 = 1-g1-a1, ratio2 = -(2-g2), r2 = 1-g2-a2; thus, each noise transfer function will have its own pole. ratio1 is an intermediate operator related to the notch filter at the first frequency f1, ratio2 is an intermediate operator related to the notch filter at the second frequency f2, r1 is an operator related to the pole at the first frequency f1, and r2 is an operator related to the pole at the second frequency f2; the values ​​of r1 and r2 are between -1 and 1, used to adjust the poles to ensure system stability. Furthermore, the separate operation of r1 and r2 allows for more flexible adjustment of each notch filter individually.

[0054] Furthermore, the modulator coefficients are set according to the input signal X. Let there be a first signal X1 and a second signal X2, X = X1 + X2; the carrier frequency of the first signal X1 is at the first frequency point f1, and the carrier frequency of the second signal X2 is at the second frequency point f2, and 0 <= f1, f2 <= f2. s / 2, then the details are as follows:

[0055] ratio i =2-g i = -2cos(2πf) i / f s )

[0056] g i =2-ratio i

[0057] r i =1-g i -a i

[0058] a i =1-r i -g i

[0059] Among them, f s For the oversampling frequency, -1 <= r i <= 1, i = 1, 2.

[0060] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0061] 1. This invention first proposes a dual-frequency adjustable SMASH delta-sigma modulator, which can be applied in a dual-frequency adjustable all-digital transmitter. It utilizes a single delta-sigma architecture to realize the transmission of two signals in different frequency bands, making it flexible and adjustable.

[0062] 2. The dual-frequency adjustable SMASH Delta-Sigma modulator proposed in this invention effectively improves the signal-to-noise ratio of the system, realizes wideband signal transmission, and has good performance. Attached Figure Description

[0063] Figure 1 This is the dual-frequency adjustable SMASH Delta-Sigma modulator proposed in the embodiments of the present invention.

[0064] Figure 2 This is a diagram of the traditional SMASH architecture.

[0065] Figure 3 This is a schematic diagram of the amplitude response when ratio1 and ratio2 take different values ​​in an embodiment of the present invention.

[0066] Figure 4 This is a schematic diagram of the amplitude response when r1 and r2 take different values ​​in an embodiment of the present invention.

[0067] Figure 5 This is a schematic diagram of the signal before modulation by the modulator in an embodiment of the present invention.

[0068] Figure 6 This is a schematic diagram of the signal after modulation by the modulator in an embodiment of the present invention. Detailed Implementation

[0069] The accompanying drawings are for illustrative purposes only and should not be construed as limiting the invention. It will be understood by those skilled in the art that certain well-known structures and their descriptions may be omitted from the drawings. The positional relationships described in the drawings are for illustrative purposes only and should not be construed as limiting the invention.

[0070] Example 1:

[0071] Dual-frequency adjustable SMASH delta-sigma modulator, such as Figure 1 As shown, it includes a first-level stage1 and a second-level stage2 with the same structure;

[0072] Both the first stage (stage 1) and the second stage (stage 2) are two-order delta-sigma modulators.

[0073] From the perspective of the overall architecture, the input signal X is input to the first stage 1. After quantization by the first quantizer Q1 of the first stage 1, the input Y1 and the output of the first quantizer Q1 are the output of the first stage 1. Subtracting the two values ​​yields the first quantization noise E1 of the first quantizer Q1, which is then input into the second stage (stage 2). This is the output of the first stage (stage 1). Output of Stage 2 The output signal V is obtained by addition and subtraction.

[0074] The first stage, stage 1, includes a first integrator, a second integrator, and a first quantizer, Q1.

[0075] In the first stage 1, the first feedback proportional coefficient a1, the first feedforward channel coefficient b1, and the first resonant coefficient g1 are set;

[0076] The first stage (stage 1) receives the input signal X and obtains the output of the first stage (stage 1). Specifically as follows:

[0077]

[0078]

[0079] Among them, U 1_1 and U 1_2 These are the outputs of the first integrator and the second integrator, respectively; E1 is the first quantization noise generated by the first quantizer Q1; Y1 is the input signal of the first quantizer Q1; z -1 Delay representing one unit of time; and These are the operations of the first integrator and the second integrator, respectively. This represents the output of the first quantizer Q1, which is also the output of the first stage 1.

[0080] The second stage, stage 2, includes a third integrator, a fourth integrator, and a second quantizer, Q2.

[0081] In the second stage 2, the second feedback proportional coefficient a2, the second feedforward channel coefficient b2, and the second resonant coefficient g2 are set.

[0082] The second stage (stage 2) receives the first quantization noise E1 and obtains the output of the second stage (stage 2). Specifically as follows:

[0083]

[0084]

[0085] Among them, U 2_1 and U 2_2 These are the outputs of the third and fourth integrators, respectively; E2 is the second quantization noise generated by the second quantizer; Y2 is the input signal of the second quantizer Q2; and These are the operations of the third and fourth integrators, respectively. This represents the output of the second quantizer Q2, which is also the output of the second stage 2.

[0086] To minimize the number of bits in the output, both the first quantizer Q1 and the second quantizer Q2 use single-bit quantizers.

[0087] For the classic CRFB delta-sigma structure, the delta-sigma modulators in both stage 1 and stage 2 are classic resonators with distributed feedback (CRFB). To ensure system stability, the zeros and poles of the noise transfer function are all located within the unit element. In both stage 1 and stage 2, a is set... i =b i , i = 1, 2.

[0088] like Figure 2 As shown, based on the traditional SMASH architecture, the following formula can be obtained:

[0089] V=STF1×X-NTF1×NTF2×E2+NTF1(1-STF2)×E1;

[0090] Wherein, STF1 is the signal transfer function of stage 1, NTF1 is the noise transfer function of stage 1, STF2 is the signal transfer function of stage 2, and NTF2 is the noise transfer function of stage 2.

[0091] In summary, based on the structure of this invention and the traditional SMASH architecture, the following formula can be obtained:

[0092]

[0093]

[0094] Among them, L 2_1 It is the transfer function of the feedback signal of the second-stage loop filter, L 2_0 It is the transfer function of the input signal of the second-stage loop filter;

[0095] The output of stage 2 is as follows:

[0096]

[0097] The signal transfer function STF2 and noise transfer function NTF2 of stage 2 can be expressed as:

[0098]

[0099]

[0100] Similarly, the signal transfer function STF1 and noise transfer function NTF1 of stage 1 can be expressed as:

[0101] STF1=1

[0102]

[0103] The overall output of this SMASH architecture can be derived:

[0104] V=STF1×X-NTF1×NTF2×E2+NTF1×(1-STE2)×E1

[0105] =X - NTF1 × NTF2 × E2

[0106] Based on the formula for the overall output, the following conclusions can be drawn: First, for the input signal X, the overall signal transfer function STF = STF1·STF2 = 1, and the amplitude-frequency response is also 1 in the entire frequency band. The signal can propagate in the entire frequency band without delay, thus realizing real-time signal transmission.

[0107] Then, by analyzing the noise, it can be seen that the final overall output signal V is only related to the second quantization noise E2. The second quantization noise E2 is closer to white noise and smaller than the first quantization noise E1. At the same time, the first quantization noise E1 has been eliminated.

[0108] The noise transfer function (NTF) of the overall modulator is analyzed. Since NTF = NTF1 × NTF2, two dips can be generated using NTF1 and NTF2 to modulate two different signals.

[0109] First, let's analyze the noise transfer function NTF1 of stage 1, as follows:

[0110] Known This is clearly an IIR filter. Let r1 = 1 - g1 - a1. When g1 and a1 are configured such that r1 = 0, then NTF1 = 1, which is an FIR function. The purpose of the noise transfer function is to make the noise transfer function zero at the frequency of signal transmission. For ease of analysis, r1 = 0. First, simplify by letting ratio1 = -(2 - g1), then NTF1 = 1 + ratio1 × Z. -1 +Z -2 ,make Will Substitute NTF1 and simplify, as follows:

[0111]

[0112] That is, ratio1 = -2cos(2πf1 / f) s ).

[0113] Therefore, when the sampling frequency is constant, the coefficient ratio1 corresponding to the zero point of the noise transfer function can be obtained at different carrier frequencies. When the carrier frequency changes, the corresponding coefficient ratio1 also changes, and the notch of the noise transfer function will be located exactly at the signal carrier frequency, reducing the impact of quantization noise on the transmitted signal. Thus, by changing the value of the delta-sigma coefficient, the center frequency of the delta-sigma modulator can be adjusted arbitrarily.

[0114] The above analysis pertains to the noise transfer function NTF1 of stage 1. The noise transfer function NTF2 of stage 2 is similar to NTF1, and it's easy to derive ratio2 = -2cos(2πf² / f). s Therefore, two notch filters can appear, f1 and f2 being the desired center frequencies for signal transmission, f s It is the oversampling frequency. This allows two different signals to be transmitted simultaneously using a single delta-sigma architecture, and simultaneously upconverted to different frequency points.

[0115] The above scenario assumes the absence of poles. However, analysis shows that if the signals before the quantizer undergo multiple additions, exceeding the quantizer's capacity, the entire system will become unstable. Further analysis reveals that the two zeros of the transfer function lie on the unit circle and have no poles. At any zero location, system instability is inevitable. To suppress the gain of NTF(Z) and stabilize the system, NTF1 and NTF2 must contain corresponding poles. Therefore, NTF(Z) can be expressed as:

[0116]

[0117] Where ratio1 = -(2-g1), r1 = 1-g1-a1, ratio2 = -(2-g2), r2 = 1-g2-a2; thus, each noise transfer function will have its own pole. ratio1 is an intermediate operator related to the notch filter at the first frequency f1, ratio2 is an intermediate operator related to the notch filter at the second frequency f2, r1 is an operator related to the pole at the first frequency f1, and r2 is an operator related to the pole at the second frequency f2. The values ​​of r1 and r2 are between -1 and 1, used to adjust the poles to ensure the stability of the system. At the same time, the separate operation of r1 and r2 allows for more flexible adjustment of each notch filter.

[0118] The modulator coefficients are set based on the input signal X. Let there be a first signal X1 and a second signal X2, where X = X1 + X2. The carrier frequency of the first signal X1 is at the first frequency point f1, and the carrier frequency of the second signal X2 is at the second frequency point f2, with 0 < f1 and f2 <= f2. s / 2, then the details are as follows:

[0119] ratio i =2-g i = -2cos(2πf) i / f s )

[0120] g i =2-ratio i

[0121] ri =1-g i -a i

[0122] a i =1-r i -g i

[0123] Among them, f s For the oversampling frequency, -1 <= r i <= 1, i = 1, 2;

[0124] In this embodiment, as Figure 3 As shown, the amplitude-frequency response diagrams of NTF(z) are plotted when r1 = r2 = 0, with different values ​​of ratio1 and ratio2. Analysis shows that this invention only requires simple changes to ratio1 and ratio2 to change the system configuration, achieving arbitrary adjustment of the center frequency of the transmitted signal. During RF signal transmission, the values ​​of ratio1 and ratio2 are set according to the carrier frequency, employing a bandpass or high-pass Delta-Sigma modulator. The amplitude-frequency response of the noise transfer function differs at different frequencies, resulting in varying noise suppression effects. The two zeros generated are related to f. s The signal is symmetrical about 2, and in reality, the useful signal and the image signal emitted are also about f. s / 2 symmetry, therefore generally 0~f s / 2 represents the range of adjustable carrier frequencies. Furthermore, in practical applications, the final sampling frequency and coefficient ratio can be determined based on different communication scenarios to achieve optimal transmission performance.

[0125] Example 2:

[0126] In this embodiment, as Figure 4 As shown, the spectral response diagrams are compared when r1 and r2 take different values, with the same ratio1 and ratio2. It can be seen that the concave area and bandwidth are not the same when r1 and r2 take different values.

[0127] Example 3:

[0128] In this embodiment, as Figure 5 As shown, Figure 5 This is the modulator input signal after the original signal has undergone interpolation and up-conversion. This signal is the sum of two frequency signals, where f1 is at f... s / 8,f2 in 3*f s / 8. The ranges of f1 and f2 are related to the oversampling frequency f. s Regarding this, the maximum sampling rate can be up to half, i.e., f. s / 2. Both f1 and f2 are 0-f s / 2 is adjustable.

[0129] The entire delta-sigma modulator utilizes noise shaping to generate two notches, which correspond precisely to the frequency points of two different signals in the input signal, thus enabling better modulation and transmission of the signal.

[0130] Spectral analysis of the output signal of the entire modulator is performed to verify the invention, such as... Figure 6 As shown, this delta-sigma modulation structure has a good noise shaping effect, the two frequency points do not interfere with each other, and both have a good signal-to-noise ratio.

Claims

1. A dual frequency tunable SMASH delta-sigma modulator, characterized by, comprise a first stage stage1 and a second stage stage2 of identical structure; the first stage stage1 and the second stage stage2 are both two-stage delta-sigma modulators; From the perspective of the overall architecture, input signals X Input is the first stage (stage 1), and the first quantizer of stage 1. Q 1. After quantization, the first quantizer Q Input of 1 Y 1 and the first quantizer Q The output of 1 is the output of stage 1. Subtracting them, we get the first quantizer. Q 1 First quantization noise E 1. Input the second stage (stage2) and output the first stage (stage1). Output of Stage 2 Subtraction yields the output signal V , ； According to the input signal Set the modulator coefficients, assuming the first signal... Second signal , First signal The carrier frequency at the first frequency point Second signal The carrier frequency at the second frequency point place, and The specifics are as follows: in, f s For oversampling frequency, , ; It is the first frequency point Intermediate operators related to notch filtering, It is the second frequency point Intermediate operators related to notch filtering, It is the first frequency point Extreme-related operators, It is the second frequency point The pole-related operators; the first stage (stage 1) includes a first integrator, a second integrator, and a first quantizer. Q 1; In the first stage (stage 1), set the first feedback ratio coefficient. First feedforward channel coefficient and the first resonance coefficient The second stage, stage 2, includes a third integrator, a fourth integrator, and a second quantizer. Q 2; a second feedback proportional coefficient is set in the second stage stage2 , a second feedforward channel coefficient and a second resonance coefficient .

2. The dual-frequency tunable SMASH delta-sigma modulator of claim 1, wherein, The operations of the first integrator and the second integrator are respectively and , z -1 It represents a delay of one unit of time.

3. The dual-frequency tunable SMASH delta-sigma modulator of claim 2, wherein, The first stage stage1 receives an input signal X , to obtain an output of the first stage stage1 , as follows: ； ； wherein is the output of the second integrator; is the first quantizer Q 1 the first quantization noise generated; Y 1 is the first quantizer Q 1 the input signal; denotes the output of the first quantizer Q 1, which is also the output of the first stage stage1.

4. The dual-frequency tunable SMASH delta-sigma modulator of claim 3, wherein, The operations of the third integrator and the fourth integrator are, respectively, and .

5. The dual-frequency adjustable SMASH delta-sigma modulator according to claim 4, characterized in that, The second stage stage2 receives the first quantization noise , to obtain an output of the second stage stage2 , as follows: in, This is the output of the fourth integrator; The second quantization noise generated by the second quantizer; Y 2 is the second quantizer Q 2. Input signal; Indicates the second quantizer Q The output of stage 2 is also the output of stage 2.

6. The dual-frequency tunable SMASH delta-sigma modulator of claim 2, wherein, In order to reduce the number of output bits as much as possible, the first quantizer Q 1 and the second quantizer Q 2 both employ a single-bit quantizer.

7. The dual-frequency tunable SMASH delta-sigma modulator of claim 2, wherein, For the classical CRFB delta-sigma structure, in the first stage stage1 and the second stage stage2, the following is provided = , .

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