Frame Synchronization Method and Device, Computer-Readable Medium, Electronic Device

Abstract

The present disclosure specifically relates to the field of computer technologies, and particularly to a frame synchronization method and apparatus, a computer-readable medium, and an electronic device. The frame synchronization method includes: in response to receiving a data packet to be processed from a peer device, when identifying that the corresponding index is zero, reading data of a preset length from a data interface and writing the data into a buffer; reading data from a first target position in the buffer, and when determining a frame header, correcting the index based on the position of the frame header in the buffer; and reading data from a second target position in the buffer, and when determining a frame tail, performing verification on the frame header and the frame tail, and completing frame synchronization of the data packet to be processed when the verification passes. By implementing the overall judgment of the data frame, the method effectively improves the frame synchronization performance and can improve the fault tolerance performance of frame synchronization.

Description

Technical Field

[0001] The present disclosure relates to the field of computer technologies, and in particular, to a frame synchronization method, a frame synchronization device, a computer-readable medium, and an electronic device. Background Art

[0002] In a digital time-division multiplexing communication system, in order to correctly separate each time-slot signal, a start marker of each frame must be provided at the sending end, and the process of detecting and obtaining this marker at the receiving end is called frame synchronization. In some existing technical solutions, methods such as character counting method and byte stuffing end delimiter method can be used to achieve frame synchronization. However, the above methods all have certain defects. Among them, the character counting method has poor reliability; while the byte stuffing end delimiter method increases the transmission data capacity and reduces the transmission performance due to the addition of escape character detection. In addition, for example, the end marker method of bit stuffing and the physical coding violation method need to adopt specific bit coding methods, and the application scenarios are limited to a certain extent.

[0003] It should be noted that the information disclosed in the above background art section is only used to enhance the understanding of the background of the present disclosure, and thus may include information that does not constitute the prior art known to those of ordinary skill in the art. Summary of the Invention

[0004] The present disclosure provides a frame synchronization method, a frame synchronization device, a computer-readable medium, and an electronic device, which can implement a high-fault-tolerant and high-performance frame synchronization solution based on the data link layer.

[0005] Other features and advantages of the present disclosure will become apparent through the following detailed description, or be learned in part through the practice of the present disclosure.

[0006] According to a first aspect of the present disclosure, there is provided a frame synchronization method, including:

[0007] In response to receiving a data packet to be processed from a peer device, when identifying that the corresponding index is zero, read data of a preset length from a data interface and write it into a buffer;

[0008] Read data from a first target position in the buffer, and when determining a frame header, correct the index based on the position of the frame header in the buffer; and

[0009] Read data from a second target position in the buffer, and when determining a frame tail, perform verification on the frame header and the frame tail, and complete frame synchronization of the data packet to be processed when the verification passes.

[0010] In this exemplary embodiment, when receiving a data packet to be processed from a peer device and identifying that the corresponding index is zero, reading a preset length of data from a data interface and writing it into a buffer includes:

[0011] When receiving a data packet to be processed from a peer device, perform an initialization operation and enter a first data processing state;

[0012] When the index is zero, enter a second data processing state;

[0013] Read a preset length of data from the data interface and write it into the buffer, and enter a third data processing state.

[0014] In this exemplary embodiment, the preset length is the frame length of the data link layer;

[0015] The reading of the preset length of data and writing it into the buffer includes:

[0016] Place the preset length of data starting from a first preset position in the buffer.

[0017] In this exemplary embodiment, when reading data from a first target position in the buffer and determining a frame header, modifying the index based on the position of the frame header in the buffer includes:

[0018] In the third data processing state, starting from the first target position in the buffer, identify whether a frame header identifier is included; and when the frame header identifier is identified, modify the index based on the position of the frame header identifier in the buffer; and

[0019] Add first status identification information indicating the existence of the frame header.

[0020] In this exemplary embodiment, when reading data from a second target position in the buffer and determining a frame tail, performing a check on the frame header and the frame tail, and when the check passes, completing frame synchronization for the data packet to be processed includes:

[0021] In the third data processing state, when the first status identification information indicating the existence of the frame header is identified and the index is zero, determine whether the second target position in the buffer is the frame tail;

[0022] When it is determined that the second target position in the buffer is the frame tail, perform a check on the frame header and the frame tail;

[0023] When the checks on the frame header and the frame tail pass, determine frame synchronization for the data packet to be processed.

[0024] In this exemplary embodiment, when performing the check on the frame header and the frame tail, the method further includes:

[0025] Calculate a checksum based on the data in the buffer, and compare the calculated checksum with the checksum sent by the peer device;

[0026] When the checksum, as well as the frame header and frame tail, all pass the verification, determine frame synchronization for the data packet to be processed.

[0027] In this exemplary embodiment, the method further includes:

[0028] If any one of the frame header, frame tail, and checksum fails the verification, identify the frame header starting from the third target position in the buffer;

[0029] When the frame header is identified, correct the index according to the current position of the frame header and enter the first data processing state; or

[0030] When the identification of the frame header fails, set the index to zero and enter the first data processing state.

[0031] In this exemplary embodiment, the method further includes:

[0032] After entering the first data processing state, when it is identified that the index is not zero, delete the data before the position corresponding to the index value in the buffer;

[0033] Enter the second data processing state, read data with a length equal to the index value from the data interface and write it into the buffer.

[0034] In this exemplary embodiment, the method further includes:

[0035] Enter the third data processing state. If the frame header does not exist at the position corresponding to the index value in the buffer, set the index to zero; and

[0036] Enter the first data processing state.

[0037] In this exemplary embodiment, the method further includes:

[0038] In the third data processing state, when the first status identification information indicating the existence of the frame header is identified and the index is less than zero or greater than the value of the data link layer frame length, set the index to zero; and

[0039] Enter the first data processing state.

[0040] According to a second aspect of the present disclosure, there is provided a frame synchronization apparatus, including:

[0041] A data reading module, configured to, in response to receiving a data packet to be processed from a peer device, when identifying that the corresponding index is zero, read data of a preset length from a data interface and write the data into a buffer;

[0042] An index correction module, configured to read data from a first target position in the buffer, and when determining a frame header, correct the index based on the position of the frame header in the buffer; and

[0043] A verification module, configured to read data from a second target position in the buffer, and when determining a frame tail, verify the frame header and the frame tail, and complete frame synchronization of the data packet to be processed when the verification passes.

[0044] According to a third aspect of the present disclosure, there is provided a computer-readable medium, on which a computer program is stored, and when the computer program is executed by a processor, the above-mentioned frame synchronization method is implemented.

[0045] According to a fourth aspect of the present disclosure, there is provided an electronic device, including:

[0046] One or more processors;

[0047] A storage device, configured to store one or more programs, and when the one or more programs are executed by the one or more processors, enable the one or more processors to implement the above-mentioned frame synchronization method.

[0048] The frame synchronization method provided by an embodiment of the present disclosure, after receiving a data packet to be processed sent by a peer device, can first identify the corresponding index, when determining that the index is zero, read data of a preset length from a data interface and write the data into a buffer, and identify and verify the frame header and the frame tail at a specified position in the buffer; when the verification is successful, complete frame synchronization at the data link layer, thereby realizing the judgment of the overall data frame and effectively improving the frame synchronization performance. Moreover, in the next round of frame synchronization, it can be executed based on the current judgment result, effectively improving the fault tolerance performance of frame synchronization.

[0049] It should be understood that the above general description and subsequent detailed description are only exemplary and explanatory, and cannot limit the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] The drawings here are incorporated into the specification and constitute a part of this specification, showing embodiments consistent with the present disclosure, and are used together with the specification to explain the principles of the present disclosure. Obviously, the drawings in the following description are only some embodiments of the present disclosure, and those of ordinary skill in the art can also obtain other drawings based on these drawings without creative efforts.

[0051] Figure 1Schematic diagram showing a frame synchronization method in an exemplary embodiment of the present disclosure;

[0052] Figure 2 Schematic diagram showing a system structure in an exemplary embodiment of the present disclosure;

[0053] Figure 3 Flow chart showing the frame synchronization method in an exemplary embodiment of the present disclosure;

[0054] Figure 4 Schematic diagram showing the composition of a frame synchronization device in an exemplary embodiment of the present disclosure;

[0055] Figure 5 Schematic diagram showing the structure of an electronic device in an exemplary embodiment of the present disclosure;

[0056] Figure 6 Schematic diagram showing a program product in an exemplary embodiment of the present disclosure. Detailed implementation manners

[0057] Example embodiments will now be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in various forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be more complete and comprehensive, and will fully convey the concept of the example embodiments to those skilled in the art. The features, structures, or characteristics described may be combined in any suitable manner in one or more embodiments.

[0058] In addition, the drawings are only schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus repeated descriptions thereof will be omitted. Some of the block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities may be implemented in software, or in one or more hardware modules or integrated circuits, or in different networks and / or processor devices and / or microcontroller devices.

[0059] In the related art, frame synchronization means that the receiving party should be able to distinguish the start and end of a frame from the received binary bit stream. Existing frame synchronization methods include: character counting method, byte stuffing with start and end delimiters method, bit stuffing with start and end flags method, and coding violation method, etc. Among them, the coding violation method can only be used when a specific bit coding method is adopted. The character counting method uses a special character to represent the start of a frame, and then uses a count field to indicate the number of bytes contained in the frame. When the target device receives the frame, according to the number of bytes provided by this field, it can know the end of the frame and the start bit of the next frame. The defect of this method is that if the count field makes an error during transmission, the receiving party cannot know the start bit of the next frame, so frame synchronization cannot be achieved. Although this method is simple, its reliability is relatively poor. The byte stuffing with start and end delimiters method uses some special characters to define the start and end of a frame. In order not to misjudge the special characters that appear in the transmitted data as the start and end delimiters of the frame, an escape character is added before these special information characters in the data information, that is, the sender adds an escape character before the characters that are the same as the frame header, frame tail, and escape character in the data information. When the receiving party receives the information, if it finds an escape character, it removes the first escape character and restores the original data information. This method improves the reliability of data transmission, but the defect is that it increases the detection of escape characters, increases the transmission data capacity, and reduces the transmission performance.

[0060] In view of the above-mentioned disadvantages and deficiencies of the prior art, in the present exemplary embodiment, a frame synchronization method based on the data link layer is provided. Refer to Figure 1 As shown in, the above-mentioned frame synchronization method may include the following steps:

[0061] S11, in response to receiving a data packet to be processed from the peer device, when identifying that the corresponding index is zero, read data of a preset length from the data interface and write it into the buffer;

[0062] S12, read data from the first target position in the buffer, and when determining the frame header, correct the index based on the position of the frame header in the buffer; and

[0063] Read data from the second target position in the buffer, and when determining the frame tail, perform verification on the frame header and the frame tail. When the verification passes, complete the frame synchronization of the data packet to be processed;

[0064] S13, read data from the second target position in the buffer, and when determining the frame tail, perform verification on the frame header and the frame tail. When the verification passes, complete the frame synchronization of the data packet to be processed.

[0065] In the frame synchronization method provided by the present exemplary embodiment, it can be applied to the data link layer. After receiving the data packet to be processed sent by the peer device, the corresponding index can be first identified. When it is determined that the index is zero, a preset length of data is read from the data interface and written into the buffer, and the frame header and frame tail are identified and verified at a specified position in the buffer; when the verification is successful, the frame synchronization at the data link layer is completed; on the one hand, it can realize the overall judgment of the data frame and effectively improve the frame synchronization performance; on the other hand, in the next round of frame synchronization, it can be executed based on the current judgment result, effectively improving the fault tolerance of frame synchronization.

[0066] Next, each step of the frame synchronization method in the present exemplary embodiment will be described in more detail with reference to the accompanying drawings and embodiments.

[0067] In step S11, in response to receiving the data packet to be processed from the peer device, when the corresponding index is identified as zero, a preset length of data is read from the data interface and written into the buffer.

[0068] In the present exemplary embodiment, the above method can be applied to a terminal device. Refer to Figure 2 As shown, data interaction can occur between the first terminal device 201 and the second terminal device 202 in a communication state. Among them, the above terminal device can be a smart terminal device such as a mobile phone, a tablet computer, a laptop computer, etc.; or, it can also be a server for processing real-time data and offline data. When the first terminal device is the execution entity, the second terminal device is its peer device.

[0069] Specifically, the above step S11 may include:

[0070] Step S111, in response to receiving the data packet to be processed from the peer device, perform an initialization operation and enter the first data processing state;

[0071] Step S112, when the index is zero, enter the second data processing state;

[0072] Step S113, read a preset length of data from the data interface and write it into the buffer, and enter the third data processing state.

[0073] For example, taking the first terminal device as an example, after receiving the data stream of the second terminal device, it can be used as a data packet to be processed, and first, a frame synchronization operation needs to be performed. At the data link layer, the first terminal device can first perform an initialization operation. Specifically, the initialization operation can include initializing the buffer and the index; among them, the length of the buffer can be initialized to the length of the data link layer data frame, the index can be initialized to zero, and the status identification information indicating whether there is a frame header can be configured to no; among them, the index can be the index of the buffer, which is used to represent the position of the frame header in the buffer; the first status identification information can be used to indicate that there is a frame header in the current buffer, and the second status identification information can be used to indicate that there is no frame header in the current buffer; the buffer can be a cache for storing interface data.

[0074] After the initialization is completed, the first data processing state can be executed and entered; among them, the first data processing state can be the mobile data state of the terminal. In this state, first, it is judged whether the index is zero. When the index read is zero, the second data processing state is executed and entered; among them, the second data processing state can be the read data state of the terminal.

[0075] In the read data state, if the current index is zero, bytes with a length equal to the data link layer frame length are read from the data interface and placed in the buffer. Specifically, the above-mentioned preset length can be the frame length of the data link layer; the writing of the preset length of data into the buffer can include: placing the preset length of data starting from the first preset position in the buffer.

[0076] Among them, the data interface can be a data interface for data interaction between the first terminal device and the second terminal device and requires a frame synchronization operation. That is, a fixed length of data is read from the data interface to fill the currently empty buffer. The above-mentioned first preset position can be the position of the first byte of the buffer. That is, currently, in the buffer, the interface data is written starting from the first byte.

[0077] After the data writing is completed, the third data processing state can be executed and entered; among them, the third data processing state can be the frame synchronization detection state.

[0078] In step S12, data is read from the first target position in the buffer, and when the frame header is determined, the index is corrected based on the position of the frame header in the buffer.

[0079] In this exemplary embodiment, specifically, the above-mentioned step S12 can include:

[0080] Step S121, in the third data processing state, identify whether the buffer contains a frame header identifier starting from the first target position; and when the frame header identifier is identified, modify the index based on the position of the frame header identifier in the buffer; and

[0081] Step S122, add the first status identifier information indicating the existence of the frame header.

[0082] Specifically, in the frame synchronization detection state, start looking for the frame header identifier from the first byte of the buffer. If the frame header is found, use index to record the position of the current frame header in the buffer, and use the bFound flag to indicate that the frame header exists and has been found, and add the first status identifier information to the buffer.

[0083] In step S13, read data at the second target position in the buffer, and when the frame tail is determined, perform a check on the frame header and the frame tail. When the check passes, complete the frame synchronization of the packet to be processed.

[0084] In the present exemplary embodiment, specifically, the above step S13 may include:

[0085] Step S131, in the third data processing state, when the first status identifier information indicating the existence of the frame header is identified and the index is zero, determine whether the second target position in the buffer is the frame tail;

[0086] Step S132, when it is determined that the second target position in the buffer is the frame tail, perform a check on the frame header and the frame tail;

[0087] Step S133, when the checks on the frame header and the frame tail pass, determine the frame synchronization of the packet to be processed.

[0088] Specifically, the above second target position may be the last byte of the buffer. For example, in the frame synchronization detection state, if the bFound flag indicates that the frame header has been found and the index value is zero, identify and detect whether the last byte of the data buffer is the frame tail. If the last byte is the frame tail, the frame header and the frame tail can be checked.

[0089] In addition, when performing the check, the above method may further include: calculating a checksum based on the data in the buffer and comparing the checksum with the checksum sent by the peer device; when the checksum, and the checks on the frame header and the frame tail all pass, determine the frame synchronization of the packet to be processed.

[0090] For example, when checking the frame header and the frame tail, the checksum can also be checked. For example, a commonly used frame format includes, in sequence: frame header, source address, destination address, type, number of data bytes, data field, checksum, frame tail.

[0091] When verifying the data in the buffer, frame synchronization is successful only when the frame header, checksum, and frame tail are all verified successfully. At this time, the packet data can be sent to the upper-layer application.

[0092] In addition, in some exemplary embodiments of the present disclosure, when performing verification, the above method may further include:

[0093] Step S21, when any one of the frame header, frame tail, and checksum fails to be verified, identify the frame header starting from the third target position in the buffer;

[0094] Step S22, when the frame header is identified, correct the index according to the current position of the frame header and enter the first data processing state; or

[0095] Step S23, when the identification of the frame header fails, set the index to zero and enter the first data processing state.

[0096] Specifically, in the frame synchronization detection state, if the bFound flag indicates that the frame header is found and the index value is zero, the frame header, frame tail, and checksum are detected. If any one or more of them fail to be verified, the frame synchronization is unsuccessful. At this time, the frame header can be searched starting from the second byte of the data buffer. If found, set the index to the number of bytes from the first byte of the data buffer to the byte where the frame header is found, and enter the data moving state, that is, enter the next round of frame synchronization detection process of the data link layer communication.

[0097] Or, in the frame synchronization detection state, if the bFound flag indicates that the frame header is found and the index value is zero, the frame header, frame tail, and checksum are detected. If any one or more of them fail to be verified, the frame synchronization is unsuccessful. At this time, the frame header can be searched starting from the second byte of the data buffer. If the frame header is not found, that is, there is no frame header data in the current buffer, set the index to zero and enter the data moving state, that is, enter the next round of frame synchronization detection process of the data link layer.

[0098] Based on the above content, in some exemplary embodiments of the present disclosure, the above method may further include:

[0099] Step S31, after entering the first data processing state, when the index is identified as non-zero, delete the data before the position corresponding to the index value in the buffer;

[0100] Step S32, enter the second data processing state, read data with a length equal to the index value from the data interface and write it into the buffer.

[0101] Specifically, after the first terminal device is initialized, or after entering the mobile data state in other data processing phases, if the current index is not zero, that is, there is data in the current buffer and the frame header is recognized, the data before the frame header position in the buffer can be deleted, and the frame header is moved to the first byte position of the buffer. For example, move the data to the left in the buffer, the number of bytes of the moved data is the frame length - index value, and the length of the move is the number of bytes of the index value, that is, move the frame header and the subsequent data forward to the starting position. Synchronously, read data with a length of the index value size from the data interface and write it to the remaining byte positions in the buffer, and enter the frame synchronization detection state to perform subsequent verification procedures.

[0102] Based on the above, in some exemplary embodiments of the present disclosure, the above method may further include:

[0103] Step S41, enter the third data processing state, and if the frame header does not exist at the position corresponding to the index value in the buffer, set the index to zero; and

[0104] Step S42, enter the first data processing state.

[0105] Specifically, after entering the frame synchronization detection state, if the frame header is not recognized at the position corresponding to the index value, that is, the byte position corresponding to the bFound flag, it means that there is an error in the result recognized by the current index, and this error needs to be corrected. Enter the mobile data state, set the index value to zero, and re-recognize the frame header starting from the first byte position in the buffer. If the frame header is recognized, correct the corresponding index.

[0106] In some exemplary embodiments of the present disclosure, the above method may further include:

[0107] Step S51, in the third data processing state, when the first status identification information indicating the existence of the frame header is recognized and the index is less than zero or greater than the value of the data link layer frame length, set the index to zero; and

[0108] Step S52, enter the first data processing state.

[0109] Specifically, in the frame synchronization detection state, the bFound flag indicates that the frame header is found, and the value of the index is not zero, but the value of the index is less than zero or greater than the value of the data link layer frame length, which means that the current index value is incorrect; at this time, correct the index value to zero, enter the mobile data state, and re-recognize the frame header starting from the first byte position in the buffer. If the frame header is recognized, correct the corresponding index.

[0110] Alternatively, if the bFound flag indicates that the frame header is found and the value of index is a number directly between zero and the length of the data link layer frame, then keep the index value unchanged, enter the mobile data state, and perform the next round of data link layer frame synchronization detection process.

[0111] The frame synchronization method based on the data link layer provided by the embodiments of the present disclosure refers to Figure 3As shown, initialize the frame header position index to zero, the length of buffer BUF is the frame length. Assume the frame length is FRAMELEN (the frame length of the data link layer), and the flag bFound indicating whether the frame header is found is set to not found. Then, enter the moving data state and check if index is zero. If it is zero, enter the reading data state. Otherwise, if index is not zero, move the data in the buffer to the left by FRAMELEN - index data units and the byte length is index, and then enter the reading data state. In the reading data state, if index is zero, read FRAMELEN bytes of data from the data interface and put the read data into the buffer, starting from the first byte of the buffer. Otherwise, if index is greater than zero and less than FRAMELEN, read index bytes from the data interface, and then enter the frame synchronization detection state. In the frame synchronization detection state, start looking for the frame header flag from the first byte of buffer BUF. If the frame header is found, record the position of the frame header in the current buffer with index and set bFound to found. In the frame synchronization detection state, if the bFound flag indicates that the frame header is not found, set index to zero and enter the moving data state, that is, start the next round of data link layer frame synchronization detection process. Otherwise, in the frame synchronization detection state, if the bFound flag indicates that the frame header is found and index is zero, check if the last byte of the data buffer BUF is the frame tail, and calculate the data in the buffer excluding the frame header, frame tail, and checksum. Compare the calculated checksum with the checksum sent by the peer. When the frame header, frame tail, and checksum all pass the detection, the frame synchronization is successful, and the packet data is sent to the upper layer application. Then, enter the moving data state again, that is, start the next round of data link layer frame synchronization detection process. Otherwise, in the frame synchronization detection state, if the bFound flag indicates that the frame header is found and index is zero, and at least one of the frame header, frame tail, and checksum fails the detection, the frame synchronization is unsuccessful. Then, start looking for the frame header from the second byte of the data buffer. If found, set index to the number of bytes from the first byte of the data buffer to the found frame header byte, and enter the moving data state, that is, enter the next round of data link layer communication frame synchronization detection process. Otherwise, in the frame synchronization detection state, if the bFound flag indicates that the frame header is found and index is not zero, and index is less than zero or greater than FRAMELEN, set index to zero, otherwise keep the index value unchanged, and enter the moving data state, that is, enter the next round of data link layer frame synchronization detection process.

[0112] For a terminal device in a communication state, when it is necessary to detect the currently transmitted data packet and determine whether it is a complete data packet, initialization is performed and the data movement state is entered. In the data movement state, the value of index indicates whether there is a frame header in the current data buffer BUF and the position of the frame header. If the index value is zero, it means there is no frame header in the data buffer BUF; if the index value is not zero, it means there is a frame header in the current data buffer BUF, and the frame header position is the index-th byte of the buffer BUF. Then, the buffer data is slid to the left, and the data starting from the index-th byte position of the data buffer is slid to the left by index byte counts, and the total number of slid bytes is FRAMELEN - index. After the data movement is completed, the data reading state is entered. In the data reading state, if the index value is zero, data with a length of FRAMELEN is read from the communication port and placed into the data buffer BUF; if the index value is not zero, data with a length of index is read from the communication port and placed at the position of FRAMELEN - index in the data buffer BUF. After the data reading is completed, the frame synchronization detection state is entered. In the frame synchronization detection state, bFound is initialized as not finding the frame header, and the frame header is searched starting from the first byte of the data buffer. If the frame header is found, bFound is marked as finding the frame header, and index is set to the position of the current frame header in the data buffer BUF. If not found, index is set to zero. In the frame synchronization detection state, if the frame header is found, index represents the frame header position; when the frame header is not the first byte, the data movement state is entered. If it is the first byte, if the frame synchronization is successful, index is set to zero; if the frame synchronization is not successful, the frame header position is searched starting from the second position, and the data movement state is entered; if the frame header is not found, the index value is zero, indicating that there is no frame header in the current data buffer BUF, and the data movement state is entered.

[0113] The method of the present disclosure makes an overall judgment, specifically by judging the frame header, frame tail, and checksum. If all are correct, it will be determined that a frame data packet is successfully synchronized, greatly improving the frame synchronization performance. At the same time, when the frame synchronization fails, the next frame header of this packet of data is continuously detected, and an appropriate length is read for the next round of frame synchronization, providing a frame synchronization fault tolerance rate on the basis of high performance.

[0114] It should be noted that the above-mentioned drawings are only schematic illustrations of the processes included in the method according to the exemplary embodiments of the present invention, rather than for limiting purposes. It is easy to understand that the processes shown in the above-mentioned drawings do not indicate or limit the time sequence of these processes. Additionally, it is also easy to understand that these processes can be executed synchronously or asynchronously in, for example, multiple modules.

[0115] Further, referring to Figure 4As shown in the figure, an embodiment of this example also provides a frame synchronization device 40, including: a data reading module 401, an index correction module 402, and a verification module 403. Among them,

[0116] The data reading module 401 can be used to respond to a data packet to be processed received from a peer device, and when identifying that the corresponding index is zero, read data of a preset length from a data interface and write it into a buffer.

[0117] The index correction module 402 can be used to read data from a first target position in the buffer, and when determining a frame header, correct the index based on the position of the frame header in the buffer.

[0118] The verification module 403 can be used to read data from a second target position in the buffer, and when determining a frame tail, verify the frame header and the frame tail, and complete frame synchronization of the data packet to be processed when the verification passes.

[0119] The specific details of each module in the above frame synchronization device based on the data link layer have been described in detail in the corresponding frame synchronization method, so they will not be elaborated here.

[0120] It should be noted that although several modules or units of a device for action execution are mentioned in the above detailed description, this division is not mandatory. In fact, according to an embodiment of the present disclosure, the features and functions of the two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided and embodied by multiple modules or units.

[0121] Figure 5 The figure shows a schematic diagram of an electronic device suitable for implementing an embodiment of the present invention.

[0122] It should be noted that Figure 5 The electronic device 500 shown is only an example and should not impose any limitations on the functions and usage scope of the embodiments of the present disclosure.

[0123] As Figure 5As shown, the electronic device 500 includes a Central Processing Unit (CPU) 501, which can perform various appropriate actions and processes according to the program stored in the Read-Only Memory (ROM) 502 or the program loaded from the storage section 508 into the Random Access Memory (RAM) 503. In the RAM 503, various programs and data required for system operation are also stored. The CPU 501, ROM 502, and RAM 503 are connected to each other via a bus 504. An Input / Output (I / O) interface 505 is also connected to the bus 504.

[0124] The following components are connected to the I / O interface 505: an input section 506 including a keyboard, a mouse, etc.; an output section 507 including, for example, a Cathode Ray Tube (CRT), a Liquid Crystal Display (LCD), etc. and a speaker, etc.; a storage section 508 including a hard disk, etc.; and a communication section 509 including a network interface card such as a LAN (Local Area Network) card, a modem, etc. The communication section 509 performs communication processing via a network such as the Internet. A drive 510 is also connected to the I / O interface 505 as needed. A removable medium 511, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is installed on the drive 510 as needed so that a computer program read from it can be installed into the storage section 508 as needed.

[0125] For example, the above-mentioned electronic device can be a smart wearable device, a smart terminal, etc., such as a smart bracelet, a smart watch, or a mobile phone, etc.

[0126] Specifically, according to an embodiment of the present invention, the process described below with reference to the flowchart can be implemented as a computer software program. For example, an embodiment of the present invention includes a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes program codes for performing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from the network through the communication section 509, and / or installed from the removable medium 511. When the computer program is executed by the Central Processing Unit (CPU) 501, various functions defined in the system of the present application are executed.

[0127] Specifically, the above-mentioned electronic device can be a smart mobile terminal device such as a mobile phone, a tablet computer, or a laptop computer. Or, the above-mentioned electronic device can also be a smart terminal device such as a desktop computer.

[0128] It should be noted that the computer-readable medium shown in the embodiments of the present invention can be a computer-readable signal medium, a computer-readable storage medium, or any combination of the two. A computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the above. More specific examples of the computer-readable storage medium can include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a flash memory, an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present invention, a computer-readable storage medium can be any tangible medium that contains or stores a program, and this program can be used by or in combination with an instruction execution system, apparatus, or device. In the present invention, a computer-readable signal medium can include a data signal propagated in a baseband or as part of a carrier wave, in which computer-readable program code is carried. Such a propagated data signal can take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. A computer-readable signal medium can also be any computer-readable medium other than a computer-readable storage medium, and this computer-readable medium can send, propagate, or transmit a program for use by or in combination with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium can be transmitted using any appropriate medium, including but not limited to: wireless, wired, etc., or any suitable combination of the above.

[0129] The flowcharts and block diagrams in the accompanying drawings illustrate the possible architectures, functions, and operations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagram may represent a module, a segment of a program, or a part of code, which contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than that marked in the accompanying drawings. For example, two consecutive blocks shown may actually be executed substantially in parallel, and they may sometimes be executed in the reverse order, depending on the functions involved. It should also be noted that each block in the block diagram or flowchart, as well as combinations of blocks in the block diagram or flowchart, can be implemented by a dedicated hardware-based system that performs the specified functions or operations, or can be implemented by a combination of dedicated hardware and computer instructions.

[0130] The units described in the embodiments of the present invention can be implemented in software or in hardware, and the described units can also be provided in a processor. Among them, the names of these units do not constitute a limitation to the unit itself in some cases.

[0131] It should be noted that, on the other hand, referring to Figure 6 as shown, the present application also provides a computer-readable medium, which can be included in the electronic device described in the above embodiments; or can exist separately without being assembled into the electronic device. The above computer-readable medium carries one or more programs, and when the one or more programs are executed by an electronic device, the electronic device is caused to implement the methods described in the following embodiments. For example, the electronic device can implement each step as shown in Figure 1 as shown.

[0132] In addition, the above accompanying drawings are only schematic illustrations of the processes included in the methods according to the exemplary embodiments of the present invention, and are not for limiting purposes. It is easy to understand that the processes shown in the above accompanying drawings do not indicate or limit the time sequence of these processes. Additionally, it is also easy to understand that these processes can be executed synchronously or asynchronously, for example, in multiple modules.

[0133] In addition, the above accompanying drawings are only schematic illustrations of the processes included in the methods according to the exemplary embodiments of the present invention, and are not for limiting purposes. It is easy to understand that the processes shown in the above accompanying drawings do not indicate or limit the time sequence of these processes. Additionally, it is also easy to understand that these processes can be executed synchronously or asynchronously, for example, in multiple modules.

[0134] Other embodiments of the present disclosure will be readily apparent to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include known or customary technical means in the art not disclosed herein. The specification and examples are only to be considered as exemplary, and the true scope and spirit of the present disclosure are pointed out by the claims.

[0135] It should be understood that the present disclosure is not limited to the exact structures described above and shown in the drawings, and various modifications and changes can be made without departing from its scope. The scope of the present disclosure is only limited by the appended claims.

Claims

1. A frame synchronization method, applied to the data link layer, characterized in that, The method includes: In response to receiving a data packet to be processed from a peer device, initialize the index of the buffer to zero, and initialize the length of the buffer to the length of the data link layer data frame. The index represents the position of the frame header in the buffer. When identifying that the index is zero, read data of the frame length bytes from the data interface and write it into the buffer; configure the identifier bFound indicating whether the frame header is found as false; Read data from the first byte in the buffer, and when determining the frame header, correct the index based on the position of the frame header in the buffer. Specifically, it includes: In the third data processing state, identify whether the frame header identifier bFound is included starting from the first byte in the buffer; and when identifying the frame header identifier, record the position of the frame header in the current buffer with the index, and set bFound as true. The third data processing state is the frame synchronization detection state; In the third data processing state, when identifying that the bFound identifier is true, and the index is less than zero or greater than the value of the data link layer frame length, set the index to zero; otherwise, maintain the index value unchanged and enter the first data processing state. The first data processing state is the next round of data link layer frame synchronization detection process; Read data from the last byte in the buffer, and when determining the frame tail, perform verification on the frame header and the frame tail. When the verification passes, complete the frame synchronization of the data packet to be processed.

2. The frame synchronization method according to claim 1, wherein The step of, in response to receiving a data packet to be processed from a peer device, when identifying that the corresponding index is zero, read data of the frame length bytes from the data interface and write it into the buffer includes: In response to receiving a data packet to be processed from a peer device, perform an initialization operation and enter the first data processing state; When the index is zero, enter the second data processing state. The second data processing state is the data reading state of the terminal; Read data of the frame length bytes from the data interface and write it into the buffer, and enter the third data processing state.

3. The frame synchronization method according to claim 1, wherein The step of, in the buffer, read data from the last byte, and when determining the frame tail, perform verification on the frame header and the frame tail. When the verification passes, complete the frame synchronization of the data packet to be processed includes: In the third data processing state, when identifying that the identifier bFound exists and the index is zero, determine whether the second target position in the buffer is the frame tail; When determining that the second target position in the buffer is the frame tail, perform verification on the frame header and the frame tail; When the verification of the frame header and the frame tail passes, determine the frame synchronization of the data packet to be processed.

4. The frame synchronization method according to claim 3, wherein When performing verification on the frame header and the frame tail, the method further includes: Calculate the checksum based on the data in the buffer, and compare the checksum with the checksum sent by the peer device; When the checksum, and the verification of the frame header and the frame tail both pass, determine the frame synchronization of the data packet to be processed.

5. The frame synchronization method according to claim 4, wherein The method further includes: If any one of the frame header, the frame tail, and the checksum fails the verification, identify the frame header starting from the third target position in the buffer; the third target position is the second byte of the buffer; When a frame header is recognized, correct the index according to the current position of the frame header and enter the first data processing state; or When the recognition of the frame header fails, set the index to zero and enter the first data processing state.

6. The frame synchronization method according to claim 2, characterized in that The method further includes: After entering the first data processing state, when it is recognized that the index is not zero, delete the data before the position corresponding to the index value in the buffer; Enter the second data processing state, read data with a length equal to the index value from the data interface and write it into the buffer.

7. The frame synchronization method according to claim 6, wherein The method further includes: In the third data processing state, if the frame header does not exist at the position corresponding to the index value in the buffer, set the index to zero; and Enter the first data processing state.

8. A frame synchronization device is applied to the data link layer, characterized in that, It includes: A data reading module, configured to, in response to a data packet to be processed received from a peer device, initialize the index of the buffer to zero, initialize the length of the buffer to the length of the data link layer data frame, where the index represents the position of the frame header in the buffer, and when it is recognized that the index is zero, read data with a preset length from the data interface and write it into the buffer; configure the flag bFound indicating whether the frame header is found to be false; An index correction module, configured to read data from the first byte in the buffer, and when determining the frame header, correct the index based on the position of the frame header in the buffer. Specifically, in the third data processing state, identify whether the frame header flag bFound is included starting from the first byte in the buffer; and when the frame header flag is recognized, record the position of the frame header in the current buffer with the index and set bFound to true. The third data processing state is the frame synchronization detection state; in the third data processing state, when it is recognized that the bFound flag is true and the index is less than zero or greater than the value of the data link layer frame length, set the index to zero; Otherwise, maintain the index value unchanged and enter the first data processing state, where the first data processing state is the next round of data link layer frame synchronization detection process; And A verification module, configured to read data from the last byte in the buffer, and when determining the frame tail, verify the frame header and the frame tail, and complete the frame synchronization of the data packet to be processed when the verification passes.

9. A computer-readable medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the frame synchronization method according to any one of claims 1 to 7.

10. An electronic device, characterized in that, It includes: One or more processors; A storage device, configured to store one or more programs, and when the one or more programs are executed by the one or more processors, enable the one or more processors to implement the frame synchronization method according to any one of claims 1 to 7.

Images