Display device, calibration method, and screen display method

Abstract

The present invention discloses a display device, including a display panel, a power integrated circuit, a comparison circuit, and a selection circuit. The display panel is configured to receive a system cross voltage. The power integrated circuit is configured to provide the system cross voltage to the display panel and includes a current conversion circuit, wherein the current conversion circuit is configured to convert a calibration current output by the display panel when displaying a calibration screen into a detection voltage. The comparison circuit is configured to compare the detection voltage with a threshold value to generate a comparison result. The selection circuit is configured to determine the magnitude of the system cross voltage according to the comparison result. Wherein the power integrated circuit is further configured to generate the system cross voltage correspondingly according to the magnitude of the system cross voltage determined by the selection circuit, so as to provide the system cross voltage determined by the selection circuit to the display panel.

Description

Technical Field

[0001] The present disclosure relates to an electronic device, and more particularly to a display device. Background Art

[0002] As the usage time increases, the driving transistors in the pixel circuit may operate in the linear region, resulting in abnormal operation of the display panel. To solve this problem, the prior art often increases the voltage difference between the system high voltage and the system low voltage. Although this method can extend the service life of the display panel, it also increases unnecessary power consumption. Summary of the Invention

[0003] One aspect of the present disclosure is a display device. The display device includes a display panel, a power integrated circuit, a comparison circuit, and a selection circuit. The display panel is configured to receive a system voltage difference. The power integrated circuit is configured to provide the system voltage difference to the display panel and includes a current conversion circuit, wherein the current conversion circuit is configured to convert a calibration current output by the display panel when displaying a calibration screen into a detection voltage. The comparison circuit is configured to compare the detection voltage with a threshold value to generate a comparison result. The selection circuit is configured to determine the magnitude of the system voltage difference according to the comparison result. Wherein the power integrated circuit is further configured to generate the system voltage difference corresponding to the magnitude of the system voltage difference determined by the selection circuit, so as to provide the system voltage difference determined by the selection circuit to the display panel.

[0004] Another aspect of the present disclosure is a calibration method. The calibration method is used to calibrate a system voltage difference of a display device, and includes the following steps: converting a calibration current output by a display panel of the display device when displaying a calibration screen into a detection voltage; comparing the detection voltage with a threshold value to generate a comparison result; determining the magnitude of the system voltage difference according to the comparison result; and generating the system voltage difference corresponding to the determined magnitude of the system voltage difference, so as to provide the determined system voltage difference to the display panel.

[0005] Yet another aspect of the present disclosure is a screen display method. The screen display method is applicable to a display device and includes: displaying at least one screen during the execution of a preset operation of the display device; in response to the triggering of a voltage difference calibration operation of the display device, displaying a calibration screen before or after displaying the at least one screen; and stopping displaying the calibration screen after the voltage difference calibration operation is completed.

[0006] In summary, the display device of the present disclosure reduces unnecessary power consumption by providing a smaller system cross voltage to the display panel, thereby significantly reducing the power consumption of the display panel and the power integrated circuit. In addition, the display device and the calibration method of the present disclosure can also avoid the operating point of the driving transistor falling into the linear region after long-term operation by adjusting the system cross voltage in a timely manner, thereby extending the service life of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 FIG. is a block diagram of a display device illustrated according to some embodiments of the present disclosure.

[0008] Figure 2 FIG. is a schematic diagram of a characteristic curve of the driving current of a pixel circuit with respect to the system cross voltage illustrated according to some embodiments of the present disclosure.

[0009] Figure 3 FIG. is a block diagram of a power integrated circuit illustrated according to some embodiments of the present disclosure.

[0010] Figure 4 FIG. is a circuit schematic diagram of a current conversion circuit and a comparison circuit in a power integrated circuit illustrated according to some embodiments of the present disclosure.

[0011] Figure 5 FIG. is a block diagram of a voltage conversion circuit in a power integrated circuit illustrated according to some embodiments of the present disclosure.

[0012] Figure 6 FIG. is a block diagram of a voltage conversion circuit in a power integrated circuit illustrated according to other embodiments of the present disclosure.

[0013] Figure 7 FIG. is a block diagram of a power integrated circuit and a driver illustrated according to other embodiments of the present disclosure.

[0014] Figure 8 FIG. is a block diagram of a power integrated circuit and a driver illustrated according to other embodiments of the present disclosure.

[0015] Figure 9 FIG. is a block diagram of a power integrated circuit and a driver illustrated according to other embodiments of the present disclosure.

[0016] Figure 10 FIG. is a flowchart of a calibration method illustrated according to some embodiments of the present disclosure.

[0017] Figure 11 FIG. is a flowchart of a screen display method illustrated according to some embodiments of the present disclosure.

[0018] Figure 12Schematic diagrams of multiple screens shown in sequence according to some embodiments of the present disclosure.

[0019] Figures 13A - 13C Schematic diagrams of display panels of different sizes when displaying a calibration screen, respectively, according to some embodiments of the present disclosure.

[0020] Among them, reference numerals:

[0021] 10: Power integrated circuit

[0022] 20: Driver

[0023] 30, 30A, 30B, 30C: Display panel

[0024] 40: Independent power supply

[0025] 100: Display device

[0026] 101: Current conversion circuit

[0027] 102, 104: Low dropout regulator

[0028] 103: Comparison circuit

[0029] 105: Selection circuit

[0030] 106: Processing circuit

[0031] 107: Memory circuit

[0032] 109: Voltage conversion circuit

[0033] 200: Calibration method

[0034] 300: Screen display method

[0035] 301: Pixel circuit

[0036] A1~A4: Startup screen

[0037] Amp: Amplifier

[0038] C1, C2, C3, C4: Calibration screen

[0039] IM1, IM2, IM3, IM4: Image area

[0040] NIM1: Non-image area

[0041] R 1 , R 2 , R SEN , R A , R B : Resistor

[0042] OVDD: System high voltage

[0043] OVSS: System low voltage

[0044] P0, PX, PX’: Operating points

[0045] T0: First time point

[0046] TX: Second time point

[0047] VBAT: Power supply voltage

[0048] VC1, VC2: Cross voltage

[0049] Vd: Detection voltage

[0050] VD: Input voltage

[0051] VS: Output voltage

[0052] V CROSS : System cross voltage

[0053] V REF : Reference voltage

[0054] V TH : Threshold

[0055] Id: Drive current

[0056] I OLED : Correction current

[0057] I VBAT : Power supply current

[0058] L0, LX, LX’: Curves

[0059] ΔV: Voltage difference

[0060] S201~S204, S301~S303: Steps Detailed implementation manners

[0061] The following are detailed descriptions of embodiments in conjunction with the accompanying drawings. However, the specific embodiments described are only used to explain the present case and do not limit the present case. The descriptions of the structure and operation are not used to limit the execution order. Any structure formed by re-combining components and any device that produces equivalent effects are within the scope covered by this disclosure.

[0062] The terms used throughout the specification and the claims of the patent application, unless otherwise specifically noted, generally have their ordinary meanings as used in this field, in the context disclosed herein, and in the specific context.

[0063] As used herein, "coupled" or "connected" may mean that two or more elements are in direct physical or electrical contact with each other, or are in indirect physical or electrical contact with each other, and may also mean that two or more elements operate or act on each other.

[0064] Please refer to Figure 1 , Figure 1 FIG. is a block diagram of a display device 100 illustrated according to some embodiments of the present disclosure. In some embodiments, the display device 100 may be an Organic Light Emitting Display (OLED). Specifically, the display device 100 includes a Power Integrated Circuit (PWR IC) 10, a driver 20, and a display panel 30.

[0065] The display panel 30 includes a plurality of pixel circuits 301 arranged in an array (for simplicity of illustration, Figure 1 only one pixel circuit 301 is illustrated). The driver 20 may include a source driver and a gate driver. The source driver is coupled to the plurality of pixel circuits 301 of the display panel 30 through a plurality of data lines, and the gate driver is coupled to the plurality of pixel circuits 301 of the display panel 30 through a plurality of scan lines. The power integrated circuit 10 is coupled to the driver 20 and is used to sequentially drive each row of pixel circuits 301 through the driver 20 to cause the display panel 30 to display.

[0066] As Figure 1 shown, the power integrated circuit 10 is also coupled to the display panel 30 and is used to provide a system cross voltage to the display panel 30 so that the display panel 30 can operate normally. Specifically, the system cross voltage is a system high voltage OVDD minus a system low voltage OVSS.

[0067] In some embodiments, the luminance of the display panel 30 can be expressed by the following formula (1):

[0068]

[0069] wherein, L OLED is the luminance, Effi (OLED) is the luminous efficiency of the light-emitting material, Effi (PWR IC) is the power conversion efficiency of the power integrated circuit 10, and P VBAT is the power consumption of the power integrated circuit 10.

[0070] It can be understood that the luminous efficiency Effi (OLED) and the power conversion efficiency Effi (PWR IC) are difficult to change due to the specifications of electronic components. Therefore, according to the above formula (1), for the luminance L OLEDWith the system cross - voltage (i.e., the system high voltage OVDD minus the system low voltage OVSS) unchanged, the power consumption P of the power integrated circuit 10 can be reduced by reducing the system cross - voltage. VBAT (That is, a power supply current I VBAT multiplied by a power supply voltage VBAT). In some embodiments, the system cross - voltage provided by the power integrated circuit 10 to the display panel 30 is 5.6V. For example, the system high voltage OVDD is 2.8V, and the system low voltage OVSS is - 2.8V.

[0071] Please refer to Figure 2 , Figure 2 which is a schematic diagram of the characteristic curve of the driving current Id of the pixel circuit 301 with respect to the system cross - voltage V cross . Figure 2 The curve L0 (represented by a dot - dash line) in cross represents the characteristic curve at a first time point T0. At the first time point T0, the display device 100 has just been started or woken up, the system cross - voltage V

[0072] is a cross - voltage VC1, and the operating point P0 of a driving transistor (not shown in the figure) in the pixel circuit 301 is set in the saturation region. cross In some embodiments, the system cross - voltage V cross remains unchanged after the display device 100 has been operating for a period of time (e.g., from the first time point T0 to a second time point TX) (i.e., the system cross - voltage V Figure 2 is still the cross - voltage VC1 at the second time point TX). As cross shown, with the system cross - voltage V

[0073] remaining unchanged, the curve L0 will change over time and change to the curve LX’ (represented by a dashed line) at the second time point TX. At this time, the operating point PX’ of the driving transistor in the pixel circuit 301 leaves the saturation region and enters the linear region, resulting in the display panel 30 being unable to operate normally. cross To avoid the above - mentioned situation, in some embodiments, the display device 100 will perform a cross - voltage correction operation to adjust the system cross - voltage V Figure 2 in a timely manner so that the driving transistor in the pixel circuit 301 does not operate in the linear region. For example, in cross the embodiment of cross , the display device 100 adjusts the system cross - voltage V

[0074] In some embodiments, the driver 20 can drive multiple pixel circuits 301 in the display panel 30 to emit light in response to the execution of the cross-voltage correction operation, causing the display panel 30 to display a correction screen (e.g., C1 described later). The power integrated circuit 10 can determine whether to adjust the system cross-voltage V Figure 12 provided to the display panel 30 by measuring a correction current I OLED (as shown Figure 1 ) output by the display panel 30 when displaying the correction screen, so as to perform a cross-voltage correction operation to minimize the power consumption of the power integrated circuit 10 while ensuring the normal operation of the display panel 30. It can be understood that the multiple pixel circuits 301 in the display panel 30 emit light according to the correction current I cross to cause the display panel 30 to display the correction screen. OLED

[0075] Please refer to Figure 3 , Figure 3 which is a block diagram of the power integrated circuit 10 illustrated according to some embodiments of the present disclosure. In some embodiments, the power integrated circuit 10 includes a current conversion circuit 101, a low-dropout regulator 102, a comparison circuit 103, a low-dropout regulator 104, a selection circuit 105, a processing circuit 106, a memory circuit 107, and a voltage conversion circuit 109. The power integrated circuit 10 converts an input voltage VD into a system high voltage OVDD by the low-dropout regulator 102, and converts an output voltage VS into a system low voltage OVSS by the low-dropout regulator 104 to provide the system cross-voltage V cross to the display panel 30. The voltage conversion circuit 109 is coupled between the input terminal of the low-dropout regulator 102 and the input terminal of the low-dropout regulator 104, and is used to convert the input voltage VD into the output voltage VS. The current conversion circuit 101 is coupled between the voltage conversion circuit 109 and the low-dropout regulator 104. The comparison circuit 103 is coupled between the current conversion circuit 101 and the selection circuit 105. The selection circuit 105 is coupled to the comparison circuit 103, the memory circuit 107, and the processing circuit 106. The processing circuit 106 is coupled between the selection circuit 105 and the voltage conversion circuit 109.

[0076] It can be understood that the correction current I OLED output by the display panel 30 will sequentially flow through the low-dropout regulator 104, the current conversion circuit 101, the voltage conversion circuit 109, and the low-dropout regulator 102 and then re-enter the display panel 30.

[0077] During the cross-voltage correction operation, the current conversion circuit 101 is used to convert the correction current I OLEDConverted into a detection voltage Vd, and used to output the detection voltage Vd to the comparison circuit 103. Please refer to Figure 4 , Figure 4 FIG. Figure 4 is a circuit schematic diagram of the current conversion circuit 101 and the comparison circuit 103 according to some embodiments of the present disclosure. In some embodiments, the current conversion circuit 101 can be implemented by an amplifier Amp, a plurality of resistors R 1 , R 2 and R SEN , and the calibration current I OLED will flow through the resistor R SEN . The detection voltage Vd output by the current conversion circuit 101 can be expressed by the following formula (2):

[0078]

[0079] wherein, V REF is a reference voltage, R1 is the resistance value of the resistor R 1 , R2 is the resistance value of the resistor R 2 , and V 1 -V 2 is the voltage difference across the resistor R SEN (that is, the current value of the calibration current I OLED multiplied by the resistance value of the resistor R SEN ).

[0080] As shown in Figure 3 , the comparison circuit 103 is used to compare the detection voltage Vd output by the current conversion circuit 101 with a threshold value V TH to generate a comparison result. Specifically, if the detection voltage Vd is greater than or equal to the threshold value V TH , the current conversion circuit 101 will output a logical value corresponding to a high voltage level (for example: logic 1). If the detection voltage Vd is less than the threshold value V TH , the current conversion circuit 101 will output a logical value corresponding to a low voltage level (for example: logic 0), but the present disclosure is not limited thereto. In other embodiments, if the detection voltage Vd is greater than or equal to the threshold value V TH , the current conversion circuit 101 will output a logical value corresponding to a low voltage level. If the detection voltage Vd is lower than the threshold value V TH , the current conversion circuit 101 will output a logical value corresponding to a high voltage level.

[0081] In some embodiments, the threshold value V TH is set based on the calibration screen displayed by the display panel 30 under normal operation. As shown in Figure 4 , the threshold value V TH can be adjusted by a plurality of resistors R A and R Bis generated by the voltage dividing circuit formed thereby. Threshold V TH can be expressed by the following formula (3):

[0082]

[0083] wherein, RA is the resistance value of resistor R A and RB is the resistance value of resistor R B .

[0084] In some embodiments, resistor R B is a variable resistor. Accordingly, the threshold V B can be adjusted by changing the resistance value RB of resistor R TH .

[0085] For another example Figure 3 as shown, the selection circuit 105 is used to determine the system cross voltage V cross according to the comparison result generated by the comparison circuit 103. The processing circuit 106 of the power supply integrated circuit 10 can control the voltage conversion circuit 109 to generate a corresponding output voltage VS (i.e., change the system low voltage OVSS) according to the size of the system cross voltage V cross determined by the selection circuit 105, and then correspondingly generate the system cross voltage V cross . In this way, the power supply integrated circuit 10 can provide the system cross voltage V cross determined by the selection circuit 105 to the display panel 30.

[0086] In some practical applications, as Figure 4 shown, the resistance value of resistor R SEN is 1 ohm, the resistance value R1 of resistor R 1 is 10 M ohm, the resistance value R2 of resistor R 2 is 1 M ohm, the reference voltage V REF is 1.2 V, the threshold V TH is 0.9 V, and the system cross voltage V cross is preset to 5.6 V.

[0087] At the first time point (for example: the aforementioned T0), the correction current I OLED output by the display panel 30 is 31 mA. According to the calculation of the aforementioned formula (2), the detection voltage Vd output by the current conversion circuit 101 is 0.89 V. Since the detection voltage Vd is less than the threshold V TH , the comparison circuit 103 outputs logic 0. The selection circuit 105 determines to set the system cross voltage V cross to 5.6 V (i.e., determines to maintain the preset system cross voltage V cross) Accordingly, the processing circuit 106 controls the voltage conversion circuit 109 to convert the input voltage VD of 2.9V into the output voltage VS of -2.9V. The low-dropout regulator 102 and the low-dropout regulator 104 then convert the input voltage VD of 2.9V and the output voltage VS of -2.9V into the system high voltage OVDD of 2.8V and the system low voltage OVSS of -2.8V respectively, so as to maintain the preset system cross voltage V cross .

[0088] After a period of time, the calibration current I output by the display panel 30 OLED becomes 29mA at the second time point (for example: the aforementioned TX). According to the calculation of the aforementioned formula (2), the detection voltage Vd output by the current conversion circuit 101 is 0.91V. Since the detection voltage Vd is greater than the threshold V TH , the comparison circuit 103 outputs logic 1. The selection circuit 105 determines to set the system cross voltage V cross to 6.1V according to the logic 1 output by the comparison circuit 103 (that is, determines to increase the system cross voltage V cross ). Accordingly, the processing circuit 106 controls the voltage conversion circuit 109 to convert the input voltage VD of 2.9V into the output voltage VS of -3.4V. Also, the low-dropout regulator 102 and the low-dropout regulator 104 convert the input voltage VD of 2.9V and the output voltage VS of -3.4V into the system high voltage OVDD of 2.8V and the system low voltage OVSS of -3.3V respectively, so as to adjust the system cross voltage V cross from 5.6V to 6.1V.

[0089] In the foregoing description, the power supply integrated circuit 10 performs the cross voltage calibration operation at two time points (that is, T0 and TX) respectively, and directly adjusts the system cross voltage V cross from a first value (for example: 5.6V) to a second value (for example: 6.1V) when the selection circuit 105 determines to adjust the system cross voltage V cross . However, the present disclosure is not limited thereto. In other embodiments, the power supply integrated circuit 10 may perform the cross voltage calibration operation multiple times during a period, so as to adjust the system cross voltage V cross from 5.6V to 6.1V in a progressive manner. For example, during a period, the power supply integrated circuit 10 increases the system cross voltage V cross by 0.1V every once in a while until the system cross voltage V cross becomes 6.1V.

[0090] Please refer to Figure 5 , Figure 5FIG. 0 is a block diagram of a voltage conversion circuit 109 according to some embodiments of the present disclosure. In the foregoing embodiments, the minimum absolute value of the system low voltage OVSS (e.g., -3.3V to -2.8V, -4.2V to -2.8V) is not less than the system high voltage OVDD (e.g., 2.8V). In this case, as Figure 5 shown, the voltage conversion circuit 109 can be implemented by a charge pump circuit (e.g., a negative voltage doubler circuit) and a boost power conversion circuit. Taking the foregoing values as an example, the charge pump circuit receives and converts an input voltage VD of 2.9V into a voltage of -2.9V. Then, the voltage conversion circuit 109 can directly output the -2.9V voltage as the output voltage VS, or can convert the -2.9V voltage into a -3.4V voltage through the boost power conversion circuit and then output the -3.4V voltage as the output voltage VS.

[0091] Please refer to Figure 6 , Figure 6 FIG. 9 is a block diagram of a voltage conversion circuit 109 according to other embodiments of the present disclosure. In other embodiments, the minimum absolute value of the system low voltage OVSS (e.g., -3.3V to -2.4V, -3.3V to -1.2V, -4.2V to -1V) is less than the system high voltage OVDD (e.g., 2.8V). In this case, as Figure 6 shown, the voltage conversion circuit 109 can be implemented by a charge pump circuit (e.g., a negative voltage doubler circuit) and a buck-boost power conversion circuit. For example, the charge pump circuit receives and converts an input voltage VD of 2.9V into a voltage of -2.9V. Then, the voltage conversion circuit 109 can directly output the -2.9V voltage as the output voltage VS, or can convert the -2.9V voltage into a -2.5V voltage through the buck-boost power conversion circuit and then output the -2.5V voltage as the output voltage VS, or can convert the -2.9V voltage into a -3.4V voltage through the buck-boost power conversion circuit and then output the -3.4V voltage as the output voltage VS.

[0092] For another example, as Figure 3 shown, in some embodiments, the memory circuit 107 is used to store the magnitude of the system cross voltage V cross . In this way, in some cases (e.g., the display device 100 is not triggered to perform a cross voltage correction operation), the power integrated circuit 10 can directly set the system cross voltage V cross to the previously determined magnitude according to the data stored in the memory circuit 107.

[0093] In Figure 3In an embodiment, the memory circuit 107 is also coupled to an independent power supply 40. When the display device 100 needs to temporarily stop the operation of the power integrated circuit 10 due to a restart or when operating in a power-saving mode, the memory circuit 107 can still maintain its operation through the power supply of the independent power supply 40. In this way, when the display device 100 returns to the normal mode for operation, the power integrated circuit 10 can also be directly set according to the data stored in the memory circuit 107 without having to perform the cross-voltage calibration operation again.

[0094] In the foregoing embodiment, when the power integrated circuit 10 performs a cross-voltage calibration operation, only one suitable system cross-voltage V is obtained. cross (For example: 5.6V or 6.1V). However, the present disclosure is not limited thereto. In other embodiments, the display device 100 can operate in a normal mode or a power-saving mode, and when the power integrated circuit 10 performs a cross-voltage calibration operation, two system cross-voltages V suitable for the two operation modes can be obtained respectively. cross Specifically, if the selection circuit 105 determines that the system cross-voltage V cross is a first value when the display device 100 operates in the normal mode, the selection circuit 105 can also determine the system cross-voltage V based on a preset voltage difference cross to be a second value when the display device 100 operates in the power-saving mode. For example, the selection circuit 105 obtains the second value (for example: 5.2V) by subtracting the preset voltage difference (for example: 0.4V) from the first value (for example: 5.6V).

[0095] The configurations of the current conversion circuit 101, the comparison circuit 103, the selection circuit 105, and the memory circuit 107 of the present disclosure are not limited to Figure 3 the configurations therein. The following will further illustrate various configurations of the current conversion circuit 101, the comparison circuit 103, the selection circuit 105, and the memory circuit 107 in conjunction with Figures 7 - 9 .

[0096] Please refer to Figure 7 , Figure 7 which depicts a block diagram of the power integrated circuit 10 and the driver 20 illustrated according to other embodiments of the present disclosure. In Figure 7 the embodiment, the current conversion circuit 101 is disposed in the power integrated circuit 10, while the comparison circuit 103, the selection circuit 105, and the memory circuit 107 are disposed in the driver 20. In this configuration, Figure 3 the independent power supply 40 in Figure 7 can be omitted because even if the power integrated circuit 10 temporarily stops operating, the memory circuit 107 can still receive power through the driver 20.

[0097] Please refer toFigure 8 , Figure 8 A block diagram of the power integrated circuit 10 and the driver 20 illustrated according to other embodiments of the present disclosure. In an embodiment of Figure 8 , the current conversion circuit 101 and the comparison circuit 103 are disposed in the power integrated circuit 10, and the selection circuit 105 and the memory circuit 107 are disposed in the driver 20. In this configuration, in addition to omitting the independent power supply 40 in Figure 3 , the transmission of analog signals (for example, the detection voltage Vd output by the current conversion circuit 101) between the power integrated circuit 10 and the driver 20 can be avoided. Figure 8 The remaining settings and operations of the embodiment are similar to those of the foregoing embodiment, and thus will not be described herein.

[0098] Please refer to Figure 9 , Figure 9 A block diagram of the power integrated circuit 10 and the driver 20 illustrated according to other embodiments of the present disclosure. In an embodiment of Figure 9 , the current conversion circuit 101, the comparison circuit 103, and the selection circuit 105 are disposed in the power integrated circuit 10, and the memory circuit 107 is disposed in the driver 20. In this configuration, in addition to omitting the independent power supply 40 in Figure 3 , the signal transmission between the power integrated circuit 10 and the driver 20 can be reduced, so as to facilitate performing the cross-voltage correction operation multiple times during a period. Figure 9 The remaining settings and operations of the embodiment are similar to those of the foregoing embodiment, and thus will not be described herein.

[0099] Please refer to Figure 10 , Figure 10 A calibration method 200 illustrated according to some embodiments of the present disclosure. The calibration method 200 can be executed by the display device 100 in the foregoing embodiment to calibrate the system cross-voltage V provided to the display panel 30 cross , but the present disclosure is not limited thereto. As shown in Figure 10 , the calibration method 200 includes steps S201 to S204. For convenience of description, the following will be described in conjunction with Figure 1 and 3 to illustrate the calibration method 200.

[0100] In step S201, the calibration current I output by the display panel 30 of the display device 100 when displaying a calibration screen (for example, C1 described later in Figure 12 ) is converted into a detection voltage Vd. OLED

[0101] In step S202, the detection voltage Vd is compared with a threshold V TH to generate a comparison result (for example, logic 1, logic 0).

[0102] In step S203, determine the system cross pressure V according to the comparison result (generated in step S202). cross .

[0103] In step S204, generate the system cross pressure V correspondingly according to the determined size of the system cross pressure V cross to provide the determined system cross pressure V cross to the display panel 30. cross

[0104] The descriptions of steps S201 to S204 of the calibration method 200 are the same as or similar to the operations of the foregoing display device 100, and thus will not be elaborated herein.

[0105] Please refer to Figure 11 , Figure 11 , and describe a screen display method 300 illustrated according to some embodiments of the present disclosure. The screen display method 300 is applicable to the display device 100 in the foregoing embodiments, but the present disclosure is not limited thereto. As Figure 11 shown, the screen display method 300 includes steps S301 to S303. For convenience of description, the following will be described in conjunction with Figure 1 , 3 and 12 to describe the screen display method 300. Figure 12 is a schematic diagram of a plurality of screens displayed in sequence according to some embodiments of the present disclosure.

[0106] In step S301, during the execution of a preset operation of the display device 100, at least one screen is displayed. For example, when the display device 100 is powered on or restarted (i.e., the preset operation), the display device 100 displays, via the display panel 30, a plurality of power-on screens A1 to A4 (i.e., at least one screen) as Figure 12 shown to remind the user that the display device 100 is performing power-on. As Figure 12 shown, the plurality of power-on screens A1 to A4 will be displayed in sequence. In other words, the power-on screen A2 is displayed after the power-on screen A1 is displayed, the power-on screen A3 is displayed after the power-on screen A2 is displayed, and the power-on screen A4 is displayed after the power-on screen A3 is displayed. In addition, each of the plurality of power-on screens A1 to A4 may be a static image or a dynamic image.

[0107] ​In step S302, in response to the execution of a cross-voltage correction operation of the display device 100, a correction screen C1 is displayed before or after displaying the at least one screen. In some embodiments, the display device 100 can be preset to execute the cross-voltage correction operation at a specific time point. For example, the specific time point is during the power-on or reboot of the display device 100. Accordingly, during the power-on or reboot of the display device 100, the display device 100 will display the correction screen C1 at the specific time point to facilitate the execution of the cross-voltage correction operation. As Figure 12 shown, the display device 100 displays the correction screen C1 after displaying the power-on screen A3 (or before displaying the power-on screen A4), but the present disclosure is not limited thereto.

[0108] In step S303, after the cross-voltage correction operation is completed, the display of the correction screen C1 is stopped. As Figure 12 shown, when the cross-voltage correction operation is completed, the display device 100 stops displaying the correction screen C1 and then displays the power-on screen A4. However, the present disclosure is not limited thereto. In other embodiments, when the current conversion circuit 101 receives the correction current I OLED output by the display panel 30 when displaying the correction screen C1, the display device 100 can stop displaying the correction screen C1.

[0109] Figure 12 The embodiments shown are only examples and are not intended to limit the present disclosure. For example, in some embodiments, the cross-voltage correction operation can be set to be triggered and executed manually by the user. Accordingly, the display device 100 can display the correction screen C1 in response to the execution of the cross-voltage correction operation during the general or daily operation (i.e., preset operation) of the user.

[0110] In addition, as Figure 12 shown, the correction screen C1 includes an image area IM1 and a non-image area NIM1. In some embodiments, the data values of at least some of the pixels in the image area IM1 all correspond to a preset gray scale (e.g., B255) that is likely to make the operating point of the driving transistor enter the linear region, and the data values of all the pixels in the non-image area NIM1 all correspond to the lowest gray scale (e.g., 0), where the preset gray scale is not equal to the lowest gray scale.

[0111] Please refer to Figures 13A - 13C , Figures 13A - 13C which are schematic diagrams of different-sized display panels 30A to 30C showing the correction screen according to some embodiments of the present disclosure. As Figures 13A - 13C shown, the display panels 30A to 30C are different in shape and size from each other. Accordingly, the multiple correction screens C2 to C4 displayed by the multiple display panels 30A to 30C also have different sizes.

[0112] It should be noted that the image regions IM1 in the calibration screen C1 (as Figure 12 shown), the image region IM2 in the calibration screen C2, the image region IM3 in the calibration screen C3, and the image region IM4 in the calibration screen C4 have the same size. Since the image regions IM1 to IM4 have the same size (representing that the number of pixel circuits that are emitting light in the four display panels 30 and 30A to 30C is the same), under normal circumstances, the calibration current I OLED output by the display panel 30 when displaying the calibration screen C1, the calibration current output by the display panel 30A when displaying the calibration screen C2, the calibration current output by the display panel 30B when displaying the calibration screen C3, and the calibration current output by the display panel 30C when displaying the calibration screen C4 are the same as each other. In this way, the threshold value V TH set based on the calibration screens (such as C1 to C4) displayed by the display panel can be applied to multiple display panels of different sizes at one time, without the need to set them one by one according to the size of each display panel.

[0113] In summary, the display device 100 of the present disclosure reduces unnecessary power consumption by providing a smaller system cross voltage to the display panel 30, thereby significantly reducing the power consumption of the display panel 30 (about 21% lower than the prior art) and the power consumption of the power integrated circuit 10 (about 34% lower than the prior art). In addition, the display device 100 and the calibration method 200 of the present disclosure can also avoid the operating point of the driving transistor from falling into the linear region after long-term operation by adjusting the system cross voltage in a timely manner, thereby extending the service life of the display panel 30.

[0114] Although the present disclosure has been disclosed as above in the form of embodiments, it is not intended to limit the present disclosure. Those of ordinary skill in the art can make various changes and modifications without departing from the spirit and scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be determined by the scope of the appended patent application.

Claims

1. A display device, characterized in that, it comprises: a display panel for receiving a system cross voltage; a power integrated circuit for providing the system cross voltage to the display panel and comprising a current conversion circuit, wherein the current conversion circuit is used to convert a calibration current output by the display panel when displaying a calibration picture into a detection voltage; a comparison circuit for comparing the detection voltage with a threshold value to generate a comparison result; and a selection circuit for determining the magnitude of the system cross voltage according to the comparison result; wherein the power integrated circuit is further used to generate the system cross voltage correspondingly according to the magnitude of the system cross voltage determined by the selection circuit, so as to provide the system cross voltage determined by the selection circuit to the display panel; the calibration picture comprises: an image area, wherein data values of at least some pixels in the image area all correspond to a preset gray scale that easily makes the operating point of a driving transistor of the display device enter the linear region; and a non-image area, wherein data values of all pixels in the non-image area all correspond to a lowest gray scale; wherein, when the display device displays the calibration picture with a first size, the image area has a preset size; wherein, when the display device displays the calibration picture with a second size, the image area has the preset size, wherein the second size is different from the first size.

2. The display device according to claim 1, characterized in that, the display device further comprises a driver, coupled to the power integrated circuit and the display panel, and used to drive a plurality of pixel circuits of the display panel to emit light according to the calibration current, so that the display panel displays the calibration picture.

3. The display device according to claim 2, characterized in that, the display device further comprises a memory circuit for storing the magnitude of the system cross voltage determined by the selection circuit.

4. The display device according to claim 3, characterized in that, the current conversion circuit, the comparison circuit, the selection circuit and the memory circuit are all arranged in the power integrated circuit.

5. The display device according to claim 3, characterized in that, the current conversion circuit is arranged in the power integrated circuit, while the comparison circuit, the selection circuit and the memory circuit are arranged in the driver.

6. The display device according to claim 3, characterized in that, the current conversion circuit and the comparison circuit are arranged in the power integrated circuit, while the selection circuit and the memory circuit are arranged in the driver.

7. The display device according to claim 3, characterized in that, the current conversion circuit, the comparison circuit and the selection circuit are arranged in the power integrated circuit, while the memory circuit is arranged in the driver.

8. The display device according to claim 1, characterized in that, the power integrated circuit is used to correspondingly generate a system high voltage and a system low voltage to generate the determined system cross voltage, wherein the system cross voltage is the system high voltage minus the system low voltage.

9. The display device according to claim 8, characterized in that, If the minimum absolute value of the system low voltage is not less than the system high voltage, the power integrated circuit generates the system low voltage correspondingly through a charge pump circuit and a boost power conversion circuit.

10. The display device according to claim 8, characterized in that if the minimum absolute value of the system low voltage is less than the system high voltage, the power integrated circuit generates the system low voltage correspondingly through a charge pump circuit and a buck-boost power conversion circuit.

11. The display device according to claim 1, characterized in that the selection circuit determines that the system voltage difference is a first value when the display device operates in a normal mode, and determines that the system voltage difference is a second value when the display device operates in a power saving mode, wherein the second value is less than the first value.

12. The display device according to claim 1, characterized in that the power integrated circuit directly or gradually adjusts the system voltage difference from a first value to a second value, wherein the second value is different from the first value.

13. A calibration method, characterized in that used to calibrate a system voltage difference of a display device, comprising: converting a calibration current output by a display panel of the display device when displaying a calibration screen into a detection voltage; comparing the detection voltage with a threshold value to generate a comparison result; determining the system voltage difference according to the comparison result; and generating the system voltage difference correspondingly according to the determined system voltage difference to provide the system voltage difference to the display panel; the calibration screen includes: an image area, wherein data values of at least some pixels in the image area all correspond to a preset gray scale that can easily make the operating point of the driving transistor of the display device enter the linear region; and a non-image area, wherein data values of all pixels in the non-image area all correspond to a lowest gray scale; wherein, when the display device displays the calibration screen with a first size, the image area has a preset size; wherein, when the display device displays the calibration screen with a second size, the image area has the preset size, wherein the second size is different from the first size.

14. The calibration method according to claim 13, characterized in that the step of converting the calibration current into the detection voltage includes: driving a plurality of pixel circuits of the display panel to emit light according to the calibration current, so that the display panel displays the calibration screen.

15. The calibration method according to claim 13, characterized in that the method further includes: storing the determined system voltage difference.

16. The calibration method according to claim 13, characterized in that the system voltage difference is a system high voltage minus a system low voltage, and the step of generating the system voltage difference correspondingly includes: generating the system low voltage correspondingly to generate the determined system voltage difference.

17. The calibration method according to claim 13, characterized in that the step of determining the system voltage difference includes: determining that the system voltage difference is a first value when the display device operates in a normal mode; and Determine that the system cross-voltage is a second value when the display device operates in a power-saving mode, where the second value is less than the first value.

18. The calibration method according to claim 13, characterized in that, if it is determined to adjust the system cross-voltage from a first value to a second value, the step of correspondingly generating the system cross-voltage includes: directly or in a progressive manner adjusting the system cross-voltage from the first value to the second value, where the second value is different from the first value.

19. A screen display method, characterized in that, applicable to a display device, comprising: displaying at least one screen during the execution of a preset operation of the display device; responding to the triggering of a cross-voltage calibration operation of the display device, displaying a calibration screen before or after displaying the at least one screen; and stopping displaying the calibration screen after the cross-voltage calibration operation is completed; the calibration screen includes: an image area, where the data values of at least some of the pixels in the image area all correspond to a preset gray scale that easily makes the operating point of the driving transistor of the display device enter the linear region; and a non-image area, where the data values of all the pixels in the non-image area all correspond to a lowest gray scale; wherein, when the display device displays the calibration screen with a first size, the image area has a preset size; wherein, when the display device displays the calibration screen with a second size, the image area has the preset size, where the second size is different from the first size.

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