Display panel, manufacturing method thereof, and display device

Abstract

The embodiment of the present invention discloses a display panel, a manufacturing method thereof, and a display device. In a specific embodiment, the display panel includes: a display area and a non-display area, the display area includes a plurality of pixel units, the pixel unit includes a first electrode, and the non-display area includes: a gate driving unit formed on a substrate; a signal shielding layer formed on the gate driving unit; a conductive layer formed on the signal shielding layer, the conductive layer and the first electrode are arranged on the same layer; a cathode layer formed on the conductive layer; and a touch signal line formed on the cathode layer, wherein the orthographic projection of the signal shielding layer on the substrate at least partially covers the orthographic projection of the gate driving unit on the substrate. This embodiment provides a signal shielding layer between the gate driving unit and the conductive layer in the non-display area, so that the signal interference of the touch signal line on the gate driving unit can be effectively shielded, thereby improving the display quality and having broad application prospects.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and more particularly to a display panel and a manufacturing method thereof, as well as a display device. Background Art

[0002] With the rapid development of active-matrix organic light-emitting diode (AMOLED) display panels, mobile phone development has entered the era of full-screen and narrow-framed displays. To provide users with a better user experience, full-screen, narrow-framed, high-resolution, rollable, wearable, and foldable displays will inevitably become important development directions for AMOLED in the future. In recent years, to make mobile phone panels thinner and more integrated, Flexible Multi-layer on Cell (FMLOC) technology has replaced external touch panels. The touch layer is directly on the display function layer of the display panel, and it integrates driver chips and under-screen cameras. FMLOC-based integrated technology is gradually becoming a new trend in panel development.

[0003] FMLOC technology implements touch functionality by creating a touch layer after encapsulating the display layer. Touch signal traces are distributed around the display area within the non-display area. The densely packed touch signal traces are intended to further enhance signal shielding. Summary of the Invention

[0004] An object of the present invention is to provide a display panel and a manufacturing method thereof, as well as a display device, so as to solve at least one of the problems existing in the prior art.

[0005] In order to achieve the above object, the present invention adopts the following technical solutions:

[0006] A first aspect of the present invention provides a display panel, comprising a display area and a non-display area surrounding the display area, wherein the display area comprises a plurality of pixel units, each pixel unit comprising a first electrode, and the non-display area comprises:

[0007] a gate driving unit formed on a substrate;

[0008] a signal shielding layer formed on the gate driving unit;

[0009] A conductive layer formed on the signal shielding layer, wherein the conductive layer and the first electrode are provided on the same layer;

[0010] a cathode layer formed on the conductive layer; and

[0011] The touch signal traces are formed on the cathode layer.

[0012] The orthographic projection of the signal shielding layer on the substrate at least partially covers the orthographic projection of the gate driving unit on the substrate.

[0013] In some optional embodiments, the display panel further includes: a driving circuit layer formed on the substrate, the driving circuit layer including a source and drain layer, and the gate driving unit is provided in the driving circuit layer.

[0014] The display area includes: a display signal line, a first electrode, a light-emitting layer, and a cathode stacked on the driving circuit layer.

[0015] The signal shielding layer is set on the same layer as the display signal routing.

[0016] In some optional embodiments, the display area further includes: a non-under-screen sensing area and an under-screen sensing area.

[0017] The display signal traces are at least partially located in the under-screen sensing area.

[0018] In some optional embodiments, the display panel further includes: a driving circuit layer formed on the substrate, wherein the gate driving unit is provided in the driving circuit layer.

[0019] The display area includes: an anode, a light-emitting layer, and a cathode stacked on the driving circuit layer.

[0020] The anode includes a first electrode sublayer, a first electrode, and a second electrode sublayer stacked on the driving circuit layer.

[0021] The signal shielding layer is arranged on the same layer as the first electrode sublayer.

[0022] In some optional embodiments, the orthographic projection of the signal shielding layer on the substrate covers the orthographic projection of the touch signal trace on the substrate.

[0023] In some optional embodiments, the non-display area further includes:

[0024] The low-level signal lines surrounding the display area and the gate drive unit are arranged on the same layer as the source and drain layers of the gate drive unit;

[0025] a first buffer layer formed between the low-level signal line and the signal shielding layer, comprising at least one first via hole;

[0026] a second buffer layer formed between the signal shielding layer and the conductive layer, comprising at least one second via hole; and

[0027] A third buffer layer formed between the conductive layer and the cathode layer includes at least one third via hole, wherein

[0028] The orthographic projection of the first via hole on the substrate falls into the orthographic projection of the low-level signal line on the substrate, and the signal shielding layer covers the first via hole.

[0029] The orthographic projection of the second via hole on the substrate falls into the orthographic projection of the signal shielding layer on the substrate, and the conductive layer covers the second via hole.

[0030] The orthographic projection of the third via hole on the substrate falls within the orthographic projection of the conductive layer on the substrate, and the cathode layer covers the third via hole.

[0031] In some optional embodiments,

[0032] The orthographic projection of the conductive layer on the substrate covers the orthographic projection of the gate driving unit on the substrate.

[0033] The non-display area further includes a plurality of fourth via holes, the fourth via holes penetrate from the conductive layer to the first buffer layer, and the orthographic projections of the fourth via holes on the substrate fall within the orthographic projection of the gate driving unit on the substrate.

[0034] In some optional embodiments, the material of the signal shielding layer is indium tin oxide.

[0035] A second aspect of the present application provides a display device, comprising the display panel described above.

[0036] A third aspect of the present application provides a method for manufacturing the display panel described above, wherein the display panel includes a display area and a non-display area, wherein the display area includes a plurality of pixel units, and the pixel units include a first electrode, including:

[0037] forming a driving circuit layer on the substrate, wherein the driving circuit layer includes a gate driving unit located in the non-display area;

[0038] forming a signal shielding layer on the gate driving unit;

[0039] forming a conductive layer on the signal shielding layer, wherein the conductive layer and the first electrode are disposed on the same layer;

[0040] forming a cathode layer on the conductive layer;

[0041] A touch signal trace is formed on the cathode layer.

[0042] The orthographic projection of the signal shielding layer on the substrate at least partially covers the orthographic projection of the gate driving unit on the substrate.

[0043] The beneficial effects of the present invention are as follows:

[0044] In response to the current existing problems, the present invention develops a display panel, a manufacturing method thereof, and a display device. By setting a signal shielding layer between the gate driving unit and the conductive layer in the non-display area, the orthographic projection of the signal shielding layer on the substrate at least partially covers the orthographic projection of the gate driving unit on the substrate, so that the signal interference of the touch signal line to the gate driving unit can be effectively shielded, the signal-to-noise ratio is improved, and thus the display quality is improved, which has broad application prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] The specific embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.

[0046] Figure 1 A schematic cross-sectional view showing a display panel according to an embodiment of the present invention;

[0047] Figure 2 shows a schematic top view of a display panel according to an embodiment of the present invention;

[0048] Figure 3 shows a schematic top view of a display panel according to another embodiment of the present invention;

[0049] Figure 4 Show Figure 2 A schematic enlarged top view of the area intercepted by the dotted box in FIG;

[0050] Figure 5 A schematic cross-sectional view showing a display panel according to another embodiment of the present invention;

[0051] Figure 6 A schematic flow chart showing a method for manufacturing a display panel according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0052] In order to more clearly illustrate the present invention, the present invention is further described below in conjunction with the embodiments and drawings. Similar components in the drawings are represented by the same or similar reference numerals. It should be understood by those skilled in the art that the content described below is illustrative rather than restrictive and should not be used to limit the scope of protection of the present invention.

[0053] It should be noted that the terms "having," "including," and "comprising" described in the present invention are open-ended. That is, when describing a module as "having," "including," or "comprising" a first element, a second element, and / or a third element, it means that the module includes other elements in addition to the first element, the second element, and / or the third element. Furthermore, ordinal numbers such as "first," "second," and "third" in the present invention are not intended to limit a specific order but are merely used to distinguish between components.

[0054] The terms “on…”, “formed on…” and “disposed on…” used in the present invention may mean that one layer is directly formed or disposed on another layer, or may mean that one layer is indirectly formed or disposed on another layer, i.e., there are other layers between the two layers.

[0055] In addition, in the present invention, the term "co-layer arrangement" refers to two layers, components, members, elements, or parts that can be formed by the same manufacturing process (e.g., patterning process, etc.), and the two layers, components, members, elements, or parts are generally formed from the same material. For example, co-layer arrangement of two or more functional layers means that these co-layered functional layers can be formed using the same material layer and the same manufacturing process, thereby simplifying the manufacturing process of the display substrate.

[0056] In order to solve the above technical problems, an embodiment of the present application provides a display panel, including a display area and a non-display area surrounding the display area, wherein the display area includes a plurality of pixel units, each pixel unit includes a first electrode, and the non-display area includes:

[0057] a gate driving unit formed on a substrate;

[0058] a signal shielding layer formed on the gate driving unit;

[0059] A conductive layer formed on the signal shielding layer, wherein the conductive layer and the first electrode are provided on the same layer;

[0060] a cathode layer formed on the conductive layer; and

[0061] The touch signal traces are formed on the cathode layer.

[0062] The orthographic projection of the signal shielding layer on the substrate at least partially covers the orthographic projection of the gate driving unit on the substrate.

[0063] In this embodiment, a signal shielding layer is provided between the gate driving unit and the conductive layer in the non-display area, and the orthographic projection of the signal shielding layer on the substrate at least partially covers the orthographic projection of the gate driving unit on the substrate, thereby effectively shielding the signal interference of the touch signal line on the gate driving unit, improving the signal-to-noise ratio, and thus improving the display quality, which has broad application prospects.

[0064] In a specific example, referring to Figure 1 and Figure 2 As shown, the display panel includes a display area AA and a non-display area NA surrounding the display area AA. The display panel includes a touch layer. The touch layer includes a plurality of touch electrodes 620 formed in the display area AA and a touch signal trace 610 formed in the non-display area NA. The touch electrode 620 includes a transmitting electrode and a receiving electrode. Figure 2As shown, assuming that the row electrodes connected along the first direction X in the figure are transmitting electrodes, the column electrodes connected along the second direction Y perpendicular to the first direction X are receiving electrodes. When the operator touches the display area, the corresponding transmitting electrodes and receiving electrodes can generate transmitting signals and receiving signals, and transmit the corresponding signals to the touch driver chip (not shown) using the touch signal wiring for analysis, thereby obtaining the corresponding control signal to make the display area display the corresponding image. Touch signal wiring 610 needs to be led out from both ends of each row of transmitting electrodes and each row of receiving electrodes to form a sensing circuit. The touch signal wiring 610 is all arranged in the non-display area NA. Those skilled in the art should understand that in this example, the touch signal wiring is arranged in each side of the non-display area NA surrounding the display area AA, but the present application is not limited to this. In some display panels, the touch signal wiring is arranged in part of the four sides. Such a structure is also applicable to the embodiments of the present application and will not be described in detail here.

[0065] Continue to refer to Figure 1 As shown, the display panel includes a substrate 100 and a driving circuit layer 200 formed on the substrate 100. The driving circuit layer 200 includes a gate driving unit 200-1, a first pixel driving unit 200-2, and a second pixel driving unit 200-3 formed in the non-display area NA. Those skilled in the art will appreciate that the gate driving unit 200-1 is a gate driving circuit that provides gate driving signals to transistors in the first pixel driving unit 200-2 and the second pixel driving unit 200-3 in the display area AA.

[0066] In this example, the display area AA includes a non-under-screen sensing area AA-1 and an under-screen sensing area AA-2. The first pixel driving unit 200-2 is a pixel driving unit that provides a driving signal to the first pixel unit in the non-under-screen sensing area AA-1, and the second driving unit 200-3 is a pixel driving unit that provides a driving signal to the first pixel unit in the under-screen sensing area. The non-under-screen sensing area AA-1 is an area mainly used for image display function. The under-screen sensing area AA-2 can be an area with optical sensing, acoustic sensing or other sensing functions. Among them, when the function of the under-screen sensing area is optical sensing, the under-screen sensing area can have a visible light sensing function or an invisible light sensing function such as infrared light and ultraviolet light. At this time, the under-screen sensing area can be used as a front camera area, that is, an under-screen camera area.

[0067] In this example, the under-screen sensing area AA-2 with optical sensing capabilities is used as an example. Those skilled in the art will appreciate that the display panel in this example includes a light-receiving sensing unit on the back side, away from the touch layer. Furthermore, those skilled in the art will appreciate that while the diagram illustrates that each of the gate driver unit 200-1, first pixel driver unit 200-2, and second pixel driver unit 200-3 in the driver circuit layer includes a single thin-film transistor, this is for simplification and is not intended to be limiting. In actual display panels, each of the gate driver unit 200-1, first pixel driver unit 200-2, and second pixel driver unit 200-3 includes multiple thin-film transistors, which will not be discussed further here. Furthermore, when the display area includes both a non-under-screen sensing area and an under-screen sensing area, the density of pixel units in the under-screen sensing area is typically lower than that in the non-under-screen sensing area. Accordingly, the number of thin-film transistors in the second pixel driver unit will also be lower than that in the first pixel driver unit, which will not be discussed further here.

[0068] Specifically, the driving circuit layer 200 includes: a buffer layer 201, an active layer 202, a gate insulating layer 203, a gate 204, a dielectric layer 205, and a source and drain electrode 206, which are sequentially stacked on the substrate 100. The buffer layer 201 can be made of an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride. The active layer 202 can be made of materials such as polycrystalline silicon and metal oxides. The gate insulating layer 203 can be made of an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride. The dielectric layer 205 can be made of an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride. The material of the gate 204 can include a metal or alloy material such as aluminum, titanium, or cobalt. In addition, each of the buffer layer 201, the gate insulating layer 203, and the dielectric layer 205 can be a single layer or a multilayer structure.

[0069] What needs to be explained here is that Figure 1 Only a bottom-gate thin film transistor structure is shown, and the active layer is located below the gate. However, the present application is not intended to limit the type of thin film transistor. In some embodiments, the thin film transistor in the driving circuit layer may also be a top-gate structure. In this case, only the positions of the gate and the active layer need to be adjusted, which will not be repeated here.

[0070] More specifically, continue to refer to Figure 1As shown, the display area AA also includes a first buffer layer 701 formed on the drive circuit layer 200. This layer can be used to protect the devices in the drive circuit layer and for planarization. In some application scenarios, it can also be called a planarization layer. The display area AA also includes a display signal line 320, a first electrode 420, a light-emitting layer 800, and a cathode 520 stacked in sequence on the first buffer layer 701. Those skilled in the art will understand that the display area also includes a pixel defining layer for defining the light-emitting layer in the pixel unit. In this example, the first electrode 420 is the anode of the pixel unit.

[0071] It should be noted that when the display area AA includes the non-under-screen sensing area AA-1 and the under-screen sensing area AA-2, to improve the light transmittance of the under-screen sensing area AA-2, the pixel density of the pixel units in the under-screen sensing area AA-2 is typically relatively low, and the pixel units are typically located outside the camera (i.e., the central sensing area). Therefore, compared to the non-under-screen sensing area AA-1, the display signal traces are longer and occupy a larger area. To further improve the light transmittance of the under-screen sensing area AA-2, a transparent trace layer is typically added above the driver circuit layer 200. This transparent trace layer serves as the transparent display signal traces. This display signal trace is located above the entire driver circuit layer 200 and is different from the trace layers SD1 and SD2. One of SD1 and SD2 is used as a source / drain layer; both can serve as power and data signal traces within the driver circuit layer, and their details are not detailed here.

[0072] The material of the display signal trace 320 is usually indium tin oxide (ITO). Those skilled in the art will understand that this application is not intended to be limiting. If the product's transmittance and conductivity meet the design specifications, it can also be other transparent metal materials.

[0073] It should also be noted that, in this example, both the non-under-screen sensing area AA-1 and the under-screen sensing area AA-2 include display signal traces 320. This is because, although the under-screen transmittance issue does not need to be considered in the non-under-screen sensing area AA-1, by using the display signal traces 320 as a conductive transition layer, it is possible to avoid making deep holes from the first buffer layer 702 through to the source and drain layers in the driving circuit layer 200, thereby avoiding poor conductivity.

[0074] In some optional embodiments, the non-under-screen sensing area AA-1 may not include display signal traces. In other words, the display signal traces may be located in the under-screen sensing area to improve light transmittance. In other words, the display signal traces are at least partially located in the under-screen sensing area.

[0075] Continue to refer to Figure 1As shown, in this example, the non-display area NA includes: a substrate 100, a gate driving unit 200-1 formed on the substrate 100, a signal shielding layer 310 formed on the gate driving unit 200-1, a conductive layer 410 formed on the signal shielding layer 310, a cathode layer 510 formed on the conductive layer 410, and a touch signal trace 610 formed on the cathode layer 510, and the cathode layer 510 and the cathode 520 are arranged on the same layer.

[0076] In an embodiment, the conductive layer 410 and the first electrode 420 are disposed on the same layer, and the orthographic projection of the signal shielding layer on the substrate at least partially covers the orthographic projection of the gate drive unit on the substrate. With this configuration, a signal shielding layer that at least partially covers the gate drive unit can be disposed between the gate drive unit and the touch signal trace, thereby shielding the gate drive unit from signal interference with the touch signal trace.

[0077] Preferably, if Figure 2 As shown in the middle grey area, the orthographic projection of the signal shielding layer 310 on the substrate 100 covers the orthographic projection of the gate driving unit 200-1 on the substrate 100. It should be noted that the conductive layer 410 is provided on the same layer as the first electrode 420, but is electrically isolated from each other.

[0078] Through this setting, the signal shielding layer 310 can be used to completely protect the gate driving unit 200-1, effectively avoiding signal crosstalk between the gate driving unit 200-1 and the touch signal lines 610 densely arranged above it, reducing the impact of the touch signal lines 610 on the display drive, improving the stability of the display, and on the other hand, improving the sensitivity of the touch, which has broad application prospects.

[0079] More specifically, the signal shielding layer 310 is provided on the same layer as the display signal trace 320. Preferably, the material of the signal shielding layer 310 is also indium tin oxide.

[0080] It is worth mentioning that the embodiments of the present application utilize the film layer of the display signal line 320 in the under-screen sensing area AA-2 in the existing film layer process to simultaneously form the display signal line 320 and the signal shielding layer 310 through one patterning. The design cleverly uses the existing process film layer to increase the signal shielding function of the gate drive unit in the non-display area. Since no new film layers and steps are added, no equipment and production lines are added, and the signal shielding between the touch signal line and the gate drive unit is further improved without increasing additional costs. It has broad application prospects.

[0081] It should be noted that, generally, the gate driving unit is arranged on three sides of the non-display area NA. For example, the bottom frame of the display panel is not provided with a gate driving unit. Figure 2As shown, for the purpose of isolating the gate drive unit, the signal shielding layer only needs to cover the area where the gate drive unit is provided. However, the present application is not limited thereto. In some optional embodiments, referring to Figure 3 As shown, the orthographic projection of the signal shielding layer (gray area) on the substrate covers the orthographic projection of the touch signal line on the substrate.

[0082] It should be noted that in some cases, in order to improve touch accuracy, the touch electrodes located in the display area AA will partially extend beyond the edge of the display area. In this case, in order to prevent the touch electrode portion extending to the non-display area from generating signal interference with the gate drive circuit located below, preferably, the orthographic projection of the signal shielding layer on the substrate also partially covers the edge area of the display area; in addition, in some cases, the touch signal line will be partially introduced into the display area. In order to avoid the signal shielding layer affecting the wiring of the display area, therefore, in such a case, preferably, the orthographic projection of the signal shielding layer on the substrate covers the portion of the orthographic projection of the touch signal line on the substrate that is located in the non-display area.

[0083] Through this arrangement, the touch signal lines can be completely isolated from the signal lines and circuits of the display function layer thereunder, thereby providing a better signal shielding function.

[0084] In order to better understand the structural relationship and function of each film layer in the non-display area of the embodiment of the present application, the following Figure 1 and Figure 4 Further describe the relationships between each layer.

[0085] Figure 4 Show Figure 2 Schematic enlarged top view of the area intercepted by the dotted box in FIG. In order to avoid visual interference of the touch signal wiring, Figure 4 The touch layer is not shown in FIG. In addition, in order to highlight the relationship between each layer and the gate driving unit, Figure 4 The gate driving unit 200 - 1 is emphasized by a gray area.

[0086] Specifically, to ensure tight packaging, such as Figure 4 As shown, the cathode layer 510 is at a certain distance from the outer boundary of the non-display area of the display panel. The orthographic projection of the signal shielding layer 310 on the substrate completely covers the orthographic projection range of the gate driving unit 200-1 on the substrate.

[0087] In addition, refer to Figure 1 and Figure 4 As shown, the non-display area NA also includes a low-level signal line 216 surrounding the display area AA and the gate driving unit 200-1, which is arranged in the same layer as the source and drain layer 206. Usually, the low-level signal line is a VSS signal line, which is used to provide a low-level signal to the cathode layer 510 and the cathode 520.

[0088] Specifically, non-display NA also includes:

[0089] a first buffer layer 701 formed between the low-level signal line 216 and the signal shielding layer 310 , wherein the first buffer layer 701 includes at least one first via hole;

[0090] a second buffer layer 702 formed between the signal shielding layer 310 and the conductive layer 410 , the second buffer layer 702 including at least one second via hole; and

[0091] A third buffer layer 703 is formed between the conductive layer 410 and the cathode layer 510 , and the third buffer layer 703 includes at least one third via hole.

[0092] The orthographic projection of the first via on the substrate 100 falls within the orthographic projection of the low-level signal line 216 on the substrate 100, and the signal shielding layer 310 covers the first via; the orthographic projection of the second via on the substrate 100 falls within the orthographic projection of the signal shielding layer 310 on the substrate 100, and the conductive layer 410 covers the second via; the orthographic projection of the third via on the substrate 100 falls within the orthographic projection of the conductive layer on the substrate 100, and the cathode layer 510 covers the third via. Specifically, as Figure 4 As shown, the orthographic projection of the conductive layer 410 on the substrate 100 overlaps with the orthographic projections of the low-level signal line 216 and the signal shielding layer 310 on the substrate 100 .

[0093] Alternatively, although Figure 4 It is shown that the orthographic projections of the first via, the second via, and the third via on the substrate do not overlap, but those skilled in the art will understand that the orthographic projections of the first via, the second via, and the third via on the substrate may also cover each other, that is, they may be vias that pass through the third buffer layer to the low-level signal line 216 at the same position to simplify the via formation steps. Of course, forming a deep through hole at one time may have the risk of poor conductivity, and a reasonable compromise can be made according to specific needs, which will not be elaborated here.

[0094] like Figure 4As shown, the low-voltage signal line 216 arranged on the periphery is electrically connected to the signal shielding layer 310 through a first via, the signal shielding layer 310 is electrically connected to the conductive layer 410 through a second via, and the conductive layer 410 is electrically connected to the cathode layer 510 through a third via, so that the low-voltage signal line 216 and the signal shielding layer 310, the conductive layer 410 and the cathode layer 510 form a potential plane. Due to the overlapping relationship of each layer, a better shielding effect can be achieved. In addition, the multi-layer metal stacking structure improves the signal shielding effect with each additional layer of metal, better shielding the crosstalk between the touch signal line and the gate drive unit, and improving the signal-to-noise ratio. In addition, through the above connection relationship, the low-level signal line 216 is connected in parallel with the signal shielding layer 310, reducing the load on the low-level signal line 216.

[0095] Optionally, refer to Figure 1 and Figure 4 As shown, the orthographic projection of the conductive layer 410 on the substrate 100 covers the orthographic projection of the gate driving unit 200-1 on the substrate 100, and the non-display area NA also includes a plurality of fourth vias, which pass through the conductive layer to the first buffer layer 701, and the orthographic projection of the fourth vias on the substrate 100 falls into the orthographic projection of the gate driving unit 200-1 on the substrate 100.

[0096] This arrangement can prevent the problem of bubbling caused by water vapor absorbed by the organic layer in the driving circuit layer on the large signal shielding layer and the conductive layer, and timely release of bubbles can improve the display stability of the display panel.

[0097] In some other optional embodiments, the multi-layer structure of the anode in the pixel unit in the display area is utilized to provide a signal shielding layer in the non-display area.

[0098] Specifically, refer to Figure 5 As shown, the display panel includes a display area AA and a non-display area NA surrounding the display area AA. The display area AA includes a plurality of pixel units, and the pixel units include a first electrode 420 ′.

[0099] The non-display area NA includes:

[0100] A gate driving unit 200 - 1 formed on a substrate 100 ;

[0101] a signal shielding layer 310 ′ formed on the gate driving unit 200 - 1 ;

[0102] A conductive layer 410 ′ is formed on the signal shielding layer 310 ′, and the conductive layer 410 ′ is provided on the same layer as the first electrode 420 ′;

[0103] a cathode layer 510 formed on the conductive layer 410'; and

[0104] The touch signal trace 610 is formed on the cathode layer 510 , wherein the orthographic projection of the signal shielding layer 310 ′ on the substrate 100 at least partially covers the orthographic projection of the gate driving unit 200 - 1 on the substrate 100 .

[0105] Preferably, the orthographic projection of the signal shielding layer 310 ′ on the substrate 100 covers the orthographic projection of the gate driving unit 200 - 1 on the substrate 100 .

[0106] More specifically, continue to refer to Figure 5 As shown, in this embodiment, the display panel includes: a driving circuit layer 200 formed on a substrate 100 , and a gate driving unit 200 - 1 is provided in the driving circuit layer 200 .

[0107] In this embodiment, the display area AA is not required to specifically include the non-under-screen sensing area and the under-screen sensing area. That is, in this embodiment, it can be as follows Figure 5 The display area AA shown in the figure only includes one array-arranged pixel unit and one driving unit for normal image display. It can also be used to distinguish between two distribution modes and driving units for the under-screen sensing area and the non-under-screen sensing area to distinguish driving circuit layers with different functions.

[0108] In particular, continue to refer to Figure 5 As shown, the display area AA includes: an anode 430, a light-emitting layer 800, and a cathode 520, stacked on the drive circuit layer 200. The anode 430 includes a first electrode sublayer, a first electrode 420', and a second electrode sublayer stacked on the drive circuit layer 200, i.e., the anode 430 forms a sandwich structure. Optionally, the first and second electrode sublayers are made of ITO, and the first electrode 420' is made of Ag. The signal shielding layer 310' is provided on the same layer as the first electrode sublayer.

[0109] In this embodiment, by utilizing the film layer of the first electrode sublayer of the anode in the existing film layer process, the first electrode sublayer and the signal shielding layer 310' can be simultaneously formed through a single patterning process. The design and clever use of the existing process film layer are used to increase the signal shielding function of the gate drive unit in the non-display area. Since no new film layers and steps are added, no additional equipment and production lines are added. This achieves further improvement in the signal shielding between the touch signal routing and the gate drive unit without increasing additional costs, and has broad application prospects.

[0110] It should be noted that the other structural features and film layer relationships in this embodiment are combined with the above Figure 1 That is, in this embodiment, similar Figures 2 to 4A similar film layer coverage relationship is formed through the first buffer layer 701, the second buffer layer 702, and the third buffer layer 703', as well as the first via, the second via, and the third via, forming an electrical connection relationship between the low-voltage signal line 216 and the signal shielding layer 310', the conductive layer', and the cathode layer 510. As a result, the low-voltage signal line 216 and the signal shielding layer 310', the conductive layer 410', and the cathode layer 510 form a potential plane. Due to the overlapping relationship of each layer, a better shielding effect can be achieved. In addition, the multi-layer metal stacking structure improves the signal shielding effect with each additional layer of metal, better shielding the crosstalk between the touch signal line and the gate drive unit, and improving the signal-to-noise ratio. In addition, through the above connection relationship, the low-level signal line 216 is connected in parallel with the signal shielding layer 310', reducing the load on the low-level signal line 216.

[0111] In addition, optionally, the non-display area further includes a plurality of fourth vias, which penetrate from the conductive layer 410 ′ to the first buffer layer 701 , and the orthographic projections of the fourth vias on the substrate 100 fall within the orthographic projections of the gate driving unit 200 - 1 on the substrate 100 .

[0112] This arrangement can prevent the problem of bubbling caused by water vapor absorbed by the organic layer in the driving circuit layer on the large signal shielding layer and the conductive layer, and timely release of bubbles can improve the display stability of the display panel.

[0113] Of course, further optionally, the orthographic projection of the signal shielding layer 310 ′ on the substrate 100 covers the orthographic projection of the touch signal trace 610 on the substrate 100 , thereby increasing the shielding effect, which will not be described in detail here.

[0114] It should also be noted that although Figure 5 In the embodiment shown, the conductive layer is a separate film layer where the first electrode is located, that is, it is only provided in the same layer as the first electrode. However, those skilled in the art will appreciate that the conductive layer may also be composed of the film layer where the first electrode and the second electrode sublayer are located. In addition, further optionally, although Figure 5 In the embodiment shown, the signal shielding layer is shown as a film layer located under the conductive layer, but appropriate adjustments can also be made, that is, the signal shielding layer utilizes the film layer where the second electrode sublayer is located and is arranged on the same layer as the second electrode sublayer. In this case, the signal shielding layer is arranged on the conductive layer, and the conductive layer is arranged between the gate drive unit and the signal shielding layer. Similarly, when the conductive layer is located under the signal shielding layer, the conductive layer can also be arranged on the same layer as the first electrode sublayer and the first electrode, which will not be repeated here.

[0115] Based on the same invention concept, Figure 6As shown, the embodiment of the present application further provides a method for manufacturing the display panel described in the above embodiment, wherein the display panel includes a display area and a non-display area, the display area includes a plurality of pixel units, and the pixel units include a first electrode, including:

[0116] S1. forming a driving circuit layer on a substrate, wherein the driving circuit layer includes a gate driving unit located in a non-display area;

[0117] S2. forming a signal shielding layer on the gate driving unit;

[0118] S3. forming a conductive layer on the signal shielding layer, wherein the conductive layer and the first electrode are provided on the same layer;

[0119] S4, forming a cathode layer on the conductive layer;

[0120] S5. forming a touch signal trace on the cathode layer.

[0121] The orthographic projection of the signal shielding layer on the substrate at least partially covers the orthographic projection of the gate driving unit on the substrate.

[0122] In this embodiment, a signal shielding layer is provided between the gate driving unit and the conductive layer in the non-display area, and the orthographic projection of the signal shielding layer on the substrate covers the orthographic projection of the gate driving unit on the substrate, thereby effectively shielding the signal interference of the touch signal line on the gate driving unit, improving the signal-to-noise ratio, and thus improving the display quality, which has broad application prospects.

[0123] Specifically, in an optional embodiment, referring to Figure 1 As shown, the driving circuit layer 200 includes a source-drain layer 206, and the display area AA includes: a display signal trace 320, a first electrode 420, a light-emitting layer 800, and a cathode 520 stacked on the driving circuit layer 200, and the signal shielding layer formed on the gate driving unit further includes:

[0124] forming a signal shielding material layer covering the driving circuit layer;

[0125] Coating a photoresist layer on the signal shielding material layer and performing exposure and development to form an etching stop layer;

[0126] The signal shielding material layer is etched based on the etching stop layer to form a signal shielding layer and a display signal wiring.

[0127] Through the above settings, by utilizing the film layer of the display signal line between the driving circuit layer and the anode in the existing film layer process, the signal shielding layer and the display signal line can be formed simultaneously through one patterning, and the signal shielding function of the gate driving unit in the non-display area is added by designing and cleverly using the existing process film layer. Since no new film layers and steps are added, the equipment and production lines are not increased, and the signal shielding between the touch signal line and the gate driving unit is further improved without increasing additional costs, which has broad application prospects.

[0128] In some other optional embodiments, referring to Figure 5 As shown, the display area AA includes: an anode 430 stacked on the driving circuit layer 200, a light-emitting layer 800, and a cathode 520. The anode 430 includes a first electrode sublayer, a first electrode 420', and a second electrode sublayer stacked on the driving circuit layer 200.

[0129] Forming a signal shielding layer on the gate driving unit further includes:

[0130] forming a signal shielding material layer covering the driving circuit layer;

[0131] Coating a photoresist layer on the signal shielding material layer and performing exposure and development to form an etching stop layer;

[0132] The signal shielding material layer is etched based on the etch stop layer to form a signal shielding layer and a first electrode sublayer.

[0133] Through the above settings, by utilizing the film layer of the display signal line between the driving circuit layer and the anode in the existing film layer process, the signal shielding layer and the display signal line can be formed simultaneously through one patterning, and the signal shielding function of the gate driving unit in the non-display area is added by designing and cleverly using the existing process film layer. Since no new film layers and steps are added, the equipment and production lines are not increased, and the signal shielding between the touch signal line and the gate driving unit is further improved without increasing additional costs, which has broad application prospects.

[0134] Based on the same inventive concept, an embodiment of the present invention further provides a display device, comprising the display panel described in the above embodiment.

[0135] Since the display panel included in the display device provided in the embodiment of the present application corresponds to the display panels provided in the above-mentioned embodiments, the previous implementation manner is also applicable to this embodiment and will not be described in detail in this embodiment.

[0136] In this embodiment, the display device can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a car display, a digital photo frame or a navigation system. By loading the above display panel, the display device can have a better and more stable display effect without increasing the process cost, higher competitiveness, and broad application prospects.

[0137] In response to the current existing problems, the present invention develops a display panel, a manufacturing method thereof, and a display device. By setting a signal shielding layer between the gate driving unit and the conductive layer in the non-display area, the orthographic projection of the signal shielding layer on the substrate at least partially covers the orthographic projection of the gate driving unit on the substrate, so that the signal interference of the touch signal line to the gate driving unit can be effectively shielded, the signal-to-noise ratio is improved, and thus the display quality is improved, which has broad application prospects.

[0138] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not limitations on the implementation methods of the present invention. For ordinary technicians in this field, other different forms of changes or modifications can be made based on the above description. It is impossible to list all the implementation methods here. All obvious changes or modifications derived from the technical solution of the present invention are still within the scope of protection of the present invention.

Claims

1. A display panel comprising a display area and a non-display area surrounding the display area, wherein the display area comprises a plurality of pixel units, each pixel unit comprises a first electrode, wherein: The non-display area includes: a gate driving unit formed on a substrate; a signal shielding layer formed on the gate driving unit; a conductive layer formed on the signal shielding layer, wherein the conductive layer and the first electrode are provided on the same layer; a cathode layer formed on the conductive layer; and A touch signal trace formed on the cathode layer, The orthographic projection of the signal shielding layer on the substrate at least partially covers the orthographic projection of the gate driving unit on the substrate. The non-display area also includes: A low-level signal line surrounding the display area and the gate driving unit is provided on the same layer as the source and drain layer of the gate driving unit; a first buffer layer formed between the low-level signal line and the signal shielding layer, comprising at least one first via hole; a second buffer layer formed between the signal shielding layer and the conductive layer, comprising at least one second via hole; and A third buffer layer formed between the conductive layer and the cathode layer includes at least one third via hole, wherein The orthographic projection of the first via on the substrate falls within the orthographic projection of the low-level signal line on the substrate, the signal shielding layer covers the first via, the orthographic projection of the second via on the substrate falls within the orthographic projection of the signal shielding layer on the substrate, the conductive layer covers the second via, the orthographic projection of the third via on the substrate falls within the orthographic projection of the conductive layer on the substrate, and the cathode layer covers the third via.

2. The display panel according to claim 1, wherein: Also includes: A driving circuit layer is formed on the substrate, the driving circuit layer includes a source and drain layer, and the gate driving unit is arranged in the driving circuit layer. The display area includes: a display signal line, the first electrode, a light-emitting layer, and a cathode stacked on the driving circuit layer. The signal shielding layer is arranged on the same layer as the display signal wiring.

3. The display panel according to claim 2, wherein: The display area further includes: a non-under-screen sensing area and an under-screen sensing area, The display signal wiring is at least partially located in the under-screen sensing area.

4. The display panel according to claim 1, wherein: Also includes: A driving circuit layer is formed on a substrate, wherein the gate driving unit is provided in the driving circuit layer. The display area includes: an anode, a light emitting layer, and a cathode stacked on the driving circuit layer. The anode includes a first electrode sublayer, the first electrode, and a second electrode sublayer stacked on the driving circuit layer. The signal shielding layer is provided on the same layer as the first electrode sublayer.

5. The display panel according to claim 1, wherein: in, The orthographic projection of the signal shielding layer on the substrate covers the orthographic projection of the touch signal trace on the substrate.

6. The display panel according to claim 1, wherein: The orthographic projection of the conductive layer on the substrate covers the orthographic projection of the gate driving unit on the substrate, The non-display area further includes a plurality of fourth via holes, the fourth via holes passing through the conductive layer to the first buffer layer, and the orthographic projections of the fourth via holes on the substrate fall within the orthographic projection of the gate driving unit on the substrate.

7. The display panel according to any one of claims 1 to 6, characterized in that: The material of the signal shielding layer is indium tin oxide.

8. A display device comprising the display panel according to any one of claims 1 to 7.

9. A method for manufacturing a display panel according to any one of claims 1 to 7, wherein the display panel comprises a display area and a non-display area, the display area comprises a plurality of pixel units, and the pixel units comprise a first electrode, wherein: include: forming a driving circuit layer on the substrate, wherein the driving circuit layer includes a gate driving unit located in the non-display area; forming a signal shielding layer on the gate driving unit; forming a conductive layer on the signal shielding layer, wherein the conductive layer and the first electrode are provided on the same layer; forming a cathode layer on the conductive layer; forming a touch signal trace on the cathode layer, The orthographic projection of the signal shielding layer on the substrate at least partially covers the orthographic projection of the gate driving unit on the substrate.

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