High operating voltage radio frequency power device based on electric field modulation under gate and preparation method thereof

Abstract

The present invention relates to a high operating voltage radio frequency power device based on gate-down electric field modulation and a preparation method, the device comprising: a substrate layer; a buffer layer located on the substrate layer; a channel layer located on the buffer layer; a source electrode located at one end of the channel layer; a drain electrode located at the other end of the channel layer; an insertion layer located on the channel layer and between the source electrode and the drain electrode; a barrier layer located on the insertion layer; wherein, along the gate width direction, a plurality of grooves are arranged in the barrier layer, the insertion layer and the channel layer, and the bottom of the grooves is located in the channel layer; a passivation layer located on the barrier layer, wherein, along the gate width direction, a gate groove is provided that penetrates the passivation layer, and the plurality of grooves are located below the gate grooves; a gate electrode is located in the plurality of grooves and the gate grooves, and on the surface of a portion of the passivation layer; wherein, the side length of the groove close to the source electrode is less than the side length close to the drain electrode. The device of the present invention is provided with an asymmetric convergent nanochannel, which can improve the breakdown characteristics and reduce leakage and power consumption.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor devices, and in particular relates to a high operating voltage radio frequency power device based on sub-gate electric field modulation and a preparation method thereof. Background Art

[0002] GaN crystals possess excellent electrical properties, such as a wide bandgap and a high breakdown electric field. More importantly, GaN can form an AlGaN / GaN heterojunction. Due to the extremely strong piezoelectric polarization and spontaneous polarization electric field, a high-concentration two-dimensional electron gas (2DEG) can form at the AlGaN / GaN heterojunction interface even in the absence of any doping. This 2DEG exhibits a high mobility (>1500cm2 / Vs), enabling extremely high peak electron velocities (3x107cm / s) and saturation electron velocities (2x107cm / s), resulting in GaN HEMT devices. GaN HEMTs operate at high voltages to provide high RF output power density (Pout) and power added efficiency (PAE), and are currently widely used in defense and civilian applications such as radar, satellites, and 5G micro base stations.

[0003] Similar to the development of silicon MOSFETs, efforts are underway to use GaN fin-shaped (or tri-gate) structures to create a three-dimensional wrapping structure around the channel for enhanced gate control. Furthermore, the fin-shaped structure effectively modulates the source resistance, weakening the tendency of source resistance RS to increase with drain current, thereby exhibiting a flatter transconductance and improving device transconductance linearity. This is essential for increasing signal transmission linearity in 5G base stations and satellite communications.

[0004] However, for conventional fin-structured GaN HEMT devices, how to increase the device breakdown voltage, reduce off-state leakage, reduce power consumption, and improve circuit efficiency is an urgent problem to be solved. Summary of the Invention

[0005] To address the above-mentioned problems in the prior art, the present invention provides a high-voltage RF power device based on gate-down electric field modulation and a method for manufacturing the same. The technical problems to be solved by the present invention are achieved through the following technical solutions:

[0006] The present invention provides a high operating voltage radio frequency power device based on gate-down electric field modulation, comprising:

[0007] substrate layer;

[0008] a buffer layer, located on the substrate layer;

[0009] a channel layer, located on the buffer layer;

[0010] a source electrode, located at one end of the channel layer;

[0011] a drain electrode, located at the other end of the channel layer;

[0012] an insertion layer, located on the channel layer and between the source electrode and the drain electrode;

[0013] a barrier layer located on the insertion layer; wherein, along the gate width direction, a plurality of grooves are spaced apart in the barrier layer, the insertion layer and the channel layer, and the bottoms of the grooves are located in the channel layer;

[0014] a passivation layer located on the barrier layer, wherein a gate groove penetrating the passivation layer is provided along the gate width direction, and a plurality of the grooves are located below the gate groove;

[0015] a gate electrode, located in the plurality of grooves and the gate trench, and on a surface of a portion of the passivation layer;

[0016] The side length of the groove close to the source electrode is smaller than the side length of the groove close to the drain electrode.

[0017] In one embodiment of the present invention, a dielectric layer is provided on the inner wall of the groove and between the gate and the barrier layer.

[0018] In one embodiment of the present invention, the grooves and the unetched areas are arranged periodically.

[0019] In one embodiment of the present invention, the area ratio of the groove to the unetched area in one period is 1:2.

[0020] In one embodiment of the present invention, the groove is triangular in shape, and the top angle of the triangle is located on a side close to the source electrode, and the bottom side corresponding to the top angle is located on a side close to the drain electrode.

[0021] In one embodiment of the present invention, the angle between the side of the groove close to the drain electrode and its adjacent side is in the range of 70° to 90°.

[0022] The present invention provides a method for preparing a high operating voltage radio frequency power device based on gate-down electric field modulation, comprising:

[0023] S1: sequentially growing a buffer layer, a channel layer, an insertion layer, and a barrier layer on the substrate layer;

[0024] S2: preparing a source electrode at one end of the channel layer and a drain electrode at the other end;

[0025] S3: growing a passivation layer on the barrier layer;

[0026] S4: etching the passivation layer between the source electrode and the drain electrode along the gate width direction to form a gate groove penetrating the passivation layer;

[0027] S5: etching the barrier layer, the insertion layer, and the channel layer below the gate groove to form a plurality of grooves spaced apart along the gate width direction;

[0028] S6: growing a dielectric layer on the inner wall of the groove and the barrier layer;

[0029] S7: depositing gate metal in the grooves, the gate trenches, and on a portion of the passivation layer to form a gate;

[0030] S8: preparing a metal interconnection layer between the source electrode and the drain electrode;

[0031] The bottom of the groove is located in the channel layer, and the side length of the groove close to the source is smaller than the side length of the groove close to the drain.

[0032] In one embodiment of the present invention, in S5 , the grooves and the unetched regions are arranged periodically, and the area ratio of the grooves to the unetched regions within one period is 1:2.

[0033] In one embodiment of the present invention, in S5 , the angle between the long side of the groove close to the drain terminal and its adjacent side is in the range of 70° to 90°.

[0034] Compared with the prior art, the present invention has the following beneficial effects:

[0035] The high operating voltage RF power device based on electric field modulation under the gate of the present invention is provided with an asymmetric convergent nanochannel, that is, the channel near the source end is wider and the channel near the drain end is narrower, which modulates the peak electric field strength under the gate near the drain side, improves the breakdown characteristics and reduces leakage and power consumption, so as to achieve greater output power density and efficiency.

[0036] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the following preferred embodiments are specifically cited and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 1 is a schematic top view of a high operating voltage radio frequency power device based on gate-under-electric-field modulation provided by an embodiment of the present invention;

[0038] Figure 2a-2b 1 is a cross-sectional schematic diagram of a high operating voltage radio frequency power device based on gate-under-electric-field modulation provided by an embodiment of the present invention;

[0039] Figure 3This is a schematic diagram of a method for preparing a high operating voltage radio frequency power device based on sub-gate electric field modulation provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0040] In order to further illustrate the technical means and effects adopted by the present invention to achieve the predetermined purpose of the invention, the following, in combination with the accompanying drawings and specific implementation methods, describes in detail a high operating voltage RF power device based on sub-gate electric field modulation and a preparation method proposed in accordance with the present invention.

[0041] The aforementioned and other technical contents, features, and effects of the present invention are clearly presented in the following detailed description of the specific embodiments in conjunction with the accompanying drawings. Through the description of the specific embodiments, a deeper and more specific understanding of the technical means and effects adopted by the present invention to achieve the intended purpose can be obtained. However, the accompanying drawings are provided for reference and illustration purposes only and are not intended to limit the technical solutions of the present invention.

[0042] Example 1

[0043] Please refer to Figure 1 、 Figure 2a and Figure 2b , Figure 1 1 is a schematic top view of a high operating voltage radio frequency power device based on gate-under-electric-field modulation provided by an embodiment of the present invention; Figure 2a-2b This is a schematic cross-sectional view of a high-voltage RF power device based on gate-below-field electric field modulation, provided by an embodiment of the present invention. As shown, the device comprises a substrate layer 1, a buffer layer 2, a channel layer 3, a source electrode 4, a drain electrode 5, an insertion layer 6, a barrier layer 7, a passivation layer 8, and a gate electrode 9. A two-dimensional electron gas channel is formed between the channel layer 3 and the insertion layer 6.

[0044] Specifically, the substrate layer 1 includes one of sapphire, SiC or Si. The buffer layer 2 is located on the substrate layer 1, and its material can be GaN. The channel layer 3 is located on the buffer layer 2, and its material is i-GaN. The source 4 is located at one end of the channel layer 3; the drain 5 is located at the other end of the channel layer 3. The materials of the source 4 and the drain 5 are ohmic metals, which are Ti / Al / Ni / Au from bottom to top. The insertion layer 6 is located on the channel layer 3 and between the source 4 and the drain 5. The material of the insertion layer 6 is AlN. The barrier layer 7 is located on the insertion layer 6. The material of the barrier layer 7 can be AlGaN or InAlN. The passivation layer 8 is located on the barrier layer 7. The material of the passivation layer 8 is SiN, and its thickness is 120nm.

[0045] Furthermore, along the gate width direction, a plurality of grooves 10 are spaced apart in the barrier layer 7 , the insertion layer 6 and the channel layer 3 , and the bottoms of the grooves 10 are located in the channel layer 3 .

[0046] Furthermore, a gate groove 11 penetrating the passivation layer 8 is provided along the gate width direction to expose the surface of the barrier layer 7 , and a plurality of grooves 10 are located under the gate groove 11 .

[0047] Furthermore, gate electrodes 9 are provided in the plurality of grooves 10 and gate grooves 11 , and on a portion of the surface of the passivation layer 8 .

[0048] In this embodiment, the side length of the groove 10 near the source 4 is smaller than the side length near the drain 5. The groove 10 forms the two-dimensional electron gas channel into an asymmetric nanochannel (unetched area), that is, the channel near the source end is wider and the channel near the drain end is narrower.

[0049] Furthermore, in this embodiment, a dielectric layer 12 is provided between the inner wall of the groove 10 and the gate foot of the gate 9 and the barrier layer 7. The material of the dielectric layer 12 is Al2O3, and is used to suppress gate leakage.

[0050] In a specific embodiment, the groove 10 is in a triangular structure, with the top corner of the triangle located on the side close to the source 4 , and the bottom side corresponding to the top corner located on the side close to the drain 5 .

[0051] Furthermore, in this embodiment, the angle between the side of the groove 10 close to the drain 4 and its adjacent side is in the range of 70° to 90°.

[0052] Furthermore, the grooves 10 (i.e., etched areas) and unetched areas are arranged periodically. Specifically, along the gate width, the barrier layer 7 is divided into several periods, preferably with the same length. In each period, a portion of the barrier layer 7, insertion layer 6, and channel layer 3 is etched away, forming at least one groove 10, while another portion of the barrier layer 7, insertion layer 6, and channel layer 3 is not etched away, forming at least one unetched area.

[0053] It should be noted that, within one period, the area ratio of the groove 10 (ie, the etched area) to the unetched area is 1:2.

[0054] The high-voltage RF power device based on gate-side electric field modulation in this embodiment forms an asymmetric convergent nanochannel by etching, modulating the peak electric field intensity under the gate near the drain side, improving breakdown characteristics and reducing leakage and power consumption to achieve higher output power density and efficiency.

[0055] Specifically, in this embodiment, the nanochannel is designed as an asymmetric, convergent nanochannel. By varying the shape of the side gates, the electric field strength beneath the gate, particularly the peak electric field strength beneath the gate near the drain, is influenced, thereby regulating the breakdown voltage. When the nanochannel is designed as a convergent shape—that is, the channel is wider near the source and narrower near the drain—the unique channel shape reduces the electric field beneath the gate, particularly the peak electric field strength near the drain, to a value lower than that of a Fin-HEMT device with a traditional rectangular, symmetrical channel. This unique nanochannel shape reduces the electric field beneath the gate, particularly the peak electric field strength beneath the gate near the drain, thereby lowering the device's breakdown voltage. This results in a higher operating voltage and lower leakage for the Fin-HEMT device compared to traditional rectangular devices.

[0056] Furthermore, its application in microwave and millimeter-wave power transistors and power amplifiers has resulted in high operating voltages, high output power density, and higher efficiency for the same output power. When the nanochannel is convergent, its breakdown voltage is higher than that of traditional rectangular symmetrical channel Fin-HEMT devices.

[0057] Example 2

[0058] Based on Example 1, this embodiment provides a method for preparing a high operating voltage RF power device based on gate electric field modulation, see Figure 3 , Figure 3 This is a schematic diagram of a method for preparing a low-voltage terminal device based on gate-down electric field modulation provided by an embodiment of the present invention. As shown in the figure, the method for preparing a high-operating-voltage RF power device based on gate-down electric field modulation in this embodiment includes:

[0059] S1: growing a buffer layer, a channel layer, an insertion layer and a barrier layer in sequence on the substrate layer;

[0060] Specifically, MOCVD equipment is used to grow heterojunction materials on SiC substrates. The structures of the heterojunction materials from top to bottom are as follows: 20nm Al 0.25 GaN / 1nm AlN / 400nm i-GaN / buffer / SiC substrate.

[0061] S2: Prepare a source electrode at one end of the channel layer and a drain electrode at the other end;

[0062] Specifically, an ohmic stack metal Ti / Al / Ni / Au=20 / 160 / 55 / 45 nm was deposited on the channel layer using an electron beam evaporation device, and rapid thermal annealing was performed at 860° C. for 60 s in an N 2 atmosphere to form a source and a drain.

[0063] It should be noted that photolithography etching of alignment marks needs to be performed before preparing the source and drain electrodes.

[0064] S3: growing a passivation layer on the barrier layer;

[0065] Specifically, PECVD equipment was used to deposit 120 nm SiN on the device surface as a passivation layer.

[0066] It should be noted that, before the passivation layer is grown, ion implantation equipment is used to achieve device isolation.

[0067] S4: Etching the passivation layer between the source and drain electrodes along the gate width direction to form a gate groove penetrating the passivation layer;

[0068] Specifically, first, an ICP etcher was used to dry-etch the holes. The etching gases were CF4 / O2 at a flow rate of 25 / 5 sccm, the chamber pressure was 5 mTorr, the ICP top electrode power was 80 W, and the bottom electrode power was 10 W. Secondly, the SiN in the gate foot region was removed using an ICP etcher using a F-based etching method. The etching gases were CF4 / O2 at a flow rate of 25 / 5 sccm, the chamber pressure was 5 mTorr, the ICP top electrode power was 80 W, the bottom electrode power was 10 W, and the bias voltage was 46 V.

[0069] S5: etching the barrier layer, the insertion layer, and the channel layer below the gate groove to form a plurality of grooves spaced apart along the gate width direction;

[0070] In this embodiment, the bottom of the groove is located in the channel layer, and the side length of the groove close to the source is smaller than the side length of the groove close to the drain.

[0071] Optionally, the groove has a triangular structure, and the top angle of the triangle is located on the side close to the source, and the bottom side corresponding to the top angle is located on the side close to the drain.

[0072] Specifically, electron beam lithography and Cl-based etching methods are used to completely etch away the 40nm AlGaN barrier layer, that is, the Fin pattern is etched. The etching pattern inclination angle α (the angle between the edge of the groove close to the drain and its adjacent edge) is between 90 degrees and 70 degrees. The area ratio of the groove (i.e., the etched area) and the non-etched area within one period along the gate width direction is 1:2.

[0073] S6: growing a dielectric layer on the inner wall of the groove and the barrier layer;

[0074] Specifically, an ALD device is used to grow Al2O3 dielectric material under the gate and above the barrier.

[0075] S7: depositing gate metal in the plurality of grooves, in the gate trench and on a portion of the passivation layer to form a gate;

[0076] Specifically, the gate stack metal is deposited in the groove, the gate trench and on part of the passivation layer using an electron beam evaporation device. A gate is formed.

[0077] S8: preparing a metal interconnection layer between the source and drain electrodes;

[0078] Specifically, electron beam evaporation equipment is used to deposit The interconnect metal forms a metal interconnect layer between the source and drain.

[0079] It should be noted that, in this document, the terms "comprises", "includes" or any other variations are intended to cover non-exclusive inclusion, so that an article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed. In the absence of further restrictions, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the article or device comprising the element. The orientation or positional relationship indicated by "upper", "lower", "left", "right", etc. is based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of describing the present invention and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0080] The above is a further detailed description of the present invention in conjunction with specific preferred embodiments, and the specific implementation of the present invention should not be considered to be limited to these descriptions. For those skilled in the art of the present invention, without departing from the concept of the present invention, several simple deductions or substitutions can be made, which should be considered to fall within the scope of protection of the present invention.

Claims

1. A high operating voltage radio frequency power device based on gate electric field modulation, characterized in that: include: substrate layer; a buffer layer, located on the substrate layer; a channel layer, located on the buffer layer; a source electrode, located at one end of the channel layer; a drain electrode, located at the other end of the channel layer; an insertion layer, located on the channel layer and between the source electrode and the drain electrode; a barrier layer located on the insertion layer; wherein, along the gate width direction, a plurality of grooves are spaced apart in the barrier layer, the insertion layer and the channel layer, and the bottoms of the grooves are located in the channel layer; a passivation layer located on the barrier layer, wherein a gate groove penetrating the passivation layer is provided along the gate width direction, and a plurality of the grooves are located below the gate groove; a gate electrode, located in the plurality of grooves and the gate trench, and on a surface of a portion of the passivation layer; Among them, the length of the side of the groove extending along the gate width direction close to the source is smaller than the length of the side close to the drain, the unetched area between the groove and the adjacent groove is arranged periodically, and the area ratio of the groove to the unetched area within one period is 1:

2.

2. The high operating voltage radio frequency power device based on gate-down electric field modulation according to claim 1, characterized in that: A dielectric layer is provided on the inner wall of the groove and between the gate and the barrier layer.

3. The high operating voltage radio frequency power device based on gate-down electric field modulation according to claim 1, characterized in that: The groove is triangular in shape, with the top angle of the triangle located on a side close to the source electrode, and the bottom side corresponding to the top angle located on a side close to the drain electrode.

4. The high operating voltage RF power device based on gate-down electric field modulation according to claim 1, characterized in that: The angle between the side of the groove close to the drain electrode and its adjacent side is in the range of 70° to 90°.

5. A method for preparing a high operating voltage radio frequency power device based on gate electric field modulation, characterized in that: include: S1: growing a buffer layer, a channel layer, an insertion layer and a barrier layer in sequence on the substrate layer; S2: preparing a source electrode at one end of the channel layer and a drain electrode at the other end; S3: growing a passivation layer on the barrier layer; S4: etching the passivation layer between the source electrode and the drain electrode along the gate width direction to form a gate groove penetrating the passivation layer; S5: etching the barrier layer, the insertion layer, and the channel layer below the gate groove to form a plurality of grooves spaced apart along the gate width direction; S6: growing a dielectric layer on the inner wall of the groove and the barrier layer; S7: depositing gate metal in the grooves, the gate trenches, and on a portion of the passivation layer to form a gate; S8: preparing a metal interconnection layer between the source electrode and the drain electrode; The bottom of the groove is located in the channel layer, the length of the side of the groove extending along the gate width direction close to the source is smaller than the length of the side close to the drain, the unetched area between the groove and the adjacent grooves is arranged periodically, and the area ratio of the groove to the unetched area within one period is 1:

2.

6. The method for preparing a high operating voltage radio frequency power device based on gate-down electric field modulation according to claim 5, characterized in that: In S5 , the angle between the long side of the groove close to the drain terminal and its adjacent side is in the range of 70° to 90°.

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