Content-aware bit-flipping decoder

Abstract

The examples described herein generally relate to content-aware bit-flipping decoders. Example devices include a decoder. The decoder is configured to: process one or more flip thresholds based on statistics of the data to be decoded; and use one or more processed flip thresholds to perform a bit-flipping algorithm on the data. Other examples relate to methods for processing one or more flip thresholds based on statistics of the data to be decoded, and using one or more processed flip thresholds to perform a bit-flipping algorithm on the data.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to U.S. Application No. 16 / 744,061, filed January 15, 2020, the entire contents of which are incorporated herein by reference. Background Technology Technical Field

[0004] The embodiments disclosed herein generally relate to data decoding. More specifically, aspects of this disclosure relate to content-aware decoding methods and systems for computer applications, etc.

[0005] Description of related fields

[0006] The reliability of flash memory such as solid-state drives (SSDs) is a key factor that differentiates these drives from other conventional memory arrangements. These SSDs need to have long-term endurance and memory capacity, especially at the end of the drive's lifespan.

[0007] To achieve high reliability in SSDs, the data stored on them is protected so that it can be recovered in the event of a failure. Recovery systems can vary, but the most typical method is protection using Error Code Correction (ECC) codes. Most commonly, ECC codes include Low-Density Parity Check (LDPC) codes.

[0008] The ECC decoder has several features that allow the decoder to improve its performance. The ECC decoder is programmed to read data and, by understanding the underlying statistics of the data to be decoded, can make more accurate recovery predictions. When the underlying statistics are unknown, ECC can use default parameters that correspond to a uniform data distribution.

[0009] Of course, such decoding can be time-consuming, which can impact memory performance. Fewer errors (e.g., a lower bit error rate (BER)) can improve decoder throughput. Therefore, memory with improved throughput would be advantageous. Summary of the Invention

[0010] The examples described herein generally relate to content-aware bit-flipping decoders. One example is a device. The device includes a decoder configured to: process one or more flip thresholds based on statistics of the data to be decoded; and perform a bit-flipping algorithm on the data using the one or more processed flip thresholds.

[0011] Another example is a device. The device includes a decoder configured to: acquire data; determine statistical information about the data; adjust one or more flip thresholds based on the data statistical information; perform a check equation on the data; and flip one or more bit values ​​of the data based on the result of the one or more flip thresholds and the check equation.

[0012] Another example is a device. The device includes means for acquiring data; means for generating statistical information about the data; means for processing one or more flip thresholds based on the data statistical information; and means for performing a bit-flipping algorithm on the data based on the processed one or more flip thresholds. Attached Figure Description

[0013] Therefore, a detailed understanding of the foregoing features of this disclosure, a more specific description of this disclosure, and the foregoing brief overview can be obtained by referring to the embodiments, some of which are illustrated in the accompanying drawings. However, it should be noted that the drawings are merely examples of this disclosure and should therefore not be construed as limiting its scope, as this disclosure allows for other equally effective embodiments.

[0014] Figure 1 It is a schematic block diagram of a host device and a storage device with accompanying interfaces and decoders.

[0015] Figure 2 It is a part of an ASCII formatted text file.

[0016] Figure 3 This is a flowchart of a method for generating a probability difference metric for the data to be decoded.

[0017] Figure 4A and Figure 4B This is a flowchart illustrating methods for decoding data, based on some examples.

[0018] Figure 5 This is a graph showing the simulation results of the delay.

[0019] Figure 6 This is a graph showing the simulation results of the correction capability.

[0020] To aid understanding, the same reference numerals are used where possible to denote the same elements common in the accompanying drawings. It is conceivable that elements disclosed in one example may be usefully used in other examples without specific description. Detailed Implementation

[0021] In the following text, reference is made to the various examples described in this disclosure. However, it should be understood that this disclosure is not limited to the specifically described examples. Rather, any combination of the following features and elements (whether or not related to the different examples) is covered to implement and practice this disclosure. Furthermore, while the examples may achieve advantages over other possible solutions and / or over the prior art, whether a particular advantage is achieved by a given example is not a limitation of this disclosure. Therefore, the following aspects, features, embodiments, and advantages are merely illustrative and should not be considered as elements or limitations of the appended claims unless expressly stated in the claims. Similarly, reference to “this disclosure” should not be construed as a generalization of any inventive subject matter disclosed herein and should not be considered as elements or limitations of the appended claims unless expressly stated in the claims.

[0022] The examples described herein generally relate to content-aware bit-flipping decoders. One example is a device. The device includes a decoder configured to: process one or more flip thresholds based on statistics of data to be decoded; and perform a bit-flipping algorithm on the data using the one or more processed flip thresholds. Other examples relate to methods for processing one or more flip thresholds based on statistics of data to be decoded, and performing a bit-flipping algorithm on the data using the one or more processed flip thresholds.

[0023] Figure 1 A schematic block diagram 100 shows a host device 102 and a storage device 104. Storage device 104 includes a storage controller 108, an encoder / decoder 110, and one or more memory devices a-n112A-112N (individually or collectively, memory device 112). Data can be sent and received via an interface 106 between the host device 102 and the storage device 104. Interface 106 is configured to interact with the host device 102, i.e., to accept data and / or command requests provided by the host device 102 for processing by the storage device 104.

[0024] Storage controller 108 is configured to control the data flow between various components of storage device 104. Storage controller 108 can direct data received from interface 106 to encoder / decoder 110 to encode the received data, and can receive the encoded data from encoder / decoder 110. Storage controller 108 can write the encoded data to memory device 112. Similarly, storage controller 108 can direct data read from memory device 112 to encoder / decoder 110 to decode the read data, and can receive the decoded data from encoder / decoder 110. Storage controller 108 can transmit the decoded data to interface 106 for communication with host device 102. Storage controller 108 is further configured to transmit command sequences for read and write sequences to memory device 112. Storage controller 108 can be configured to perform other tasks, such as formatting memory device 112, mapping faulty memory cells in memory device 112, allocating spare cells to replace future faulty memory cells, translating between logical and physical addresses in memory device 112, wear leveling, garbage collection, etc. In the illustrated example, storage device 104 may be a single or multiple SSDs used to store information.

[0025] The storage controller 108 may include processing circuitry or a processor (having a computer-readable medium storing computer-readable program code (e.g., firmware) that can be executed by the processor), logic circuitry, application-specific integrated circuits (ASICs), programmable logic controllers, embedded microcontrollers, combinations thereof, and so on. The storage controller 108 may be configured with hardware and / or firmware to perform various functions.

[0026] The encoder / decoder 110 includes a low-end (LG) decoder 114 and a high-end (HG) decoder 116. The LG decoder 114 implements low-power bit-flipping algorithms, such as low-density parity-check (LDPC) algorithms. The LG decoder 114 can operate to decode data and correct bit flips in cases where such data has a low bit error rate (BER). The HG decoder 116 implements full-power decoding and error correction algorithms that can be activated if the LG decoder 114 fails to decode and correct bit flips in the data. The HG decoder 116 can operate to correct bit flips in cases where such data has a high BER. Therefore, the LG decoder 114 and HG decoder 116 can achieve gear shifting.

[0027] Encoder / decoder 110 (including LG decoder 114 and HG decoder 116) may be or include processing circuitry or a processor (having a computer-readable medium storing computer-readable program code (e.g., firmware) executable by the processor), logic circuitry, application-specific integrated circuit (ASIC), programmable logic controller, embedded microcontroller, combinations thereof, etc. Encoder / decoder 110 may be configured with hardware and / or firmware to perform the various functions described below and shown in the flowcharts. In some examples, encoder / decoder 110 is separate from memory controller 108, and in other examples, encoder 212 and decoder 110 are embedded in or part of the memory controller. In some examples, LG decoder 114 is hardened circuitry, such as logic circuitry, ASIC, etc. In some examples, HG decoder 116 may be a software decoder (e.g., implemented by a processor).

[0028] More typically, the data to be decoded by encoder / decoder 110 has a low BER. Therefore, LG decoder 114 can achieve low-power and low-latency decoding to decode data with a low BER. By employing this type of decoding by LG decoder 114, the latency and power consumption of encoder / decoder 110 can be reduced. Furthermore, the hardened circuitry of LG decoder 114, according to some examples, can have a significantly smaller area on the die and consume much less power than a soft decoder, such as 16 times smaller area and 12 to 16 times less power. As described in further detail below, LG decoder 114's knowledge of data statistics can further reduce its latency and improve its decoding capabilities.

[0029] Memory device 112 may include any suitable volatile or non-volatile storage medium. For example, memory device 112 may be or include non-volatile storage media such as NAND flash memory cells and / or NOR flash memory cells. In some examples, the memory cell may be in the form of a solid-state (e.g., flash) memory cell and may be programmable once, programmable multiple times, or programmable many times. The memory cell may also be a single-level cell (SLC), a multi-level cell (MLC), a three-level cell (TLC), or other memory cell-level technologies known now or developed hereafter.

[0030] Various components of storage device 104 can be implemented in one or more different dies, which may be included in a package or module. For example, interface 106, storage controller 108, and encoder / decoder 110 can be implemented on a single die, and each memory device 112 can be implemented on a corresponding different die. Any number of different dies can be implemented. The dies and components thereon can be communicatively coupled via a substrate to which the dies are attached. The substrate may be or include an interposer, a package substrate, a combination thereof, etc.

[0031] Use of this disclosure in various aspects Figure 1 The components / parts described herein enable the execution of several methods to utilize data in the decoder, which can improve correction capabilities and reduce decoding latency and power consumption. Aspects of this disclosure can utilize structures existing within the data itself to achieve more efficient decoding.

[0032] In many cases, data written to memory (such as flash memory, similar to NAND-based SSDs) has a structure that extends into the memory. This structure can be of a user-origin nature (e.g., if the saved data is text from its origin). In some examples, the structure can be of a nature related to the way the memory is used (e.g., a table written by firmware, data with zeros added, etc.). Utilizing the characteristics of such structures during decoding can result in reduced latency and improved correction compared to attempting error correction without using these features.

[0033] Compared to conventional methods that do not use such approaches, understanding the basic statistics of the data can help the decoder obtain the correct results more effectively when decoding the data. Figure 2 A portion of a text file 200 in ASCII format is shown. Each character in ASCII is one byte, and the most common characters occupy only seven (7) least significant bits of the byte. This results in the most significant bit 202 of the byte for these most common characters being "0". Therefore, the probability that the most significant bit of any byte stored within the data is "0" is high. If the byte of code to be solved has a "1" in its most significant bit, then it can be assumed that the value of that bit is erroneous with a high probability. The examples described herein utilize such probabilities to decrease or increase the flip threshold of the bit position used in the flip algorithm when the probability that the bit value is erroneous or correct exceeds a confidence threshold.

[0034] Typically, in some examples, the read data is transferred from memory device 112 to encoder / decoder 110 under the control of storage controller 108. Encoder / decoder 110 (e.g., LG decoder 114) generates statistics, such as probability difference measures, based on the data (e.g., dynamic data when the data is transferred to encoder / decoder 110). LG decoder 114 processes one or more flip thresholds for the corresponding bit positions used in the flip algorithm based on the statistics (e.g., probability difference measures). Processing the flip thresholds can increase or decrease their values. LG decoder 114 executes a flip algorithm that calculates parity equation satisfaction and can decode the data. The flip algorithm uses the processed one or more flip thresholds.

[0035] Figure 3 This is a flowchart 300 of a method for generating statistical information (e.g., a probability difference metric in some examples) for generating data to be decoded, based on some examples. At block 302, a histogram representing the data transmitted to encoder / decoder 110 is generated. The transmitted data is the data to be decoded, which can be read from memory device 112. In some examples, the histogram counts the number of occurrences of a corresponding K-bit sequence (e.g., K-bytes) in the data. As an example herein and for simplicity, the histogram count is represented as the number of K-bytes of decimal values, although the values ​​can be represented by any basic format (e.g., binary, hexadecimal, etc.). The histogram may include bins for each possible value represented by K bits, and the bins corresponding to the values ​​may be incremented for the K-bytes in the data having said values, such that the histogram maintains a count of the number of K-bytes with the corresponding values. For example, the histogram may include a set of values ​​V, where bins v j ∈V and the value j is a decimal value [0, ..., 2]. K -1]. Any box v j The value is the number of instances of K-bytes with the value j in the transmitted data.

[0036] In box 304, the probability that any given K-byte in the transmitted data has a corresponding value is generated based on the histogram. Continuing the previous example, the probability p that any given K-byte in the transmitted data has a value j is... j It can be calculated as follows:

[0037]

[0038] In box 306, a table is generated based on probability to measure the probability difference. Table T includes the probability difference measure t. m，n ∈T, where n indicates the bit position in the K-bit byte, and m is the value of the binary representation of the K-bit byte, where there is no bit value b[n] at bit position n (e.g., the value of the (K-1)-bit byte). Each probability difference metric tm，n It represents the probability p that any given K-byte byte has two values ​​j when bit value b[n] is "0" and "1" and bit position n is inserted in the remaining (K-1)-byte byte corresponding to value m. j A measure of the difference between them. As an example, in the case of a 4-bit (e.g., K=4) tuple, entry t... 5，2 The value of byte (K-1) is 5, and the bit position in byte K is 2. Byte (K-1) is b. (K-1) [0:3] = <101> 2 = 5 = m. The two values ​​obtained are 9 and 13. When "0" is inserted at position 2, b K [0:4] = <1001> 2 = 9, and when the insertion position of "1" is 2, b K [0:4] = <1011> 2 = 13. Therefore, the probability difference measure t 5，2 This represents the probability p9 and the probability p. 13 A measure of the difference between them. In some examples, entry t m，n The metric can be two probabilities p j The difference between them (e.g., t) 5，2 =p9-p 13 Two probabilities p j The logarithm of the ratio (e.g., Alternatively, another metric can be used. Table 1 below is an example table T for 4-bit tuples. Other examples can implement other metrics and / or extend to tuples of different bit sizes.

[0039]

[0040] As will be apparent from Table 1, in this example, when bit value b[n] has a higher probability of being "1" in any K-bit set with a given remaining (K-1) bits, the corresponding probability difference t m，n It is negative, and the corresponding probability difference t is when the bit value b[n] has a "0" with a high probability in any K-bit set having a given remaining (K-1) bits. m，n It is positive. When the probabilities are equal, the corresponding probability difference t of K byte groups is measured. m，n It is 0.

[0041] When decoding data, statistical information is used, such as the probability difference measure t based on table T. m，n To handle the flip threshold F for bit position k of a K-byte byte. TH，k After processing, the bit-flipping algorithm uses a flipping threshold F. TH，k To determine whether to flip the corresponding bit value b[k] at position k in the K-byte byte based on the number of unsatisfied parity check equations involving the bit value b[k] at position k in the K-byte byte. A flipping threshold F is then applied.TH，k The determination of whether to flip the corresponding bit value b[n] can be performed iteratively until all parity check equations are satisfied, leading to successful decoding, or until the decoding failure condition is met. This is achieved by processing the flip threshold F. TH，k The parity check equation converges faster and the latency is reduced. Furthermore, by processing the flip threshold F... TH，k The decoding correction capability can be improved.

[0042] Figure 4A and Figure 4B The flowcharts 400A and 400B are examples of methods for decoding data. Within the methods for decoding data, one or more flip thresholds are processed, and a bit-flipping algorithm is implemented.

[0043] As described in this paper, the methods used to decode data implement parity equations. In some examples, parity equations are implemented using Low-Density Parity Check (LDPC) code algorithms, such as Gallager A or Gallager B algorithms. Parity equations use error correction codewords of length N. Each error correction codeword can have a corresponding set of M parity equations. Each parity equation can be a constraint on a subset of bits of the error correction codeword. The number of K bytes to be decoded (e.g., for...) Figure 4A and Figure 4B A single implementation of the method for decoding data can have a relationship with the error correction codeword length N. The number S of K bytes to be decoded is the ratio of the error correction codeword length N to the K bits in each K byte (e.g., S = N / K). Each parity check equation can have one or more bits from S K bytes as participants in the parity check equation. If, when analyzing one or more bits from the S K bytes and the corresponding subset of bits in the error correction codeword, the parity check equation results in, for example, "0", then the parity check equation is considered satisfied. If all parity check equations are satisfied, then the S K bytes will result in a valid codeword; otherwise, the S K bytes will not result in a valid codeword.

[0044] A bipartite graph can be used to represent an error correction codeword of length N and M parity check equations. A bipartite graph consists of variable nodes, check nodes, and edges connecting the variable nodes and check nodes. Each variable node corresponds to a bit position in the error correction codeword, and therefore there are N variable nodes in the bipartite graph. Each check node corresponds to a parity check equation, and therefore there are M check nodes in the bipartite graph. Each edge represents the bit position of the error correction codeword represented by the variable node (and its corresponding bit position in the K-byte parity check equation) represented by the check node, where the edge connects the variable node to the check node. Each variable node can be connected to any number of check nodes via edges, and each check node can be connected to any number of variable nodes via edges.

[0045] refer to Figure 4A In box 402, the loop counter variable `iter` is initialized to 1. In box 404, the tuple count variable `s` is initialized to zero. Typically, the tuple count variable `s` is an index used for error correction by analyzing K-bit tuples within the data to be decoded using an error correction code word of length N. As will be apparent, the tuple count variable `s` can have values ​​from zero to 1 less than the number of tuples `S` to be decoded (e.g., 0 ≤ s ≤ S - 1).

[0046] In box 406, for example, s K bytes with bit values ​​b[0:(K-1)] are obtained from the data transmitted to encoder / decoder 110. In box 408, the bit position variable q is initialized to zero. In box 410, the threshold F is toggled. TH，q Initialize to a certain value. Flip threshold F TH，q The initial value can be arbitrary, or it can be based on the parity check equations implemented subsequently. For example, if in parity check, bit position q participates in a number of parity check equations, then the flip threshold F TH，q The initial value can be half the number of parity equations involved at bit position q, rounded up to the nearest integer. As an example, if bit position q involves 2 parity equations, then the flip threshold F... TH，q The initial value can be 1, or if bit position q participates in 3 parity check equations, then the flip threshold F TH，q The initial value can be 2. In subsequent iterations at the same bit position q of s K-byte groups, the flip threshold F is... TH，q It can be initialized to the flipping threshold F determined in the previous iteration. TH，q The value of .

[0047] In box 412, the probability difference measure t is obtained from table T based on the K-byte tuple and the bit position variable q. m，q As mentioned above, the probability difference t is identified based on K byte positions and bit positions q. m，qIn summary, the bit value b[q] at bit position q is removed from the K-byte to create a remaining (K-1)-byte (e.g., using the corresponding bit value of the K-byte without bit value b[q]), and the value m is determined from the remaining (K-1)-byte.

[0048] In boxes 414 to 422, based on the probability difference metric t m，q and confidence threshold C TH0 C TH1 To set the adjustment factor d. Predefined confidence threshold C. TH0 C TH1 Confidence threshold C TH0 It is a threshold value that controls the confidence level at which the bit value at any bit position in a K-byte is more likely to have a value of "0", and the confidence threshold C TH1 It is a threshold value that controls the confidence level at which the bit value at any bit position in a K-byte is more likely to have a value of "1". Typically, the confidence threshold C... TH1 The value is less than the confidence threshold C TH0 The value (e.g., C) TH1 <C TH0 Confidence threshold C TH0 It can be a positive number less than or equal to 1 (e.g., 0 < C). TH0 ≤1). Confidence threshold C TH1 It can be a negative number greater than or equal to -1 (e.g., -1 ≤ C). TH1 <0). As mentioned above, when the corresponding bit value b[n] has a higher probability of being "1" in any K-byte group with value m given the remaining (K-1) bits, the probability difference t m，n It is negative. Furthermore, the probability difference metric t... m，n The larger the negative value, the greater the confidence that bit value b[n] is "1". Additionally, the probability difference t increases when the corresponding bit value b[n] has a higher probability of being "0" in any K-byte group of a given remaining (K-1)-byte group with value m. m，n It is positive. Furthermore, the probability difference measure t... m，n The larger the positive value, the greater the confidence that the position value b[n] is "1".

[0049] The adjustment factor d is set as follows:

[0050]

[0051] Boxes 414-422 implement setting the adjustment factor d in this manner. In box 414, the probability difference metric t is determined. m，q Is it greater than the confidence threshold C? TH0If so, in box 416, set the adjustment factor d to negative 1. This indicates that the bit value b[q] has a higher probability of having a value of "0" at the given confidence level. Probability difference measure t m，q The positive value is greater than and exceeds the confidence threshold C. TH0 The positive value of the quantity. If the probability difference t is determined in box 414. m，q Not greater than the confidence threshold C TH0 Then, in box 418, determine the probability difference metric t. m，q Is it less than the confidence threshold C? TH1 If so, then in box 420, set the adjustment factor d to a positive 1. This indicates that the bit value b[q] has a higher probability of having a value "1" at the given confidence level. The magnitude of the negative value of the probability difference measure is t. m，q Greater than and exceeding the confidence threshold C TH1 The negative value of the quantity. If the determination of box 418 is the probability difference measure t. m，q Not less than the confidence threshold C TH1 Therefore, in box 422, the adjustment factor d is set to zero. This indicates that the confidence level for bit value b[q] to be either "0" or "1" is insufficient.

[0052] After setting the adjustment factor d in one of boxes 416, 420, or 422, in box 424, update the flip threshold F based on the bit value b[q] and the adjustment factor d. TH，q Typically, and as shown in the figure, the flip threshold F TH，q The threshold F can be adjusted using the update function Update_Func(b[q], d). TH，q The value of d can be increased or decreased using the update function Update_Func(b[q], d). For example, the threshold F can be toggled. TH，q The following adjustments can be made:

[0053] F TH，q =F TH，q +Update_Func(b[q], d)

[0054] Table 2 below illustrates the example update function Update_Func(b[q], d).

[0055]

[0056] The update function Update_Func(b[q], d) in Table 2 can be restated as follows:

[0057] Update_Func(b[q],d)=d(2b[q]-1)

[0058] Regarding line (1) in Table 2, the adjustment factor d is negative 1, indicating that the position value b[q] has a high probability of being "0" at the confidence level. However, since the position value b[q] is "1", the flip threshold F TH，q Decrease by 1 (e.g., Update_Func(b[q], d) = -1). Decrease the flip threshold F. TH，q This allows the bit value b[q] to be more easily flipped during the operation of the flip algorithm.

[0059] Regarding line (2) in Table 2, the adjustment factor d is negative 1, indicating that the position value b[q] has a high probability of being "0" at the confidence level. Since the position value b[q] is "0", the flip threshold F TH，q Increase by 1 (e.g., Update_Func(b[q], d) = 1). Increase the flip threshold F. TH，q This can prevent the bit value b[q] from being flipped during the operation of the flip algorithm.

[0060] Regarding line (3) in Table 2, the adjustment factor d is positive 1, indicating that the position value b[q] has a high probability of being "1" at the confidence level. Since the position value b[q] is "1", the flip threshold F TH，q Increase by 1 (e.g., Update_Func(b[q], d) = 1). Increase the flip threshold F. TH，q This can prevent the bit value b[q] from being flipped during the operation of the flip algorithm.

[0061] Regarding line (4) in Table 2, the adjustment factor d is 1, indicating that the position value b[q] has a high probability of being "1" at the confidence level. However, since the position value b[q] is "0", the flip threshold F TH，q Decrease by 1 (e.g., Update_Func(b[q], d) = -1). Decrease the flip threshold F. TH，q This allows the bit value b[q] to be more easily flipped during the operation of the flip algorithm.

[0062] Regarding lines (5) and (6) in Table 2, the adjustment factor d is zero, indicating insufficient confidence that the bit value b[q] could be either "0" or "1". Therefore, the flip threshold F TH，q Unchanged (e.g., Update_Func(b[q], d) = 0). It should also be noted that in this example, in flowchart 400A, if it is determined in box 418 that the probability difference t is... m，q Not less than the confidence threshold C TH1 Then the flow can proceed to box 426 because of the flip threshold F. TH，q constant.

[0063] In box 426, calculate the number of unsatisfied parity equations involving the bit value b[q] of the K-byte array. b[q] Calculate the parity equation involving the bit values ​​b[q] of the K-byte set (e.g., including the corresponding bit subsets using the error correction codeword). Then, for any unsatisfied parity equations, calculate UNSAT. b[q] The number of (e.g., for parity check equations that are not equal to zero) is counted. (See reference) Figure 4B In box 452, identify the unsatisfied parity check equation UNSAT. b[q] Is the number greater than the flip threshold F? TH，q If so, then in box 454, the bit value b[q] in the K-byte is flipped. For example, if initially b[q] = 0, then the bit value b[q] is flipped to "1", and if initially b[q] = 1, then the bit value b[q] is flipped to "0". If in box 452 an unsatisfied parity check equation UNSAT is determined... b[q] The number is not greater than the flip threshold F TH，q Or, after box 454, then in box 456, parity equations are performed on S K-bits using error correction codewords of length N.

[0064] In box 458, determine whether all parity check equations are satisfied. If so, then in box 460, obtain the decoding results of S K bytes and achieve convergence. If at least one of the parity check equations is not satisfied, then in box 462, increment the bit position variable q by 1.

[0065] In box 464, determine if the bit position variable q is less than the K bits in the K-byte tuple. If so, then return to the flow loop. Figure 4A Box 410 is used to analyze the other position of the K-byte. If not, then in box 466, the byte count variable s is incremented by 1. The loop formed by looping through the stream from box 464 to box 410 allows the stream to analyze each bit within s K-bytes in an attempt to convergently reach the decoding result. As will be apparent, if analyzing each bit in s K-bytes does not reach the decoding result, then the outer loop can allow other K-bytes to be scanned, and the bits of the K-bytes can be scanned repeatedly.

[0066] In box 468, determine if the tuple count variable s is less than the number of tuples S to be decoded. If so, then the flow loop returns to... Figure 4A Box 406 is used to analyze another K-byte. If not, then in box 470, the loop counter variable iter is incremented by 1. The loop formed by the flow from box 468 to box 406 allows the flow to analyze each K-byte to be decoded in an attempt to convergently reach the decoding result.

[0067] In box 472, determine if the loop counter variable `iter` is less than the maximum number of iterations. The maximum number of iterations can be any number of iterations performed before the data to be decoded is considered undecodeable. If the loop counter variable `iter` is less than the maximum number of iterations, then the flow loop returns to its previous state. Figure 4A Box 404. If in box 472 it is determined that the loop counter variable iter is not less than the maximum number of iterations, then in box 474, a decoding failure is determined. In box 474, the exception can be discarded, and, for example, the data to be decoded can be passed to HG decoder 116 for error correction and decoding.

[0068] It can be used by Figure 4A and Figure 4B The methods implemented in flowcharts 400A and 400B can be varied in any number. For example, instead of iteratively processing different bit positions, in some cases, any number of bit positions can be processed in parallel. Furthermore, bit position variables, loop counters, and logic implemented by various deterministic methods can be modified to achieve equivalent functionality.

[0069] Figure 5 and Figure 6 The graphs 500 and 600 show the simulation results, comparing the example implementation of the decoder described in this paper with a conventional decoder. Figure 5 The curve 500 shows the average delay as a function of bit error rate (BER). Figure 6 Graph 600 shows the Block Error Rate (BLER) as a function of BER (e.g., indicating the probability of decoding failure). Curves 502 and 602 in graphs 500 and 600 represent results from an example implementation of the decoder. Curves 504 and 604 in graphs 500 and 600 represent results from a conventional decoder. The results were obtained using a dataset recorded on 128 sequential flash memory units (FMUs) during normal use. Figure 5 and Figure 6 The simulation. An example implementation of the decoder using 8-byte bytes and corresponding histograms.

[0070] like Figure 5 As shown, the example implementation has reduced decoding latency. Latency can be further reduced for lower and intermediate BER values. It is anticipated that the example implementation of the decoder will likely be performed with data having lower BER values ​​for most of the decoder's lifetime.

[0071] like Figure 6 As shown, the example implementation has improved correction capability. For lower BER values, the BLER of the example implementation can be approximately an order of magnitude lower than that of a conventional decoder. Additionally, the decoding threshold (e.g., the amount of data with a BER that can be decoded before a given BLER is reached) is increased in the example implementation.

[0072] Typically, using statistical information, such as in the LG decoder 114, to decode and error-correct data can reduce latency and improve correction capability. This can improve the performance of bit-flipping decoders, for example, at lower BERs and with lower power consumption. Handling the flip threshold allows for decoding and error correction with fewer iterations and enables bit-flipping algorithms to be implemented for higher BERs.

[0073] According to some examples, a device includes a decoder configured to: process one or more flip thresholds based on statistical information of the data to be decoded; and use one or more processed flip thresholds to perform a bit-flipping algorithm on the data.

[0074] In another example of the aforementioned device, the decoder can be further configured to generate statistical information about the data.

[0075] In another example of the aforementioned device, the statistical information may include probability difference measures, each of which is based on two probabilities corresponding to a corresponding bit difference value. Each of the two probabilities is the probability that a given K-byte in the data has a corresponding value. The corresponding bit difference value of the two probabilities is represented by a K-byte that has the same corresponding value at one bit position and a different value at another bit position. Furthermore, in some examples, the decoder may be configured to: increase the corresponding flip threshold for the bit position of the K-byte corresponding to the data when the probability difference measure corresponding to the value represented by the K-byte representing the data with a different bit value at the bit position exceeds a first confidence threshold corresponding to "1" and the bit value at the bit position is "1", or when the probability difference measure exceeds a second confidence threshold corresponding to "0" and the bit value is "0"; and decrease the corresponding flip threshold for the bit position when the probability difference measure exceeds the first confidence threshold and the bit value is "0", or when the probability difference measure exceeds the second confidence threshold and the bit value is "1".

[0076] In another example of the device described above, the decoder can be configured to: increase the corresponding flip threshold for the bit position corresponding to the K-byte when the statistical information indicates that the bit value at the bit position is more likely to be correct at the confidence level; and decrease the corresponding flip threshold when the statistical information indicates that the bit value is more likely to be incorrect at the confidence level.

[0077] In another example of the aforementioned device, the decoder may be configured to: determine the number of unsatisfied parity equations in which the bit values ​​of the data participate; and flip the bit values ​​of the data when the number of unsatisfied parity equations in which the bit values ​​participate exceeds the corresponding flip threshold of the bit position corresponding to the bit value.

[0078] In another example of the aforementioned device, the bit-flipping algorithm may include low-density parity check (LDPC).

[0079] According to some examples, a device includes a decoder configured to: acquire data; determine statistics of the data; adjust one or more flip thresholds based on the data statistics; perform a check equation on the data; and flip one or more bit values ​​of the data based on the results of the one or more flip thresholds and the check equation.

[0080] In another example of the aforementioned device, the decoder can be configured to: generate a histogram including bins, each bin corresponding to a corresponding bin value represented by K bits, each bin having multiple instances in the data, wherein K bytes have corresponding bin values; determine, for each bin value, the probability that a given K byte in the data has a corresponding bin value based on the histogram; and generate probability difference metrics, each probability difference metric being based on two corresponding probabilities corresponding to a corresponding bit difference value, the corresponding bit difference value being represented by K bytes having the same corresponding value at corresponding (K-1) bit positions and a different value at one bit position, wherein adjusting one or more flip thresholds is based on the probability difference metrics. Furthermore, in some examples, each probability difference metric can be the difference between two corresponding probabilities. Additionally, in some examples, each probability difference metric can be the logarithm of the ratio of two corresponding probabilities. Furthermore, in some examples, the decoder can be configured to, for the bit positions of K bytes of data: determine whether one of a plurality of probability difference measures exceeds a first confidence threshold corresponding to a bit value of "0", the probability difference measure being based on the probability of the bit difference value represented by the bit value of the K bytes of data corresponding to a bit value of "0" and "1" at the corresponding bit position; determine whether the probability difference measure exceeds a second confidence threshold corresponding to a bit value of "1"; increase the corresponding flip threshold corresponding to the corresponding bit position when (i) the probability difference measure exceeds the first confidence threshold and the bit value at the corresponding bit position is "0", or when (ii) the probability difference measure exceeds the second confidence threshold and the bit value at the corresponding bit position is "1"; and decrease the corresponding flip threshold when (i) the probability difference measure exceeds the first confidence threshold and the bit value at the corresponding bit position is "1", or when (ii) the probability difference measure exceeds the second confidence threshold and the bit value at the corresponding bit position is "0".

[0081] In another example of the aforementioned device, the decoder can be configured to, for the bit positions of K bytes of data: determine whether the bit value at the corresponding bit position is more likely to be correct or incorrect at a certain confidence level, based on statistical information; and adjust the corresponding flip threshold for the corresponding bit position when the statistical information indicates whether the bit value is more likely to be correct or incorrect at a certain confidence level.

[0082] In another example of the aforementioned device, the decoder can be configured to, for the bit positions of K bytes of data: determine whether statistics indicate that the probability of a bit value of "1" at the corresponding bit position exceeds a first confidence threshold; determine whether statistics indicate that the probability of a bit value of "0" exceeds a second confidence threshold; increase the corresponding flip threshold for the corresponding bit position when (i) the probability of a bit value of "1" exceeds the first confidence threshold and the bit value is "1", or when (ii) the probability of a bit value of "0" exceeds the second confidence threshold and the bit value is "0"; and decrease the corresponding flip threshold when (i) the probability of a bit value of "1" exceeds the first confidence threshold and the bit value is "0", or when (ii) the probability of a bit value of "0" exceeds the second confidence threshold and the bit value is "1".

[0083] In another example of the aforementioned device, each of one or more bits of the data may be flipped when the number of unsatisfied check equations involved in the corresponding bit value exceeds the corresponding flip threshold of the bit position corresponding to the corresponding bit value.

[0084] In another example of the aforementioned device, the check equation may be at least a part of a low-density parity check (LDPC).

[0085] According to some examples, an apparatus includes means for acquiring data; means for generating statistical information about the data; means for processing one or more flip thresholds based on the statistical information about the data; and means for performing a bit-flipping algorithm on the data based on the processed one or more flip thresholds.

[0086] In another example of the aforementioned device, the means for generating statistical information may include means for generating probability difference measures of data, each probability difference measure corresponding to a representation of the difference between the probabilities of K bytes having a corresponding value in the data, where the corresponding value is a K byte having the same bit value at corresponding (K-1) bit positions and having a different bit value at one bit position. Furthermore, the means for processing one or more flip thresholds may include means for comparing a corresponding probability difference measure based on the probability difference measure with a confidence threshold, a corresponding flip threshold corresponding to a bit position of a K byte, a corresponding probability difference measure corresponding to a corresponding value of a K byte having a different bit value at a bit position, and means for increasing and decreasing the corresponding flip threshold of one or more flip thresholds.

[0087] In another example of the aforementioned device, the bit-flipping algorithm may include low-density parity check (LDPC).

[0088] According to some examples, one approach includes: processing one or more flip thresholds based on statistics of the data to be decoded; and using one or more processed flip thresholds to perform a bit-flipping algorithm on the data.

[0089] In another example, the above method may include statistical information about the generated data.

[0090] In another example of the above method, the statistical information may include probability difference measures, each of which is based on two probabilities corresponding to a corresponding bit difference value, each of the two probabilities being the probability that a given K-byte in the data has a corresponding value, and the corresponding bit difference value of the two probabilities is represented by a K-byte that has the same corresponding value at one bit position and a different value at another bit position. Furthermore, in some examples, the method may include: increasing the corresponding flip threshold for the bit position of the K-byte corresponding to the data when the probability difference measure corresponding to the value represented by the K-byte representing the data with a different bit value at the bit position exceeds a first confidence threshold corresponding to "1" and the bit value at the bit position is "1", or when the probability difference measure exceeds a second confidence threshold corresponding to "0" and the bit value is "0"; and decreasing the corresponding flip threshold for the bit position when the probability difference measure exceeds the first confidence threshold and the bit value is "0", or when the probability difference measure exceeds the second confidence threshold and the bit value is "1".

[0091] In another example, the above method may include increasing the corresponding flip threshold for the bit position corresponding to the K-byte when the bit value at the statistical information indicates that it is more likely to be correct at the confidence level; and decreasing the corresponding flip threshold when the bit value at the statistical information indicates that it is more likely to be incorrect at the confidence level.

[0092] In another example, the above method may include: determining the number of unsatisfied parity equations involving the bit values ​​of the data; and flipping the bit values ​​of the data when the number of unsatisfied parity equations involving the bit values ​​exceeds the corresponding flip threshold of the bit position of the bit value.

[0093] In another example of the above method, the bit-flipping algorithm may include low-density parity check (LDPC).

[0094] According to some examples, one approach includes: obtaining data; determining statistics about the data; adjusting one or more flip thresholds based on the data statistics; performing a check equation on the data; and flipping one or more bit values ​​of the data based on the results of the one or more flip thresholds and the check equation.

[0095] In another example, the above method may include: generating a histogram including bins, each bin corresponding to a corresponding bin value represented by K bits, each bin having multiple instances in the data, wherein K bytes have corresponding bin values; determining, for each bin value, the probability that a given K byte in the data has a corresponding bin value based on the histogram; and generating probability difference measures, each probability difference measure being based on two corresponding probabilities corresponding to a corresponding bit difference value, the corresponding bit difference value being represented by K bytes having the same corresponding value at corresponding (K-1) bit positions and a different value at one bit position, wherein adjusting one or more flip thresholds is based on the probability difference measures. Furthermore, in some examples, each probability difference measure may be the difference between two corresponding probabilities. Additionally, in some examples, each probability difference measure may be the logarithm of the ratio of two corresponding probabilities. Furthermore, in some examples, the method may include, for the bit positions of K-bytes of data: determining whether one of a plurality of probability difference measures exceeds a first confidence threshold corresponding to a bit value of "0", the probability difference measure being based on the probability of the bit difference value represented by the bit value of the K-byte data corresponding to a bit value of "0" and "1" at the corresponding bit position; determining whether the probability difference measure exceeds a second confidence threshold corresponding to a bit value of "1"; increasing the corresponding flip threshold corresponding to the corresponding bit position when (i) the probability difference measure exceeds the first confidence threshold and the bit value at the corresponding bit position is "0", or when (ii) the probability difference measure exceeds the second confidence threshold and the bit value at the corresponding bit position is "1"; and decreasing the corresponding flip threshold when (i) the probability difference measure exceeds the first confidence threshold and the bit value at the corresponding bit position is "1", or when (ii) the probability difference measure exceeds the second confidence threshold and the bit value at the corresponding bit position is "0".

[0096] In another example, the above method may include, for the bit positions of K bytes of data: determining whether the bit value at the corresponding bit position is more likely to be correct or incorrect at a certain confidence level, based on statistical information; and adjusting the corresponding flip threshold for the corresponding bit position when the bit value is more likely to be correct or incorrect at a certain confidence level.

[0097] In another example, the above method may include, for the bit positions of K bytes of data: determining whether statistics indicate that the probability of a bit value of "1" at the corresponding bit position exceeds a first confidence threshold; determining whether statistics indicate that the probability of a bit value of "0" exceeds a second confidence threshold; increasing the corresponding flip threshold for the corresponding bit position when (i) the probability of statistics indicating a bit value of "1" exceeds the first confidence threshold and the bit value is "1", or when (ii) the probability of statistics indicating a bit value of "0" exceeds the second confidence threshold and the bit value is "0"; and decreasing the corresponding flip threshold when (i) the probability of statistics indicating a bit value of "1" exceeds the first confidence threshold and the bit value is "0", or when (ii) the probability of statistics indicating a bit value of "0" exceeds the second confidence threshold and the bit value is "1".

[0098] In another example of the above method, each of one or more bits of the data may be flipped when the number of unsatisfied check equations involved in the corresponding bit value exceeds the corresponding flip threshold of the bit position corresponding to the corresponding bit value.

[0099] In another example of the above method, the check equation may be at least a part of a low-density parity check (LDPC).

[0100] According to some examples, one approach includes obtaining data; generating statistics on the data; processing one or more flip thresholds based on the data statistics; and performing a bit-flipping algorithm on the data based on the processed one or more flip thresholds.

[0101] In another example of the above method, generating statistical information may include means for generating probability difference measures of the data, each probability difference measure corresponding to a representation of the difference between the probabilities of K bytes having a corresponding value in the data, where the corresponding value is a K byte having the same bit value at corresponding (K-1) bit positions and having a different bit value at one bit position. Furthermore, processing one or more flip thresholds may include comparing the corresponding probability difference measure with a confidence threshold based on the probability difference measure, the corresponding flip threshold corresponding to the bit position of the K byte, the corresponding probability difference measure corresponding to the corresponding value of the K byte having a different bit value at the bit position, and increasing or decreasing the corresponding flip threshold of one or more flip thresholds.

[0102] In another example of the above method, the bit-flipping algorithm may include low-density parity check (LDPC).

[0103] While the foregoing describes embodiments of this disclosure, other and additional embodiments of this disclosure may be contemplated without departing from the basic scope of this disclosure, the scope of which is defined by the appended claims.

Claims

1. A storage device, the device comprising: Decoder, the decoder is configured to: Processing one or more flip thresholds based on statistical information of the data to be decoded, wherein processing the one or more flip thresholds includes adjusting the one or more flip thresholds based on the statistical information of the data to be decoded, wherein the adjustment includes increasing the one or more flip thresholds when the statistical information indicates that the bit value at a bit position is more likely to be correct at a certain confidence level; and decreasing the one or more flip thresholds when the statistical information indicates that the bit value is more likely to be incorrect at a certain confidence level; and The data is subjected to a bit-flipping algorithm using one or more of the processed flipping thresholds.

2. The device of claim 1, wherein the decoder is further configured to generate the statistical information of the data.

3. The device of claim 1, wherein the decoder is configured to: Determine the number of unsatisfied parity check equations involving the bit values ​​of the data; and When the number of unsatisfied parity check equations involving the bit value exceeds the corresponding flip threshold of the bit position of the bit value, the bit value of the data is flipped.

4. The device of claim 1, wherein the bit-flipping algorithm includes low-density parity check (LDPC).

5. A storage device, the device comprising: Decoder, the decoder is configured to: One or more flip thresholds are processed based on statistical information of the data to be decoded, wherein the statistical information includes probability difference measures, each of the probability difference measures being based on two probabilities corresponding to a corresponding bit difference value, each of the two probabilities being the probability that a given K byte in the data has a corresponding value, and the corresponding bit difference value of the two probabilities being represented by K bytes corresponding to (K-1) bit positions having the same corresponding value and one bit position having a different value; as well as The data is subjected to a bit-flipping algorithm using one or more of the processed flipping thresholds.

6. The device of claim 5, wherein the decoder is configured to: When the probability difference metric corresponding to the value represented by the K-byte of data having different bit values ​​at the bit position exceeds a first confidence threshold corresponding to "1" and the bit value at the bit position is "1", or when the probability difference metric exceeds a second confidence threshold corresponding to "0" and the bit value is "0", the corresponding flip threshold of the bit position corresponding to the K-byte of data is increased; and When the probability difference metric exceeds the first confidence threshold and the bit value is "0", or when the probability difference metric exceeds the second confidence threshold and the bit value is "1", the corresponding flip threshold corresponding to the bit position is reduced.

7. A storage device, the device comprising: Decoder, the decoder is configured to: One or more flip thresholds are processed based on statistical information of the data to be decoded; The data is subjected to a bit-flipping algorithm using one or more of the processed flipping thresholds. When the statistical information indicates that the bit value at the bit position is more likely to be correct at the confidence level, increase the corresponding flip threshold for the bit position corresponding to the K-byte; as well as When the statistical information indicates that the bit value is more likely to be incorrect at the confidence level, the corresponding flip threshold is reduced.

8. A storage device, the device comprising: Decoder, the decoder is configured to: Obtain data; Determine the statistical information of the data; One or more flip thresholds are adjusted based on the data statistics, wherein the adjustment includes increasing the one or more flip thresholds when the statistics indicate that the bit value at a bit position is more likely to be correct at a certain confidence level; and When the statistical information indicates that the bit value is more likely to be incorrect at the confidence level, decrease the one or more flip thresholds; Perform a verification equation on the data; as well as One or more bit values ​​of the data are flipped based on the result of the one or more flip thresholds and the check equation.

9. The device according to claim 8, wherein: When the number of unsatisfied check equations involving a corresponding bit value exceeds the corresponding flip threshold of the bit position corresponding to the corresponding bit value, each of the one or more bit values ​​of the data is flipped.

10. The device of claim 8, wherein the check equation is at least a portion of a low-density parity check (LDPC).

11. A storage device, the device comprising: Decoder, the decoder is configured to: Obtain data; Determine the statistical information of the data; Adjust one or more flip thresholds based on the aforementioned data statistics; Perform a verification equation on the data; as well as One or more bit values ​​of the data are flipped based on the result of the one or more flip thresholds and the check equation; Generate a histogram including bins, each bin corresponding to a corresponding bin value represented by K bits, each bin having multiple instances in the data, wherein the K bits have the corresponding bin value; For each bin value, determine the probability that a given K byte in the data has the corresponding bin value based on the histogram; and Generate probability difference metrics, each of which is based on two corresponding probabilities of the probabilities corresponding to the corresponding bit difference value, the corresponding bit difference value being represented by a K-bit byte having the same corresponding value at (K-1) bit positions and a different value at one bit position, wherein the one or more flip thresholds are adjusted based on the probability difference metrics.

12. The device of claim 11, wherein each probability difference measure in the probability difference measures is the difference between the corresponding two probabilities in the probabilities.

13. The device of claim 11, wherein each probability difference measure in the probability difference measures is the logarithm of the ratio of the corresponding two probabilities in the probabilities.

14. The apparatus of claim 11, wherein the decoder is configured for bit positions of K bytes of the data: Determine whether one of the plurality of probability difference measures exceeds a first confidence threshold corresponding to a bit value of "0", the probability difference measure being based on the probability of the bit difference value represented by the bit value of the K-byte of the data corresponding to the bit value of "0" and "1" at the corresponding bit position; Determine whether the probability difference measure exceeds a second confidence threshold corresponding to a confidence value of "1"; When (i) the probability difference metric exceeds the first confidence threshold and the bit value at the corresponding bit position is "0", or when (ii) the probability difference metric exceeds the second confidence threshold and the bit value at the corresponding bit position is "1", increase the corresponding flip threshold corresponding to the corresponding bit position. as well as When (i) the probability difference metric exceeds the first confidence threshold and the bit value at the corresponding bit position is "1", or when (ii) the probability difference metric exceeds the second confidence threshold and the bit value at the corresponding bit position is "0", the corresponding flip threshold is reduced.

15. A storage device, the device comprising: Decoder, the decoder is configured to: Obtain data; Determine the statistical information of the data; Adjust one or more flip thresholds based on the aforementioned data statistics; Perform a verification equation on the data; as well as One or more bit values ​​of the data are flipped based on the result of the one or more flip thresholds and the check equation, wherein the decoder is further configured to target the bit positions of K bytes of the data: To determine whether the statistical information indicates that the bit value at the corresponding bit position is more likely to be correct or incorrect at a certain confidence level; as well as When the statistical information indicates that the bit value is more likely to be correct or incorrect at the confidence level, the corresponding flip threshold corresponding to the corresponding bit position is adjusted.

16. A storage device, the device comprising: Decoder, the decoder is configured to: Obtain data; Determine the statistical information of the data; Adjust one or more flip thresholds based on the aforementioned data statistics; Perform a verification equation on the data; as well as One or more bit values ​​of the data are flipped based on the result of the one or more flip thresholds and the check equation, wherein the decoder is further configured to target the bit positions of K bytes of the data: Determine whether the statistical information indicates that the probability of the corresponding bit position being "1" exceeds a first confidence threshold; Determine whether the statistical information indicates that the probability of the bit value being "0" exceeds the second confidence threshold; When (i) the statistical information indicates that the probability of the bit value being "1" exceeds the first confidence threshold and the bit value is "1", or when (ii) the statistical information indicates that the probability of the bit value being "0" exceeds the second confidence threshold and the bit value is "0", the corresponding flip threshold corresponding to the corresponding bit position is increased; as well as When (i) the statistical information indicates that the probability of the bit value being "1" exceeds the first confidence threshold and the bit value is "0", or (ii) the statistical information indicates that the probability of the bit value being "0" exceeds the second confidence threshold and the bit value is "1", the corresponding flip threshold is reduced.

17. A storage device, the device comprising: Devices for storing data; A device for generating statistical information for the data; A means for processing one or more flip thresholds based on said data statistics, wherein the means for processing one or more flip thresholds includes adjusting the one or more flip thresholds based on said data statistics, wherein the adjustment includes increasing the one or more flip thresholds when the statistics indicate that the bit value of a bit position is more likely to be correct at a confidence level; and decreasing the one or more flip thresholds when the statistics indicate that the bit value is more likely to be incorrect at a confidence level. and A means for performing a bit-flipping algorithm on the data based on one or more flipping thresholds after processing.

18. The apparatus of claim 17, wherein the means for generating the statistical information includes means for generating a probability difference measure of the data, each probability difference measure corresponding to a representation of the difference between the probabilities of K bytes having a corresponding value in the data, the corresponding value being a K byte having the same bit value at corresponding (K-1) bit positions and having a different bit value at one bit position.

19. The apparatus of claim 18, wherein the means for processing one or more flip thresholds comprises means for increasing and decreasing the corresponding flip threshold of the one or more flip thresholds based on a comparison of the corresponding probability difference measure of the probability difference measure with a confidence threshold, the corresponding flip threshold corresponding to a bit position of a K-byte, and the corresponding probability difference measure corresponding to a value of a K-byte having a different bit value at the bit position.

20. The device of claim 17, wherein the bit-flipping algorithm includes low-density parity check (LDPC).

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