Driver chip control method, device, electronic device and medium

Abstract

The embodiments of the present application disclose a driver chip control method, device, electronic device and medium. The method includes: if the duration of the inductive load element state switching control signal input to the driver chip meets the first preset time threshold, a first signal is input to the input end of the driver chip through the output end of the processor, so that the energy in the inductive load element is released through grounding; the output end of the processor is controlled to be disconnected from the input end of the driver chip; a second signal is output through the output end of the processor; wherein the second signal is a signal that can restore the state of the driver chip to a default state; if it is detected that the output end outputs the second signal, the output end is controlled to be connected to the input end. The above scheme can release the electromotive force in the inductive load element through grounding, and input the driver chip again after the second signal output by the processor is stable, thereby avoiding damage to the driver chip.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of automatic control technology, and in particular to a driver chip control method, device, electronic device and medium. Background Art

[0002] IR-CUT dual filter means that a group of filters are built into the camera lens group. When the infrared sensing point outside the lens detects the change in light intensity, the built-in IR-CUT automatic switching filter can automatically switch according to the intensity of the external light to achieve the best image effect. In other words, the dual filter can automatically switch the filter during the day or at night, so the best imaging effect can be obtained regardless of day or night. The IR-CUT dual filter switching system is the core of IPC (IPCAMERA, network camera) to achieve image day and night conversion. The IR-CUT switching system is mainly composed of structural brackets, filter combination lenses, electromagnetic motor drive and other components.

[0003] The load of the motor driver chip is mostly inductive load, which will generate a high reverse electromotive force from the on-end to the off-end instant, causing damage to the output pin of the motor driver chip, and then causing IR-CUT function abnormality. Summary of the invention

[0004] The embodiments of the present invention provide a driver chip control method, device, electronic device and medium to prevent the driver chip from being damaged by a high reverse electromotive force generated by an inductive load element.

[0005] In one embodiment, the present application provides a driver chip control method, which is executed by a processor, and the method includes:

[0006] If the duration of the inductive load element state switching control signal input to the driver chip meets a first preset time threshold, a first signal is input to the input end of the driver chip through the output end of the processor, so that the energy in the inductive load element is released through grounding;

[0007] Controlling the output end of the processor to be disconnected from the input end of the driver chip;

[0008] Outputting a second signal through the output terminal of the processor; wherein the second signal is a signal capable of restoring the state of the driver chip to a default state;

[0009] If it is detected that the output terminal outputs the second signal, the output terminal is controlled to be connected to the input terminal.

[0010] In another embodiment, the present application also provides a driver chip control device configured in a processor, the device comprising:

[0011] a first signal input module, configured to input a first signal to an input terminal of the driver chip through an output terminal of the processor if a duration of inputting a state switching control signal of an inductive load element to the driver chip satisfies a first preset time threshold, so as to release energy in the inductive load element through grounding;

[0012] A disconnection control module, used for controlling the output end of the processor to be disconnected from the input end of the driver chip;

[0013] A second signal output module, configured to output a second signal through an output terminal of the processor; wherein the second signal is a signal capable of restoring the state of the driver chip to a default state;

[0014] The connection control module is used to control the output end to be connected with the input end if it is detected that the output end outputs a second signal.

[0015] In yet another embodiment, the present application also provides an electronic device, including: one or more processors;

[0016] A memory for storing one or more programs;

[0017] When the one or more programs are executed by the one or more processors, the one or more processors implement the driver chip control method described in any one of the embodiments of the present application.

[0018] In yet another embodiment, the present application also provides a computer-readable storage medium on which a computer program is stored. When the program is executed by a processor, the driver chip control method as described in any one of the embodiments of the present application is implemented.

[0019] In an embodiment of the present application, if the duration of the inductive load element state switching control signal input to the driver chip meets the first preset time threshold, a first signal is input to the input end of the driver chip through the output end of the processor, so that the energy in the inductive load element connected to the driver chip is released through grounding, avoiding the instantaneous reverse electromotive force in the inductive load element from damaging the driver chip. The output end of the processor is controlled to be disconnected from the input end of the driver chip; a second signal is output through the output end of the processor; wherein the second signal is a signal that can restore the state of the driver chip to a default state; if it is detected that the output end outputs the second signal, the output end is controlled to be connected to the input end, thereby ensuring that the second signal output by the processor is stable before being input into the driver chip, avoiding the generation of a new instantaneous electromotive force that damages the driver chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1A flowchart of a driver chip control method provided by an embodiment of the present invention;

[0021] Figure 2 A flowchart of a driver chip control method provided by another embodiment of the present invention;

[0022] Figure 3 A schematic diagram of a connection circuit provided for another embodiment of the present invention;

[0023] Figure 4 An internal logic diagram of a driver chip provided by another embodiment of the present invention;

[0024] Figure 5 A flowchart of a driver chip control method provided by another embodiment of the present invention;

[0025] Figure 6 A schematic diagram of a connection circuit provided for another embodiment of the present invention;

[0026] Figure 7 A schematic diagram of the structure of a driver chip control device provided by an embodiment of the present invention;

[0027] Figure 8 A schematic diagram of the structure of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0028] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.

[0029] Figure 1 The flowchart of the driver chip control method provided by an embodiment of the present invention. The driver chip control method provided by the embodiment of the present application is applicable to the case of controlling the driver chip. Typically, the embodiment of the present application is applicable to the case of controlling the driver chip in an IR-CUT (dual filter) switching system. The method can be specifically executed by a driver chip control device, which can be implemented by software and / or hardware, and the device can be integrated in an electronic device that can implement the driver chip control method. See Figure 1 , the method of the embodiment of the present application specifically includes:

[0030] S110: If the duration of the inductive load element state switching control signal input to the driver chip meets a first preset time threshold, a first signal is input to the input end of the driver chip through the output end of the processor to release the energy in the inductive load element through grounding.

[0031] Among them, the driver chip plays a driving role, amplifying the input weak current signal into a strong current signal suitable for external devices. The input end of the driver chip is generally connected to the output end of the processor, and the signal output by the processor controls the driver chip. The output end of the driver chip is connected to the load element to drive the load element. In the IR-CUT switching system, the load element is generally an inductive load element, and the inductive load refers to a load with an inductance parameter. At the moment when the inductive load is turned on to the off end, a high reverse electromotive force will be generated, causing damage to the output pin of the driver chip.

[0032] In an embodiment of the present application, the first preset time threshold is determined according to the time required for the state switching of the inductive load element, and the first preset time threshold may be greater than or equal to the time required for the state switching of the inductive load element. The processor inputs a signal to the driver chip so that the driver chip controls the connected inductive load element to switch the state. If the time for inputting the control signal to the driver chip meets the first preset time threshold, it means that the state switching is completed at this time, and it is necessary to stop inputting the control signal to the driver chip, and switch to inputting a signal to reduce the power consumption of the driver chip to restore the input state of the default signal. However, if the input signal is switched directly, a higher reverse electromotive force will be generated in the inductive load element, which will cause damage to the pin through the pin release.

[0033] In the embodiment of the present application, in order to solve the problem that the higher reverse electromotive force in the inductive load element is released through the pin and causes damage to the pin, the solution adopted is that instead of directly inputting a signal to reduce the power consumption of the driver chip, a first signal is first input to the driver chip, and the first signal is a signal that can release the energy in the inductive load element through grounding. By inputting the first signal to the driver chip, the energy in the inductive load element is released through grounding, thereby preventing the energy in the inductive load element from damaging the pin of the driver chip.

[0034] S120, controlling the output end of the processor to be disconnected from the input end of the driving chip.

[0035] After the inductive load element releases the energy through grounding, if a signal that reduces the power consumption of the driver chip is directly input to the driver chip, the inductive load element may still go from on to off, and at this time the inductive load element will still generate a relatively high electromotive force, which will damage the pins of the driver chip through the pin release. In the embodiment of the present application, after the inductive load element releases the energy through grounding, the output end of the processor is disconnected from the input end of the driver chip to avoid directly converting the input first signal into the input signal that reduces the power consumption of the driver chip, and the inductive load element will again generate a relatively high reverse electromotive force, which will be released through the pins of the driver chip and damage the pins.

[0036] S130. Output a second signal through the output terminal of the processor; wherein the second signal is a signal capable of restoring the state of the driver chip to a default state.

[0037] Exemplarily, when the output of the processor is disconnected from the input of the driver chip, the processor outputs a second signal through the output, that is, a signal that can restore the state of the driver chip to a default state, and the signal of the default state can be a signal that reduces the power consumption of the driver chip. For different driver chips, the signal that reduces the power consumption may be different, so the specific form of the signal is not limited here. At this time, since the output of the processor is disconnected from the input of the driver chip, the second signal output from the output will not enter the driver chip, and will not cause the inductive load element connected to the driver chip to generate a large reverse electromotive force, thereby avoiding the problem of directly converting the input first signal into the input second signal, and the inductive load element again generating a large reverse electromotive force and releasing it through the pin of the driver chip, causing damage to the pin.

[0038] S140: If it is detected that the output end outputs a second signal, control the output end to be connected to the input end.

[0039] Exemplarily, the processor detects the output signal of its own output terminal. If it is determined that the output terminal outputs a stable second signal, the output terminal is controlled to be connected to the input terminal, thereby avoiding the situation in which, when the second signal is unstable, the inductive load element connected to the driver chip generates a large reverse electromotive force in the process of switching from on to off, and the pin is released through the driver chip to cause damage to the pin.

[0040] In an embodiment of the present application, if the duration of the inductive load element state switching control signal input to the driver chip meets the first preset time threshold, a first signal is input to the input end of the driver chip through the output end of the processor, so that the energy in the inductive load element connected to the driver chip is released through grounding, avoiding the instantaneous reverse electromotive force in the inductive load element from damaging the driver chip. The output end of the processor is controlled to be disconnected from the input end of the driver chip; a second signal is output through the output end of the processor; wherein the second signal is a signal that can restore the state of the driver chip to a default state; if it is detected that the output end outputs the second signal, the output end is controlled to be connected to the input end, thereby ensuring that the second signal output by the processor is stable before being input into the driver chip, avoiding the generation of a new instantaneous electromotive force that damages the driver chip.

[0041] In an embodiment of the present application, controlling the output end of the processor to be disconnected from the input end of the driver chip includes: if the duration of the first signal input to the input end of the driver chip through the output end of the processor reaches a second preset time threshold, controlling the output end of the processor to be disconnected from the input end of the driver chip; wherein the second preset time threshold is determined based on the time required for the inductive load element to completely release the energy.

[0042] Exemplarily, different inductive load elements store different amounts of energy when powered on, so the time required for the inductive load elements to release their stored energy is also different. A second preset time threshold is determined for the time required for different inductive load elements to release energy. For example, the second preset time threshold is set to be greater than or equal to the time required for the inductive load element to release energy. If the duration of the first signal input to the input end of the driver chip through the output end of the processor reaches the second preset time threshold, it means that the energy of the inductive load element has been released, and at this time, the output end of the control processor is disconnected from the input end of the driver chip. The beneficial effect of the above scheme is that the inductive load element releases energy completely, avoiding disconnection when the energy in the inductive load element is not completely released, resulting in a high reverse electromotive force remaining in the inductive load element, and causing damage to the pin through the release of the pin of the driver chip.

[0043] Figure 2 A flow chart of a driver chip control method provided for another embodiment of the present invention. The embodiment of the present application is a further optimization of the above embodiment. For details not described in detail in the embodiment of the present application, please refer to the above embodiment. The embodiment of the present application is applicable to the case where the driver chip is controlled in an IR-CUT (dual filter) switching system. In the embodiment of the present application, the output end of the processor includes a first output end and a second output end, and the input end of the driver chip includes a first input end and a second input end. The first output end transmits a signal to the first input end, and the second output end transmits a signal to the second input end. The first output end and the first input end, and the second output end and the second input end are connected or disconnected by a switch. The first output end is connected to the first signal input end of the processor, and the second output end is connected to the second signal input end of the processor. The connection circuit diagram is shown in FIG. Figure 3 shown. Figure 3 DSP is the processor, AIN is the first input terminal of the driver chip, BIN is the second input terminal of the driver chip, AOUT and BOUT are the two output terminals of the driver chip. MOTOR is the motor, and X is the control signal of the processor to the switch. Figure 2 , the driver chip control method provided in the embodiment of the present application may include:

[0044] S210. If the duration of the inductive load element state switching control signal input to the driver chip meets a first preset time threshold, a first signal is simultaneously input to the first input terminal of the driver chip through the first output terminal of the processor and to the second input terminal of the driver chip through the second output terminal of the processor, so that the energy in the inductive load element is released through grounding.

[0045] In the embodiment of the present application, the first signal is a high level signal and the second signal is a low level signal. Figure 4 As shown. Among them, AIN and BIN are the two input terminals of the driver chip: the first input terminal and the second input terminal. AOUT and BOUT are the two output terminals of the driver circuit. The functional description of the driver chip is shown in Table 1. H represents a high-level signal, and L represents a low-level signal. If both input terminals of the driver chip are low-level, both output terminals are in high-impedance state. If both input terminals of the driver chip are high-level, both output terminals are low-level, which is equivalent to the ground state.

[0046] Table 1

[0047] AIN BIN AOUT BOUT H L H L L H L H L L Z (High Impedance) Z (High Impedance) H H L (Brake) L (Brake)

[0048] In the default state, the processor simultaneously inputs a low-level signal to the first input end of the driver chip through the first output end and to the second input end of the driver chip through the second output end. When the filter needs to be switched, the processor inputs a high-level signal to the first input end of the driver chip through the first output end and inputs a low-level signal to the second input end of the driver chip through the second output end, or the processor inputs a low-level signal to the first input end of the driver chip through the first output end and inputs a high-level signal to the second input end of the driver chip through the second output end, thereby switching the state of the inductive load element and the filter. When the duration of the high and low levels input to the driver chip by the processor respectively through the first output end and the second output end meets the first preset time threshold, the processor converts the output signal to simultaneously input a high-level signal to the first input end of the driver chip through the first output end and to the second input end of the driver chip through the second output end, so that the energy in the inductive load element is released through grounding.

[0049] S220: If the duration of simultaneously inputting the first signal through the first output terminal of the processor to the first input terminal of the driver chip and through the second output terminal of the processor to the second input terminal of the driver chip reaches a second preset time threshold, the first output terminal is controlled to be disconnected from the first input terminal, and the second output terminal is controlled to be disconnected from the second input terminal.

[0050] The second preset time threshold is determined according to the time required for the inductive load element to completely release energy.

[0051] When the processor simultaneously inputs a high-level signal to the first input terminal of the driver chip through the first output terminal and to the second input terminal of the driver chip through the second output terminal, so that the energy in the inductive load element is released through grounding, and then directly inputs a low-level signal to the first input terminal and the second input terminal of the driver chip at the same time, since the operation of calling the command control to input the signal to the first input terminal and the second input terminal is serial, the low-level signal is not input to the first input terminal and the second input terminal at the same time. At this time, there will be a situation where one of the signals input to the first input terminal and the second input terminal is a high-level signal and the other is a low-level signal. In this case, the processor continues to synchronously input the low-level signal to the driver chip, and there will be a moment when the first input terminal and the second input terminal of the driver chip are all converted to low-level signals. At this time, the inductive load element connected to the driver chip again generates a process from on to off, and generates a higher reverse electromotive force again, which is released through the pins of the driver chip, resulting in damage to the pins.

[0052] In order to solve the above problem, the solution adopted in the embodiment of the present application is that if the duration of simultaneously inputting the first signal through the first output terminal of the processor to the first input terminal of the driver chip and through the second output terminal of the processor to the second input terminal of the driver chip reaches a second preset time threshold, it is determined that the inductive load element has completely released the energy through grounding. At this time, a control signal can be sent to the switch to disconnect the first output terminal from the first input terminal and the second output terminal from the second input terminal, so as to avoid directly inputting the second signal to the first input terminal and the second input terminal, causing the inductive load element to switch from on to off again to generate reverse electromotive force.

[0053] S230, outputting a second signal through the first output terminal and the second output terminal of the processor; wherein the second signal is a signal capable of restoring the state of the driving chip to a default state.

[0054] Exemplarily, if the driver chip is to reduce power consumption, a low-level signal needs to be simultaneously input to the first input terminal and the second input terminal of the driver chip, so that the first input terminal and the second input terminal of the driver chip are in a high-impedance state. When the first output terminal of the processor is disconnected from the first input terminal of the driver chip, and the second output terminal of the processor is disconnected from the second input terminal of the driver chip, the processor simultaneously outputs a low-level signal through the first output terminal and the second output terminal of the processor, so that the first output terminal and the second output terminal can maintain a synchronized low-level signal.

[0055] S240: If it is detected that the signals input through the first signal input terminal and the second signal input terminal are both second signals, the first output terminal is controlled to be connected to the first input terminal, and the second output terminal is controlled to be connected to the second input terminal, so as to input the second signal to the first input terminal and the second input terminal of the driving chip at the same time.

[0056] like Figure 3 As shown, the first output end of the processor is connected to the first signal input end of the processor, and the second output end of the processor is connected to the second signal input end of the processor. The processor detects the signals of the first output end and the second output end through the signals of the first signal input end and the second signal input end. If the processor detects that the signals input through the first signal input end and the second signal input end are both low-level signals, it means that the first output end and the second output end have achieved low-level synchronous output. Therefore, a control signal can be sent to the switch, so that the switch connects the first output end with the first input end, connects the second output end with the second input end, and simultaneously inputs low-level signals to the first input end of the driver chip through the first output end of the processor and to the second input end of the driver chip through the second output end of the processor, so as to reduce the power consumption of the driver chip.

[0057] The solution in the embodiment of the present application is to connect the first output terminal to the first signal input terminal of the processor, and the second output terminal to the second signal input terminal of the processor. When the processor detects that the signals input through the first signal input terminal and the second signal input terminal are both the second signals, the first output terminal is controlled to be connected to the first input terminal, and the second output terminal is controlled to be connected to the second input terminal, so as to ensure that the first output terminal and the second output terminal can output a stable and synchronous second signal, and then connect with the first input terminal and the second input terminal of the driver chip, so as to avoid the problem of signal asynchrony during serial input, which causes the inductive load element to be converted from on to off again to generate reverse electromotive force, and the pin is released through the pin of the driver chip to damage the pin.

[0058] Figure 5 A flowchart of a driver chip control method provided for another embodiment of the present invention. The embodiment of the present application optimizes the above embodiment. For details not described in detail in the embodiment of the present application, please refer to the above embodiment. In the embodiment of the present application, the output end includes a first output end and a second output end, and the input end includes a first input end and a second input end. The first output end transmits a signal to the first input end, and the second output end transmits a signal to the second input end. The first output end and the first input end, and the second output end and the second input end are connected or disconnected by a switch. The first output end and the second output end are connected to the third signal input end of the processor through a logic gate. See Figure 5, the driver chip control method provided in the embodiment of the present application may include:

[0059] S310. If the duration of the inductive load element state switching control signal input to the driver chip meets a first preset time threshold, a first signal is simultaneously input to the first input terminal of the driver chip through the first output terminal of the processor and to the second input terminal of the driver chip through the second output terminal of the processor, so that the energy in the inductive load element is released through grounding.

[0060] S320: If the duration of simultaneously inputting the first signal through the first output terminal of the processor to the first input terminal of the driver chip and through the second output terminal of the processor to the second input terminal of the driver chip reaches a second preset time threshold, the first output terminal is controlled to be disconnected from the first input terminal, and the second output terminal is controlled to be disconnected from the second input terminal.

[0061] The second preset time threshold is determined according to the time required for the inductive load element to completely release energy.

[0062] S330, outputting a second signal through the first output terminal and the second output terminal of the processor; wherein the second signal is a signal capable of restoring the state of the driving chip to a default state.

[0063] S340: If it is determined according to the signal input from the third signal input terminal that both the first output terminal and the second output terminal have output the second signal, control the first output terminal to be connected to the first input terminal, and control the second output terminal to be connected to the second input terminal.

[0064] Exemplarily, for a known logic gate, if a signal at the output end of the logic gate is detected, the signal at the input end can be determined, and the logic gate is applied to the circuit in the embodiment of the present application, and it can be determined whether the first output end and the second output end both output the second signal based on the signal input at the third signal input end.

[0065] In the embodiment of the present application, the output signals of the first output terminal and the second output terminal are detected by the signal of the third signal input terminal of the processor. In this case, only one input terminal pin of the processor is needed to detect the signals of the two output terminals, thus saving IO port resources.

[0066] In an embodiment of the present application, the first signal is a high-level signal, and the second signal is a low-level signal; if the logic gate is an OR gate, then if it is detected that the output end is the second signal, the output end is controlled to be connected to the input end, including: if the signal input through the third signal input end is a low-level signal, then the first output end is controlled to be connected to the first input end, and the second output end is controlled to be connected to the second input end.

[0067] like Figure 6 As shown, Y is the input signal of the third signal input terminal. If the processor detects that the signal input through the third signal input terminal is a low-level signal, it is determined that both input terminal signals of the OR gate are low-level signals, that is, the first output terminal and the second output terminal of the processor both output low-level signals. At this time, while ensuring that both the first output terminal and the second output terminal output low-level signals, a control signal is sent to the switch, so that the switch connects the first output terminal of the processor with the first input terminal of the driver chip, connects the second output terminal of the processor with the second input terminal of the driver chip, and inputs a synchronized low-level signal to the driver chip, thereby reducing the power consumption of the driver chip.

[0068] It should be noted that in the embodiments of the present application, only the case where the logic gate is an OR gate is illustrated, but this is not a limitation on the logic gate. In fact, the logic gate can also be other logic gates, or a combination of at least two logic gates, as long as the logic gate or the combination of logic gates satisfies: if the inputs are all low-level signals, the output is a low-level signal, otherwise, the output is a high-level signal.

[0069] Figure 7 This is a schematic diagram of the structure of a driver chip control device provided by an embodiment of the present invention. The device can be applied to the case of controlling the driver chip. Typically, the embodiment of the present application is applied to the case of controlling the driver chip in an IR-CUT (dual filter) switching system. The device can be implemented by software and / or hardware, and the device can be integrated in an electronic device. Figure 7 , the device can be configured in a processor, specifically including:

[0070] A first signal input module 410 is used to input a first signal to an input end of the driver chip through an output end of the processor if a duration of inputting a state switching control signal of an inductive load element to the driver chip meets a first preset time threshold, so that energy in the inductive load element is released through grounding;

[0071] A disconnection control module 420, used to control the output end of the processor to be disconnected from the input end of the driver chip;

[0072] A second signal output module 430, configured to output a second signal through an output terminal of the processor; wherein the second signal is a signal capable of restoring the state of the driver chip to a default state;

[0073] The connection control module 440 is used to control the output end to be connected with the input end if it is detected that the output end outputs the second signal.

[0074] In the embodiment of the present application, the disconnection control module 420 is specifically used to:

[0075] If the duration of the first signal input to the input end of the driver chip through the output end of the processor reaches a second preset time threshold, the output end of the processor is controlled to be disconnected from the input end of the driver chip; wherein the second preset time threshold is determined according to the time required for the inductive load element to completely release energy.

[0076] In an embodiment of the present application, the output end includes a first output end and a second output end, the input end includes a first input end and a second input end, the first output end transmits a signal to the first input end, and the second output end transmits a signal to the second input end.

[0077] In the embodiment of the present application, the first output terminal and the first input terminal, and the second output terminal and the second input terminal are connected or disconnected by a switch.

[0078] In the embodiment of the present application, the first output terminal is connected to the first signal input terminal of the processor, and the second output terminal is connected to the second signal input terminal of the processor;

[0079] Accordingly, the connection control module 440 includes:

[0080] A detection unit, for controlling the first output terminal to be connected to the first input terminal, and controlling the second output terminal to be connected to the second input terminal, if it is detected that the signals input through the first signal input terminal and the second signal input terminal are both second signals, so as to simultaneously input the second signal to the first input terminal and the second input terminal of the driver chip.

[0081] In the embodiment of the present application, the first signal is a high level signal, and the second signal is a low level signal.

[0082] In the embodiment of the present application, the first output terminal and the second output terminal are connected to the third signal input terminal of the processor through a logic gate;

[0083] Accordingly, the connection control module 440 includes:

[0084] A judgment unit is used to control the first output end to be connected to the first input end, and control the second output end to be connected to the second input end if it is determined that the first output end and the second output end both output the second signal according to the signal input by the third signal input end.

[0085] In the embodiment of the present application, the first signal is a high level signal, and the second signal is a low level signal;

[0086] Correspondingly, if the logic gate is an OR gate, the judging unit is specifically used for:

[0087] If the signal input through the third signal input terminal is a low level signal, the first output terminal is controlled to be connected to the first input terminal, and the second output terminal is controlled to be connected to the second input terminal.

[0088] The driver chip control device provided in the embodiment of the present application can execute the driver chip control method provided in any embodiment of the present application, and has the corresponding functional modules and beneficial effects of the execution method.

[0089] Figure 8 A schematic diagram of the structure of an electronic device provided by an embodiment of the present invention. Figure 8 A block diagram of an exemplary electronic device 512 suitable for implementing embodiments of the present application is shown. Figure 8 The electronic device 512 shown is merely an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0090] like Figure 8 As shown, the electronic device 512 may include: one or more processors 516; a memory 528, which is used to store one or more programs. When the one or more programs are executed by the one or more processors 516, the one or more processors 516 implement the driver chip control method provided in the embodiment of the present application, including:

[0091] If the duration of the inductive load element state switching control signal input to the driver chip meets a first preset time threshold, a first signal is input to the input end of the driver chip through the output end of the processor, so that the energy in the inductive load element is released through grounding;

[0092] Controlling the output end of the processor to be disconnected from the input end of the driver chip;

[0093] Outputting a second signal through the output terminal of the processor; wherein the second signal is a signal capable of restoring the state of the driver chip to a default state;

[0094] If it is detected that the output terminal outputs the second signal, the output terminal is controlled to be connected to the input terminal.

[0095] Components of the electronic device 512 may include, but are not limited to, one or more processors or processor 516 , a memory 528 , and a bus 518 that connects the various device components (including the memory 528 and the processor 516 ).

[0096] Bus 518 represents one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, a processor or a local bus using any of a variety of bus architectures. By way of example, these architectures include, but are not limited to, an Industry Standard Architecture (ISA) bus, a Micro Channel Architecture (MAC) bus, an Enhanced ISA bus, a Video Electronics Standards Association (VESA) local bus, and a Peripheral Component Interconnect (PCI) bus.

[0097] The electronic device 512 typically includes a variety of computer-readable storage media. These storage media can be any available storage media that can be accessed by the electronic device 512, including volatile and non-volatile storage media, removable and non-removable storage media.

[0098] The memory 528 may include computer device readable storage media in the form of volatile memory, such as random access memory (RAM) 530 and / or cache memory 532. The electronic device 512 may further include other removable / non-removable, volatile / non-volatile computer device storage media. By way of example only, the storage system 534 may be used to read and write non-removable, non-volatile magnetic storage media ( Figure 8 not shown, usually called a "hard drive"). Although Figure 8 Not shown, a disk drive for reading and writing to a removable non-volatile disk (e.g., a "floppy disk"), and an optical disk drive for reading and writing to a removable non-volatile optical disk (e.g., a CD-ROM, DVD-ROM, or other optical storage medium) may be provided. In these cases, each drive may be connected to bus 518 via one or more data storage medium interfaces. Memory 528 may include at least one program product having a set (e.g., at least one) of program modules that are configured to perform the functions of various embodiments of the present invention.

[0099] A program / utility 540 having a set (at least one) of program modules 542 may be stored, for example, in the memory 528, such program modules 542 including, but not limited to, operating devices, one or more application programs, other program modules, and program data, each of which or some combination may include an implementation of a network environment. The program modules 542 generally perform the functions and / or methods of the embodiments described herein.

[0100] The electronic device 512 may also communicate with one or more external devices 514 (e.g., keyboards, pointing devices, displays 524, etc.), may communicate with one or more devices that enable a user to interact with the electronic device 512, and / or may communicate with any device that enables the electronic device 512 to communicate with one or more other computing devices (e.g., network cards, modems, etc.). Such communication may be performed through an input / output (I / O) interface 522. Furthermore, the electronic device 512 may also communicate with one or more networks (e.g., local area networks (LANs), wide area networks (WANs), and / or public networks, such as the Internet) through a network adapter 520. Figure 8 As shown, the network adapter 520 communicates with other modules of the electronic device 512 via the bus 518. It should be understood that although Figure 8 Not shown, other hardware and / or software modules may be used in conjunction with the electronic device 512, including but not limited to microcode, device drivers, redundant processing units, external disk drive arrays, RAID devices, tape drives, and data backup storage devices.

[0101] The processor 516 executes various functional applications and data processing by running at least one of the other programs among the multiple programs stored in the memory 528, such as implementing a driver chip control method provided in an embodiment of the present application.

[0102] An embodiment of the present invention provides a storage medium containing computer executable instructions, wherein the computer executable instructions are used to execute a driver chip control method when executed by a computer processor, including:

[0103] If the duration of the inductive load element state switching control signal input to the driver chip meets a first preset time threshold, a first signal is input to the input end of the driver chip through the output end of the processor, so that the energy in the inductive load element is released through grounding;

[0104] Controlling the output end of the processor to be disconnected from the input end of the driver chip;

[0105] Outputting a second signal through the output terminal of the processor; wherein the second signal is a signal capable of restoring the state of the driver chip to a default state;

[0106] If it is detected that the output terminal outputs the second signal, the output terminal is controlled to be connected to the input terminal.

[0107] The computer storage medium of the embodiment of the present application can adopt any combination of one or more computer-readable storage media. The computer-readable storage medium can be a computer-readable signal storage medium or a computer-readable storage medium. The computer-readable storage medium can be, for example, - but not limited to - electrical, magnetic, optical, electromagnetic, infrared, or semiconductor equipment, devices or devices, or any combination of the above. More specific examples (non-exhaustive list) of computer-readable storage media include: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In an embodiment of the present application, a computer-readable storage medium can be any tangible storage medium containing or storing a program, which can be used by an instruction execution device, device or device or used in combination with it.

[0108] A computer-readable signal storage medium may include a data signal propagated in baseband or as part of a carrier wave, which carries a computer-readable program code. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. A computer-readable signal storage medium may also be any computer-readable storage medium other than a computer-readable storage medium, which may send, propagate, or transmit a program for use by or in conjunction with an instruction execution device, apparatus, or device.

[0109] The program code contained on the computer-readable storage medium may be transmitted using any appropriate storage medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

[0110] Computer program code for performing the operations of the present invention may be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or device. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., through the Internet using an Internet service provider).

[0111] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A driver chip control method, characterized in that: Executed by a processor, the method includes: If the duration of the inductive load element state switching control signal input to the driver chip meets a first preset time threshold, a first signal is input to the input end of the driver chip through the output end of the processor, so that the energy in the inductive load element is released through grounding; Controlling the output end of the processor to be disconnected from the input end of the driver chip; Outputting a second signal through the output terminal of the processor; wherein the second signal is a signal capable of restoring the state of the driver chip to a default state; If it is detected that the output terminal outputs a second signal, controlling the output terminal to be connected to the input terminal; Controlling the output end of the processor to be disconnected from the input end of the driver chip comprises: If the duration of the first signal input to the input end of the driver chip through the output end of the processor reaches a second preset time threshold, the output end of the processor is controlled to be disconnected from the input end of the driver chip; wherein the second preset time threshold is determined according to the time required for the inductive load element to completely release energy.

2. The method according to claim 1, characterized in that The output end includes a first output end and a second output end, the input end includes a first input end and a second input end, the first output end transmits a signal to the first input end, and the second output end transmits a signal to the second input end.

3. The method according to claim 2, characterized in that The first output terminal and the first input terminal, and the second output terminal and the second input terminal are connected or disconnected by a switch.

4. The method according to claim 2, characterized in that: The first output terminal is connected to the first signal input terminal of the processor, and the second output terminal is connected to the second signal input terminal of the processor; Correspondingly, if it is detected that the output terminal outputs the second signal, controlling the output terminal to be connected to the input terminal comprises: If it is detected that the signals input through the first signal input terminal and the second signal input terminal are both second signals, the first output terminal is controlled to be connected to the first input terminal, and the second output terminal is controlled to be connected to the second input terminal, so as to simultaneously input the second signal to the first input terminal and the second input terminal of the driving chip.

5. The method according to any one of claims 1 to 4, characterized in that: The first signal is a high level signal, and the second signal is a low level signal.

6. The method according to claim 2, characterized in that The first output terminal and the second output terminal are connected to a third signal input terminal of the processor through a logic gate; Correspondingly, if it is detected that the output terminal outputs the second signal, controlling the output terminal to be connected to the input terminal comprises: If it is determined according to the signal input from the third signal input terminal that both the first output terminal and the second output terminal output the second signal, the first output terminal is controlled to be connected to the first input terminal, and the second output terminal is controlled to be connected to the second input terminal.

7. The method according to claim 6, characterized in that The first signal is a high level signal, and the second signal is a low level signal; If the logic gate is an OR gate, then if it is detected that the output terminal outputs the second signal, controlling the output terminal to be connected to the input terminal includes: If the signal input through the third signal input terminal is a low level signal, the first output terminal is controlled to be connected to the first input terminal, and the second output terminal is controlled to be connected to the second input terminal.

8. A driver chip control device, characterized in that: Configured in a processor, the device includes: a first signal input module, which is used to input a first signal to an input end of the driver chip through an output end of the processor if the duration of the inductive load element state switching control signal input to the driver chip meets a first preset time threshold, so that the energy in the inductive load element is released through grounding; A disconnection control module, used for controlling the output end of the processor to be disconnected from the input end of the driver chip; A second signal output module, configured to output a second signal through an output terminal of the processor; wherein the second signal is a signal capable of restoring the state of the driver chip to a default state; A connection control module, configured to control the output end to be connected to the input end if it is detected that the output end outputs a second signal; The disconnection control module is specifically used for: If the duration of the first signal input to the input end of the driver chip through the output end of the processor reaches a second preset time threshold, the output end of the processor is controlled to be disconnected from the input end of the driver chip; wherein the second preset time threshold is determined according to the time required for the inductive load element to completely release energy.

9. An electronic device, characterized in that: The electronic device comprises: one or more processors; A memory for storing one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement the driver chip control method as described in any one of claims 1-7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the driver chip control method as described in any one of claims 1 to 7 is implemented.

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