Pin Configuration Method, Control Device, and Storage Medium

Abstract

The present application relates to a pin configuration method, a control device and a storage medium. The method includes: receiving a pin configuration instruction sent by a host computer; parsing the pin configuration instruction to obtain pin configuration data; the pin configuration data includes data in a pin configuration bit; determining a corresponding target pin according to the data in the pin configuration bit; the pin configuration bit is pre-bound to a pin identifier in the control device; and performing signal transmission through the target pin. The method of the present application can save test time.

Description

Technical Field

[0001] This application relates to the field of electronic technologies, and in particular, to a pin configuration method, a control device, and a storage medium. Background Art

[0002] Testing is an essential step in the product development process. Any product needs to undergo sufficient testing to ensure the correctness of its own functions and the reliability of its operation. During the testing process, it is usually necessary to input some specific waveforms to the product under test or collect and analyze the signals from the product under test. For example, input high and low levels to the product under test and collect the levels or waveforms output by the product under test to test related functions.

[0003] During the testing process, if it is necessary to output high and low levels, output waveforms, collect levels or waveforms to the product under test, the code needs to be modified every time there is a modification and adjustment, and then recompiled, solidified or synthesized, pins are allocated, wiring is implemented, and solidified. The entire process is time-consuming. Even if only one pin is modified or one path of output is extended, the entire process needs to be repeated, and the flexibility is not high, resulting in a long testing time. Summary of the Invention

[0004] Based on this, in view of the problem of long testing time, it is necessary to provide a pin configuration method, a control device, and a storage medium that can save testing time.

[0005] A pin configuration method is applied to a control device. The method includes:

[0006] Receiving a pin configuration instruction sent by a host computer;

[0007] Parsing the pin configuration instruction to obtain pin configuration data; the pin configuration data includes data in pin configuration bits;

[0008] Determining corresponding target pins according to the data in the pin configuration bits; the pin configuration bits are pre-bound to the pin identifiers in the control device;

[0009] Transmitting signals through the target pins.

[0010] A control device is used to implement the steps of each method.

[0011] A computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of each method are implemented.

[0012] The above pin configuration method, control device, and storage medium receive a pin configuration instruction sent by a host computer, parse the pin configuration instruction to obtain pin configuration data, determine corresponding target pins according to the data in the pin configuration bits, where the pin configuration bits are pre-bound to the pin identifiers in the control device, and transmit the signal generated by the control device through the target pins. Since the pins are pre-bound, the host computer can configure the pins of any bound control device to transmit signals, improving the compatibility and flexibility of the control device and saving test time. Description of the Drawings

[0013] Figure 1 It is an application environment diagram of the pin configuration method in an embodiment;

[0014] Figure 2 It is a schematic flowchart of the pin configuration method in an embodiment;

[0015] Figure 3 It is a schematic structural diagram of a control device in an embodiment. Detailed Embodiments

[0016] It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0017] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0018] It should be noted that all directional indications (such as up, down, left, right, front, back...) in the embodiments of the present application are only used to explain the relative positional relationship and movement conditions between components in a specific posture (as shown in the drawings). If the specific posture changes, the directional indications will also change accordingly. The described connection can be a direct connection or an indirect connection.

[0019] In addition, the descriptions such as "first" and "second" in the present application are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one of such features. In addition, the technical solutions between various embodiments can be combined with each other, but it must be based on the fact that those of ordinary skill in the art can implement them. When the combination of technical solutions appears to be contradictory or unable to be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the protection scope required by the present application.

[0020] In one embodiment, as Figure 1 shown, it is an application environment diagram of a pin configuration method in one embodiment. Figure 1 It includes a host computer 110, a control device 120, and a product under test 130. The host computer 110 can specifically be, but is not limited to, various personal computers, laptop computers, smart phones, tablet computers, and portable wearable devices. The control device 120 can specifically be, but is not limited to, a single-chip microcomputer, an FPGA (Field Programmable Gate Array), a CPLD (Complex Programmable Logic Device), etc. The host computer 110 communicates with the control device 120 in a wired or wireless manner. The control device 120 can support a variety of products under test 130. The product under test 130 can be various devices that need to be tested.

[0021] In one embodiment, as Figure 2 shown, it is a flowchart of a pin configuration method in one embodiment, including the following steps:

[0022] Step 202, receive a pin configuration instruction sent by the host computer.

[0023] Among them, the pin configuration instruction is used to configure the pins corresponding to the signals generated by the control device. The function of the host computer is to enable or disable the function corresponding to a certain bit of the register. The host computer reads and writes the register, and the corresponding bit of the register takes effect to implement the specific function.

[0024] Specifically, the host computer determines the pin configuration instruction according to the target pin identifier, in combination with the binding relationship between the pin configuration and the pin identifier in the control device. The control device receives the pin configuration instruction sent by the host computer through a transfer chip. Among them, the transfer chip is used to convert the USB (Universal Serial Bus) signal into a parallel FIFO (First Input First Output) bidirectional data transmission interface signal.

[0025] Step 204, parse the pin configuration instruction to obtain pin configuration data; the pin configuration data includes the data in the pin configuration bits.

[0026] Among them, the pin configuration data includes the data in the pin configuration bits, can also include the register address, and can also include the data of the read / write flag bit. The pin configuration data bit is the bit (bit) for configuring which pins. The number filled in the pin configuration bit is the data in the pin configuration bit. Taking the data in the pin configuration bit as binary data as an example for illustration, the data can be 0 and 1.

[0027] Specifically, the control device converts the test instruction into a bus to obtain pin configuration data.

[0028] Step 206: Determine the corresponding target pin according to the data in the pin configuration bits; the pin configuration bits are pre-bound to the pin identifiers in the control device.

[0029] Among them, the number of bits of the pin configuration data bits can be configured according to requirements. The number of bits of the pin configuration data bits is greater than or equal to the number of pins. The pin configuration bit is used to represent a bit in the register. The pin identifier is used to uniquely identify a certain pin of the chip. Each pin configuration data bit uniquely corresponds to a pin. One pin can correspond to multiple pin configuration data bits. The pin configuration bit and the pin identifier in the control device are pre-bound in the register of the control device.

[0030] Specifically, at least a part of the pin configuration data bits in the pin configuration data have a pre-bound relationship with the pin identifier. The control device determines the corresponding target pin according to the data in the pin configuration bits. When the data in the pin configuration bits is valid data, for example, if the data is 1, the pin corresponding to the pin configuration of 1 is the target pin.

[0031] For example, there are 8 pin configuration data bits in the pin configuration data. The 1st to 4th pin configuration data bits correspond to inputs, and the 5th to 8th pin configuration data bits correspond to outputs; the 1st pin configuration data bit corresponds to pin a, the 2nd pin configuration data bit corresponds to pin b, the 3rd pin configuration data bit corresponds to pin c, the 4th pin configuration data bit corresponds to pin d, the 5th pin configuration data bit corresponds to pin a, the 6th pin configuration data bit corresponds to pin b, the 7th pin configuration data bit corresponds to pin c, and the 8th pin configuration data bit corresponds to pin d. If the pin configuration data is 10000100, then the 1st pin configuration data bit is 1, indicating that the corresponding operation needs to be executed, so a certain data is input from pin a, and there is no data transmission on the 2nd to 5th pins. The 6th pin configuration data bit is 1, indicating that the corresponding operation needs to be executed, so data is output from pin b.

[0032] Step 208: Perform signal transmission through the target pin.

[0033] Specifically, the signal generated by the control device can be but is not limited to a single-bit input signal, a single-bit output signal, a PWM signal, a chip select signal, a clock signal, etc. The control device transmits the signal generated by the control device to the product under test through the target pin. The control device can also receive the signal sent by the product under test through the target pin.

[0034] The above pin configuration method receives the pin configuration instruction sent by the host computer, parses the pin configuration instruction to obtain the pin configuration data, determines the corresponding target pin according to the data in the pin configuration bit, and the pin configuration bit is pre-bound to the pin identifier in the control device. The signal generated by the control device is transmitted through the target pin. Since the pins are pre-bound, the host computer can configure the pins of any bound control device to transmit signals, without the need to recompile, wire, generate, solidify, etc. on the control device side, improving the compatibility and flexibility of the control device and saving test time.

[0035] In one embodiment, the pin configuration bit pre-configures the binding relationship between the signal generated by the control device and the pin identifier;

[0036] Determining the corresponding target pin according to the data in the pin configuration bit includes: when there is a target pin configuration bit with valid data in the pin configuration bit, determining the pin identifier corresponding to the target pin configuration bit; and determining the target pin according to the pin identifier corresponding to the target pin configuration bit.

[0037] Signal transmission through the target pin includes: according to this binding relationship, determining the target signal corresponding to the target pin configuration bit; the target signal is generated by the control device; and transmitting the target signal through the target pin.

[0038] Among them, there is a binding relationship between the pin configuration bit - signal - pin identifier. This binding relationship is stored in the register. The host computer realizes the corresponding function by writing data into the register. For example, the first pin configuration bit corresponds to the clock signal and is bound to pin a. Taking the data in the pin configuration bit as binary, 0 and 1, then 1 is the valid data, and the pin configuration bit with 1 is the target pin configuration bit. In the control device, one signal corresponds to multiple pins, and one pin can also correspond to multiple signals.

[0039] Specifically, when the data bit in a certain pin configuration bit is valid data, this pin configuration bit is the target pin configuration bit, and the control device determines the pin identifier corresponding to this target pin configuration bit. Taking the pin identifier corresponding to this target pin configuration bit as the target pin.

[0040] According to the binding relationship between the pin configuration bit - signal - pin identifier, determining the target signal corresponding to the target pin configuration bit. For example, the binding relationship is that the first pin configuration bit corresponds to the clock signal and is bound to pin a; and the data of the first pin configuration bit is 1, then the target signal is the clock signal. That is, when the data of the pin configuration bit is 1, in response to the sending operation of the target signal, the target signal is transmitted through this target pin.

[0041] In this embodiment, when there is a target pin configuration bit with valid data in the pin configuration bits, determine the pin identifier corresponding to the target pin configuration bit, so as to obtain the target pin; according to the binding relationship, determine the target signal corresponding to the target pin configuration bit, and transmit the target signal through the target pin. Then, by pre-configuring the pin configuration bit-signal-pin identifier in the control device, the host computer can select the pin for signal transmission, without the need for the control device to perform operations such as re-solidification, reducing the test time.

[0042] In one embodiment, the pin configuration data includes a register address; when there is a target pin configuration bit with valid data in the pin configuration bits, determining the pin identifier corresponding to the target pin configuration bit includes:

[0043] Determine the target register corresponding to the register address; the binding relationship is stored in the target register;

[0044] When there is a target pin configuration bit with valid data in the pin configuration bits, based on the binding relationship stored in the target register, determine the pin identifier corresponding to the target pin configuration bit.

[0045] Among them, the binding relationship is the pin configuration bit-signal-pin identifier. The control device contains registers. The register address is used to uniquely identify the register. For example, the first register is reg1, the second register is reg2, etc. The register addresses of each register in the control device are different. And the binding relationships stored in each register are inconsistent. One register can implement some functions.

[0046] Specifically, the control device determines the target register corresponding to the register address. When there is a target pin configuration bit with valid data in the pin configuration bits, based on the binding relationship stored in the target memory, determine the pin identifier corresponding to the target pin configuration bit. For example, for the target register reg1 and the target pin configuration bit being the first bit, then the pin identifier a corresponding to the first bit is the target pin identifier.

[0047] In this embodiment, determine the target register corresponding to the register address. When there is a target pin configuration bit with valid data in the pin configuration bits, based on the binding relationship stored in the target register, determine the pin identifier corresponding to the target pin configuration bit; use the register address as a directory to find the binding relationship under this directory, then there is no need to traverse all the pins in the control device, improving the pin determination efficiency and thus reducing the test time.

[0048] In one embodiment, the pin configuration method further includes: receiving a module configuration instruction sent by the host computer;

[0049] Parse the module configuration instruction to obtain module configuration data;

[0050] Configure the corresponding functional module according to the module configuration data to obtain the configured functional module;

[0051] Transmit the target signal through the target pin, including:

[0052] In response to the sending operation of the target signal, when the target signal is the signal generated by the configured functional module, generate the target signal through the configured functional module and transmit the target signal through the target pin.

[0053] Among them, the functional module includes at least one of an IO (Input / Output) module, a PWM (Pulse Width Modulation) module, a UART (Universal Asynchronous Receiver / Transmitter) module, an IIC (Inter-Integrated Circuit) module, and an SPI (Serial Peripheral Interface) module.

[0054] For the PWM module, the module configuration data includes but is not limited to the PWM waveform duty cycle and the PWM waveform frequency.

[0055] For the UART module, the module configuration data includes but is not limited to the baud rate configuration value.

[0056] For the SPI module, the module configuration data includes but is not limited to whether the idle clock signal is high level or low level, and whether the SCK (Continuous Serial Clock) is sampled on the rising edge or the falling edge.

[0057] For the IIC module, the module configuration parameters include but are not limited to the number of bytes transmitted.

[0058] Specifically, the control device receives the module configuration instruction sent by the host computer, parses the module configuration instruction to obtain the module configuration data. The control device configures the corresponding functional module according to the module configuration data to obtain the configured functional module. In response to the sending operation of the target signal triggered on the control device, when the target signal is the signal generated by the configured functional module, generate the target signal through the configured functional module and transmit the target signal through the target pin. (Here only the sending is mentioned, not the receiving) For example, if the module configuration data is the PWM signal duty cycle, then configure the PWM module according to the PWM signal duty cycle, and the target signal is the PWM signal; in response to the sending operation of the PWM signal, generate the target signal with the PWM signal duty cycle through the configured PWM module and transmit the target signal through the target pin.

[0059] In this embodiment, the pin configuration data may further include module configuration data. The corresponding functional module can be configured based on the module configuration data, and the target signal can be generated through the configured functional module, improving the versatility of the control device.

[0060] In one embodiment, the functional module includes at least one of an IO module, a PWM module, a UART module, an IIC module, and an SPI module.

[0061] Specifically, the IO module is used to extract whether the level in the test instruction sent by the host computer is input or output, and whether it is high level or low level. we, re, wdata, rdata, and addr in the following table constitute the pin configuration data.

[0062] As shown in Table 1, Table 1 is the signal list of the IO module.

[0063] Signal I / O + Bit Width Description sys_clk input[0:0] System Clock sys_rst_n input[0:0] System Reset Signal, Active Low we output[0:0] SFR Bus Write Flag Signal re output[0:0] SFR Bus Read Flag Signal wdata output[7:0] SFR Bus Write Data rdata input[7:0] SFR Bus Read Data addr output[7:0] SFR Bus Operation Address sig_in(*N) input Input N Sets of High or Low Levels sig_out(*N) output Output N Sets of High or Low Levels

[0064] The PWM module may include a PWM input module and a PWM output module. The PWM input module is used to test the frequency and duty cycle of the PWM signal output by the product under test. The PWM output module is used to provide a PWM signal with adjustable frequency and duty cycle to the product under test.

[0065] As shown in Table 2, Table 2 is the signal list of the PWM output module.

[0066] Signal I / O + Bit Width Description sys_clk input[0:0] System Clock sys_rst_n input[0:0] System Reset Signal, Active Low we output[0:0] SFR Bus Write Flag Signal re output[0:0] SFR Bus Read Flag Signal wdata output[7:0] SFR Bus Write Data rdata input[7:0] SFR Bus Read Data addr output[7:0] SFR Bus Operation Address duty input[7:0] PWM Waveform Duty Cycle, Supporting 1% Precision Adjustment freq input[23:0] Frequency of PWM Waveform (Converted to Counter Final Value) pwm_out output[0:0] PWM Waveform Output

[0067] PWM input module:

[0068] Discard the first paragraph, measure three times at intervals and take the average, and upload the PWM frequency and duty cycle output by the test sample. As shown in Table 3, Table 3 is the signal list of the PWM input module.

[0069] Signal I / O + Bit Width Description sys_clk input[0:0] System Clock sys_rst_n input[0:0] System Reset Signal, Active Low we output[0:0] SFR Bus Write Flag Signal re output[0:0] SFR Bus Read Flag Signal wdata output[7:0] SFR Bus Write Data rdata input[7:0] SFR Bus Read Data addr output[7:0] SFR Bus Operation Address pwm_in input[0:0] PWM Waveform Input duty output[7:0] PWM Waveform Duty Cycle, in % freq output[23:0] Frequency of PWM Waveform (Counter Final Value) error output[0:0] The Measured Frequencies or Duty Cycles Differ Greatly Three Times

[0070] The UART (Universal Asynchronous Receiver / Transmitter) module is used to configure a signal with adjustable baud rate.

[0071] As shown in Table 4, Table 4 is the signal list of the UART module.

[0072] Signal I / O + Bit Width Description sys_clk input[0:0] System Clock sys_rst_n input[0:0] System Reset Signal, Active Low we output[0:0] SFR Bus Write Flag Signal re output[0:0] SFR Bus Read Flag Signal wdata output[7:0] SFR Bus Write Data rdata input[7:0] SFR Bus Read Data addr output[7:0] SFR Bus Operation Address tx_data input[7:0] 8 - Bit Data to be Transmitted tx_trig input[0:0] Send trigger signal uart_tx output[0:0] Transmission pin, sending the data to be sent bit by bit tx_done output[0:0] Transmission completion flag baud_rate input[19:0] Baud rate configuration value uart_rx input[0:0] UART receive input signal rx_data output[7:0] Received 8-bit data rx_done output[0:0] Normal receive completion flag rx_error output[0:0] Receive error flag

[0073] The IIC (Inter-Integrated Circuit) module is used to transmit data and can be used to adjust how many bytes are transmitted at a time.

[0074] As shown in Table 5, Table 5 is the signal list of the IIC module.

[0075]

[0076]

[0077] The SPI (Serial Peripheral Interface) module is used to transmit data and can also be used to measure whether the clock signal is high or low when the SPI is idle, and whether the SCK samples on the rising edge or the falling edge.

[0078] As shown in Table 6, Table 6 is the signal list of the SPI module.

[0079]

[0080]

[0081] In this embodiment, through the IO module, PWM module, UART module, IIC module, SPI module, etc., diversified tests on the device under test can be achieved.

[0082] In one embodiment, the pin configuration method further includes: when it is detected that the pin configuration data contains outputting at least two types of data from the same pin simultaneously, inputting at least two types of pin configuration data from the same pin simultaneously, or inputting and outputting data from the same pin simultaneously, an error is reported to the host computer.

[0083] Specifically, the situation of outputting at least two types of data from the same pin simultaneously may be: the control device further includes register B, and the pins bound in register B are partially the same as the pins bound in register A, then there may be an error of inputting two types of data from the same pin simultaneously, or inputting at least two types of pin configuration data from the same pin simultaneously. In the same register, there may be a situation where different pin configuration data bits correspond to the same pin, so there may be an error of inputting and outputting data from the same pin simultaneously.

[0084] In this embodiment, when it is detected that the pin configuration data contains outputting at least two types of data from the same pin simultaneously, inputting at least two types of pin configuration data from the same pin simultaneously, or inputting and outputting data from the same pin simultaneously, an error is reported to the host computer, which can report an error to the host computer and avoid errors in the test results of the product under test.

[0085] In one embodiment, the operation instruction is determined by the host computer according to the target pin, in combination with the binding relationship between the pin configuration bit and the pin identifier in the control device.

[0086] Specifically, the host computer determines an operation instruction based on the target pin and the binding relationship between the pin identifier and the pin configuration data bit. For example, the binding relationship between the pin configuration data bit and the pin identifier is such that the 1st to 4th pin configuration data bits correspond to input, and the 5th to 8th pin configuration data bits correspond to output. The 1st pin configuration data bit corresponds to pin a, the 2nd pin configuration data bit corresponds to pin b, the 3rd pin configuration data bit corresponds to pin c, the 4th pin configuration data bit corresponds to pin d, the 5th pin configuration data bit corresponds to pin a, the 6th pin configuration data bit corresponds to pin b, the 7th pin configuration data bit corresponds to pin c, and the 8th pin configuration data bit corresponds to pin d. Then, if an input is required from pin b, the 1st to 4th pin configuration data bits are 0100; if an output is required from pin d, the 5th to 8th pin configuration data bits are 0001, and thus a test instruction can be obtained.

[0087] In this embodiment, on the host computer side, any bound pin of the control device can be configured as input or output, without the need to recompile, wire, generate, solidify, etc. on the control device side, improving the compatibility and flexibility of the control device and saving test time.

[0088] In one embodiment, the pin configuration method further includes: receiving an address bit width expansion instruction sent by the host computer, and increasing available registers according to the address bit width expansion instruction.

[0089] In this embodiment, increasing the address bit width of the bus can use more registers, enabling an increase in the parameters that can be configured by the host computer and the signals that can be input, improving test efficiency.

[0090] In one embodiment, the pin configuration method further includes: receiving a data bit width expansion instruction sent by the host computer; increasing configurable parameters according to the data bit width expansion instruction.

[0091] In this embodiment, increasing the data bit width of the bus allows the host computer to configure multiple parameters while writing values to the register, improving test efficiency.

[0092] In one embodiment, as Figure 3 shown, it is a schematic structural diagram of a control device in one embodiment. Figure 3 Applied to the product test scenario, it is mainly controlled by the host computer for the control device, and the control device is implemented such as a single-chip microcomputer / FPGA / CPLD. The register table is a collection of registers.

[0093] The traditional test method is that the host computer sends a test instruction and specifies the pin for signal transmission; if test-related configurations need to be modified, such as pins, then the control device needs to recompile, solidify or synthesize, allocate pins, wire implementation, etc., and the test time is long.

[0094] The host computer in the embodiment of the present application can configure any GPIO (General-Purpose Input Output) of the control device as input or output through the USB interface. A GPIO can be selected to output high or low level or output PWM waveform or a pin as one of the SPI, IIC, and UART protocols. When the test object is switched and the pin or protocol needs to be adjusted, there is no need to modify the code, compile / synthesize, wire, generate, or solidify on the control device side, and only configuration is required on the host computer side.

[0095] The embodiment of the present application enables the host computer to input or output the test signals required by the test sample through each pin of the USB configuration control device, supports input high and low level detection, output high and low level, output PWM waveform, input PWM waveform frequency detection, SPI protocol communication, IIC protocol communication, and UART protocol communication. Utilizing more control device resources makes the control device more flexible and compatible. For the test of similar samples or the need to adjust the test signal during the test process, it is no longer necessary to modify the code, compile / synthesize, wire, generate, and solidify the control device side over and over again, which consumes a lot of time. It only needs to adjust the register configuration on the host computer.

[0096] The host computer sends instructions to the control device through the USB interface. An instruction consists of the data in the read-write flag, register address and pin configuration bit. The controller parses the information in the instruction to form an SFR bus, and the functional modules are all hung on the SFR bus. If the device supports testing a maximum of N products to be tested at the same time, there are 2N groups (the number of each group depends on the resources) for outputting or receiving high and low level GPIOs, N groups of PWM output modules, N PWM input detection modules, N SPI hosts, N IIC modules, and N UART modules. The type and quantity of the functional modules are determined, but which pin is input or output is configurable, thereby improving the compatibility and flexibility during the test process.

[0097] The FT245R chip is used to convert the USB signal into a parallel FIFO bidirectional data transmission interface. For the FPGA, the input signal is presented as a parallel FIFO bidirectional data transmission interface. In order to facilitate processing, it is necessary to extract the instructions and convert them into an SFR bus. For the upstream frame, it is necessary to piece together the frame structure and then upload it byte by byte.

[0098] The pin configuration data includes WE, RE, WDATA, RDATA, and ADDR. The control device determines the corresponding target register from the register table based on the ADDR signal, and the binding relationship between the corresponding signal and the pin is stored in the target register. The binding relationship is as shown in the following figure. WE and RE are the read and write data bits, and the pin configuration data bits in WDTA or RDATA are used to indicate which pin the signal is transmitted to. Taking the target register as register A and it being the write signal flag bit, and the pin configuration data including WDATA as an example, if WDATA is 10000100, then correspondingly, the IIC_SCK signal is written from pin a, and the IIC_SDA signal is written from pin b.

[0099]

[0100] For several supported functional modules, the main input and output signals are shown in the following table.

[0101]

[0102]

[0103] The binding relationship between the signal and the pin is stored in each register.

[0104]

[0105] There are two ways to bind the signal and the pin. One way is that the register corresponds to a certain signal, and writing the pin identifier to the register binds this signal to the corresponding pin; the other way is that the register corresponds to a certain pin, for the signals shown in the above table, then there are N*12 (N is the number of samples supported for simultaneous testing) choices for what signal the pin is connected to, and writing the signal identifier corresponding to the signal to the register binds the signal identifier and the pin identifier. Here, the first method is selected because the first idea is closer to the idea of pin binding, that is, telling the pin identifier to which the signal is to be connected. The pin identifier is generally composed of a letter plus a number. The letter is converted to ASCII (American Standard Code for Information Interchange) code, and the number is converted to hexadecimal. In this way, the host computer only needs to send a 4-bit hexadecimal number to bind a pin. When binding the pin, it can be determined whether the current pin is an input or an output. In this way, it is possible to input or output high and low levels, PWM waveforms, or configure any signal of SPI, IIC, or UART protocols on any pin, improving the compatibility and flexibility during the testing process. When debugging or switching samples, only the host computer needs to make corresponding modifications to the pin configuration to support the new test, saving the time consumed by steps such as re-synthesizing, layout and wiring, and generating and solidifying after modifying the code.

[0106] In one embodiment, a pin configuration method includes:

[0107] Step (a1), receiving a module configuration instruction sent by a host computer.

[0108] Step (a2), parsing the module configuration instruction to obtain module configuration data.

[0109] Step (a3), configuring a corresponding functional module according to the module configuration data to obtain a configured functional module.

[0110] Step (a4), receiving a pin configuration instruction sent by the host computer.

[0111] Step (a5), parsing the pin configuration instruction to obtain pin configuration data; the pin configuration data includes data in a pin configuration bit and a register address; the binding relationship between a signal generated by a pre-configured control device and a pin identifier is pre-configured in the pin configuration bit; the register corresponding to the register address stores the binding relationship.

[0112] Step (a6), determining a target register corresponding to the register address.

[0113] Step (a7), when there is a target pin configuration bit with valid data in the pin configuration data, determining the pin identifier corresponding to the target pin configuration bit based on the binding relationship stored in the target register.

[0114] Step (a8), determining a target pin according to the pin identifier corresponding to the target pin configuration bit.

[0115] Step (a9), determining a target signal corresponding to the target pin configuration bit according to the binding relationship. The target signal is generated by a control device.

[0116] Step (a10), in response to a sending operation of the target signal, when the target signal is a signal generated by a configured functional module, generating the target signal through the configured functional module and transmitting the target signal through the target pin. The functional module includes at least one of an IO module, a PWM module, a UART module, an IIC module, and an SPI module.

[0117] Step (a11), when it is detected that the pin configuration data contains outputting at least two types of data from the same pin simultaneously, inputting at least two types of pin configuration data from the same pin simultaneously, or inputting and outputting data from the same pin simultaneously, feeding back an error to the host computer.

[0118] The above pin configuration method receives a pin configuration instruction sent by a host computer, parses the pin configuration instruction to obtain pin configuration data, determines corresponding target pins according to the data in the pin configuration bits, and the pin configuration bits are pre-bound to the pin identifiers in the control device. The signal generated by the control device is transmitted through the target pins. Since the pins are pre-bound, any bound pins of the control device can be configured as input or output at the host computer end, without the need to recompile, wire, generate, solidify, etc. on the control device side, improving the compatibility and flexibility of the control device and saving testing time.

[0119] It should be understood that although the steps in the above steps (a1) to (a11) are shown in sequence according to the label indication, these steps are not necessarily executed in the order indicated by the arrow or the number. Unless there is a clear indication in this article, the execution of these steps has no strict order limit, and these steps can be executed in other orders. Moreover, at least some of the steps in steps (a1) to (a11) may include multiple steps or multiple stages. These steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be executed alternately or alternately with at least some of the steps or stages in other steps or other steps.

[0120] For the specific limitations of the control device, reference can be made to the limitations of the pin configuration method in the above text, which will not be elaborated here. Each module in the above control device can be implemented in whole or in part by software, hardware, and their combination. The above modules can be embedded in the processor of the computer device in hardware form or independent of it, or stored in the memory of the computer device in software form, so that the processor can call and execute the operations corresponding to the above modules.

[0121] In one embodiment, a control device is provided for implementing the steps of the above method embodiments.

[0122] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps of the above method embodiments are implemented.

[0123] In one embodiment, a computer program product or a computer program is provided. The computer program product or the computer program includes computer instructions, and the computer instructions are stored in a computer-readable storage medium. The processor of the computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device executes the steps in the above method embodiments.

[0124] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes in the embodiments of the above methods. Among them, any reference to a memory, storage, database, or other medium used in the embodiments provided in the present application can include at least one of non-volatile and volatile memories. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, or optical memory, etc. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc.

[0125] The foregoing are only the preferred embodiments of the present application, and do not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of the present application, or directly or indirectly applied in other related technical fields, shall be equally included in the patent protection scope of the present application.

Claims

1. A pin configuration method, characterized in that, applied to a control device, the method includes: Receiving a pin configuration instruction sent by a host computer through an adapter chip; the adapter chip is used to convert a USB signal into a parallel FIFO bidirectional data transmission interface signal; Parsing the pin configuration instruction to form an SFR bus and obtaining pin configuration data; the pin configuration data includes data in the pin configuration bits; internal functional modules are hung on the SFR bus; Determining a corresponding target pin according to the data in the pin configuration bits; the pin configuration bits are pre-bound to the pin identifiers in the control device; the target pin is a GPIO pin inside the control device; In response to a sending operation of a target signal, when the target signal is a signal generated by a configured functional module, generating the target signal through the configured functional module and transmitting the target signal through the target pin; the target signal is used for testing a product to be tested.

2. The method according to claim 1, characterized in that, The pin configuration bits pre-configure the binding relationship between the signals generated by the control device and the pin identifiers; The determining a corresponding target pin according to the data in the pin configuration bits includes: When there is a target pin configuration bit with valid data in the pin configuration bits, determining the pin identifier corresponding to the target pin configuration bit; Determining the target pin according to the pin identifier corresponding to the target pin configuration bit; The method further includes: Determining the target signal corresponding to the target pin configuration bit according to the binding relationship.

3. The method according to claim 2, characterized in that, The pin configuration data includes a register address; the register corresponding to the register address stores the binding relationship; The when there is a target pin configuration bit with valid data in the pin configuration bits, determining the pin identifier corresponding to the target pin configuration bit, includes: Determining the target register corresponding to the register address; When there is a target pin configuration bit with valid data in the pin configuration bits, based on the binding relationship stored in the target register, determining the pin identifier corresponding to the target pin configuration bit.

4. The method according to claim 1, characterized in that, The method further includes: Receiving a module configuration instruction sent by a host computer; Parsing the module configuration instruction to obtain module configuration data; Configuring a corresponding functional module according to the module configuration data to obtain the configured functional module.

5. The method according to claim 4, characterized in that, The functional module includes at least one of an IO module, a PWM module, a UART module, an IIC module, and an SPI module.

6. The method according to any one of claims 1 to 5, characterized in that, The method further includes: When it is detected that the pin configuration data contains outputting at least two kinds of data from the same pin simultaneously, inputting at least two kinds of pin configuration data from the same pin simultaneously, or inputting and outputting data from the same pin simultaneously, feeding back an error to the host computer.

7. The method according to any one of claims 1 to 5, It is characterized in that the module configuration instruction is determined by the host computer according to the target pin in combination with the binding relationship between the pin configuration bit and the pin identifier in the control device.

8. The method according to any one of claims 1 to 5, It is characterized in that the method further includes: receiving a data bit width expansion instruction sent by the host computer; increasing configurable parameters according to the data bit width expansion instruction.

9. A control device, It is characterized in that the control device is used to implement the steps of the method according to any one of claims 1 to 8.

10. A computer-readable storage medium, on which a computer program is stored, It is characterized in that when the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 8 are implemented.

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