Image acquisition structure and driving method thereof, and display device

Abstract

The present invention relates to the field of image acquisition technology, and proposes an image acquisition structure and a driving method thereof, and a display device; the image acquisition structure includes a dimming layer, a processing circuit, multiple reference circuits, and multiple image acquisition circuits; the reference circuit includes a first photosensitive device; the dimming layer is arranged on the light incident side of the first photosensitive device, and at least covers the first photosensitive device of the reference circuit; the input end of the processing circuit is electrically connected to the output end of the reference circuit; the input ends of multiple image acquisition circuits are electrically connected to the output end of the processing circuit; the reference circuit receives light incident through the dimming layer, and outputs an electrical signal according to the light intensity of the light; the processing circuit calculates an adjustment electrical signal according to the electrical signal output by the reference circuit, and adjusts the input electrical signal of the image acquisition circuit according to the adjustment electrical signal; the image acquisition circuit receives light not incident through the dimming layer and the input electrical signal to realize image acquisition. The image acquisition structure can perform fingerprint recognition clearly under strong light.

Description

Technical Field

[0001] The present invention relates to the field of image acquisition technology, and in particular to an image acquisition structure and a driving method of the image acquisition structure, and a display device including the image acquisition structure. Background Art

[0002] With the increasing demand for full-screen phones, under-screen fingerprint recognition has become a research hotspot for mobile phone fingerprint recognition. Among them, optical fingerprint recognition is one of the commonly used fingerprint recognition methods. The commonly used image acquisition method is to use OLED (Organic Electroluminesence Display, organic light-emitting semiconductor) as the active light source and PIN photodiode as the photosensitive device to distinguish the fingerprint valley ridge signal by sensing the different light reflections of the fingerprint valley ridge. Among them, the changing ambient light is one of the important factors affecting optical image acquisition. When the external ambient light is very strong, the PIN tends to saturate and the fingerprint valley ridge imaging is blurred. Reducing the integration time is a way to slow down the PIN saturation, but it will cause the difference in the reflected light intensity of the valley ridge to be very small, thereby reducing the difference between the images of the valley ridge, and even reducing it to the noise extreme, making it impossible to distinguish; at the same time, under very strong ambient light, even if the integration time is very small, the PIN will reach saturation. Another method is to increase the PIN dynamic range from the device, which involves a wide range and complexity.

[0003] The above information disclosed in the Background section is only for enhancement of understanding of the background of the present disclosure and therefore it may include information that does not constitute the prior art that is already known to one of ordinary skill in the art. Summary of the invention

[0004] The purpose of the present invention is to overcome the shortcomings of the above-mentioned prior art that fingerprint recognition is difficult under strong ambient light, and to provide an image acquisition structure that is easier to identify fingerprints under strong ambient light, a driving method of the image acquisition structure, and a display device including the image acquisition structure.

[0005] Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.

[0006] According to one aspect of the present disclosure, there is provided an image acquisition structure, comprising:

[0007] a plurality of reference circuits, the reference circuits comprising a first photosensitive device;

[0008] A dimming layer, provided on the light incident side of the first photosensitive device, and the dimming layer at least covers the first photosensitive device of the reference circuit;

[0009] a processing circuit, an input end of which is electrically connected to an output end of the reference circuit;

[0010] a plurality of image acquisition circuits, whose input ends are electrically connected to the output ends of the processing circuit;

[0011] Among them, the reference circuit is configured to receive light incident through the dimming layer and output an electrical signal according to the light intensity of the light; the processing circuit is configured to calculate an adjustment electrical signal based on the electrical signal output by the reference circuit, and adjust the input electrical signal of the image acquisition circuit according to the adjustment electrical signal; the image acquisition circuit is configured to receive light that has not passed through the dimming layer and the input electrical signal to realize image acquisition.

[0012] In an exemplary embodiment of the present disclosure, the reference circuit further includes:

[0013] a first switch transistor, a first electrode of which is electrically connected to the second electrode of the first photosensitive device, and a control end of the first switch transistor is electrically connected to a first control port;

[0014] A first output circuit, an input end of which is electrically connected to the second electrode of the first switch transistor, and an output end of the first output circuit is electrically connected to the processing circuit;

[0015] Wherein, the first electrode of the first photosensitive device is connected to the power input terminal.

[0016] In an exemplary embodiment of the present disclosure, the first output circuit includes:

[0017] a first operational amplifier, wherein an input terminal of the first operational amplifier is connected to the second electrode of the first switch transistor, a reference terminal of the first operational amplifier is electrically connected to a first reference voltage terminal, and an output terminal of the first operational amplifier is electrically connected to the processing circuit;

[0018] A first capacitor has a first electrode electrically connected to the input terminal of the first operational amplifier, and a second electrode electrically connected to the output terminal of the first operational amplifier.

[0019] In an exemplary embodiment of the present disclosure, the processing circuit includes:

[0020] an analog-to-digital conversion circuit, whose input terminal is electrically connected to the output terminal of the first output circuit;

[0021] A processor, whose input terminal is electrically connected to the output terminal of the analog-to-digital conversion circuit;

[0022] The input end of the digital-to-analog conversion circuit is electrically connected to the output end of the processor, and the output end of the digital-to-analog conversion circuit is electrically connected to the image acquisition circuit.

[0023] In an exemplary embodiment of the present disclosure, the image acquisition circuit includes:

[0024] a second photosensitive device, wherein a first electrode thereof is electrically connected to the processing circuit;

[0025] a second switch transistor, a first electrode of which is electrically connected to the second electrode of the second photosensitive device, and a control end of the second switch transistor is electrically connected to the second control port;

[0026] The second output circuit has an input terminal electrically connected to the second electrode of the second switch transistor.

[0027] In an exemplary embodiment of the present disclosure, the second output circuit includes:

[0028] A second operational amplifier, an input terminal of which is electrically connected to the second electrode of the second switch transistor, and a reference terminal of the second operational amplifier is electrically connected to a second reference voltage terminal;

[0029] A second capacitor has a first electrode electrically connected to the input terminal of the second operational amplifier, and a second electrode electrically connected to the output terminal of the second operational amplifier.

[0030] In an exemplary embodiment of the present disclosure, each of the first photosensors corresponds to one of the first switching transistors and one of the first output circuits.

[0031] In an exemplary embodiment of the present disclosure, a plurality of the first photosensitive devices are arranged in an array, each of the first photosensitive devices corresponds to a first switch transistor, a plurality of the first photosensitive devices in at least one column correspond to the same first output circuit, and control ends of the plurality of the first switch transistors connected to the same first output circuit are connected to different first control ports;

[0032] A plurality of the second photosensitive devices are arranged in an array, each of the second photosensitive devices corresponds to a first switching transistor, a plurality of the second photosensitive devices in at least one column correspond to the same second output circuit, and the control ends of the plurality of the second switching transistors connected to the same second output circuit are connected to different second control ports.

[0033] In an exemplary embodiment of the present disclosure, the image acquisition structure has at least one reference area, one of the reference areas is arranged at an edge area of ​​the image acquisition structure, and each of the reference areas is provided with a plurality of the first photosensitive devices and a plurality of first switching transistors, and the electrical signal is adjusted to be an average value or a median value of the plurality of reference circuits.

[0034] In an exemplary embodiment of the present disclosure, at least one of the reference circuits is disposed between two adjacent image acquisition circuits, and at least one of the image acquisition circuits is controlled by at least one of the reference circuits.

[0035] In an exemplary embodiment of the present disclosure, the light transmittance of the dimming layer is greater than or equal to 20% and less than or equal to 40%.

[0036] According to one aspect of the present disclosure, a display device is provided, comprising: an image acquisition structure as described in any one of the above.

[0037] According to one aspect of the present disclosure, a method for driving an image acquisition structure is provided, which is applicable to any one of the above-mentioned image acquisition structures, and includes:

[0038] The reference circuit receives the light incident through the dimming layer and outputs an electrical signal according to the light intensity of the light;

[0039] The processing circuit calculates an adjustment electric signal according to the electric signal output by the reference circuit, and adjusts the input electric signal of the image acquisition circuit according to the adjustment electric signal;

[0040] The image acquisition circuit receives the light and the input electrical signal to realize image acquisition.

[0041] In an exemplary embodiment of the present disclosure, before the reference circuit receives the light incident through the dimming layer, the driving method further includes:

[0042] A corresponding relationship between the adjustment electric signal under different light intensities and the input electric signal of the image acquisition circuit is established.

[0043] It can be seen from the above technical solution that the present invention has at least one of the following advantages and positive effects:

[0044] The image acquisition structure of the present invention comprises a reference circuit including a first photosensitive device, a dimming layer is arranged on the light incident side of the first photosensitive device, the dimming layer at least covers the first photosensitive device of the reference circuit, so that the light intensity incident on the first photosensitive device is weakened; the reference circuit is configured to receive the light incident through the dimming layer, and output an electrical signal according to the light intensity of the light; the processing circuit is configured to calculate an adjustment electrical signal according to the electrical signal output by the reference circuit, and adjust the input electrical signal of the image acquisition circuit according to the adjustment electrical signal; the image acquisition circuit is configured to receive the light incident without passing through the dimming layer to realize image acquisition. On the one hand, the input electrical signal of the image acquisition circuit is dynamically adjusted according to the response of the first photosensitive device of the reference circuit, so that the image acquisition circuit will not enter the saturation area, so that fingerprint recognition is easier and clearer under strong ambient light; on the other hand, the electrical signal output by the reference circuit changes with the change of ambient light, so that the adjustment electrical signal also changes with the change of ambient light, thereby realizing dynamic adjustment with the change of ambient light, and realizing adaptive acquisition under different ambient light. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] The above and other features and advantages of the present invention will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings.

[0046] Figure 1 is a structural schematic diagram of a first exemplary embodiment of an image acquisition structure of the present invention;

[0047] Figure 2 yes Figure 1 A schematic diagram of the circuit structure of the image acquisition structure in FIG.

[0048] Figure 3 yes Figure 1 A schematic diagram of a top view of the image acquisition structure in FIG.

[0049] Figure 4 is a circuit structure diagram of a second exemplary implementation of the image acquisition structure of the present invention;

[0050] Figure 5 yes Figure 4 A schematic diagram of the structure of the image acquisition structure in FIG.

[0051] Figure 6 is a structural schematic diagram of a third exemplary embodiment of an image acquisition structure of the present invention;

[0052] Figure 7 is a structural schematic diagram of a fourth exemplary embodiment of an image acquisition structure of the present invention;

[0053] Figure 8 is a structural schematic diagram of a fifth exemplary embodiment of an image acquisition structure of the present invention;

[0054] Fig. 9 is a schematic structural diagram of an exemplary embodiment of a display device of the present invention;

[0055] Fig.10 is a schematic flow chart of an exemplary embodiment of a driving method for an image acquisition structure of the present invention;

[0056] The main components in the figure are described as follows:

[0057] 1. Substrate substrate;

[0058] 2. Reference circuit; P1, first photosensitive device; T1, first switching transistor; 21, first output circuit; K1, first operational amplifier; C1, first capacitor;

[0059] 3. Processing circuit; 31. Analog-to-digital conversion circuit; 32. Processor; 33. Digital-to-analog conversion circuit;

[0060] 4. Image acquisition circuit; P2, second photosensor; T2, second switch transistor; 41, second output circuit; K2, second operational amplifier; C2, second capacitor;

[0061] 5. Dimming layer; 6. Optical path structure; 7. Display module;

[0062] 81, gate; 82, source; 83, drain; 84, active layer;

[0063] 9. Image acquisition area; 10. Reference area. DETAILED DESCRIPTION

[0064] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that the present invention will be comprehensive and complete and fully convey the concepts of the example embodiments to those skilled in the art. The same reference numerals in the figures represent the same or similar structures, and thus their detailed description will be omitted.

[0065] This example implementation first provides an image acquisition structure, referring to Figure 1 Figure 2 and Figure 3 The structure schematic diagram of an example implementation mode of the image acquisition structure of the present invention is shown; the image acquisition structure may include a dimming layer 5, a processing circuit 3, multiple reference circuits 2 and multiple image acquisition circuits 4; the reference circuit 2 includes a first photosensitive device P1; the dimming layer 5 is arranged on the light incident side of the first photosensitive device P1, and the dimming layer 5 at least covers the first photosensitive device P1 of the reference circuit 2; the input end of the processing circuit 3 is electrically connected to the output end of the reference circuit 2; the input end of the image acquisition circuit 4 is electrically connected to the output end of the processing circuit 3; wherein, the reference circuit 2 is configured to receive light incident through the dimming layer 5, and output an electrical signal according to the light intensity of the light; the processing circuit 3 is configured to calculate an adjustment electrical signal according to the electrical signal output by the reference circuit 2, and adjust the input electrical signal of the image acquisition circuit 4 according to the adjustment electrical signal; the image acquisition circuit 4 is configured to receive light that has not been incident through the dimming layer 5 and the input electrical signal to realize image acquisition.

[0066] In the image acquisition structure of the present invention, the dimming layer 5 at least covers the first photosensitive device P1 of the reference circuit 2, so that the intensity of light incident on the first photosensitive device P1 is weakened; the input electrical signal of the image acquisition circuit 4 is dynamically adjusted according to the response of the first photosensitive device P1 of the reference circuit 2, so that the image acquisition circuit 4 will not enter the saturation area, making fingerprint recognition easier and clearer under strong ambient light; the electrical signal output by the reference circuit 2 changes with the change of ambient light, so that the adjusted electrical signal also changes with the change of ambient light, thereby realizing dynamic adjustment according to the change of ambient light and realizing adaptive acquisition under different ambient light.

[0067] Reference Figure 1 and Figure 3 As shown, in this example embodiment, the image acquisition structure may include a substrate 1. The substrate 1 may be a glass substrate or a flexible substrate, for example, a polyamide resin or a plastic substrate, etc. The substrate 1 has an image acquisition area 9 and a plurality of reference areas 10, and the plurality of reference areas 10 may not be connected to each other, so that the image acquisition area 9 is connected as a whole, and the plurality of reference areas 10 are arranged in an array. A conductive layer is provided on the substrate 1, and the conductive layer forms a first electrode of the first photosensitive device P1 and a first electrode of the second photosensitive device P2.

[0068] A plurality of reference circuits 2 may be disposed in a plurality of reference regions 10 in a one-to-one correspondence, that is, one reference circuit 2 is disposed in one reference region 10. The reference circuit 2 may include a first photosensitive device P1, a first switch transistor T1, a first output circuit 21, and the like.

[0069] A plurality of image acquisition circuits 4 are provided in the image acquisition area 9, and the input end of the image acquisition circuit 4 is electrically connected to the output end of the processing circuit 3. The image acquisition circuit 4 may include a second photosensor P2, a second switch transistor T2, a second output circuit 41, and the like.

[0070] The first photosensitive device P1 and the second photosensitive device P2 may be the same, for example, both may receive optical signals and convert the optical signals into electrical signals, and may respond to an increase in light intensity; such a configuration may make the first photosensitive device P1 and the second photosensitive device P2 positively correlated, and facilitate the subsequent control of the input electrical signal of the second photosensitive device P2 by the electrical signal output by the first photosensitive device P1. Of course, in other exemplary embodiments of the present invention, the first photosensitive device P1 and the second photosensitive device P2 may be different, and the relationship between the light intensity received by the first photosensitive device P1 and the output electrical signal and the relationship between the light intensity received by the second photosensitive device P2 and the output electrical signal may be clarified; the processing circuit 3 may be used to adjust so that the input electrical signal of the second photosensitive device P2 may be dynamically controlled by the electrical signal output by the first photosensitive device P1.

[0071] The first photosensitive device P1 and the second photosensitive device P2 may each include a first electrode, a second electrode, and a photosensitive layer interposed between the first electrode and the second electrode.

[0072] For example, the first photosensitive device P1 and the second photosensitive device P2 can both be implemented as photodiodes, such as PN or PIN photodiodes, avalanche photodiodes, etc. The photosensitive layer includes, for example, a PN junction or a PIN junction. For example, the photosensitive layer can be made of an inorganic photosensitive material, such as a germanium-based or silicon-based material, etc.; for example, the photosensitive layer can also be an organic photosensitive material.

[0073] For example, the first photosensitive device P1 and the second photosensitive device P2 can also be implemented as metal-semiconductor-metal type photosensitive devices, and the photosensitive layer forms Schottky contacts with the first electrode and the second electrode respectively. For example, the photosensitive layer includes at least one of indium gallium arsenide (InGaAs), amorphous silicon, molybdenum sulfide, indium gallium zinc oxide, polycrystalline silicon, amorphous selenium, mercuric iodide, lead oxide, microcrystalline silicon, nanocrystalline silicon, single crystal silicon, perylene tetracarboxylic acid bisbenzimidazole, silicon nanowires and copper phthalocyanine (CuPc).

[0074] For example, the first photosensitive device P1 and the second photosensitive device P2 may also be implemented as other types of photosensitive devices such as photosensitive thin film transistors. The exemplary embodiments of the present disclosure do not limit the types of the photosensitive devices.

[0075] Please continue to refer to Figure 1 As shown, the dimming layer 5 is arranged on the side of the first photosensitive device P1 away from the base substrate 1, and the orthographic projection of the first photosensitive device P1 on the base substrate 1 is located within the orthographic projection of the dimming layer 5 on the base substrate 1, that is, the dimming layer 5 at least completely covers the first photosensitive device P1, and the first photosensitive device P1 is located on the light-emitting side of the dimming layer 5, that is, the dimming layer 5 is arranged on the light-incident side of the first photosensitive device P1, so that light can reach the first photosensitive device P1 only after passing through the dimming layer 5.

[0076] The transmittance of the dimming layer 5 is greater than or equal to 20% and less than or equal to 40%, so that the response of the first photosensitive device P1 will not reach saturation, and the input electrical signal of the second photosensitive device P2 can always be controlled by the electrical signal output by the first photosensitive device P1; and due to the shading effect of the dimming layer 5, the response of the first photosensitive device P1 is always smaller than that of the second photosensitive device P2, even when the finger is pressed on the collection area, it can be ensured that the second photosensitive device P2 works in the collection mode.

[0077] The material of the dimming layer 5 can be silicon nitride, silicon oxide, silicon oxynitride, etc.

[0078] The first switch transistor T1 and the second switch transistor T2 are implemented by a thin film transistor disposed on the substrate 1. The thin film transistor includes an active layer 84, a source electrode 82, a drain electrode 83, and a gate electrode 81. Specifically, the gate electrode 81 of the thin film transistor is a control terminal of the first switch transistor T1 and a control terminal of the second switch transistor T2, the source electrode 82 of the thin film transistor is a first electrode of the first switch transistor T1 and a first electrode of the second switch transistor T2, and the drain electrode 83 of the thin film transistor is a second electrode of the first switch transistor T1 and a second electrode of the second switch transistor T2.

[0079] In this example implementation, refer to Figure 1 and Figure 2 As shown, the reference circuit 2 can be set in a one-to-one correspondence with the image acquisition circuit 4, that is, one reference circuit 2 is connected to one image acquisition circuit 4, and one image acquisition circuit 4 is controlled by one reference circuit 2, and the first photosensitive device P1 and the second photosensitive device P2 are arranged adjacent to each other, so that the first photosensitive device P1 and the second photosensitive device P2 receive substantially the same ambient light, thereby improving the control accuracy. Each first photosensitive device P1 corresponds to a first switching transistor T1 and a first output circuit 21, and each second photosensitive device P2 corresponds to a second switching transistor T2 and a second output circuit 41.

[0080] The structure of the reference circuit 2 is described in detail below.

[0081] Specifically, the first photosensitive device P1 may include a first electrode and a second electrode. The first electrode of the first photosensitive device P1 in the reference circuit 2 is connected to the power input terminal. The first photosensitive device P1 converts the received optical signal through the dimming board 5 into an electrical signal. The first switch transistor T1 may include a first electrode, a second electrode and a control terminal. The first electrode of the first switch transistor T1 is electrically connected to the second electrode of the first photosensitive device P1, and the control terminal of the first switch transistor T1 is electrically connected to the first control terminal Q1. The first switch transistor T1 is used to control the on-off between the first photosensitive device P1 and the first output circuit 21. The input terminal of the first output circuit 21 is electrically connected to the second electrode of the first switch transistor T1, and the output terminal of the first output circuit 21 is electrically connected to the processing circuit 3.

[0082] The first output circuit 21 may include a first operational amplifier K1 and a first capacitor C1; the first operational amplifier K1 and the first capacitor C1 constitute an integrator. The integrator can integrate the current signal to obtain a voltage signal, which is convenient for the subsequent circuit to read and process. The first operational amplifier K1 may include an input terminal, a reference terminal and an output terminal. The input terminal of the first operational amplifier K1 is electrically connected to the second pole of the first switching transistor T1, and is used to receive the electrical signal output by the first photosensitive device P1. The reference terminal of the first operational amplifier K1 is electrically connected to the first reference voltage terminal Vref1, and is used to input the first reference voltage. The output terminal of the first operational amplifier K1 is electrically connected to the processing circuit 3, and is used to output the voltage signal obtained by integration to the processing circuit 3. The first capacitor C1 may include a first pole and a second pole, the first pole of the first capacitor C1 is electrically connected to the input terminal of the first operational amplifier K1, and the second pole of the first capacitor C1 is electrically connected to the output terminal of the first operational amplifier K1.

[0083] The structure of the processing circuit 3 is described in detail below.

[0084] The processing circuit 3 is electrically connected to the output end of the first output circuit 21, that is, the processing circuit 3 is electrically connected to the output end of the first operational amplifier K1. The processing circuit 3 is configured to calculate an adjustment electric signal according to the electric signal output by the first output circuit 21, and adjust the input electric signal of the image acquisition circuit 4 according to the adjustment electric signal.

[0085] Specifically, the processing circuit 3 may include an analog-to-digital conversion circuit 31, a processor 32, and a digital-to-analog conversion circuit 33; the analog-to-digital conversion circuit 31 may include an input terminal and an output terminal, the processor 32 may include an input terminal and an output terminal, and the digital-to-analog conversion circuit 33 may include an input terminal and an output terminal. The input terminal of the analog-to-digital conversion circuit 31 is electrically connected to the output terminal of the first output circuit 21 (the output terminal of the first operational amplifier K1); the input terminal of the processor 32 is electrically connected to the output terminal of the analog-to-digital conversion circuit 31; the input terminal of the digital-to-analog conversion circuit 33 is electrically connected to the output terminal of the processor 32, and the output terminal of the digital-to-analog conversion circuit 33 is electrically connected to the image acquisition circuit 4. The processor 32 may be an FPGA (Field Programmable Gate Array), a PC (Personal Computer), a microprocessor, and the like.

[0086] The structure of the image acquisition circuit 4 is described in detail below.

[0087] Specifically, the second photosensitive device P2 may include a first electrode and a second electrode. The first electrode of the second photosensitive device P2 in the image acquisition circuit 4 is connected to the output end of the digital-to-analog conversion circuit 33 of the processing circuit 3. The second photosensitive device P2 converts the received optical signal reflected by the fingerprint that has not passed through the dimming plate 5 into an electrical signal. The second switching transistor T2 may include a first electrode, a second electrode and a control end. The first electrode of the second switching transistor T2 is electrically connected to the second electrode of the second photosensitive device P2, and the control end of the second switching transistor T2 is electrically connected to the second control end Q2. The second switching transistor T2 is used to control the on-off between the second photosensitive device P2 and the second output circuit 41. The input end of the second output circuit 41 is electrically connected to the second electrode of the second switching transistor T2, and the output end of the second output circuit 41 is electrically connected to the image processing unit, and the electrical signal output by the second output circuit 41 is converted into an image to realize image recognition.

[0088] The second output circuit 41 may include a second operational amplifier K2 and a second capacitor C2; the second operational amplifier K2 and the second capacitor C2 constitute an integrator. The integrator can integrate the current signal to obtain a voltage signal, which is convenient for the subsequent circuit to read and process. The second operational amplifier K2 may include an input terminal, a reference terminal and an output terminal. The input terminal of the second operational amplifier K2 is electrically connected to the second pole of the second switching transistor T2, for receiving the electrical signal output by the second photosensitive device P2. The reference terminal of the second operational amplifier K2 is electrically connected to the second reference voltage terminal Vref2, for inputting the second reference voltage. The output terminal of the second operational amplifier K2 is electrically connected to the image processing unit, for outputting the voltage signal obtained by integration to the image processing unit. The second capacitor C2 may include a first pole and a second pole, the second pole of the second capacitor C2 is electrically connected to the input terminal of the second operational amplifier K2, and the second pole of the second capacitor C2 is electrically connected to the output terminal of the second operational amplifier K2.

[0089] Of course, in other exemplary embodiments of the present invention, at least one reference circuit 2 may be disposed between two adjacent image acquisition circuits 4, and at least one image acquisition circuit 4 may be controlled by at least one reference circuit 2; or a relationship may be set such that one reference circuit 2 corresponds to multiple image acquisition circuits 4. For example, the image acquisition structure may be divided into multiple set areas, and a reference area may be disposed at a set position within the set area. One or more reference circuits 2 may be disposed within a reference area, and multiple image acquisition circuits 4 may be disposed around the reference area. A dimming layer 5 may be disposed within the reference area, and the dimming layer 5 may cover all first photosensitive devices P1 within the set area, and may not cover the second photosensitive device P2. One reference circuit 2 may correspond to multiple image acquisition circuits 4 around it, and the input electrical signals of multiple image acquisition circuits 4 around it may be controlled by the one reference circuit 2. Multiple reference circuits 2 may also be disposed adjacently at set positions within the set area, and multiple reference circuits 2 may correspond to multiple image acquisition circuits 4 together, that is, the input electrical signals of multiple image acquisition circuits 4 may be controlled by the average value or median value of multiple reference circuits 2. In this case, the plurality of first photosensitive devices P1 in the plurality of reference circuits 2 are arrayed at set positions in a set area, each first photosensitive device P1 corresponds to a first switch transistor T1, and the plurality of first photosensitive devices P1 correspond to the same first output circuit 21; the control ends of the plurality of first switch transistors T1 connected to the same first output circuit 21 are connected to different first control ports, so that the on-off between the plurality of first photosensitive devices P1 and the first output circuit 21 can be controlled respectively, so that the electrical signals output by the plurality of first photosensitive devices P1 are sequentially transmitted to the first output circuit 21. The plurality of second photosensitive devices P2 are arrayed in the set area, each second photosensitive device P2 corresponds to a second switch transistor T2, and the plurality of second photosensitive devices P2 correspond to the same second output circuit 41; the control ends of the plurality of second switch transistors T2 connected to the same second output circuit 41 are connected to different second control ports, so that the on-off between the plurality of second photosensitive devices P2 and the second output circuit 41 can be controlled respectively, so that the electrical signals output by the plurality of second photosensitive devices P2 are sequentially transmitted to the second output circuit 41.

[0090] Reference Figure 4 and Figure 5As shown, in some other exemplary embodiments of the present invention, the reference area 10 can be set to one, and the reference area 10 can be set in the edge area of ​​the image acquisition structure. A plurality of first photosensitive devices P1 and a plurality of first switch transistors T1 are set in a reference area 10, and one first photosensitive device P1 is correspondingly connected to one first switch transistor T1, and the first photosensitive devices P1 are arranged in an array after connection, and the plurality of first switch transistors T1 in each column are correspondingly connected to the same first output circuit 21. The first electrodes of the plurality of first photosensitive devices P1 in each column are connected to the same power input terminal Vinput. The control terminals of the plurality of first switch transistors T1 in each column are connected to different first control ports (G1, G2, G3, G4 and G5), so that the plurality of first switch transistors T1 can be turned on in sequence at different times, and the electrical signals of the plurality of first photosensitive devices P1 are transmitted to the first output circuit 21 in sequence.

[0091] In the image acquisition area 9, one second photosensitive device P2 is connected to one second switch transistor T2, and multiple second photosensitive devices P2 and multiple second switch transistors T2 are also arranged in an array after being connected, and the array arrangement is the same as that of the first photosensitive device P1 and the first switch transistor T1, so that multiple second photosensitive devices P2 and multiple second switch transistors T2 are located in the same row as one first photosensitive device P1 and one first switch transistor T1, and the control ends of multiple second switch transistors T2 located in the same row and the control end of one first switch transistor T1 are connected to the same control port, that is, the first control port and the second control port are combined into one control port, and multiple second switch transistors T2 and one first switch transistor T1 located in the same row can be turned on or off at the same time. Multiple second switch transistors T2 located in the same column are correspondingly connected to the same second output circuit 41. The control ends of multiple second switch transistors T2 in each column are connected to different second control ports (G1, G2, G3, G4 and G5), so that multiple second switch transistors T2 are turned on in sequence at different times, and the electrical signals of multiple second photosensitive devices P2 are transmitted to the second output circuit 41 in sequence.

[0092] Reference Figure 6 and Figure 7As shown, in some further example embodiments of the present invention, two reference areas 10 may be provided, and the two reference areas 10 may be provided at the symmetrical side edge areas of the image acquisition structure. A plurality of first photosensitive devices P1 and a plurality of first switching transistors T1 are provided in each reference area 10, and one first photosensitive device P1 is connected to one first switching transistor T1 correspondingly, and they are arranged in an array after being connected, and the plurality of first photosensitive devices P1 in each column correspond to the same first output circuit 21. The control ends of the plurality of first switching transistors T1 connected to the same first output circuit 21 are connected to different first control ports, so that the on and off between the plurality of first photosensitive devices P1 and the first output circuit 21 can be controlled respectively, so that the electrical signals output by the plurality of first photosensitive devices P1 are transmitted to the first output circuit 21 in sequence. The arrangement and connection method of the image acquisition circuit 4 in the image acquisition area 9 may be the same as those in the image acquisition area 9. Figure 4 The same as in , I will not repeat them here.

[0093] Reference Figure 8 As shown, in some further example embodiments of the present invention, four reference areas 10 may be provided, and the four reference areas 10 may be provided in the symmetrical four side edge areas of the image acquisition structure. A plurality of first photosensitive devices P1 and a plurality of first switching transistors T1 are provided in each reference area 10, and one first photosensitive device P1 is connected to one first switching transistor T1 correspondingly, and they are arranged in an array after being connected, and the plurality of first photosensitive devices P1 in each column correspond to the same first output circuit 21. The control ends of the plurality of first switching transistors T1 connected to the same first output circuit 21 are connected to different first control ports, so that the on and off between the plurality of first photosensitive devices P1 and the first output circuit 21 can be controlled respectively, so that the electrical signals output by the plurality of first photosensitive devices P1 are transmitted to the first output circuit 21 in sequence. The arrangement and connection method of the image acquisition circuit 4 in the image acquisition area 9 may be the same as those in the image acquisition area 9. Figure 4 The same as in , I will not repeat them here.

[0094] Of course, in Figure 4-Figure 8 In the case of the arrangement of the reference area 10 shown, multiple first photosensitive devices P1 in multiple columns may correspond to the same first output circuit 21. For example, each reference area 10 has two columns of first photosensitive devices P1, each column has eight first photosensitive devices P1, and the four first photosensitive devices P1 at one end of the two columns, that is, a total of eight first photosensitive devices P1, correspond to the same first output circuit 21; the four first photosensitive devices P1 at the other end of the two columns, that is, a total of eight first photosensitive devices P1, correspond to the same other first output circuit 21. It is sufficient to ensure that the control ends of the multiple first switch transistors T1 connected to the same first output circuit 21 are connected to different first control ports.

[0095] Furthermore, this exemplary embodiment also provides a display device, referring to Fig. 9 The structural schematic diagram of the display device of the present invention is shown, and the display device may include any one of the above-mentioned image acquisition structures. The specific structure of the image acquisition structure has been described in detail above, so it will not be repeated here.

[0096] The display device may further include an optical path structure 6 disposed on the image acquisition structure, the optical path structure 6 including a shading plate, the shading plate being provided with a plurality of through holes, the through holes allowing light to pass through and reducing stray light. A display module 7 is disposed on a side of the optical path structure 6 away from the image acquisition structure. The display module 7 may be an OLED display module or a liquid crystal display module. The specific structure thereof will not be described in detail herein.

[0097] Furthermore, this exemplary embodiment also provides a method for driving an image acquisition structure, referring to Fig.10 The driving method of the image acquisition structure of the present invention is a schematic flow chart of an exemplary embodiment shown in FIG. 1 . The driving method is applicable to any of the above-mentioned image acquisition structures, and the driving method may include the following steps:

[0098] In step S10, the reference circuit 2 receives the light incident through the dimming layer 5 and outputs an electrical signal according to the light intensity of the light.

[0099] In step S20 , the processing circuit 3 calculates an adjustment electric signal according to the electric signal output by the reference circuit 2 , and adjusts the input electric signal of the image acquisition circuit 4 according to the adjustment electric signal.

[0100] Step S30: the image acquisition circuit 4 receives the light and the input electrical signal to realize image acquisition.

[0101] In this example implementation, it is first necessary to establish a correspondence between the adjustment electrical signal under different light intensities and the input electrical signal of the image acquisition circuit 4, and store it in the processor 32 of the processing circuit 3. The specific implementation process of establishing the correspondence is as follows: The following is an example in which a reference circuit 2 includes a first photosensitive device P1, an image acquisition circuit 4 includes a second photosensitive device P2, and a reference circuit 2 corresponds to an image acquisition circuit 4: the initial voltage of the first electrode (anode) of the second photosensitive device P2 is set to -3.5V,

[0102] Step 01, linearly adjust the light intensity from low to high. When the signal of the second photosensitive device P2 is close to saturation, the saturation threshold T1 is set to 35000. The electrical signal output by the reference circuit 2 and the voltage value of the first electrode (anode) of the second photosensitive device P2 are recorded to obtain the first set of data. Of course, in the case where a reference circuit 2 includes multiple first photosensitive devices P1, the calculation relationship between the adjusted electrical signal and the electrical signal output by the reference circuit 2 is described in detail below.

[0103] Step 02, continuously and linearly increase the light intensity and reduce the voltage of the first electrode (anode) of the second photosensitive device P2, repeat step 01 to obtain the second set of data, and successively test to obtain multiple sets of data, and establish the corresponding relationship between the adjustment electrical signal under different light intensities and the input electrical signal of the image acquisition circuit 4 based on the multiple sets of data.

[0104] The first photosensitive device P1 receives the light incident after passing through the dimming layer 5, and converts the light signal into a current signal, the magnitude of which is proportional to the intensity of the light. The first operational amplifier K1 and the first capacitor C1 constitute an integrator. The integrator can integrate the current signal to obtain a voltage signal, that is, the electrical signal output by the reference circuit is a voltage signal, which is convenient for the subsequent processing circuit 3 to read and process.

[0105] The analog-to-digital conversion circuit 31 in the processing circuit 3 converts the electrical signal (voltage signal) output by one or more reference circuits 2 into a digital signal; the processor 32 calculates the adjusted electrical signal (adjusted digital signal) based on the digital signal, and searches for the input digital signal required by the image acquisition circuit 4 corresponding to the adjusted digital signal from the corresponding relationship; the digital-to-analog conversion circuit 33 converts the input digital signal into an input electrical signal.

[0106] for Figure 2 In the image acquisition structure shown, when one reference circuit 2 corresponds to one image acquisition circuit 4, the electrical signal output by one reference circuit 2 corresponds to one adjustment electrical signal.

[0107] for Figure 4-Figure 8 In the image acquisition structure shown, when multiple reference circuits 2 correspond to multiple image acquisition circuits 4, the electrical signal can be adjusted by calculating the average value or median value of the electrical signals output by the multiple reference circuits 2. The digital signal can also be adjusted by calculating the following formula, which is calculated by taking the first photosensitive device P1 of the 3×3 array as an example.

[0108]

[0109] Wherein, △p(x, y) is the regulated electrical signal (regulated digital signal), K is the convolution kernel, I is the image formed by the first photosensitive device P1 of the 3×3 array, x is the first coordinate value of the middle pixel point in the image, and y is the second coordinate value of the middle pixel point in the image.

[0110] By selecting different convolution kernels, different compensation strategies can be selected, for example:

[0111]

[0112] In addition, in other exemplary embodiments of the present invention, Gaussian convolution may also be selected.

[0113] The stronger the light intensity is, the larger the power-saving signal (adjusting digital signal) is, and the smaller the input electrical signal of the image acquisition circuit 4 is.

[0114] The image acquisition circuit 4 receives the light reflected by the fingerprint and the above-mentioned input electrical signal to realize image acquisition. Moreover, under strong ambient light conditions, the input electrical signal of the image acquisition circuit 4 is small enough to avoid saturation of the second photosensitive device P2 and prevent the fingerprint image from being unable to be recognized.

[0115] The features, structures or characteristics described above may be combined in one or more embodiments in any suitable manner, and if possible, the features discussed in each embodiment are interchangeable. In the above description, many specific details are provided to provide a full understanding of the embodiments of the present invention. However, those skilled in the art will appreciate that the technical solution of the present invention may be practiced without one or more of the specific details, or other methods, components, materials, etc. may be adopted. In other cases, known structures, materials or operations are not shown or described in detail to avoid blurring various aspects of the present invention.

[0116] Although relative terms such as "upper" and "lower" are used in this specification to describe the relative relationship of one component of the illustration to another component, these terms are used in this specification only for convenience, such as the orientation of the examples described in the drawings. It is understood that if the device of the illustration is turned over so that it is upside down, the component described as being "upper" will become the component "lower". Other relative terms, such as "high", "low", "top", "bottom", etc., are also used to have similar meanings. When a structure is "on" other structures, it may mean that the structure is formed integrally on the other structure, or that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure through another structure.

[0117] In this specification, the terms "a", "an", "the", "said" and "at least one" are used to indicate the presence of one or more elements / components / etc.; the terms "comprising", "including" and "having" are used to express an open-ended inclusion and mean that additional elements / components / etc. may exist in addition to the listed elements / components / etc.; the terms "first", "second" and "third" etc. are used only as labels and are not intended to limit the quantity of their objects.

[0118] It should be understood that the present invention is not limited in its application to the detailed structure and arrangement of the components proposed in this specification. The present invention can have other embodiments and can be implemented and executed in a variety of ways. The aforementioned variations and modifications fall within the scope of the present invention. It should be understood that the present invention disclosed and defined in this specification extends to all alternative combinations of two or more individual features mentioned or evident in the text and / or the drawings. All these different combinations constitute multiple alternative aspects of the present invention. The embodiments described in this specification illustrate the best mode known for implementing the present invention and will enable those skilled in the art to utilize the present invention.

Claims

1. An image acquisition structure, characterized in that: include: a plurality of reference circuits, the reference circuits comprising a first photosensitive device and a first output circuit; A dimming layer, provided on the light incident side of the first photosensitive device, and the dimming layer at least covers the first photosensitive device of the reference circuit; a processing circuit, an input end of which is electrically connected to an output end of the reference circuit; a plurality of image acquisition circuits, whose input ends are electrically connected to the output ends of the processing circuit, the image acquisition circuits comprising a second photosensitive device and a second output circuit; The reference circuit is configured to receive the light incident through the dimming layer and output an electrical signal according to the light intensity of the light; the processing circuit is configured to calculate the adjustment electrical signal according to the electrical signal output by the reference circuit, and adjust the input electrical signal of the image acquisition circuit according to the adjustment electrical signal; The image acquisition circuit is configured to receive the light that has not passed through the dimming layer and the input electrical signal to achieve image acquisition.

2. The image acquisition structure according to claim 1, characterized in that: The reference circuit further includes: a first switch transistor, a first electrode of which is electrically connected to the second electrode of the first photosensitive device, and a control end of the first switch transistor is electrically connected to a first control port; an input end of the first output circuit is electrically connected to the second electrode of the first switch transistor, and an output end of the first output circuit is electrically connected to the processing circuit; Wherein, the first electrode of the first photosensitive device is connected to the power input terminal.

3. The image acquisition structure according to claim 2, characterized in that: The first output circuit comprises: a first operational amplifier, wherein an input terminal of the first operational amplifier is connected to the second electrode of the first switch transistor, a reference terminal of the first operational amplifier is electrically connected to a first reference voltage terminal, and an output terminal of the first operational amplifier is electrically connected to the processing circuit; A first capacitor has a first electrode electrically connected to the input terminal of the first operational amplifier, and a second electrode electrically connected to the output terminal of the first operational amplifier.

4. The image acquisition structure according to claim 2, characterized in that: The processing circuit comprises: an analog-to-digital conversion circuit, whose input terminal is electrically connected to the output terminal of the first output circuit; A processor, whose input terminal is electrically connected to the output terminal of the analog-to-digital conversion circuit; The input end of the digital-to-analog conversion circuit is electrically connected to the output end of the processor, and the output end of the digital-to-analog conversion circuit is electrically connected to the image acquisition circuit.

5. The image acquisition structure according to claim 2, characterized in that: The first electrode of the second photosensitive device is electrically connected to the processing circuit; The image acquisition circuit also includes: a second switch transistor, a first electrode of which is electrically connected to the second electrode of the second photosensitive device, and a control end of the second switch transistor is electrically connected to the second control port; An input terminal of the second output circuit is electrically connected to the second electrode of the second switch transistor.

6. The image acquisition structure according to claim 5, characterized in that: The second output circuit comprises: A second operational amplifier, an input terminal of which is electrically connected to the second electrode of the second switch transistor, and a reference terminal of the second operational amplifier is electrically connected to a second reference voltage terminal; A second capacitor has a first electrode electrically connected to the input terminal of the second operational amplifier, and a second electrode electrically connected to the output terminal of the second operational amplifier.

7. The image acquisition structure according to claim 2, characterized in that: Each of the first photosensors corresponds to one of the first switching transistors and one of the first output circuits.

8. The image acquisition structure according to claim 5, characterized in that: A plurality of the first photosensitive devices are arranged in an array, each of the first photosensitive devices corresponds to a first switch transistor, a plurality of the first photosensitive devices in at least one column correspond to the same first output circuit, and control ends of the plurality of the first switch transistors connected to the same first output circuit are connected to different first control ports; A plurality of the second photosensitive devices are arranged in an array, each of the second photosensitive devices corresponds to a first switching transistor, a plurality of the second photosensitive devices in at least one column correspond to the same second output circuit, and the control ends of the plurality of the second switching transistors connected to the same second output circuit are connected to different second control ports.

9. The image acquisition structure according to claim 8, characterized in that: The image acquisition structure has at least one reference area, one of the reference areas is arranged at an edge area of ​​the image acquisition structure, and each of the reference areas is provided with a plurality of the first photosensitive devices and a plurality of first switching transistors, and the electrical signal is adjusted to be the average value or median value of the plurality of reference circuits.

10. The image acquisition structure according to claim 1, characterized in that: At least one of the reference circuits is arranged between two adjacent image acquisition circuits, and at least one of the image acquisition circuits is controlled by at least one of the reference circuits.

11. The image acquisition structure according to claim 1, characterized in that: The light transmittance of the dimming layer is greater than or equal to 20% and less than or equal to 40%.

12. A display device, characterized in that: include: The image acquisition structure according to any one of claims 1 to 11.

13. A method for driving an image acquisition structure, applicable to the image acquisition structure according to any one of claims 1 to 11, characterized in that: include: The reference circuit receives the light incident through the dimming layer and outputs an electrical signal according to the light intensity of the light; The processing circuit calculates an adjustment electric signal according to the electric signal output by the reference circuit, and adjusts the input electric signal of the image acquisition circuit according to the adjustment electric signal; The image acquisition circuit receives the light and the input electrical signal to realize image acquisition.

14. The driving method of the image acquisition structure according to claim 13, characterized in that: Before the reference circuit receives the light incident through the dimming layer, the driving method further includes: A corresponding relationship between the adjustment electric signal under different light intensities and the input electric signal of the image acquisition circuit is established.

Images