Three-dimensional silicon-based transfer structure processing method and device based on photosensitive composite materials

Abstract

The present invention provides a method and device for processing a three-dimensional silicon-based transfer structure based on a photosensitive composite material, which relates to the field of wafer-level three-dimensional heterogeneous integrated packaging process technology, including: step S1: making a front protective film and a back protective film on a silicon-based substrate; step S2: making a waveguide metal sidewall on the back of the silicon-based substrate to form a TSV blind groove; step S3: making a back cavity structure of the transfer structure on the front of the silicon-based substrate and filling it with the photosensitive composite material; step S4: preparing a dielectric mask layer above the back cavity structure, and making a top metal pattern above the top dielectric layer; step S5: using a photolithography mask and dry etching to perform bulk silicon etching and slicing to obtain a complete transfer structure. The present invention can greatly reduce the overall size of the radio frequency system, provide a waveguide output interface while achieving miniaturization, and improve the interconnection freedom and flexibility.

Description

Technical Field

[0001] The present invention relates to the technical field of wafer-level three-dimensional heterogeneous integrated packaging technology, and in particular to a three-dimensional silicon-based transfer structure processing method and device based on photosensitive composite materials. Background Art

[0002] The wafer-level three-dimensional heterogeneous integrated packaging process directly integrates chips and various passive devices into a system on a silicon-based wafer, and rewires the chip surface to achieve a fan-out effect. During the process, micro-nano process equipment is directly used to integrate hundreds or even more chips into a large-scale system at one time, and interconnect with passive devices such as filters, antennas, and baluns, which greatly improves packaging efficiency, reduces costs, and improves system performance. It is an important way to achieve system-level packaging.

[0003] TSV blind trench electroplating is the core process in the three-dimensional heterogeneous integration link. It electroplates and grows metal on the blind trench part of the silicon substrate surface. This vertical interconnection solution can reduce the system interconnection length, reduce transmission delay, and improve capacitance and inductance effects, thereby achieving miniaturization and high-density integration of devices.

[0004] With the rapid development of the information age, radar communication systems are constantly iterating and updating in the direction of miniaturization, high performance and high integration. The traditional Moore's Law is no longer applicable to the high-density iterative process in the current two-dimensional plane, so three-dimensional heterogeneous integration technology has been widely developed. At present, radar communication systems in the millimeter wave band are developing towards miniaturization and high performance, and the primary problem they face is the solution of the interconnection solution. The traditional interconnection solution is mainly based on planar transition, and fan-out from the chip with microstrip lines. In this way, the system size made on the substrate of the same thickness is large, and the fan-out interface is not easy to integrate with interfaces such as waveguides. Reducing the overall size of the system and changing the planar transfer structure to a three-dimensional structure to achieve a three-dimensional integration effect has become a major research hotspot. At the same time, when the metal waveguide is integrated in the silicon-based substrate and interconnected with the chip, the processing of the transfer structure from the chip fan-out microstrip line to the rectangular waveguide is a very challenging difficulty. Summary of the invention

[0005] In view of the defects in the prior art, the present invention provides a method and device for processing a three-dimensional silicon-based transition structure based on a photosensitive composite material.

[0006] According to a method and device for processing a three-dimensional silicon-based transfer structure based on a photosensitive composite material provided by the present invention, the scheme is as follows:

[0007] In a first aspect, a method for processing a three-dimensional silicon-based transfer structure based on a photosensitive composite material is provided, the method comprising:

[0008] Step S1: manufacturing a front protective film and a back protective film on a silicon-based substrate;

[0009] Step S2: fabricating a waveguide metal sidewall on the back side of the silicon-based substrate to form a TSV blind groove;

[0010] Step S3: making a back cavity structure of the transfer structure on the front side of the silicon-based substrate and filling it with a photosensitive composite material;

[0011] Step S4: preparing a dielectric mask layer above the back cavity structure, and making a top metal pattern above the top dielectric layer;

[0012] Step S5: using a photolithography mask and dry etching to perform bulk silicon etching and slicing to obtain a complete transfer structure.

[0013] Preferably, step S2 comprises:

[0014] Step S2.1: Spin-coating photoresist on the back protective film and developing to prepare a mask;

[0015] Step S2.2: etching the back protective film using a photolithography mask;

[0016] Step S2.3: using dry etching to complete bulk silicon etching and remove the photoresist;

[0017] Step S2.4: sputtering a metal seed layer on the back side of the silicon-based substrate;

[0018] Step S2.5: electroplating the deep grooves formed after etching the bulk silicon and solidifying them;

[0019] Step S2.6: On the back side of the silicon-based substrate, the metal copper protruding after the electroplating is mechanically polished.

[0020] Preferably, in step S2.3, the blind groove body silicon etching is 421 microns;

[0021] In the sputtering process of step S2.4, a layer of metal chromium is first sputtered;

[0022] In step S2.5, a surface metal atom activity inhibitor is added to the electroplating solution;

[0023] In step S2.6, a 600-BLD04 model grinding wheel is used to perform mechanical grinding of the metal.

[0024] Preferably, step S3 comprises:

[0025] Step S3.1: Spin-coating photoresist on the front protective film and preparing a back cavity pattern;

[0026] Step S3.2: dry etching the front protection film and the silicon base to form a back cavity structure, and then remove the glue and clean it;

[0027] Step S3.3: sputtering a stratum seed layer on the front surface of the silicon-based substrate;

[0028] Step S3.4: Spin-coating photoresist on the formation seed layer;

[0029] Step S3.5: electroplating the formation seed layer and performing degumming and cleaning;

[0030] Step S3.6: using an ion beam to etch away the formation seed layer to form a complete formation structure;

[0031] Step S3.7: Fill the photosensitive medium BCB by spin coating for multiple times, and fully fill the back cavity after curing;

[0032] Step S3.8: Mechanically grinding the top BCB dielectric layer.

[0033] Preferably, in step S3.2, the dry etching of the silicon-based back cavity structure is 79 microns;

[0034] In step S3.5, a thermally conductive tape is used to adhere the exposed metal on the back side during the electroplating process of the front side structure.

[0035] Preferably, step S4 comprises:

[0036] Step S4.1: spin-coating a dielectric layer as a back cavity mask layer on the BCB dielectric layer that has been mechanically polished on the front side of the silicon-based substrate;

[0037] Step S4.2: using dielectric etching to cleanly etch the photosensitive medium BCB outside the back cavity mask layer;

[0038] Step S4.3: spin coating and patterning a surface dielectric layer on the back cavity mask layer on the front side of the silicon-based substrate;

[0039] Step S4.4: sputtering a top metal layer above the surface dielectric layer on the front side of the silicon-based substrate;

[0040] Step S4.5: Spin-coating photoresist on the top metal layer and patterning;

[0041] Step S4.6: electroplating the top metal layer and removing residual glue;

[0042] Step S4.7: Ion beam etching is used to remove the top metal layer that has not been electroplated.

[0043] Preferably, in step S4.1, the size of the dielectric mask layer is 200 microns larger than the periphery of the back cavity structure;

[0044] In step 4.2, after the dielectric etching, the height of the top dielectric mask layer is retained at 8 microns.

[0045] Preferably, the step S5 comprises:

[0046] Step S5.1: Spin-coating photoresist on the back of the silicon-based substrate and developing to prepare a mask;

[0047] Step S5.2: using dry etching to complete bulk silicon etching and remove residual glue;

[0048] Step S5.3: Slice the silicon-based substrate to complete the fabrication of the transfer structure.

[0049] Preferably, the front protection film and the back protection film are both Si3N4 films;

[0050] The dry etching is all inductively coupled plasma dry etching.

[0051] In a second aspect, a device is provided, wherein the device is prepared by the three-dimensional silicon-based transition structure processing method based on the photosensitive composite material.

[0052] Compared with the prior art, the present invention has the following beneficial effects:

[0053] 1. The present invention solves the thickness limitation of the photosensitive composite material BCB when it acts as a medium, and increases the medium thickness of BCB by using a method of multiple spin coating and curing;

[0054] 2. The present invention solves the edge cracking phenomenon caused by the difference in thermal expansion coefficient between BCB and different materials, thereby preventing the risk of top metal wiring breaking; and proposes a solution for preparing metal waveguides on silicon-based substrates, which realizes the purpose of integrating metal waveguides in silicon-based substrates by combining the method of making TSV blind grooves with dry etching, reduces interconnection losses, and improves the diversity and reliability of wafer-level heterogeneous integrated packaging processes;

[0055] 3. The present invention is based on the problem of chip RF fan-out interconnection in the process of silicon-based system-level integration. By introducing a metal rectangular waveguide on a silicon-based substrate to form a three-dimensional interconnection structure, it replaces the traditional planar fan-out interconnection solution, greatly reduces the overall size of the RF system, and provides a waveguide output interface while achieving miniaturization. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] Other features, objects and advantages of the present invention will become more apparent from the detailed description of non-limiting embodiments made with reference to the following drawings:

[0057] Figure 1 It is a cross-sectional view of a three-dimensional transfer structure;

[0058] Figure 2 It is a basic flow chart of the method of the present invention.

[0059] Reference numerals:

[0060] 101 Four-inch high-resistance round silicon wafer 102 Si3N4 thin film

[0061] 103 rectangular waveguide metal sidewall 104 substrate integrated waveguide back cavity structure

[0062] 105 metal layer 106 coupling window

[0063] 107 top dielectric layer 108 top metal layer

[0064] 109 air cavity DETAILED DESCRIPTION

[0065] The present invention is described in detail below in conjunction with specific embodiments. The following embodiments will help those skilled in the art to further understand the present invention, but are not intended to limit the present invention in any form. It should be noted that, for those of ordinary skill in the art, several changes and improvements can also be made without departing from the concept of the present invention. These all belong to the protection scope of the present invention.

[0066] The embodiments of the present invention aim to solve the problem that the photosensitive composite material BCB cannot achieve a large thickness when acting as a medium; to solve the problem that the difference in thermal expansion coefficient between BCB and different materials leads to edge cracking during processing, thereby causing the routing of the top metal of the medium to break at the crack; to solve the problem that the traditional planar interconnection structure is improved and the metal rectangular waveguide is integrated in the silicon-based substrate to realize the three-dimensional integrated architecture, and a three-dimensional silicon-based transfer structure processing method based on the photosensitive composite material is provided, with reference to Figure 1 As shown, the method specifically includes:

[0067] Step S1: manufacturing a front protective film and a back protective film (ie, a double-sided protective film) on a silicon-based substrate.

[0068] Step S2: using dry etching to form waveguide metal sidewalls on the back side of the silicon-based substrate to form TSV blind grooves.

[0069] Wherein, step S2 specifically includes the following steps:

[0070] Step S2.1: Spin-coat a photoresist on the back protective film and develop the photoresist to prepare a mask.

[0071] Step S2.2: Etching the back protective film using a photolithography mask.

[0072] Step S2.3: Use dry etching to complete the body silicon etching and remove the photoresist, wherein the blind groove body silicon etching is 421 microns.

[0073] Step S2.4: sputtering a metal seed layer on the back of the silicon-based substrate. During the sputtering process of this step, a layer of metal chromium is first sputtered to help increase the adhesion of metal copper.

[0074] Step S2.5: TSV blind groove electroplating, that is, electroplating and solidifying the deep groove formed after bulk silicon etching; in this step, a surface metal atom activity inhibitor is added to the electroplating solution to ensure anisotropy of the electroplating inside and outside the groove.

[0075] Step S2.6: On the back side of the silicon-based substrate, the metal copper protruding after the electroplating is mechanically ground flat. This step uses a 600-BLD04 grinding wheel to mechanically grind the metal flat.

[0076] Step S3: fabricating a back cavity structure of the transfer structure on the front side of the silicon-based substrate and filling it with a photosensitive composite material.

[0077] In step S3, the step specifically includes:

[0078] Step S3.1: Spin-coat photoresist on the front protection film and prepare a back cavity pattern.

[0079] Step S3.2: dry-etch the front protection film and the silicon base to form a back cavity structure, remove the glue and clean. The dry-etched silicon base back cavity structure in this step is 79 microns.

[0080] Step S3.3: sputtering a stratum seed layer on the front surface of the silicon-based substrate;

[0081] Step S3.4: Spin-coat photoresist on the formation seed layer.

[0082] Step S3.5: electroplating the formation seed layer and performing debonding and cleaning. In this step, during the electroplating of the front structure, a thermal conductive tape is used to stick the exposed metal on the back.

[0083] Step S3.6: Etch away the formation seed layer using an ion beam to form a complete formation structure.

[0084] Step S3.7: Fill the photosensitive medium BCB by spin coating multiple times, and fully fill the back cavity after curing.

[0085] Step S3.8: Mechanically grinding the top BCB dielectric layer.

[0086] Step S4: preparing a dielectric mask layer above the back cavity structure, and manufacturing a top metal pattern above the top dielectric layer.

[0087] In step S4, the specific steps include:

[0088] Step S4.1: Spin-coat a dielectric layer as a back cavity mask layer on the BCB dielectric layer that has been mechanically polished on the front side of the silicon-based substrate. In this step, the size of the dielectric mask layer is 200 microns larger than the periphery of the back cavity structure.

[0089] Step S4.2: Use dielectric etching to cleanly etch the photosensitive medium BCB outside the back cavity mask layer. In this step, after the dielectric etching, the height of the top dielectric mask layer is retained at 8 microns.

[0090] Step S4.3: Spin-coat and pattern a surface dielectric layer on the back cavity mask layer on the front side of the silicon-based substrate.

[0091] Step S4.4: sputtering a top metal layer above the surface dielectric layer on the front side of the silicon-based substrate;

[0092] Step S4.5: Spin-coat photoresist on the top metal layer and pattern it.

[0093] Step S4.6: Electroplating the top metal layer and removing residual glue.

[0094] Step S4.7: Ion beam etching is used to remove the top metal layer that has not been electroplated.

[0095] Step S5: using a photolithography mask and dry etching to perform bulk silicon etching and slicing to obtain a complete transfer structure.

[0096] In step S5, it specifically includes:

[0097] Step S5.1: Spin-coat photoresist on the back side of the silicon-based substrate and develop it to prepare a mask.

[0098] Step S5.2: Use dry etching to complete bulk silicon etching and remove residual glue.

[0099] Step S5.3: Slice the silicon-based substrate to complete the fabrication of the transfer structure.

[0100] The front protective film and the back protective film (i.e., double-sided protective film) in the present invention are both Si3N4 thin films 102, and all dry etching involved in the process flow is inductively coupled plasma dry etching. Specifically, the dry etching used is reactive coupled plasma etching, and the silicon-based substrate is anisotropically etched by means of the plasma generated after the gas glow discharge. In the etching process, etching and protection are performed alternately, and the silicon base is etched by fluorine-based active free radicals, followed by passivation of the side walls by fluorine-based gas. After isotropic etching, due to the passivation film generated by gas bombardment on the side walls of the substrate in the longitudinal direction, the passivation layer of the side walls will not be etched away in the next etching cycle, and the fluorine-based active free radical gas only etches the bottom of the etching groove. Etching and passivation are repeated in this way to improve the anisotropic effect of dry etching. The final structure has an inclination angle of nearly 90°, and a structure with a high aspect ratio can be produced, ensuring the subsequent dry etching preparation of TSV blind grooves.

[0101] The present invention also provides a device, which is prepared by the above-mentioned three-dimensional silicon-based transition structure processing method based on photosensitive composite materials.

[0102] Next, the present invention will be described in more detail.

[0103] The present invention provides a three-dimensional silicon-based transfer structure processing method based on photosensitive composite materials, firstly, a TSV blind groove is etched on the back of the silicon-based substrate, and a seed layer is sputtered on the back to electroplate the blind groove, and mechanical grinding is performed after the metal is plated in the groove; a rectangular groove with a column is dry-etched on the front of the silicon-based wafer, and a metal layer is sputtered and patterned by photolithography, and a target pattern is electroplated; BCB is filled into the groove by a method of multiple spin coating and curing, and a layer of BCB mask is made on the top layer of the silicon-based wafer to cover the groove edge; then the top dielectric layer 107 and metal patterning are completed, and the etching of the rectangular waveguide on the back is completed. Through the determination and implementation of the scheme, the difficulty of integrating rectangular metal waveguides in silicon-based wafers is overcome, and the conversion from grounded coplanar waveguides to metal waveguides is realized, providing an efficient and reliable transfer scheme for three-dimensional heterogeneous integration. In the process flow, by improving the dielectric spin coating process parameters and mask scheme, the effect of making a thick dielectric layer without cracking is achieved.

[0104] The specific process steps are:

[0105] (1) Preparing a protective film on the front and back surfaces of a silicon wafer;

[0106] (2) spin coating photoresist on the back of the silicon substrate, baking the photolithography development, and etching the protective film and the silicon substrate;

[0107] (3) removing the photoresist, sputtering the metal seed layer, and then blind-groove electroplating, followed by mechanical grinding;

[0108] (4) Spin-coating photoresist on the front side of the silicon substrate, baking, photolithography and developing, and etching the protective film and the silicon substrate to a specified depth;

[0109] (5) removing the photoresist, sputtering a metal seed layer and patterning the surface using the photoresist, and performing metal electroplating;

[0110] (6) removing the photoresist and seed layer to form a complete bottom layer structure;

[0111] (7) Filling the photosensitive medium BCB multiple times, grinding the top layer after sufficient curing;

[0112] (8) Spin-coat a new layer of photosensitive medium BCB to act as a back cavity mask layer and perform dielectric etching on the entire structure;

[0113] (9) Spin coating the top photosensitive medium BCB layer and sputtering the metal seed layer;

[0114] (10) completing the patterning of the top metal layer and removing the metal seed layer;

[0115] (11) Spin-coating photoresist on the back of the silicon substrate to complete the etching of the silicon substrate in the middle of the metal blind groove to form a metal rectangular waveguide;

[0116] (12) Slice the silicon-based wafer to obtain a complete transfer structure unit.

[0117] Reference Figure 1 and Figure 2 As shown, the method of the present invention is as follows:

[0118] (a) A double-sided polished 500 um thick four-inch high-resistance round silicon wafer 101 is used as a silicon substrate and is used after cleaning. Figure 2 (a) shown.

[0119] (b) Si3N4 thin film 102 is deposited on both sides of a high-resistance round silicon wafer by LPCVD process, as shown in FIG. Figure 2 (b) as shown.

[0120] (c) Spin-coat photoresist on the back of the silicon wafer to develop the rectangular waveguide sidewall pattern, such as Figure 2 (c) as shown.

[0121] (d) Using the photoresist as a mask, the protective film Si3N4 is etched to expose the silicon substrate surface below the protective film. Figure 2 (d) as shown.

[0122] (e) Continue to use the photoresist as a mask and use dry etching to perform deep silicon etching on the exposed silicon substrate to etch out blind grooves, such as Figure 2 (e) as shown.

[0123] (f) Use acetone to remove the glue, sputter Cr / Cu seed layer, and directly perform TSV blind groove electroplating to form rectangular waveguide metal sidewall 103, as shown in FIG. Figure 2 (f) as shown.

[0124] (g) Using a DISCO-BG810 thinning machine and a 600-BLD04 grinding wheel, the metal on the back of the silicon wafer is mechanically ground and polished. Figure 2 (g) as shown.

[0125] (h) Spin-coat photoresist on the front side of the silicon wafer to develop the substrate integrated waveguide back cavity pattern, such as Figure 2 (h) shown.

[0126] (i) Using photoresist as a mask, the protective film Si3N4 is etched to expose the silicon substrate surface below the protective film. Figure 2 (i) as shown.

[0127] (j) Continue to use the photoresist as a mask and use dry etching to perform deep silicon etching on the exposed silicon substrate to etch out the substrate integrated waveguide back cavity structure 104, such as Figure 2 (j) as shown.

[0128] (k) Use acetone to wash off the photoresist, and use ultrasound to perform a secondary cleaning to completely remove the residual glue. Figure 2 (k) as shown.

[0129] (l) Sputtering a Cr / Cu seed layer on the front side of the silicon wafer, such as Figure 2 (l) as shown.

[0130] (m) Spin-coat photoresist on the front of the silicon wafer and photolithographically develop a metal stratum pattern in the back cavity of the substrate integrated waveguide, such as Figure 2 (m) shown.

[0131] (n) Using the photoresist in the groove as a mask, electroplating the metal layer 105, washing away the photoresist with acetone, and etching away the metal seed layer covered by the photoresist with ion beam etching to expose the coupling window 106, as shown in FIG. Figure 2 (n) shown.

[0132] (o) Spin-coating BCB multiple times, and after exposure, development and curing, completely fill the substrate integrated waveguide back cavity structure 104, such as Figure 2 (o) as shown.

[0133] (p) Use the DISCO-BG810 thinning machine to polish the uneven BCB layer on the front side of the silicon wafer to ensure that the top BCB layer is in the same plane. Figure 2 (p) shown.

[0134] (q) Spin-coat a layer of BCB on the front side of the silicon wafer to serve as a mask for back cavity dielectric filling, and perform dielectric etching on the entire front side structure to ensure that the final mask part is higher than the silicon substrate surface, such as Figure 2 (q) shown.

[0135] (r) Spin-coat a layer of BCB as the top dielectric layer 107, and after pre-baking, exposure, development and hard curing, etch the top layer to a corresponding thickness, such as Figure 2 (r) shown.

[0136] (s) Sputtering a Cr / Cu seed layer on the top dielectric layer 107, such as Figure 2 (s) shown.

[0137] (t) Spin-coat photoresist on the seed layer, and obtain the top metal pattern after photolithography and development, such as Figure 2 (t) shown.

[0138] (u) Using the photoresist above the seed layer as a mask, electroplating the top metal layer 108, washing away the photoresist with acetone, and etching away the metal seed layer covered by the photoresist with ion beam etching, such as Figure 2 (u) shown.

[0139] (v) Spin-coat photoresist on the back of the silicon wafer to develop the pattern inside the rectangular waveguide cavity, such as Figure 2 (v) as shown.

[0140] (w) Using the photoresist as a mask, dry etching is performed on the exposed silicon substrate, that is, all the silicon substrates in the metal rectangular waveguide cavity are etched cleanly to form an air cavity 109, such as Figure 2 (w) shown.

[0141] (x) Use acetone to clean the residual glue, and use a DISCO-DAD3650 dicing machine to slice the silicon wafer to obtain each transfer structure unit, such as Figure 2 (x) as shown.

[0142] The present invention adopts a mixed liquid of adding active inhibitor, accelerator and leveler to the electroplating solution, so as to achieve the electroplating effect from bottom to top during the electroplating process, and finally obtain a structure in which the groove is basically plated and the surface is suppressed. The inhibitor with strong adsorption ability suppresses the growth of metal on the surface of the substrate on the surface of copper atoms, the accelerator gathers at the bottom of the groove to increase the metal electroplating speed in the blind grooves with different aspect ratios, and the leveler suppresses the metal bumps on the surface of the substrate due to uneven current.

[0143] The embodiment of the present invention provides a method and device for processing a three-dimensional silicon-based transfer structure based on a photosensitive composite material, which solves the thickness limitation of the photosensitive composite material BCB when acting as a medium, and increases the medium thickness of the BCB by using a method of multiple spin coating and curing; at the same time, it solves the edge cracking phenomenon caused by the difference in thermal expansion coefficient between the BCB and different materials, thereby preventing the risk of fracture of the top metal routing; and proposes a scheme for preparing a metal waveguide on a silicon-based substrate, and realizes the purpose of integrating the metal waveguide in the silicon-based substrate by combining the method of making TSV blind grooves with dry etching, reducing the interconnection loss and improving the diversity and reliability of the wafer-level heterogeneous integrated packaging process. The present invention is based on the problem of chip RF fan-out interconnection in the silicon-based system-level integration process, and forms a three-dimensional interconnection structure by introducing a metal rectangular waveguide on a silicon-based substrate, replacing the traditional planar fan-out interconnection scheme, greatly reducing the overall size of the RF system, and providing a waveguide output interface while achieving miniaturization, improving the interconnection freedom and flexibility.

[0144] Those skilled in the art know that, in addition to realizing the system and its various devices, modules, and units provided by the present invention in a purely computer-readable program code, it is entirely possible to realize the same functions in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers by logically programming the method steps. Therefore, the system and its various devices, modules, and units provided by the present invention can be considered as a hardware component, and the devices, modules, and units included therein for realizing various functions can also be regarded as structures within the hardware component; the devices, modules, and units for realizing various functions can also be regarded as both software modules for realizing the method and structures within the hardware component.

[0145] The above describes the specific embodiments of the present invention. It should be understood that the present invention is not limited to the above specific embodiments, and those skilled in the art can make various changes or modifications within the scope of the claims, which does not affect the essence of the present invention. In the absence of conflict, the embodiments of the present application and the features in the embodiments can be combined with each other arbitrarily.

Claims

1. A method for processing a three-dimensional silicon-based transfer structure based on a photosensitive composite material, characterized in that: include: Step S1: manufacturing a front protective film and a back protective film on a silicon-based substrate; Step S2: fabricating a waveguide metal sidewall on the back side of the silicon-based substrate to form a TSV blind groove; Step S3: making a back cavity structure of the transfer structure on the front side of the silicon-based substrate and filling it with a photosensitive composite material; Step S4: preparing a dielectric mask layer above the back cavity structure, and making a top metal pattern above the top dielectric layer; Step S5: using a photolithography mask and dry etching to perform bulk silicon etching and dicing to obtain a complete transfer structure; The step S3 comprises: Step S3.1: Spin-coating photoresist on the front protective film and preparing a back cavity pattern; Step S3.2: dry etching the front protection film and the silicon base to form a back cavity structure, and then remove the glue and clean it; Step S3.3: sputtering a stratum seed layer on the front surface of the silicon-based substrate; Step S3.4: Spin-coating photoresist on the formation seed layer; Step S3.5: electroplating the formation seed layer and performing degumming and cleaning; Step S3.6: using an ion beam to etch away the formation seed layer to form a complete formation structure; Step S3.7: Fill the photosensitive medium BCB by spin coating for multiple times, and fully fill the back cavity after curing; Step S3.8: Mechanically grinding the top BCB dielectric layer.

2. The method for processing a three-dimensional silicon-based transfer structure based on a photosensitive composite material according to claim 1, characterized in that: The step S2 comprises: Step S2.1: Spin-coating photoresist on the back protective film and developing to prepare a mask; Step S2.2: etching the back protective film using a photolithography mask; Step S2.3: using dry etching to complete bulk silicon etching and remove the photoresist; Step S2.4: sputtering a metal seed layer on the back side of the silicon-based substrate; Step S2.5: electroplating the deep grooves formed after etching the bulk silicon and solidifying them; Step S2.6: On the back side of the silicon-based substrate, the metal copper protruding after the electroplating is mechanically polished.

3. The method for processing a three-dimensional silicon-based transfer structure based on a photosensitive composite material according to claim 2, characterized in that: In the step S2.3, the blind groove body silicon etching is performed to 421 microns; In the sputtering process of step S2.4, a layer of metal chromium is first sputtered; In step S2.5, a surface metal atom activity inhibitor is added to the electroplating solution; In step S2.6, a 600-BLD04 model grinding wheel is used to perform mechanical grinding of the metal.

4. The method for processing a three-dimensional silicon-based transfer structure based on a photosensitive composite material according to claim 1, characterized in that: In step S3.2, the silicon-based back cavity structure is dry-etched to 79 microns; In step S3.5, a thermally conductive tape is used to adhere the exposed metal on the back side during the electroplating process of the front side structure.

5. The method for processing a three-dimensional silicon-based transfer structure based on a photosensitive composite material according to claim 1, characterized in that: The step S4 comprises: Step S4.1: spin-coating a dielectric layer as a back cavity mask layer on the BCB dielectric layer that has been mechanically polished on the front side of the silicon-based substrate; Step S4.2: using dielectric etching to cleanly etch the photosensitive medium BCB outside the back cavity mask layer; Step S4.3: spin coating and patterning a surface dielectric layer on the back cavity mask layer on the front side of the silicon-based substrate; Step S4.4: sputtering a top metal layer above the surface dielectric layer on the front side of the silicon-based substrate; Step S4.5: Spin-coating photoresist on the top metal layer and patterning; Step S4.6: electroplating the top metal layer and removing residual glue; Step S4.7: Ion beam etching is used to remove the top metal layer that has not been electroplated.

6. The method for processing a three-dimensional silicon-based transfer structure based on a photosensitive composite material according to claim 5, characterized in that: In the step S4.1, the size of the dielectric mask layer is 200 microns larger than the periphery of the back cavity structure; In step 4.2, after the dielectric etching, the height of the top dielectric mask layer is retained at 8 microns.

7. The method for processing a three-dimensional silicon-based transfer structure based on a photosensitive composite material according to claim 1, characterized in that: The step S5 comprises: Step S5.1: Spin-coating photoresist on the back of the silicon-based substrate and developing to prepare a mask; Step S5.2: using dry etching to complete bulk silicon etching and remove residual glue; Step S5.3: Slice the silicon-based substrate to complete the fabrication of the transfer structure.

8. The method for processing a three-dimensional silicon-based transfer structure based on a photosensitive composite material according to claim 1, characterized in that: The front protection film and the back protection film are both Si3N4 films; The dry etching is all inductively coupled plasma dry etching.

9. A device, characterized in that: The device is prepared by the three-dimensional silicon-based transition structure processing method based on photosensitive composite materials described in any one of claims 1 to 8.

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