Method and apparatus for converting high-resolution analog quantity using low-resolution DAC

Abstract

This application relates to a method and device for converting a high-resolution analog quantity using a low-resolution DAC. The method includes: obtaining a target resolution and a reference voltage; setting the number of output channels of the low-resolution DAC chip and the output resolution corresponding to each output channel according to the target resolution and the existing resolution of the low-resolution DAC chip; calculating an output code value according to the target resolution and the target output voltage; calculating the channel code value of each output channel and the channel voltage of each output channel according to the output code value and the number of output channels; splitting the parallel data according to the number of output channels, the output resolution, and the channel voltage to obtain a plurality of low-resolution data code values, which are sent to the DAC chip and output as the channel output voltage; processing the channel output voltage of each output channel to obtain a high-resolution stable constant voltage output of the target output voltage. This application can convert a high-resolution analog quantity using a low-resolution DAC chip.

Description

Technical Field

[0001] The present application relates to the technical field of digital-to-analog conversion, and particularly to a method and device for converting a high-resolution analog quantity by using a low-resolution DAC. Background Art

[0002] In current industrial automation control, industrial control signals are mainly divided into digital signal quantities and analog signal quantities. Analog quantity output, as the main means of device control, is widely used in various high-tech fields such as industrial control, high-speed rail and bullet trains, aerospace, wind power, hydropower, and nuclear power.

[0003] In most cases, the analog quantity output in the form of voltage will first generate a constant voltage output through a DAC chip, and other types of analog quantity outputs will convert the constant voltage output through some devices or customized circuits to obtain other forms of analog outputs such as current. Therefore, the voltage-type analog quantity output is a basis for various analog quantity outputs.

[0004] Due to the blockade of processes and technologies such as chips by foreign countries, most domestic DAC chips have a 12-bit output, while 16-bit or 24-bit DAC chips are generally used abroad.

[0005] Currently, if a positive / negative voltage analog quantity output function is designed using a DAC chip with a lower resolution, the resolution of the output voltage analog quantity is generally less than 12 bits, which is difficult to meet the design requirements and some occasions with high requirements for output accuracy. Summary of the Invention

[0006] Based on this, in view of the above technical problems, it is necessary to provide a method for converting a high-resolution analog quantity by using a low-resolution DAC, which can convert a high-resolution analog quantity by using a low-resolution DAC chip.

[0007] A method for converting a high-resolution analog quantity by using a low-resolution DAC includes:

[0008] Obtaining parallel data in digital quantity form and a reference voltage in analog quantity form; the parallel data includes a target resolution, and the reference voltage is used to define a target output voltage range;

[0009] According to the target resolution and the existing resolution of the low-resolution DAC chip, setting the number of output channels of the low-resolution DAC chip and the output resolution corresponding to each output channel; the output resolution is less than or equal to the existing resolution, and the sum of the output resolutions is greater than or equal to the target resolution;

[0010] Calculating an output code value according to the target resolution and the target output voltage; calculating a channel code value for each output channel according to the output code value and the number of output channels, and calculating a channel voltage for each output channel;

[0011] Split the parallel data according to the number of the output channels, the output resolution, and the channel voltage, to obtain a plurality of low-resolution data code values; the data code values are sent to a DAC chip for digital-to-analog conversion to generate an analog voltage, and the analog voltage is output as a channel output voltage through the corresponding output channel.

[0012] Process the channel output voltages of each output channel to obtain a high-resolution stable constant voltage output of the target output voltage.

[0013] In one embodiment, the output channels are a first channel and a second channel respectively, and the output resolution of the first channel is less than that of the second channel.

[0014] In one embodiment, calculating the output code value according to the target resolution and the target output voltage includes:

[0015] c = (1 << a) * (v - VL) / (VH - VL)

[0016] In the formula, c is the output code value, << is the left shift operator, a is the target resolution, v is the target output voltage, VL is the minimum value of the target output voltage, and VH is the maximum value of the target output voltage.

[0017] In one embodiment, calculating the channel code values of each output channel and calculating the channel voltages of each output channel according to the output code value and the number of the output channels includes:

[0018] Take the m bits of the output code value, calculate the channel code value of the first channel, and obtain the channel voltage of the first channel:

[0019] c11 = c & (((1 << m) - 1) << n)

[0020] c12 = ((c11 >> (n - 1)) + 1) << (m1 - m - 1)

[0021] V1 = VL + (VH - VL) * c12 / (1 << m1)

[0022] m1 ≥ m + 1

[0023] In the formula, c11 is the m bits of the output code value, & is the bitwise AND operator, m is the output resolution of the first channel, n is the output resolution of the second channel, c12 is the channel code value of the first channel, m1 is the channel resolution of the first channel, and V1 is the channel voltage of the first channel;

[0024] Take the n bits of the output code value, calculate the channel code value of the second channel, and obtain the channel voltage of the second channel:

[0025] c21 = c & ((1 << n) - 1)

[0026] c22 = (c21 << (n1 - n))

[0027] V2 = VL + (VH - VL) * c22 / (1 << n1)

[0028] n1 > n

[0029] Wherein, c21 is the n bits of the output code value, c22 is the channel code value of the second channel, n1 is the channel resolution of the second channel, and V2 is the channel voltage of the second channel.

[0030] In one embodiment, according to the output code value and the number of output channels, calculating the channel code values of each output channel, and calculating the channel voltages of each output channel further includes:

[0031] V = (VH - VL) / (1 << (m + 1))

[0032] c11 = c & (((1 << m) - 1) << n)

[0033] c12 = c11 >> (n - m1)

[0034] V1 = VL + (VH - VL) * c12 / (1 << m1)

[0035] m1 ≥ m

[0036] Wherein, V is the bias voltage value that the hardware needs to provide.

[0037] In one embodiment, the value ranges of the channel code values of the first channel and the second channel adopt the manner of 0 to ((1 << a) - 1).

[0038] In one embodiment, processing the channel output voltages of each output channel to obtain the high-resolution stable constant voltage output of the target output voltage includes:

[0039] The channel output voltages of each output channel are sequentially divided by a voltage division network, amplified and superimposed by an operational amplifier circuit, and buffered and regulated by a buffer circuit to obtain the high-resolution stable constant voltage output of the target output voltage.

[0040] In one embodiment, the number of DAC chips and the number of output channels of each DAC chip are both more than one.

[0041] A device for converting a low-resolution DAC to a high-resolution analog quantity includes:

[0042] An acquisition module, configured to acquire parallel data in digital quantity form and a reference voltage in analog quantity form; the parallel data includes a target resolution, and the reference voltage is used to define a target output voltage range;

[0043] A setting module, configured to set the number of output channels of a low-resolution DAC chip and the output resolution corresponding to each output channel according to the target resolution and the existing resolution of the low-resolution DAC chip; the output resolution is less than or equal to the existing resolution, and the sum of the output resolutions is greater than or equal to the target resolution;

[0044] A calculation module, configured to calculate an output code value according to the target resolution and the target output voltage; calculate a channel code value of each output channel according to the output code value and the number of output channels, and calculate a channel voltage of each output channel;

[0045] A splitting module, configured to split the parallel data according to the number of output channels, the output resolution, and the channel voltage to obtain a plurality of low-resolution digital quantity code values; the digital quantity code values are sent to a DAC chip for digital-to-analog conversion to generate an analog voltage, and are output as a channel output voltage through the corresponding output channel;

[0046] An output module, configured to process the channel output voltage of each output channel to obtain a high-resolution stable constant voltage output of the target output voltage.

[0047] The above method and device for converting a high-resolution analog quantity using a low-resolution DAC, by using the method of superimposing multiple channels of a low-resolution DAC chip and combining with a software algorithm, outputs a high-resolution analog quantity, realizes the conversion from a low resolution to a high-resolution analog quantity output, can achieve a resolution accuracy of 16 bits, 32 bits, 40 bits or even higher, solves the problem of insufficient resolution of analog quantity output, and further can produce a DAC chip with a higher resolution through the solidification of these circuits, which can, to a certain extent, break the foreign monopoly situation. The present application can be applied to a wide range of industrial precision control occasions such as PLC analog quantity output modules, pressure controllers, and air valve controllers. Description of the Drawings

[0048] Figure 1 It is a schematic flowchart of a method for converting a high-resolution analog quantity using a low-resolution DAC in an embodiment;

[0049] Figure 2 It is a circuit block diagram of a method for converting a high-resolution analog quantity using a low-resolution DAC in an embodiment;

[0050] Figure 3It is a structural block diagram of a device that uses a low-resolution DAC to convert high-resolution analog quantities in an embodiment. Detailed implementation manners

[0051] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0052] As Figure 1 shown, a method that uses a low-resolution DAC to convert high-resolution analog quantities provided by the present application, in one embodiment, includes the following steps:

[0053] Step 102: Obtain parallel data in digital quantity form and a reference voltage in analog quantity form; the parallel data includes the target resolution, and the reference voltage is used to define the target output voltage range.

[0054] The reference voltage is the positive and negative reference voltage ranges, which provide a basis and reference for the voltage output of the DAC chip. The DAC divides the range between the positive and negative reference voltages into 2 to the nth power parts, where n is the target resolution.

[0055] The target output voltage is the voltage value expected to be output, and it takes values within the above voltage range.

[0056] Step 104: Set the number of output channels of the low-resolution DAC chip and the output resolution corresponding to each output channel according to the target resolution and the existing resolution of the low-resolution DAC chip; the output resolution is less than or equal to the existing resolution, and the sum of the output resolutions is greater than or equal to the target resolution.

[0057] The target resolution refers to the final output resolution of using this method, the existing resolution refers to the maximum resolution that the low-resolution DAC chip can support for output, and the output resolution refers to the actual resolution that each output channel needs to output. Target resolution > existing resolution ≥ output resolution.

[0058] The present application does not limit the number of output channels and the output resolution corresponding to each output channel, and corresponding designs can be made according to specific situations (such as space, cost, etc.).

[0059] For example: The target resolution is 32 bits, the existing resolution is 8 bits, and the number of output channels can be set to 4, and the corresponding output resolution for each is 8 bits.

[0060] For another example: if the target resolution is 32 bits and the existing resolution is 24 bits, the number of output channels can be set to 4, and the corresponding output resolutions are all 8 bits; or the number of output channels can be set to 3, and the corresponding output resolutions are 16 bits, 8 bits, and 8 bits respectively; or the number of output channels can be set to 2, and the corresponding output resolutions are 24 bits and 8 bits respectively.

[0061] For another example: if the target resolution is 32 bits and the existing resolutions are 16 bits and 12 bits, the number of output channels can be set to 2, and the corresponding output resolutions are all 16 bits; or the number of output channels can be set to 3, and the corresponding output resolutions are 16 bits, 8 bits, and 8 bits respectively.

[0062] Step 106: Calculate the output code value according to the target resolution and the target output voltage; calculate the channel code values of each output channel according to the output code value and the number of output channels, and calculate the channel voltages of each output channel.

[0063] The output code value is the range of the digital quantity code value finally output, which is a high-resolution code value and has a linear relationship with the final output voltage. Its maximum and minimum values respectively correspond to the maximum and minimum values of the final output voltage, and the final output voltage is determined by the reference voltage. For example, for a 16-bit DAC with a reference voltage of ±10V (when using unsigned integer code values), when the input code value is 0, the output voltage at the output terminal is -10V, and when the input code value is 65535, the output is +10V, that is, the output code values 0 to 65535 correspond to -10V to +10V.

[0064] If the digital quantity received by the output code value is unsigned integer, the output range is all positive values; if the digital quantity received is signed integer, the output range has both positive and negative values; specifically, it can be determined according to the specification of the DAC chip. For example, for 16 bits, when using unsigned integer, the output code value range is 0 to 65535, and when using signed integer, the output code value range is -32767 to 32767.

[0065] The channel code value is the digital quantity output of each output channel, which is a low-resolution code value. Its value range can be in the form of 0 to ((1 << a) - 1), or in the form of -((1 << (a - 1)) - 1) to ((1 << (a - 1)) - 1).

[0066] The channel voltage is the theoretical value of the low-resolution output voltage of each output channel. Due to the existence of line resistance in the circuit, there is a slight difference from the actual value.

[0067] Step 108: Split the parallel data according to the number of output channels, the output resolution, and the channel voltage to obtain multiple low-resolution data code values; the data code values are sent to a DAC chip for digital-to-analog conversion to generate an analog voltage, which is output as a channel output voltage through the corresponding output channel.

[0068] The data code values are obtained by splitting the parallel data in digital quantity form, and the split is the significant digits in binary. For example, the 8-bit significant digits 0.12345678 are split into 4-bit significant digits 0.1234 and 4-bit significant digits 0.00005678. It should be noted that the split in the example is in decimal, but the splitting principle is the same as that of the parallel data.

[0069] Step 110: Process the channel output voltage of each output channel to obtain a high-resolution stable constant voltage output of the target output voltage.

[0070] The channel output voltage is the actual value of the low-resolution output voltage of each output channel.

[0071] The channel output voltage of each output channel is successively divided by a voltage division network, amplified and superimposed by an operational amplifier circuit, and buffered and regulated by a buffer circuit to obtain a high-resolution stable constant voltage output of the target output voltage.

[0072] The voltage of the high-resolution stable constant voltage output is the final output voltage.

[0073] The voltage division network is used to change the output voltage of each output channel. The operational amplifier circuit is used to convert multiple low-resolution analog quantities into a high-resolution analog quantity. The buffer circuit is used to isolate the DAC output current from the external load and is used for voltage regulated output to prevent the output voltage from changing with the external load.

[0074] It should be noted that each output channel is independent. At most one output channel does not require voltage division (when the reference voltage is consistent with the required output voltage range, one path does not require voltage division), and the other output channels all require voltage division processing.

[0075] In this embodiment, the number of DAC chips and the number of output channels of each DAC chip are both more than one.

[0076] That is to say, the number of DAC chips can be one or more than one; the number of output channels of each DAC chip can be one or more than one.

[0077] Since one DAC chip may have one or more output channels, when superimposing the output channels, the superimposed channels may be several channels under one chip or several channels between different chips.

[0078] The more output channels participate in superposition, the higher the resolution, the more precise the control of analog quantity, the finer the precision of refined operation, the better the functions and performance that can be achieved, the more situations that can be supported, and the wider the applicability.

[0079] The resolution of the DAC is the smallest unit it supports. For example, if the input voltage range is 0 to 10V and the resolution of the DAC module is 4 bits, 2 to the power of 4 = 16, then the smallest voltage level that the module can recognize is: 10 / 16 = 0.625V, that is, for every 1 increase in the digital quantity, the output analog voltage increases by 0.625V.

[0080] This application uses software to split a high-resolution digital quantity into multiple low-resolution digital quantities and output them to multiple channels for output. It uses a DAC chip for digital-to-analog conversion to convert the low-resolution digital quantity into a low-resolution analog quantity, and uses hardware to superpose analog voltages to convert multiple low-resolution analog voltages into a high-resolution analog voltage, so as to output the desired voltage; this application uses a low-resolution digital-to-analog conversion chip to convert a given high-resolution digital quantity into a high-resolution analog quantity, replacing the existing monopolistic high-resolution digital-to-analog conversion chips.

[0081] It should be understood that although Figure 1 the steps in the flowchart of Figure 1 are shown in sequence according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless there is a clear indication in this article, the execution of these steps has no strict order limit, and these steps can be executed in other orders. Moreover,

[0082] As Figure 2 shown, the maximum number of data bits D0 to Dn that the DAC chip can receive is the maximum resolution of the DAC. After the DAC receives the data, the software inputs it to multiple output channels according to different ratios according to the final analog voltage value to be output, and the allocation ratio depends on the final resolution to be output (i.e., the number of data bits). These output channels are superposed together to finally output the required analog voltage value.

[0083] The working process of this application is as follows: The MCU allocates a scheme, calculates the code values that need to be input for each output channel, and according to the reference voltage (analog quantity, including the target output voltage), splits the parallel data (digital quantity, including the target resolution) into multiple low-resolution digital quantities according to a dedicated logic (calculating the channel code values and channel voltages of each output channel based on the existing resolution, target resolution, and target output voltage of the DAC chip), and distributes them to the corresponding output channels of each DAC chip (the MCU communicates with the low-resolution DAC chip through the SPI bus). After receiving, the chip software outputs voltages to the corresponding output channels of the DAC chip according to its own resolution. The output voltage analog quantities between each output channel are divided by a voltage dividing network to a certain value, and then the voltage analog quantities of each path are superimposed through a precision operational amplifier. Finally, a precise high-resolution positive / negative voltage analog quantity is output through a buffer circuit.

[0084] The output resolutions of different output channels can be equal or unequal.

[0085] Preferably, there are two output channels, namely the first channel and the second channel, and the output resolution of the first channel is less than that of the second output channel, that is, the output resolutions of the two output channels are not equal. The superposition of multiple output channels can be transformed into performing the output superposition of two output channels multiple times.

[0086] In this embodiment, the value ranges of the channel code values of the first channel and the second channel adopt the method of 0 to ((1 << a) - 1), and the range of the target output voltage is VL to VH.

[0087] When a voltage v needs to be output, that is, the target output voltage is v, calculate the output code value according to the target resolution and the target output voltage:

[0088] c = (1 << a) * (v - VL) / (VH - VL)

[0089] In the formula, c is the output code value, << is the left shift operator, a is the target resolution, v is the target output voltage, VL is the minimum value of the target output voltage, and VH is the maximum value of the target output voltage.

[0090] Take the m bits of the output code value, calculate the channel code value of the first channel, and obtain the channel voltage of the first channel:

[0091] c11 = c & (((1 << m) - 1) << n)

[0092] c12 = ((c11 >> (n - 1)) + 1) << (m1 - m - 1)

[0093] V1 = VL + (VH - VL) * c12 / (1 << m1)

[0094] m1 ≥ m + 1

[0095] m + n = a

[0096] Wherein, c11 is the m-bit of the output code value, & is the bitwise AND operator, m is the output resolution of the first channel, n is the output resolution of the second channel, c12 is the channel code value of the first channel, m1 is the channel resolution of the first channel, and V1 is the channel voltage of the first channel;

[0097] Or, take the m-bit of the output code value, calculate the channel code value of the first channel, and obtain the channel voltage of the first channel:

[0098] V = (VH - VL) / (1 << (m + 1))

[0099] c11 = c & (((1 << m) - 1) << n)

[0100] c12 = c11 >> (n - m1)

[0101] V1 = VL + (VH - VL) * c12 / (1 << m1)

[0102] m1 ≥ m

[0103] m + n = a

[0104] Wherein, V is the bias voltage value that the hardware needs to provide.

[0105] That is to say, when m1 ≥ m + 1 or m1 ≥ m for the first channel, it can be satisfied. The difference is that when m1 ≥ m + 1, there is no bias voltage, and the bias is achieved by adjusting the code value; when m1 ≥ m, the hardware needs to provide an additional bias voltage, and the circuit bias is adopted, and the code value is not biased. When there is a bias voltage, it is equivalent to first superimposing the output of the first channel with the bias voltage, and then superimposing it with the second channel. The specific bias circuit can be obtained through the prior art.

[0106] Take the n-bit of the output code value, calculate the channel code value of the second channel, and obtain the channel voltage of the second channel:

[0107] c21 = c & ((1 << n) - 1)

[0108] c22 = (c21 << (n1 - n))

[0109] V2 = VL + (VH - VL) * c22 / (1 << n1)

[0110] n1 > n

[0111] Wherein, c21 is the n-bit of the output code value, c22 is the channel code value of the second channel, n1 is the channel resolution of the second channel, and V2 is the channel voltage of the second channel.

[0112] At the same time, a hardware voltage dividing circuit is used, and the voltage output is reduced to 1 / (1<<m) of the original output of Channel 2. For a specific hardware voltage dividing circuit, precision resistors can be used: for example, if it is required to output 1 / 16 of the original voltage, two precision resistors with a difference of 15 times can be directly used for voltage division (such as 15K and 1K), and the voltage across the small resistor can be output externally.

[0113] It should be noted that the m-bit is the high bit of the output code value, the n-bit is the low bit of the output code value, and the channel resolution of the first channel and the channel resolution of the second channel represent the resolution capabilities of the corresponding output channels, which are equal to the existing resolution of the chip.

[0114] After the first channel is voltage-divided, the voltage V1 is consistent with the output end of the DAC; after the second channel is voltage-divided and short-circuited, the voltage V2 = V1 / (1<<m)).

[0115] In a specific embodiment, the target resolution is 16 bits, the target output voltage is -10V to +10V, the existing resolution is 12 bits, and a 12-bit resolution DAC chip is used to achieve a 16-bit resolution -10 to +10V analog quantity output. Then, two channels can be used for superposition, where one channel outputs the voltage value corresponding to the high 4-bit resolution, and the other channel outputs the voltage value corresponding to the low 12-bit resolution.

[0116] 1. Calculate the output code value:

[0117] c = 65536*(v - (-10)) / (10 - (-10))

[0118] 2. Output of the first channel:

[0119] The high m-bit code value is:

[0120] c11 = c & (((1<<4)-1)<<12) = c & 0XF000

[0121] The channel code value of the first channel is:

[0122] (((val & 0XF000)>>4)+(1<<(12 - 1)))>>(12 - 12)

[0123] Simplify as follows:

[0124] (((val & 0XF000)>>4)+0x80)

[0125] It can be output by using a DAC output channel with a resolution higher than 4 bits. There are a total of 16 output values, and the output voltage range is -9.375 to 9.375V.

[0126] 3. Output of the second channel:

[0127] The low n-bit code value is:

[0128] c21 = c & ((1 << 12) - 1) = (c & 0xFFF)

[0129] Similarly, the channel code value of the second channel is obtained;

[0130] It can be output by using a DAC output channel with a resolution of 12 bits. There are a total of 4096 output values. A voltage dividing circuit is used synchronously, and the output is 1 / 16 of the original output. The output voltage range is -0.625 to 0.625V.

[0131] 4. The superposition result of the first channel and the second channel is as follows:

[0132] The outputs of the first channel and the second channel support 16 * 4096 cases, that is, 65536 output values, which is consistent with the 16-bit output.

[0133] The output voltage range of the first channel and the second channel is (-9.375 - 0.625) to (9.375 + 0.625), that is, -10 to +10V, which is consistent with the original output voltage range.

[0134] Such as Figure 3 As shown, in one embodiment, a device for converting a high-resolution analog quantity by using a low-resolution DAC provided by the present application includes: an acquisition module 302, a setting module 304, a calculation module 306, a splitting module 308, and an output module 310, where:

[0135] The acquisition module 302 is configured to acquire parallel data in digital quantity form and a reference voltage in analog quantity form; the parallel data includes a target resolution, and the reference voltage is used to define a target output voltage range;

[0136] The setting module 304 is configured to set the number of output channels of the low-resolution DAC chip and the corresponding output resolution of each output channel according to the target resolution and the existing resolution of the low-resolution DAC chip; the output resolution is less than or equal to the existing resolution, and the sum of the output resolutions is greater than or equal to the target resolution;

[0137] The calculation module 306 is configured to calculate an output code value according to the target resolution and the target output voltage; calculate the channel code value of each output channel according to the output code value and the number of output channels, and calculate the channel voltage of each output channel;

[0138] The splitting module 308 is configured to split the parallel data according to the number of the output channels, the output resolution, and the channel voltage, so as to obtain a plurality of low-resolution data code values; the digital quantity code values are sent to a DAC chip for digital-to-analog conversion to generate an analog voltage, and the analog voltage is output as a channel output voltage through the corresponding output channels;

[0139] The output module 310 is configured to process the channel output voltages of the respective output channels to obtain a high-resolution stable constant voltage output of the target output voltage.

[0140] In one embodiment, the setting module 304 is further configured such that the output channels are respectively a first channel and a second channel, and the output resolution of the first channel is less than the output resolution of the second channel.

[0141] In one embodiment, the calculation module 306 is further configured to calculate an output code value according to the target resolution and the target output voltage, including:

[0142] c = (1 << a) * (v - VL) / (VH - VL)

[0143] In the formula, c is the output code value, << is the left shift operator, a is the target resolution, v is the target output voltage, VL is the minimum value of the target output voltage, and VH is the maximum value of the target output voltage.

[0144] In one embodiment, the calculation module 306 is further configured to calculate channel code values of the respective output channels according to the output code value and the number of the output channels, and calculate channel voltages of the respective output channels, including:

[0145] Take m bits of the output code value, calculate the channel code value of the first channel, and obtain the channel voltage of the first channel:

[0146] c11 = c & (((1 << m) - 1) << n)

[0147] c12 = ((c11 >> (n - 1)) + 1) << (m1 - m - 1)

[0148] V1 = VL + (VH - VL) * c12 / (1 << m1)

[0149] m1 ≥ m + 1

[0150] m + n = a

[0151] In the formula, c11 is m bits of the output code value, & is the bitwise AND operator, m is the output resolution of the first channel, n is the output resolution of the second channel, c12 is the channel code value of the first channel, m1 is the channel resolution of the first channel, and V1 is the channel voltage of the first channel;

[0152] Take the n bits of the output code value, calculate the channel code value of the second channel, and obtain the channel voltage of the second channel:

[0153] c21 = c & ((1 << n) - 1)

[0154] c22 = (c21 << (n1 - n))

[0155] V2 = VL + (VH - VL) * c22 / (1 << n1)

[0156] n1 > n

[0157] Wherein, c21 is the n bits of the output code value, c22 is the channel code value of the second channel, n1 is the channel resolution of the second channel, and V2 is the channel voltage of the second channel.

[0158] In one embodiment, the calculation module 306 is further configured to calculate the channel code values of each output channel according to the output code value and the number of output channels, and calculating the channel voltages of each output channel further includes:

[0159] V = (VH - VL) / (1 << (m + 1))

[0160] c11 = c & (((1 << m) - 1) << n)

[0161] c12 = c11 >> (n - m1)

[0162] V1 = VL + (VH - VL) * c12 / (1 << m1)

[0163] m1 ≥ m

[0164] m + n = a

[0165] Wherein, V is the bias voltage value that the hardware needs to provide.

[0166] In one embodiment, the calculation module 306 is further configured to use the range of the channel code value of the first channel and the channel code value of the second channel in the manner of 0 to ((1 << a) - 1).

[0167] In one embodiment, the output module 310 is further configured to process the channel output voltages of each output channel to obtain a high-resolution stable constant voltage output of the target output voltage, including:

[0168] The channel output voltages of each output channel are sequentially divided by a voltage dividing network, amplified and superimposed by an operational amplifier circuit, and buffered and regulated by a buffer circuit to obtain a high-resolution stable constant voltage output of the target output voltage.

[0169] In one embodiment, the setting module 304 is further configured such that the number of DAC chips and the number of output channels of each DAC chip are both more than one.

[0170] For the specific limitations on the device for converting high-resolution analog quantities using a low-resolution DAC, reference may be made to the limitations on the method for converting high-resolution analog quantities using a low-resolution DAC in the foregoing text, which will not be elaborated here. Each module in the above device can be implemented in whole or in part by software, hardware, and their combination. The above modules can be embedded in the processor of the computer device in hardware form or be independent of it, or can be stored in the memory of the computer device in software form, so as to facilitate the processor to call and execute the operations corresponding to the above respective modules.

[0171] The technical features of the above embodiments can be combined arbitrarily. For the sake of concise description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this specification.

[0172] The above-described embodiments merely represent several implementation manners of the present application. Their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the appended claims.

Claims

1. A method for converting a high-resolution analog quantity using a low-resolution DAC, characterized in that, Including: Obtaining parallel data in digital quantity form and a reference voltage in analog quantity form; the parallel data includes a target resolution a, and the reference voltage is used to define a target output voltage range [VL, VH]; Setting the number of output channels of a low-resolution DAC chip and the corresponding output resolution of each output channel according to the target resolution and the existing resolution of the low-resolution DAC chip; The output resolution is less than or equal to the existing resolution, and the sum of the output resolutions is greater than or equal to the target resolution; Calculating an output code value according to the target resolution and the target output voltage; Calculating the channel code values of each output channel according to the output code value and the number of output channels, and calculating the channel voltages of each output channel; Calculating the channel code values of each output channel according to the output code value and the number of output channels, and calculating the channel voltages of each output channel includes: Taking m bits of the output code value, calculating the channel code value of the first channel, and obtaining the channel voltage of the first channel: ； ； ； ； ； Where c11 is m bits of the output code value, & is the bitwise AND operator, m is the output resolution of the first channel, n is the output resolution of the second channel, c12 is the channel code value of the first channel, m1 is the channel resolution of the first channel, and V1 is the channel voltage of the first channel; Taking n bits of the output code value, calculating the channel code value of the second channel, and obtaining the channel voltage of the second channel: ； ； ； ； Where c21 is n bits of the output code value, c22 is the channel code value of the second channel, n1 is the channel resolution of the second channel, and V2 is the channel voltage of the second channel; The output resolution refers to the actual resolution that each output channel needs to output; the channel resolution represents the resolution ability of the corresponding output channel and is equal to the existing resolution of the chip; Splitting the parallel data according to the number of output channels, the output resolution, and the channel voltage to obtain a plurality of low-resolution data code values; the data code values are sent to a DAC chip for digital-to-analog conversion to generate an analog voltage, which is output as a channel output voltage through the corresponding output channel; Processing the channel output voltages of each output channel to obtain a high-resolution stable constant voltage output of the target output voltage.

2. The method according to claim 1, wherein The output channels are respectively the first channel and the second channel, and the output resolution of the first channel is less than the output resolution of the second channel.

3. The method according to claim 2, wherein Calculating the output code value according to the target resolution and the target output voltage includes: ； Where c is the output code value, << is the left shift operator, a is the target resolution, v is the target output voltage, VL is the minimum value of the target output voltage, and VH is the maximum value of the target output voltage.

4. The method according to claim 3, characterized in that Calculating the channel code values of each output channel according to the output code value and the number of output channels, and calculating the channel voltages of each output channel further includes: ； ； ； ； ； ； Where V is the bias voltage value that the hardware needs to provide.

5. The method according to any one of claims 2 to 4, characterized in that The value ranges of the channel code values of the first channel and the second channel adopt the method of 0~((1<<a)-1), where a is the target resolution.

6. The method according to any one of claims 1 to 4, characterized in that Processing the channel output voltages of each output channel to obtain a high-resolution stable constant voltage output of the target output voltage includes: The channel output voltages of each output channel are successively divided by a voltage division network, amplified and superimposed by an operational amplifier circuit, and buffered and regulated by a buffer circuit to obtain a high-resolution stable constant voltage output of the target output voltage.

7. The method according to any one of claims 1 to 4, characterized in that The number of DAC chips and the number of output channels of each DAC chip are both more than one.

8. A device for converting a high-resolution analog quantity using a low-resolution DAC, characterized in that, Including: An acquisition module for acquiring parallel data in digital quantity form and a reference voltage in analog quantity form; the parallel data includes a target resolution, and the reference voltage is used to define the target output voltage range; A setting module for setting the number of output channels of the low-resolution DAC chip and the corresponding output resolution of each output channel according to the target resolution and the existing resolution of the low-resolution DAC chip; The output resolution is less than or equal to the existing resolution, and the sum of the output resolutions is greater than or equal to the target resolution; A calculation module for calculating an output code value according to the target resolution and the target output voltage; Calculating the channel code values of each output channel according to the output code value and the number of output channels, and calculating the channel voltages of each output channel; Calculating the channel code values of each output channel according to the output code value and the number of output channels, and calculating the channel voltages of each output channel includes: Taking the m bits of the output code value, calculating the channel code value of the first channel, and obtaining the channel voltage of the first channel: ； ； ； ； ； Where c11 is the m bits of the output code value, & is the bitwise AND operator, m is the output resolution of the first channel, n is the output resolution of the second channel, c12 is the channel code value of the first channel, m1 is the channel resolution of the first channel, and V1 is the channel voltage of the first channel; Taking the n bits of the output code value, calculating the channel code value of the second channel, and obtaining the channel voltage of the second channel: ； ； ； ； Where c21 is the n bits of the output code value, c22 is the channel code value of the second channel, n1 is the channel resolution of the second channel, and V2 is the channel voltage of the second channel; The output resolution refers to the actual resolution that each output channel needs to output; the channel resolution represents the resolution ability of the corresponding output channel and is equal to the existing resolution of the chip; A splitting module for splitting the parallel data according to the number of output channels, the output resolution, and the channel voltage to obtain a plurality of low-resolution digital quantity code values; the digital quantity code values are sent to a DAC chip for digital-to-analog conversion to generate an analog voltage, which is output as a channel output voltage through the corresponding output channel; An output module for processing the channel output voltages of each output channel to obtain a high-resolution stable constant voltage output of the target output voltage.

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