Method for manufacturing a semiconductor light emitting element

Abstract

The present disclosure relates to a method of manufacturing a light emitting device, including the steps of: providing a growth substrate on which a first semiconductor region, an active region, and a second semiconductor region are sequentially formed; bonding a first light-transmissive substrate to the second semiconductor region side; removing the growth substrate from the first semiconductor region side; attaching a second light-transmissive substrate to the first semiconductor region side from which the growth substrate is removed, using an adhesive layer; laser ablation of the first light-transmissive substrate from the second semiconductor region side; exposing a portion of the first semiconductor region; and forming a flip-chip first electrode and a flip-chip second electrode on the exposed first semiconductor region and the second semiconductor region, respectively.

Description

Technical Field

[0001] This disclosure relates generally to semiconductor light-emitting devices and methods for manufacturing them, and more particularly to semiconductor light-emitting devices (e.g., mini LEDs (with a width of about 100 μm (less than 300 μm)) and methods for manufacturing micro LEDs (with a width less than 100 μm)) used in mini-LED displays or micro-LED displays. Unlike conventional LED white-light LCDs, micro-LED displays do not use semiconductor light-emitting devices to emit white light; instead, they are used for direct light emission, similar to OLED displays. Here, a semiconductor light-emitting device refers to a semiconductor light-emitting device that generates light through the recombination of electrons and holes, such as AlGaInN-based semiconductor light-emitting devices that emit ultraviolet light, blue light, and green light, and AlGaInP(As)-based semiconductor light-emitting devices that emit red light. Background Technology

[0002] Background information related to this disclosure is provided herein, but this does not necessarily imply prior art.

[0003] Figure 1 The figure shows an example of a semiconductor light-emitting structure disclosed in U.S. Patent Publication No. US2019 / 0067255. The semiconductor light-emitting structure includes a first semiconductor light-emitting element (101; e.g., a red LED flip chip), a second semiconductor light-emitting element (103; e.g., a blue LED flip chip), a third semiconductor light-emitting element (105; e.g., a green LED flip chip), and a wiring substrate 107 on which the three semiconductor light-emitting elements (101, 103, 105) are placed.

[0004] Figure 2 This refers to an example of a semiconductor light-emitting element disclosed in U.S. Patent Publication No. US2019 / 0067525. Figure 1The figure shows an example of a semiconductor light-emitting element used in a semiconductor light-emitting structure disclosed herein. The semiconductor light-emitting element includes a P-type GaP window layer 104, a P-type confinement layer 106, an MQW active region 108, an N-type confinement layer 110, and an N-type current diffusion layer 112. Furthermore, the semiconductor light-emitting element has a metal reflective layer 164, an N-side electrode 182, and a P-side electrode 180 on the side where the growth substrate is removed. On the opposite side, the semiconductor light-emitting element has a P-type current diffusion layer (118; for example, ITO), a transparent adhesive layer 130, and a transparent support substrate 102. With this structure, the semiconductor light-emitting element emits light of a red wavelength. However, when an N-type AlGaInP(As)-based semiconductor layer is disposed on the side where electrodes 180 and 182 are located—that is, the side where the lead electrodes, wiring, and even the wiring substrate are bonded to the flip chip (so-called N-sideup flip chip)—particularly, as the chip size is miniaturized, it becomes difficult to perform the MESA etching process and electrical connection process that removes the relatively thick N-type semiconductor regions 110 and 112 and the MQW active region 108 in order to inject current from the P-side electrode 180 into the P-type semiconductor regions 104 and 106. Furthermore, excessive heat is generated in the N-type semiconductor regions 110 and 112 due to uneven current flow. As a solution to this problem, the use of P-sideup flip chips can be considered, and two solutions have been proposed previously.

[0005] Figure 3 This diagram illustrates an example of a semiconductor light-emitting element disclosed in U.S. Patent Publication No. 5,376,580. The semiconductor light-emitting element includes a P-type GaAs growth substrate 14, a P-type semiconductor region (11; e.g., AlGaAs), an active region 12, and an N-type semiconductor region (13; e.g., AlGaAs). In a semiconductor light-emitting element with this configuration (in which the P-type semiconductor region 11 grows first during epitaxial growth), light is emitted by... Figure 2 The electrode formation process shown can be used to fabricate so-called P-sideup flip chips. However, whether it is an AlGaInN-based semiconductor light-emitting element or an AlGaInP(As)-based semiconductor light-emitting element, if the P-type semiconductor region 11 grows before the N-type semiconductor region 13 before the active region 12 is grown, the surface becomes rough. During the growth of the active region 12, the deterioration of the film quality of the active region 12 leads to a decrease in electrical / optical properties. Therefore, it is difficult to find commonly used semiconductor light-emitting elements that allow the P-type semiconductor region 11 to grow first during the epitaxial growth process.

[0006] Figures 4 to 7 To illustrate an example of a method for manufacturing a semiconductor light-emitting element disclosed in U.S. Patent Publication No. 7,067,340, firstly, as shown in the figure... Figure 4As shown, an N-type semiconductor region 302, an active region 304, and a P-type semiconductor region 306 are sequentially grown on a growth substrate (300; e.g., a GaAs substrate). Then, a temporary substrate (310; e.g., glass, silicon, ceramic, Al2O3) is attached to the P-type semiconductor region 306 using a flexible and transparent adhesive layer (308; e.g., BCB (bisbenzocyclobutene), polyimide, glass, epoxy resin). Next, as... Figure 5 As shown, the growth substrate 300 is removed by using the temporary substrate 310 as a support substrate. Next, as... Figure 6 As shown, a transparent substrate (314; for example, a transparent substrate (sapphire, glass, SiC)) is attached to the N-type semiconductor region 302 of the removed growth substrate 300 using a flexible and transparent adhesive layer (312); then the flexible and transparent adhesive layer 308 and the temporary substrate 310 are removed. Finally, as... Figure 7 As shown, a portion of the P-type semiconductor region 306 and the active region 304 are removed by etching. Then, N-side electrodes 316, 318, and 320 and P-side electrodes 316, 318, and 322 are formed in the N-type semiconductor region 302 and the P-type semiconductor region 306, respectively, to fabricate a semiconductor light-emitting element. Electrode 316 is a metal reflective layer (e.g., Au, Al, Ag, Ag alloy), electrode 318 is a barrier layer (e.g., Ni, W, TiN, WN, Pt, ZnO, ITO), and electrodes 320 and 322 are bonding pad layers (e.g., Au, Al). Figures 4 to 7 The semiconductor light-emitting element shown is Figure 3The semiconductor light-emitting elements shown differ in that they are manufactured as P-sideup flip chips through a chip process, rather than through an epitaxial growth process. However, in the attachment of the temporary substrate 310 and the light-transmitting substrate 314, the same flexible and transparent adhesive layers 308 and 312 are used as the attachment material. Therefore, during the attachment of the light-transmitting substrate 314, deformation of the flexible and transparent adhesive layer 308 and local voids in the bonding interface may occur. In addition, during the removal of the temporary substrate 310 and the flexible and transparent adhesive layer 308, the flexible and transparent adhesive layer 312 may be damaged. Therefore, improvements are needed. Furthermore, the growth substrate (300; for example, GaAs substrate) on which the N-type semiconductor region 302, the active region 304, and the P-type semiconductor region 306 are grown sequentially suffers from severe wafer bending due to the pressure caused by the difference in lattice constant and coefficient of thermal expansion (CTE) between the growth substrate 300 and the grown materials 302, 304, and 306. When the growth substrate 300, which is under such strong pressure, is attached to the temporary substrate 310 using a flexible and transparent adhesive layer 308, damage, especially substrate breakage and microcracks, repeatedly occur during the process due to the weak bonding strength of the flexible and transparent adhesive layer 308 and voids that occur in the local bonding interface.

[0007] Figure 12This diagram illustrates an example of a semiconductor light-emitting element disclosed in U.S. Patent No. 7,262,436. The semiconductor light-emitting element includes a growth substrate 100, a first semiconductor region (300; e.g., an n-type semiconductor region) grown on the growth substrate 100, an active region 400 grown on the first semiconductor region 300, a second semiconductor region (500; e.g., a p-type semiconductor region) grown on the active region 400, electrodes 901, 902, and 903 formed on the second semiconductor region 500 as a reflective film, and an electrode 800 formed on the first semiconductor region 300 exposed by etching. The first semiconductor region 300 and the second semiconductor region 500 may have opposite conductivity. Preferably, a buffer region (not shown) is provided between the growth substrate 100 and the first semiconductor region 300. A chip with such a structure, where electrodes 901, 902, 903 and electrode 800 are formed on the opposite side of the growth substrate 100, and where electrodes 901, 902, and 903 are used as reflective films, is called a flip chip. Electrodes 901, 902, and 903 are composed of a high-reflectivity electrode (901; e.g., Ag), a bonding electrode (903; e.g., Au), and an electrode (902; e.g., Ni) to prevent diffusion between the materials of electrode 901 and electrode (903). This metal reflective film structure has high reflectivity, which is beneficial for current diffusion. However, instead of using the growth substrate 100 side, electrodes 901, 902, 903, and electrode 800 are used for bonding. Therefore, due to the height difference between electrodes 901, 902, 903 and electrode 800, a structural tilt (height difference) occurs on the flip chip during bonding.

[0008] Figure 13 This diagram illustrates an example of a semiconductor light-emitting element disclosed in U.S. Patent No. 9,466,768. The semiconductor light-emitting element includes a growth substrate 100, a buffer region 200 grown on the growth substrate 100, a first semiconductor region 300 grown on the buffer region 200, an active region 400 grown on the first semiconductor region 300 and generating light through the recombination of electrons and holes, and a second semiconductor region 500 grown on the active region 400. The growth substrate 100 is primarily made of sapphire, SiC, Si, GaN, etc., and is eventually removed; the buffer region 200 can be omitted. The positions of the first semiconductor region 300 and the second semiconductor region 500 are interchangeable. The group III nitride semiconductor light-emitting element is primarily composed of GaN. Each semiconductor layer 200, 300, 400, and 500 is composed of multiple layers, and additional layers may also be added. On the other hand, compared with… Figure 12 In contrast, instead of electrodes 901, 902, and 903 used as reflective films, a non-conductive reflective film 910 may be provided. The non-conductive reflective film 910 consists of a single-layer electrolyte film (e.g., SiO₂).x TiO x It is constructed using a multilayer electrolyte membrane (e.g., Ta2O5, MgF2), a DBR reflective membrane (e.g., SiO2 / TiO2), or a combination thereof. Electrodes 920 and 930 and electrodes 800 and 810 are provided for supplying current. An electrical connector 940 is formed through the non-conductive reflective membrane 910 to connect electrodes 920 and 930. Branch electrodes 810 and 930 are provided for current diffusion in the first semiconductor region 300 and the second semiconductor region 500. A light-transmitting conductive film (600; e.g., ITO, TCO) is formed to facilitate current diffusion in the second semiconductor region 500. However, in this structure, there is also a structural tilt (height difference) between electrodes 920 and 800. Unspecified symbol 950 is a current blocking layer (CBL).

[0009] Figure 14 This diagram illustrates an example of a semiconductor light-emitting element disclosed in Japanese Patent Publication No. 2006-120913. The semiconductor light-emitting element includes a growth substrate 100, a buffer region 200 grown on the growth substrate 100, a first semiconductor region 300 grown on the buffer region 200, an active region 400 grown on the first semiconductor region 300, a second semiconductor region 500 grown on the active region 400, a light-transmitting conductive film (600; e.g., ITO, TCO) grown on the second semiconductor region 500 and performing current diffusion, an electrode 700 formed on the light-transmitting conductive film 600, and an electrode 800 formed on the first semiconductor region 300 exposed by etching. Furthermore, a distributed Bragg reflector (900; DBR) and a metal reflective film 904 are provided on the light-transmitting conductive film 600. The height of the electrode 800 is formed corresponding to the height of the electrode 700, thus eliminating structural tilt (height difference) of the flip chip during bonding. However, electrodes 700 and 800 need to be formed separately.

[0010] Figure 15 This is a diagram illustrating an example of a semiconductor light-emitting element disclosed in U.S. Patent Publication No. 9,748,446, as shown. Figure 2As shown, the semiconductor light-emitting element includes a growth substrate 100, a buffer region 200, a first semiconductor region 300, an active region 400, a second semiconductor region 500, a light-transmitting conductive film 600, a non-conductive reflective film 910, electrodes 920, 930, 940, electrodes 800, 810, and a current blocking layer 950. However, in order to reduce the structural tilt (height difference) between electrodes 800 and 920, electrode 800 is formed on the non-conductive reflective film 920, and an electrical connection 820 penetrating the non-conductive reflective film 910 is used for the electrical connection between the branch electrode 810 and electrode 800.

[0011] Furthermore, Japanese Patent Publication No. S55-009442 and others show that a semiconductor layer is etched to form a via, an N-side electrode is formed thereon, and the height difference between the N-side electrode and the P-side electrode is removed.

[0012] Figure 16 This diagram illustrates an example of a semiconductor light-emitting element disclosed in U.S. Patent Publication No. 9,236,524, which discloses a structure that, in addition to the non-conductive reflective film 910, possesses the same... Figure 15 This is a semiconductor light-emitting element with the same structure as disclosed in the paper. The non-conductive reflective film 910, in addition to the electrolyte films 910d and 910e forming the DBR, also possesses a thicker electrolyte film 910c to eliminate the structural tilt (height difference) between the electrodes 800 and 920. On the other hand, unlike the electrolyte films 910d and 910e formed by physical vapor deposition (PVD) for the DBR, a technique is disclosed in which a thicker electrolyte film 910c is formed by chemical vapor deposition (CVD), thereby improving step coverage and forming a stable non-conductive reflective film 910 overall.

[0013] Figure 29 This diagram illustrates an example of a semiconductor light-emitting element to a semiconductor light-emitting element display disclosed in U.S. Patent Publication No. 2017-0323873. The semiconductor light-emitting element 100f includes a substrate 10f serving as an external power supply unit and an epitaxial structure 120e. The epitaxial structure 120e is moved onto the substrate 10f via a carrier 110 having an adhesive 130. A thin film transistor (TFT) structure 16f is formed on the substrate 10f, and the TFT structure 16f is a means of driving the epitaxial structure 120e. Electrodes 142e and 144e, serving as bonding pads, are provided on the epitaxial structure 120e, and the electrodes 142e and 144e are physically and electrically bonded to circuit electrodes 12f provided on the TFT structure 16f.

[0014] Figure 30 This figure illustrates an example of a micro-LED display device disclosed in Korean Patent Publication No. 10-2019-0078945. The micro-LED display device includes a substrate 110 and micro-LEDs 140. TFTs 101, 103, 105, and 107 are formed on the substrate (110; for example, glass). Each TFT includes a gate electrode 101, a semiconductor layer 103, a source electrode 105, and a drain electrode 107. An insulating layer 112 is provided between the gate electrode 101 and the electrodes 105 and 107. The semiconductor layer 103 is made of amorphous semiconductors such as amorphous silicon, polycrystalline silicon such as LTPS, or oxide semiconductors such as IGZO (Indium Gallium Zinc Oxide), TiO2, ZnO, WO3, and SnO2. When the semiconductor layer 103 is formed of an oxide semiconductor, the size of the thin-film transistor TFT can be reduced, the driving power can be reduced, and the electromobility can be improved.

[0015] After forming TFTs 101, 103, 105, and 107 on substrate 110, an insulating layer 114 is formed. Micro-LEDs 140 are then transferred onto this layer, followed by the formation of a new insulating layer 116. Holes 114a, 114b, 116a, and 116b are then formed. The drain electrode 107 and p-side electrode 141 are connected via connecting electrode 117a, and the n-type electrode 143 and electrode 109 are connected via connecting electrode 117b. Finally, an insulating layer 118 is formed. When the gate electrode 101 is turned on, the semiconductor layer 103 is activated, connecting the source electrode 105 and drain electrode 107, supplying current to the micro-LED 140 to emit light. Electrode 152 (not specified) provides an operation signal to the gate electrode 101, and the current through the micro-LED 140 flows through electrode 109.

[0016] As mentioned above, a display combining TFTs and mini-LEDs or micro-LEDs has been proposed, and a technique for improving electromobility by using oxide semiconductors as TFTs has been disclosed. Figure 29 and Figure 30 In the disclosed technology, the TFT is disposed on the substrate 10f and 110 sides, which causes many problems when applied to display devices that utilize extremely small pixels, such as microLEDs. Summary of the Invention

[0017] Technical issues

[0018] This will be described in the back end of the 'Detailed Implementation' section.

[0019] Methods for solving problems

[0020] This section provides a general summary of the disclosure and is not a comprehensive disclosure of its full scope or all of its features.

[0021] One aspect of this disclosure relates to a method for manufacturing a flip chip, i.e., a semiconductor light-emitting element, comprising the following steps: providing a growth substrate having a first semiconductor region having an N-type structure, an active region that generates light through recombination of electrons and holes, and a second semiconductor region having a P-type structure sequentially formed; bonding a first light-transmitting substrate to the second semiconductor region side; removing the growth substrate from the first semiconductor region side; attaching a second light-transmitting substrate to the first semiconductor region side where the growth substrate has been removed using an adhesive layer; performing laser ablation on the first light-transmitting substrate from the second semiconductor region side; removing a portion of the second semiconductor region and the active region to expose a portion of the first semiconductor region; and forming a first electrode and a second electrode of the flip chip on the exposed first semiconductor region and the second semiconductor region, respectively.

[0022] According to another aspect of the present disclosure, a semiconductor light-emitting element includes: a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region located between the first semiconductor region and the second semiconductor region, generating light by recombination of electrons and holes; a first electrode located in the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, electrically connected to the first semiconductor region, and serving as a flip-chip bonding pad; and a second electrode located in other first semiconductor regions exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, sandwiched by an insulating layer and insulated from the first semiconductor region, electrically connected to the second semiconductor region, and serving as a flip-chip bonding pad.

[0023] According to another aspect of the present disclosure, a semiconductor light-emitting element is provided, comprising: a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region located between the first semiconductor region and the second semiconductor region, generating light by recombination of electrons and holes; a first electrode located in the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, electrically connected to the first semiconductor region, and used as a flip-chip bonding pad; and a second electrode electrically connected to the second semiconductor region and used as a flip-chip bonding pad, wherein the first electrode is connected to a non-light-emitting region, i.e., the second semiconductor region.

[0024] According to another aspect of the present disclosure, a semiconductor light-emitting element is provided, comprising: a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region located between the first semiconductor region and the second semiconductor region, generating light by recombination of electrons and holes; a first electrode electrically connected to the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, and serving as a flip-chip bonding pad; a second electrode electrically connected to the second semiconductor region and serving as a flip-chip bonding pad; and an insulating layer filling the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, and located below the first electrode and the second electrode.

[0025] According to another aspect of the present disclosure, a semiconductor light-emitting element is provided, comprising: a light-transmitting substrate; a semiconductor light-emitting element chip having a first semiconductor region having a first conductivity, an active region generating light by recombination of electrons and holes, and a second semiconductor region having a second conductivity different from the first conductivity, the semiconductor light-emitting element chip being a first semiconductor light-emitting element chip having a first electrode electrically connected to the first semiconductor region and a second electrode electrically connected to the second semiconductor region; an adhesive layer bonding the light-transmitting substrate and the first semiconductor region side of the first semiconductor light-emitting element chip; and a passivation layer at least covering the first semiconductor light-emitting element chip and the adhesive layer.

[0026] According to another aspect of the present disclosure, a semiconductor light-emitting element is provided, comprising: a light-transmitting substrate; a semiconductor light-emitting element chip having a first semiconductor region having a first conductivity, an active region generating light by recombination of electrons and holes, and a second semiconductor region having a second conductivity different from the first conductivity, the semiconductor light-emitting element chip being a first semiconductor light-emitting element chip having a first electrode electrically connected to the first semiconductor region and a second electrode electrically connected to the second semiconductor region, and being a window for emitting light from the light-transmitting substrate; and a first thin-film transistor controlling the light emission of the first semiconductor light-emitting element chip and being deposited onto the light-transmitting substrate.

[0027] According to another aspect of the present disclosure, a semiconductor light-emitting element is provided, comprising: a light-transmitting substrate having a first surface and a second surface opposite to the first surface; a semiconductor light-emitting element chip having a first semiconductor region having a first conductivity, an active region generating light by recombination of electrons and holes, and a second semiconductor region having a second conductivity different from the first conductivity, and having a first electrode electrically connected to the first semiconductor region and a second electrode electrically connected to the second semiconductor region, wherein the semiconductor light-emitting element chip is formed on the first surface of the light-transmitting substrate and serves as a window for emitting light generated in the active region on the second surface of the light-transmitting substrate; and a black matrix material disposed on at least one of the first and second surfaces.

[0028] According to another aspect of the present disclosure, a method for manufacturing a semiconductor light-emitting element is provided, comprising the following steps: preparing three semiconductor light-emitting element chips, each of the three semiconductor light-emitting element chips having an n-type semiconductor region, a p-type second semiconductor region, and an active region between the n-type semiconductor region and the p-type semiconductor region, which generates light by recombination of electrons and holes; and bonding the three semiconductor light-emitting element chips to a light-transmitting substrate having an adhesive layer, wherein the n-type semiconductor region of each of the three semiconductor light-emitting element chips is located on the adhesive layer side.

[0029] According to another aspect of the present disclosure, a method for manufacturing a semiconductor light-emitting element is provided, comprising the following steps: preparing a plurality of semiconductor light-emitting element chips, each of the plurality of semiconductor light-emitting element chips including an n-type semiconductor region, a p-type semiconductor region, an active region between the n-type semiconductor region and the p-type semiconductor region and generating light by recombination of electrons and holes, and a light-transmitting substrate on which the n-type semiconductor region, the active region and the p-type semiconductor region are placed, wherein at least one of the plurality of semiconductor light-emitting element chips is coupled to the light-transmitting substrate after the n-type semiconductor region, the active region and the p-type semiconductor region are grown; the plurality of semiconductor light-emitting element chips are coupled to a first substrate; and the light-transmitting substrate of each of the plurality of semiconductor light-emitting element chips is removed by laser ablation.

[0030] According to another aspect of the present disclosure, a method for manufacturing a micro-LED display having multiple pixels is provided, comprising the following steps: preparing multiple semiconductor light-emitting elements, each of the multiple semiconductor light-emitting elements having an n-type semiconductor region, a p-type semiconductor region, an active region between the n-type semiconductor region and the p-type semiconductor region and generating light by recombination of electrons and holes, a first electrode and a second electrode serving as bonding pads and respectively electrically connected to the n-type semiconductor region and the p-type semiconductor region, and a substrate for placing the n-type semiconductor region, the active region and the p-type semiconductor region; and placing the multiple semiconductor light-emitting elements in one of the multiple pixels.

[0031] According to another aspect of the present disclosure, a method for transferring multiple semiconductor light-emitting element chips is provided, wherein multiple first semiconductor light-emitting element chips emitting a first color and multiple second semiconductor light-emitting element chips emitting a second color different from the first color are alternately arranged and transferred to a transfer receiving substrate, comprising the following steps: preparing a first carrier on which multiple first semiconductor light-emitting element chips emitting the first color are attached by a laser reactive material; irradiating the transfer receiving substrate with a mask having a posture and position for supporting multiple first semiconductor light-emitting element chips to transfer the multiple first semiconductor light-emitting element chips from the first carrier to the transfer receiving substrate; preparing a second carrier on which multiple second semiconductor light-emitting element chips emitting a second color different from the first color are attached by a laser reactive material; and irradiating the transfer receiving substrate with a mask having a posture and position for supporting multiple second semiconductor light-emitting element chips to transfer the multiple second semiconductor light-emitting element chips from the second carrier to the transfer receiving substrate.

[0032] According to another aspect of the present disclosure, a semiconductor light-emitting element structure is provided, comprising: a transfer receiving substrate having an adhesive layer and a semiconductor light-emitting element being positioned by a mask; the semiconductor light-emitting element being attached to the adhesive layer while its position is fixed by the mask, the transfer receiving substrate being a light-transmitting substrate, and the adhesive layer being composed of a material that can be detached and reattached by transferring the semiconductor light-emitting element by laser irradiation.

[0033] According to another aspect of the present disclosure, a method for manufacturing a semiconductor light-emitting element is provided, comprising the following steps: sequentially growing an n-type semiconductor region, an active region, and a p-type semiconductor region on a growth substrate; bending the growth substrate in an upwardly protruding manner after growth; bonding a first support substrate to the p-type semiconductor region side using one of a metal bonding agent and an organic adhesive; removing the growth substrate; bonding a second support substrate to the n-type semiconductor region side after the growth substrate has been removed using direct wafer bonding; and removing the first support substrate.

[0034] According to another aspect of the present disclosure, a semiconductor light-emitting element is provided, comprising: a light-transmitting substrate; a light-transmitting adhesive layer disposed on the light-transmitting substrate and composed of an inorganic material; an n-type semiconductor region disposed on the light-transmitting adhesive layer; an active region disposed on the n-type semiconductor region; and a p-type semiconductor region disposed on the active region.

[0035] According to another aspect of the present disclosure, a method for manufacturing a semiconductor light-emitting element is provided, comprising the following steps: preparing a plurality of semiconductor light-emitting element wafers, each having a substrate, an n-type semiconductor region, an active region, and a p-type semiconductor region sequentially; bonding the plurality of semiconductor light-emitting element wafers to a temporary substrate having an adhesive layer, wherein the plurality of semiconductor light-emitting element wafers are bonded with the substrate facing upwards; removing the substrates of each of the plurality of semiconductor light-emitting element wafers; bonding a light-transmitting substrate to the respective n-type semiconductor region side of the removed substrates of the plurality of semiconductor light-emitting element wafers by direct wafer bonding; and removing the temporary substrate.

[0036] According to another aspect of the present disclosure, a semiconductor light-emitting element is provided, comprising: a light-transmitting substrate; a light-transmitting adhesive layer disposed on the light-transmitting substrate and composed of an inorganic material; and a plurality of semiconductor light-emitting element chips bonded to the light-transmitting adhesive layer, each semiconductor light-emitting element chip having an n-type semiconductor region, an active region disposed on the n-type semiconductor region, and a p-type semiconductor region disposed on the active region, the n-type semiconductor region being located on the side of the light-transmitting adhesive layer.

[0037] According to another aspect of the present disclosure, a method for manufacturing a semiconductor light-emitting element is provided, comprising the following steps: preparing a light-emitting portion having a first area when viewed from above, comprising a substrate, an n-type semiconductor region, an active region, and a p-type semiconductor region in sequence; bonding the light-emitting portion to a temporary substrate having an adhesive layer, with the substrate of the light-emitting portion facing towards the substrate; removing the substrate of the light-emitting portion; bonding a light-transmitting substrate to the n-type semiconductor region side of the substrate with the light-emitting portion removed; removing the temporary substrate; and reducing the light-emitting portion to a second area smaller than the first area by etching while the light-emitting portion is bonded to the light-transmitting substrate.

[0038] According to another aspect of the present disclosure, a method for manufacturing a semiconductor light-emitting element is provided, comprising the following steps: preparing a plurality of semiconductor light-emitting element chips having a first electrode and a second electrode respectively on opposite sides of a light-transmitting substrate; attaching a support substrate to the first electrode and second electrode sides; reducing the thickness of a light-transmitting substrate; separating a light-transmitting substrate to isolate the plurality of semiconductor light-emitting element chips; attaching a support body to the separated light-transmitting substrate side with reduced thickness; and removing the support substrate.

[0039] According to another aspect of the present disclosure, a semiconductor light-emitting element is provided, comprising: at least one light-emitting portion, each light-emitting portion including a first semiconductor region having a first conductivity, a second semiconductor region having a second conductivity different from the first conductivity, and an active region between the first semiconductor region and the second semiconductor region for generating light through recombination of electrons and holes; a light-transmitting substrate supporting the at least one light-emitting portion; a first electrode formed on the light-transmitting substrate and electrically connected to the first semiconductor region; an adhesive layer formed on the first electrode for bonding the at least one light-emitting portion and the light-transmitting substrate; and a second electrode electrically connected to the second semiconductor region.

[0040] According to another aspect of the present disclosure, a semiconductor light-emitting element constituting a pixel light source is provided, comprising: at least one semiconductor light-emitting portion, each light-emitting portion including a first light-transmitting substrate having a first thickness, a first semiconductor region formed on the first light-transmitting substrate and having a first conductivity, a second semiconductor region having a second conductivity different from the first conductivity, an active region emitting light between the first semiconductor region and the second semiconductor region, a first electrode portion electrically connected to the first semiconductor region, and a second electrode portion electrically connected to the second semiconductor region; a second light-transmitting substrate having a second thickness greater than the first thickness; and a light-transmitting lower adhesive layer that bonds the first light-transmitting substrate and the second light-transmitting substrate of the at least one semiconductor light-emitting portion.

[0041] According to another aspect of the present disclosure, a semiconductor light-emitting element constituting a pixel light source is provided, comprising: at least two semiconductor light-emitting portions, each light-emitting portion having a first light-transmitting substrate, a first semiconductor region formed on the first light-transmitting substrate and having a first conductivity, a second semiconductor region having a second conductivity different from the first conductivity, an active region that emits light between the first semiconductor region and the second semiconductor region, a first electrode portion electrically connected to the first semiconductor region, and a second electrode portion electrically connected to the second semiconductor region; and a lower adhesive layer, which is bonded to each of the first light-transmitting substrates on the opposite side of the first semiconductor region based on the first light-transmitting substrate to fix at least two semiconductor light-emitting portions, thereby opening a portion of each of the first light-transmitting substrates to radiate light generated in each active region to the outside.

[0042] Invention Effects

[0043] This will be described in detail at the end of the 'Detailed Implementation' section. Attached Figure Description

[0044] Figure 1 This is a diagram illustrating an example of a semiconductor light-emitting structure disclosed in U.S. Patent Publication No. US2019 / 0067255.

[0045] Figure 2 This is a diagram illustrating an example of a semiconductor light-emitting element disclosed in U.S. Patent Publication No. US2019 / 0067525.

[0046] Figure 3 This is a diagram showing an example of a semiconductor light-emitting element disclosed in U.S. Patent No. 5,376,580.

[0047] Figures 4 to 7 This is a diagram illustrating an example of a method for manufacturing a semiconductor light-emitting element disclosed in U.S. Patent Publication No. 7,067,340.

[0048] Figures 8 to 11 This is a diagram illustrating an example of a method for manufacturing a semiconductor light-emitting element according to the present disclosure.

[0049] Figure 12 This is a diagram illustrating an example of a semiconductor light-emitting element disclosed in U.S. Patent Publication No. 7,262,436.

[0050] Figure 13 This is a diagram illustrating an example of a semiconductor light-emitting element disclosed in U.S. Patent Publication No. 9,466,768.

[0051] Figure 14 This is a diagram showing an example of a semiconductor light-emitting element disclosed in Japanese Patent Publication No. 2006-120913.

[0052] Figure 15 This is a diagram illustrating an example of a semiconductor light-emitting element disclosed in U.S. Patent Publication No. 9,748,446.

[0053] Figure 16 This is a diagram illustrating an example of a semiconductor light-emitting element disclosed in U.S. Patent Publication No. 9,236,524.

[0054] Figure 17 This is a diagram illustrating an example of a semiconductor light-emitting element of this disclosure.

[0055] Figure 18 It means Figure 17 A diagram illustrating an example of a method for manufacturing a semiconductor light-emitting element disclosed herein.

[0056] Figure 19 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure.

[0057] Figure 20 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure.

[0058] Figure 21 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure.

[0059] Figure 22 It means Figure 21 A diagram illustrating an example of a method for manufacturing a semiconductor light-emitting element disclosed herein.

[0060] Figure 23 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure.

[0061] Figure 24 and Figure 25 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure.

[0062] Figure 26 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure.

[0063] Figure 27 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure.

[0064] Figure 28 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure.

[0065] Figure 29 This is a diagram illustrating an example of a semiconductor light-emitting element or even a semiconductor light-emitting element display disclosed in U.S. Patent Publication No. 2017-0323873.

[0066] Figure 30 This is a diagram illustrating an example of a micro-LED display device disclosed in Korean Patent Publication No. 10-2019-0078945.

[0067] Figure 31 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure.

[0068] Figure 32 It means Figure 31 A diagram showing an example of the configuration of a semiconductor light-emitting element disclosed in the paper.

[0069] Figure 33 It means Figure 31 A diagram of a modified example of a semiconductor light-emitting element disclosed in the paper.

[0070] Figure 34 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure.

[0071] Figure 35 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure.

[0072] Figures 36 to 38 It means Figure 28 A diagram illustrating an example of a method for manufacturing a semiconductor light-emitting element disclosed herein.

[0073] Figure 39 This figure illustrates yet another example of the method for manufacturing the semiconductor light-emitting element disclosed herein.

[0074] Figure 40 and Figure 41 This figure illustrates yet another example of the method for manufacturing the semiconductor light-emitting element disclosed herein.

[0075] Figure 42 This figure illustrates yet another example of the method for manufacturing the semiconductor light-emitting element disclosed herein.

[0076] Figure 43 This is a diagram illustrating an example of a semiconductor light-emitting element to which this disclosure applies.

[0077] Figure 44 and Figure 45 This is a diagram illustrating yet another example of a semiconductor light-emitting element to which this disclosure applies.

[0078] Figure 46 This is a diagram illustrating an example of a method for transferring a semiconductor light-emitting element chip and a semiconductor light-emitting element according to this disclosure.

[0079] Figure 47 This figure illustrates yet another example of a method for transferring a semiconductor light-emitting element chip and a semiconductor light-emitting element according to this disclosure.

[0080] Figure 48 This diagram illustrates the problems encountered when applying DWB at the wafer level to semiconductor light-emitting devices.

[0081] Figure 49 This is a diagram illustrating yet another example of a method for manufacturing a semiconductor light-emitting element according to the present disclosure.

[0082] Figure 50 This is a diagram illustrating yet another example of a method for manufacturing a semiconductor light-emitting element according to the present disclosure.

[0083] Figure 51 and Figure 52 This is a diagram illustrating yet another example of a method for manufacturing a semiconductor light-emitting element according to the present disclosure.

[0084] Figure 53 This is a diagram illustrating yet another example of a method for manufacturing a semiconductor light-emitting element according to the present disclosure.

[0085] Figure 54 This is a diagram illustrating yet another example of a method for manufacturing a semiconductor light-emitting element according to the present disclosure.

[0086] Figure 55 and Figure 56 This is a diagram illustrating yet another example of a method for manufacturing a semiconductor light-emitting element according to the present disclosure.

[0087] Figure 57 and Figure 58 This is a diagram illustrating yet another example of a method for manufacturing a semiconductor light-emitting element according to the present disclosure.

[0088] Figure 59 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure.

[0089] Figure 60 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure.

[0090] Figure 61 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure.

[0091] Figure 62 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure.

[0092] Figure 63 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure.

[0093] Figure 64 It means Figure 63 The figure in the middle shows an example of a method for manufacturing a semiconductor light-emitting element.

[0094] Figure 65 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure.

[0095] Figure 66 It means Figure 65 The figure in the middle shows an example of a method for manufacturing a semiconductor light-emitting element.

[0096] Figure 67 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure.

[0097] Figure 68 It means Figure 67 The figure in the middle shows an example of a method for manufacturing a semiconductor light-emitting element.

[0098] Figure 69 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure.

[0099] Figure 70 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure.

[0100] Figure 71 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure. Detailed Implementation

[0101] The present disclosure will now be described in detail with reference to the accompanying drawing(s).

[0102] Figures 8 to 11 This is a diagram illustrating an example of the semiconductor light-emitting element manufacturing method of this disclosure.

[0103] First, such as Figure 8 As shown in (a), a first semiconductor region 30 (e.g., an N-type semiconductor region), an active region 40 (e.g., MQWs), and a second semiconductor region 50 (P-type semiconductor region) are sequentially grown on the growth substrate 10. The first semiconductor region 30, the active region 40, and the second semiconductor region 50 are each composed of a single layer or multiple layers, and a buffer region 20 or other desired layers may be added. In the case of a semiconductor light-emitting element that emits red light, a GaAs substrate and an AlGaInP(As)-based semiconductor can be used; in the case of a semiconductor light-emitting element that emits green, blue, or ultraviolet light, a sapphire substrate and an AlGaInN-based semiconductor can be used. For example, the buffer region 20 includes a seed layer (22; nucleation layer) and an undoped semiconductor region (23; undoped semiconductor region) for pressure relief and thin film quality improvement, and is typically configured to have a thickness of about 4 μm. The first semiconductor region 30 has a thickness of 2.5 μm, the active region 40 has a thickness of tens of nm, and the second semiconductor region 50 has a thickness from tens of nm to several μm, generally having a thickness of 6 μm to 10 μm overall. In the case of laser ablation, a sacrificial layer (not shown) is provided between the seed layer 22 and the undoped semiconductor region 23, with the seed layer 22 serving as the sacrificial layer.

[0104] Next, as Figure 8 As shown in (b), a protective layer 60 is formed on the second semiconductor region 50. The protective layer 60 is preferably formed of SiO2 or SiN in subsequent processes, including etching, to protect the semiconductor regions 30, 40, and 50. x The protective layer 60 is composed of such genetic material. The protective layer can be designed as a single layer or multiple layers, and can also be a genetic material / conductive material (SiO2 / Ti) or a genetic material / genetic material (SiO2 / SiN). x Combinations of materials such as ), etc. Here, regarding conductive materials, metals (Ti, Cr, Ni, etc.) that can be easily removed in the future and have excellent adhesion to conductive materials are preferred, but permeable conductive materials (In2O3, SnO2, ITO, ZnO, etc.) may also be used.

[0105] Next, as Figure 8 (c) and Figure 8As shown in (d), a first transparent substrate 70 is prepared, and the first transparent substrate 70 is bonded to semiconductor regions 30, 40, and 50. In the bonding of the first transparent substrate 70 and the semiconductor regions 30, 40, and 50, unlike conventional techniques using adhesives composed of organic materials such as BCB and silicon, a metal bonding process (e.g., eutectic bonding) is used to achieve strong bonding and to prevent changes in the physical properties of the semiconductor regions and mechanical damage (cracks, breakage) during subsequent processes, including dry and / or wet etching. A metal bonding layer 71 is disposed on at least one side of the first transparent substrate 70 and the semiconductor regions 30, 40, and 50, preferably on both sides. Furthermore, a sacrificial layer 72 must be provided on the first transparent substrate 70 for subsequent removal using laser ablation. During the bonding process, preventing cracks and breakage in the semiconductor regions 30, 40, and 50 is crucial. Therefore, sapphire, which has a small difference in thermal expansion coefficient with the growth substrate 10 and is transparent, is preferably used as the first transparent substrate 70. Generally, the eutectic material used for metal bonding varies depending on the temperature. In this disclosure, only materials with a process temperature of 250°C or higher and 350°C or lower are used, preferably AuSn (300°C), AuIn (275°C), NiSn (300°C), CuSn (270°C), etc. Conversely, in the case of BCB organic adhesives, bonding is preferably performed at temperatures below 250°C. For reference, besides BCB organic adhesive materials, there are many known organic adhesives for wafer bonding, such as polyimide (160°C), SU-8 (90°C), parylene (230°C), and epoxy (150°C).Regarding the sacrificial layer 72, it is a compound with an energy band gap of less than 6.2 eV and a single-crystal or polycrystalline structure that is prone to instantaneous photo-thermochemical decomposition interaction by strongly absorbing laser light incident through the back of the first transparent substrate 70. In particular, it is a compound represented by oxide and nitride semiconductors. As an oxide semiconductor, In2O3, SnO2, ITO, ZnO, CdO, PbO, PZT and their alloy compounds are preferred. As a nitride semiconductor, InN, GaN, AlN and their alloy compounds are preferred.

[0106] Regarding the first transparent substrate 70 material, any material that has a coefficient of thermal expansion difference of less than 2 ppm with the growth substrate (GaAs, Sapphire) and possesses optical transparency can be used. For example, when using a GaAs (5.7 ppm) growth substrate for semiconductor light-emitting elements emitting red light, a material with a coefficient of thermal expansion of 3.7-7.7 ppm and optical transparency is used. When using a sapphire (single-crystal Al2O3, 6.5 ppm) substrate for semiconductor light-emitting elements emitting blue, green, or ultraviolet light, a material with a coefficient of thermal expansion of 4.5-8.5 ppm and optical transparency is used. Representative materials that meet these requirements include, in addition to sapphire (single-crystal Al2O3), which is the same as the growth substrate, E glass (5.5 ppm), AlN (4.5 ppm), SiC (4.8 ppm), and borosilicate glass (4.6 ppm).

[0107] Next, as Figure 8 As shown in (e), the growth substrate 10 is removed. In the case of a GaAs substrate, wet etching is used; in the case of a sapphire substrate, laser ablation is used. Metal bonding is used in the bonding between the first transparent substrate 70 and the semiconductor regions 30, 40, and 50, and a protective layer 60 is provided in the semiconductor regions 30, 40, and 50, thereby allowing the metal bonding layer 71 and the semiconductor regions 30, 40, and 50 to withstand dry and wet etching or laser ablation processes. Preferably, a second transparent substrate 80 (see reference) is attached... Figure 9Before the semiconductor regions 30, 40, and 50, in order to facilitate subsequent processes such as stress relief and performance (light output, operating voltage) improvement of the light-emitting element and the formation of the passivation layer, a process is performed to remove (e.g., etching) part or all of the undoped semiconductor region 23.

[0108] Next, as Figure 9 As shown in (a), a second light-transmitting substrate 80 is prepared. Preferably, an adhesive layer 81 is provided on at least one side of the second light-transmitting substrate 80 and on at least one side of the semiconductor regions 30, 40, and 50. The adhesive layer 81 is formed from a light-transmitting material such as BCB resin, as is conventional. Regarding the material used as the adhesive layer 81, in addition to BCB organic adhesives, there are many known organic adhesives for wafer bonding, such as polyimide (160°C), SU-8 (90°C), parylene (230°C), epoxy resin (150°C), silicone (100-300°C), OCA (Optical Clear Adhesive), and OCR (Optical Clear Resin). Furthermore, before bonding using organic adhesive materials, reflectors [=reflective materials or reflector structures] (metals; Ag, Al, Au, Cu, Pt, Cr, Ti, TiW, or DBR, ODR) can be formed as needed, or uneven structures can be formed as needed to facilitate light extraction or increase the surface area to enhance bonding strength. Additionally, it is preferable that, compared to the aforementioned organic adhesive materials for wafer bonding, using transparent inorganic materials such as SiO2 or SOG (Spin On Glass) as the adhesive layer 81 for wafer bonding provides stronger bonding strength and thermal durability when the process is performed at temperatures above 300°C, thereby improving mass production efficiency and the reliability of the light-emitting element. Thus, maintaining the flatness of the two wafer substrate structures (70 / 72 / 71 / 60 / 50 / 40 / 30 / 81, 80 / 81) prepared for using the transparent inorganic material as the adhesive layer 81 for wafer bonding is a major process factor. In the case of the two wafer substrate structures prepared according to this disclosure, as substrate structures that can alleviate the pressure caused in the process of growing semiconductor regions and minimize the difference in the coefficient of thermal expansion, they are formed in maximum uniform and close contact between the transparent inorganic material, i.e., the adhesive layer 81 for wafer bonding, thereby enabling successful bonding.

[0109] Next, as Figure 9As shown in (b), the second light-transmitting substrate 80 and the semiconductor regions 30, 40, and 50 are attached. Heat is generated during the bonding process (the process temperature of the organic adhesive material used above), but the first light-transmitting substrate 70 and the semiconductor regions 30, 40, and 50 have a strong bond due to the metallic bonding, thus maintaining their bond. Furthermore, since the first light-transmitting substrate 70 and the second light-transmitting substrate 80 are formed of a material with the same coefficient of thermal expansion (e.g., sapphire), the adhesive layer 81 is strongly pressed together, and no damage, including breakage, occurs during the bonding of the second light-transmitting substrate 80 and the semiconductor regions 30, 40, and 50.

[0110] Next, as Figure 9 As shown in (c), the first transparent substrate 70 is separated from the semiconductor regions 30, 40, and 50 by laser ablation. Laser ablation is used to prevent damage to the adhesive layer 81 during the separation of the first transparent substrate 70.

[0111] Next, as Figure 10 (a) and Figure 10 As shown in (b), the metal bonding layer 71 and the protective layer 60 are removed sequentially, thereby completing the preparation for fabricating the P-sideup flip chip. Until this process, to prevent damage to the bonding layer 81, no photolithography process is used, and the operation is performed at the wafer level from the beginning without the formation of electrodes or the etching process of the core of the light-emitting element, namely the semiconductor regions 30, 40, and 50. Therefore, even with two wafer bonding processes, cracks and breakage of the semiconductor regions 30, 40, and 50 can be minimized. Furthermore, after removing the growth substrate 10, a portion or all of the undoped semiconductor regions 23 are continuously etched to further improve the performance and quality of the finally manufactured light-emitting element. In this process, the formation of the protective layer 60, the use of the metal bonding layer 71, the removal of the first transparent substrate 70 by laser ablation, and the minimization of the difference in the coefficients of thermal expansion between the first transparent substrate 70 and the second transparent substrate 80 (typically, in wafer bonding between heterogeneous materials, the maximum difference in coefficients of thermal expansion to prevent breakage is ≤2 ppm) are crucial.

[0112] Next, as Figure 11 (a) and Figure 11 As shown in (b), a portion of the second semiconductor region 50 and the active region 40 are removed to expose the first semiconductor region 30.

[0113] Next, as Figure 11As shown in (c), a transparent electrode 91, a first electrode 92, and a second electrode 93 are formed. The transparent electrode 91 performs the function of enabling current diffusion to proceed smoothly in the second semiconductor region 50, which has poor current diffusion. It is mainly composed of a transparent conductive oxide film (TCO), typically composed of ITO. The first electrode 92 and the second electrode 93 are electrically connected to the first semiconductor region 30 and the second semiconductor region 50, respectively, and have the same characteristics as... Figure 7 The electrodes 316, 318, 320, and 322 shown have the same structure and achieve the function of a reflector.

[0114] Next, as Figure 11 As shown in (d), the semiconductor light-emitting element in wafer state is isolated into individual chips. At this time, the adhesive layer 81 is removed to expose the second light-transmitting substrate 80, thereby facilitating the cutting and crushing process of the second light-transmitting substrate 80.

[0115] Finally, as Figure 11 As shown in (e), a passivation layer (94; for example: SiO2, Al2O3, SiN) is formed. x The electrode 93 is reduced in size, and a dielectric reflector (DBR reflector) is incorporated within the passivation layer 94, thereby replacing the electrode 93 as a reflector. An example of such a dielectric reflector is disclosed in U.S. Patent Publication No. US9,236,524. The passivation layer 94 can be substantially constructed from a dielectric material (e.g., SiO2, Al2O3, SiN). x A multilayer structure is formed by continuously depositing highly reflective metal materials (e.g., Ag, Al, Au, Cu, Pt, Cr, Ti, TiW) after covering the upper and side parts of semiconductor regions 30, 40, and 50.

[0116] Of course, it can be changed. Figure 11 (b) to Figure 11 The sequence of processes disclosed in (e) is as follows. In the case of mini or micro LED chips, compared to conventional chips (where the length of one side is typically 300µm or more), the sidewall area of ​​the isolation and mesa processes occupies a larger area than the light-emitting area. Therefore, from the viewpoint of brightness and reliability, it is crucial to prevent current flow (electro-passivation) through the sidewalls of the isolation and mesa processes. Therefore, it is preferable to perform the electro-passivation process immediately after the isolation and mesa processes to avoid prolonged waiting between processes after the isolation and mesa processes.

[0117] Figure 17This is a diagram illustrating an example of a semiconductor light-emitting element of the present disclosure. The semiconductor light-emitting element includes a light-transmitting substrate 1, a first semiconductor region 2, an active region 3, a second semiconductor region 4, an insulating layer 5, a current diffusion electrode 6, a first electrode 7, and a second electrode 8.

[0118] The light-transparent substrate 1 is a growth substrate (e.g., sapphire, SiC) or a light-transparent substrate attached to the semiconductor regions 2, 3, and 4 in the state after the growth substrate has been removed. This light-transparent substrate is made of materials such as sapphire or SiC. Figures 4 to 11 Examples of such substrates are disclosed. The light-transmitting substrate 1 is composed of a growth substrate or... Figure 11 The second light-transmitting substrate 80 shown is constructed.

[0119] The first semiconductor region 2, the active region 3, and the second semiconductor region 4 are composed of n-type GaN, InGaN / (In)GaNMQWs, and p-type GaN. When emitting ultraviolet light, blue light, or green light, they are composed of AlGaInN-based semiconductors; when emitting red light, they are composed of AlGaInP(As)-based semiconductors. Each region is composed of a single layer or multiple layers, and their conductivity can be interchanged. When the transparent substrate 1 is a growth substrate, a buffer region 20 (see reference) is preferably provided between the first semiconductor region 2 and the transparent substrate 1. Figure 8 Furthermore, in order to use the semiconductor light-emitting element as a direct light-emitting element in a micro-LED display, it can also be a semiconductor light-emitting element composed of a first semiconductor region 2, an active region 3, a second semiconductor region 4, an insulating layer 5, a current diffusion electrode 6, a first electrode 7, and a second electrode 8, which is transferred onto a panel (a glass substrate or PCB formed by arranging multiple thin-film crystals) whose brightness is adjusted by electrical injection and then electrically connected, with the light-transmitting substrate 1 removed.

[0120] Insulating layer 5 serves a passivation function and is composed of dielectric materials (e.g., SiO2, Al2O3, SiN). x This structure blocks the flow of current while minimizing light absorption.

[0121] The current diffusion electrode 6 serves to supply current from the second electrode 8 to the second semiconductor region 5 and provide ohmic contact. It is composed of a transparent conductive film (e.g., ITO), a highly reflective metal (e.g., Ag, Au, Al, Ag / Ni / Au), a non-conductive reflective film (e.g., DBR), and combinations thereof (e.g., ITO, ITO / Ag, ITO / DBR). In the case of including a non-conductive reflective film, such as... Figure 2 As shown, an electrical connection 94 is provided for the electrical connection between the second electrode 8 and the current diffusion electrode 6. Of course, a non-conductive reflective film may also be provided on the upper part of the insulating layer 5 on the first semiconductor region 2 exposed by etching.

[0122] The first electrode 7 and the second electrode 8 are formed in the same process and used as bonding pads, for example, made of a structure such as Ti / Ni / Au.

[0123] Preferably, an ohmic contact electrode 9 (e.g., Cr / Al / Ni / Au, Ti / Al / Ni / Au) is provided below the first electrode 7, thereby reducing the driving voltage and reducing the structural tilt (height difference) between the first electrode 7 and the second electrode 8.

[0124] As shown in the figure, not only in the area where the first electrode 7 is located, but also in the area where the second electrode 8 is located, a portion of the second semiconductor region 4, the edge region 3, and the first semiconductor region 2 can be removed. This reduces the height difference between the first electrode 7 and the second electrode 8, solving the problem caused by the tilting of the semiconductor light-emitting element during bonding. In the case of mini-LEDs and micro-LEDs, due to their small size, the use of the same bonding material quality when bonding flip chips increases the likelihood of quality problems, including electrical short circuits. This is especially true in the case of flip chips without a transparent substrate 1 (when the transparent substrate 1 is removed, the overall thickness of the semiconductor light-emitting element becomes thinner, decreasing from 150-200 μm to less than 10 μm), further increasing the cracking rate on top of the aforementioned problems. In particular, when used as a display light source, the possibility of color deviation and color mixing is high due to the distortion of the light-emitting pattern. Structural unbalance, due to the tilting of the flip chip during the flip bonding and transfer processes, can cause electrical and optical quality problems.

[0125] Figure 18 It means Figure 17 The figure shows an example of a method for manufacturing a semiconductor light-emitting element. First, as shown... Figure 18 As shown in (a), a first semiconductor region 2, an active region 3, and a second semiconductor region 4 are prepared on a light-transmitting substrate 1. Next, as... Figure 18 As shown in (b), at locations A and B where the first electrode 7 and the second electrode 8 are formed, a portion of the second semiconductor region 4, the active region 3, and the first semiconductor region 2 are removed by etching (e.g., ICP). Then, as... Figure 18 As shown in (c), an insulating layer 5 is formed, and a portion of the insulating layer 5 is removed by a photolithography process. At this time, the insulating layer 5 at position C where the first electrode 7 is placed is opened, while the insulating layer 5 at position D where the second electrode 2 is placed remains stationary, in a manner that ensures the current diffusion electrode 6 is electrically connected to region E of the second semiconductor region 4. This exposes a portion of the second semiconductor region 4. Next, as... Figure 18As shown in (d), a current diffusion electrode 6 and an ohmic contact electrode 9 are formed. Next, as... Figure 18 As shown in (e), a first electrode 7 and a second electrode 8 are formed. Preferably, as shown in [example]... Figure 11 As shown in (e), an additional passivation layer 94 is added.

[0126] Figure 19 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure, and... Figure 17 Compared to the semiconductor light-emitting element shown, there are differences in the following aspects: ① The second electrode 8 is formed on the second semiconductor region 4 without etching of semiconductor layers 2, 3, and 4; ② The first electrode 1 is connected from the first semiconductor region (2; F) exposed by etching to the second semiconductor region (4; G); ③ The formation order of the insulating layer 5 and the current diffusion electrode 6 is interchanged. With this structure, the height difference between the first electrode 7 and the second electrode 8 can be reduced. The width of the first electrode 7 and the ohmic contact electrode 9 reaches the entire width W of the semiconductor light-emitting element or almost most of its width, thereby blocking the current supplied from the second electrode 8 to region G. Although region G has an active region 4, it becomes a non-light-emitting region. That is, Figure 19 The semiconductor light-emitting element shown is connected from the first semiconductor region (2; F) exposed by etching the first electrode 1 to the non-light-emitting region (G; formed by extending the first electrode 7 and the ohmic contact electrode 9 at least 50% along the width W of the semiconductor light-emitting element, thereby blocking the current supply from the second electrode 8. An insulating layer 5 is formed under the first electrode 7 in region G, thus blocking the current supply) on the second semiconductor region 4, thereby eliminating the height difference between the first electrode 7 and the second electrode 8. For reference, the insulating layer 5 is not shown in the top view.

[0127] Figure 20 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure, and... Figure 19 Compared to the semiconductor light-emitting element shown, there are differences in the following aspects: ① The entire first electrode 7 is formed on the second semiconductor region 5; ② For electrical connection between the first electrode 7 and the ohmic contact electrode 9, an electrical connection 11 is formed in the insulating layer 5 through a via H. In this case, with the via H as a reference, the region I opposite to the second electrode 8 is a non-light-emitting region, therefore the first electrode 7 is formed in the non-light-emitting region G, thereby reducing the height difference between the first electrode 7 and the second electrode 8. For reference, the insulating layer 5 is not shown in the top view.

[0128] Figure 21The figure shows another example of the semiconductor light-emitting element of this disclosure. The insulating layer 5 is not formed along the entire surface of semiconductor layers 2, 3, and 4, but rather covers semiconductor layers 2, 3, and 4, the current diffusion electrode 6, and the ohmic contact electrode 9, forming a generally flat structure. With this structure, the height of the first electrode 7 can correspond to the height of the second electrode 8 regardless of the morphology of the mesa etching region J on the side of the first electrode 7. This structure is achieved using a liquid insulating layer 5 (e.g., thermosetting plastics such as BCB, SU-8, acrylate, and SOG). Alternatively, the insulating layer 5 can be formed using methods other than conventional vapor deposition methods (e.g., CVD, PVD) (e.g., spin coating). The insulating layer 5 can also be formed on the lower part of the electrode 8 (serving a planarization function on the lower parts of the electrode 7 and electrode 8), preferably formed by a liquid process (planarization by various methods such as spin coating and spraying).

[0129] Figure 22 It means Figure 21 A diagram illustrating an example of a method for manufacturing a semiconductor light-emitting element disclosed herein, firstly, as... Figure 22 As shown in (a), a first semiconductor region 2, an active region 3, and a second semiconductor region 4 are prepared on a light-transmitting substrate 1. Next, as... Figure 22 As shown in (b), region J, where the first electrode 7 is located, is formed. Next, as... Figure 22 As shown in (c), a current diffusion electrode 6 and an ohmic contact electrode 9 are formed. Preferably, the current diffusion electrode 6 and / or the ohmic contact electrode 9 have a reflective film structure (a metal or DBR with excellent reflectivity), and particularly preferably, a metal reflective film is used to prevent light discoloration (photothermalization by light) of the subsequently formed insulating layer 5. Next, as... Figure 22 As shown in (d), semiconductor regions 2, 3, and 4 are isolated to expose the light-transmitting substrate 1. Of course, such a process can be performed... Figure 22 (b) and Figure 22 Perform the procedure shown in (c) before proceeding. Then, as... Figure 11 As shown in (e), to improve the reliability of the light-emitting element, it is preferable to form an insulating layer (5-1; for example, SiO2) using PVD or CVD (e.g., sputtering, PECVD). Next, as... Figure 22 As shown in (f), insulating layer 5 is formed. Insulating layer 5 is formed by spin coating. To improve flatness, 2 to 3 spin coatings are used as needed. Next, as... Figure 22 As shown in (g), a hole is formed in the insulating layer 5, and then the first electrode 7 and the second electrode 8 are formed. As needed, such as Figure 22As shown in (h), the insulating layer 5 is removed from the area except where the first electrode 7 and the second electrode 8 are located (e.g., plasma etching including oxygen (O2) components). Except for the point where the insulating layer 5 is formed only under the electrodes 7 and 9, it can provide a morphological similarity to Figure 9 The semiconductor light-emitting elements shown are not significantly different from each other.

[0130] Figure 23 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure, and... Figure 11 The semiconductor light-emitting elements shown in (e) are largely the same. Figure 7 In the case of the semiconductor light-emitting element shown, the transparent substrate 314 and the semiconductor regions 302, 304, and 306 are bonded by a flexible and transparent adhesive layer 312, resulting in poor adhesion. While introducing a rough surface into the N-type semiconductor region 302 can increase the bonding area between the transparent adhesive layer 312 and the N-type semiconductor region 302, this alone is insufficient. Figure 2 In the case of the semiconductor light-emitting element shown, the transparent support substrate 102 and the semiconductor regions 104 to 112 are bonded together by a P-type current diffusion layer 118 (e.g., ITO) and a transparent adhesive layer 130. Therefore, there are problems with maintaining the bond between the two. That is, after one or two wafer bonding processes, when the semiconductor regions 302, 304, and 306 are supported on the light-transmitting substrate 314 by a flexible and transparent adhesive 312 (an organic adhesive such as BCB), due to the difference in the coefficients of thermal expansion between the semiconductor regions 302, 304, 306 and the light-transmitting substrate 314, peeling occurs at the upper and lower boundary surfaces of the transparent adhesive 312 where the adhesive strength is weak, during or after the SMT process due to thermo-mechanical stress. In particular, red mini-LEDs, as structures bonded to a transparent heterogeneous substrate rather than a growth substrate, are highly susceptible to peeling at the weakest point, i.e., the organic adhesive bonding area. Figure 11 Similarly, the semiconductor light-emitting element shown includes a transparent substrate 80, an adhesive layer 81, a first semiconductor region 30, an active region 40, a second semiconductor region 50, a first electrode 92, a second electrode 93, and a passivation layer 94. Figure 11 Unlike the semiconductor light-emitting element shown, the passivation layer 94 is formed before the formation of the first electrode 92 and the second electrode 93, but it can also be formed in the reverse order. Preferably, it includes a light-transmitting electrode 91, which can be formed in... Figures 12 to 22 Various electrode structures of different forms are disclosed in the paper. Figure 7Similarly, as shown, rough surfaces S, S are formed in the first semiconductor region 30 and / or the light-transmitting substrate 80 region to increase the contact area of ​​the adhesive layer 81 and improve the light extraction efficiency. Figure 23 In the example shown, the passivation layer 94 is attached to the light-transmitting substrate 80 exposed after removing the second semiconductor region 50, the active region 40, the first semiconductor region 30, and the adhesive layer 81. Therefore, the passivation layer 94 is bonded to the light-transmitting substrate 80, and this bonding force reliably prevents the adhesive layer 81 from separating from the first semiconductor region 30 and / or the light-transmitting substrate 80. The passivation layer 94 is composed of a single layer or a composite layer (e.g., ODR, DBR), and is made of SiO2, SiN... x It is composed of materials such as TiO2 and Al2O3. For example, the passivation layer 94 is formed to a thickness of 1 μm or more to prevent peeling. Preferably, the passivation layer 94 is substantially composed of a dielectric material (e.g., SiO2, Al2O3, SiN). x A multilayer structure is formed by continuously vapor-depositing a highly reflective metal material (e.g., Ag, Al, Au, Cu, Pt, Cr, Ti, TiW) to cover the upper and side surfaces of semiconductor regions 30, 40, and 50. The adhesive layer 81 includes the aforementioned materials and may be BCB, silicon, SU-8, SiO2, SOG, acrylate, urethane, OCA, OCR, etc.

[0131] Figure 24 and Figure 25 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure, and... Figure 23 Unlike other electrodes, the first electrode 92 and the second electrode 93 are connected to the light-transmitting substrate 80 via a passivation layer 94. With this structure (a passivation layer 94 covering at least the semiconductor regions 30, 40, 40 and the adhesive layer 81, and the first electrode 92 and the second electrode 93 connected thereon to the light-transmitting substrate 80), peeling can be prevented from both sides of the adhesive layer 81. In this case, the passivation layer 94 can also be connected to the light-transmitting substrate 80, and can be formed up to the interface between the adhesive layer 81 and the light-transmitting substrate 80. Additionally, the first electrode 92 and the second electrode 93 formed on the light-transmitting substrate 80 each have a first electrode post 92P and a second electrode post 93P, respectively. By having the first electrode post 92P and the second electrode post 93P, the semiconductor light-emitting element... Figure 25The configuration shown is electrically and mechanically connected to the external power supply unit (98; sub-substrate, interposer, wiring board, display pixel, etc.). The first electrode post 92P and the second electrode post 93P are formed at a height (approximately 4-5 μm) higher than the semiconductor regions 30, 40, and 50 and lower than 10 μm. Preferably, the first electrode post 92P and the second electrode post 93P are supported by filling (e.g., screen printing) the spaces where the first electrode post 92P and the second electrode post 93P are not formed with a sealant 99 (e.g., white silicon), and the semiconductor light-emitting element can be encapsulated as a whole. The first electrode post 92P and the second electrode post 93P can be formed by copper plating. If necessary, a rough surface for light scattering can be formed on the surface U of the light-transmitting substrate 80 on the opposite side of the adhesive layer 81, or an epoxy resin coating including carbon can be applied.

[0132] Figure 26 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure. Figure 26 (a) shows an example where the first electrode post 92P and the second electrode post 93P overlap with the first electrode 92 and the second electrode 93 formed on the semiconductor regions 30, 40, and 50. Figure 26 (b) The first electrode reinforcement portion 92T and the second electrode reinforcement portion 93T, which are formed by PVD (e.g., sputtering, electron beam evaporation) instead of copper plating, overlap with the first electrode 92 and the second electrode 93 formed on the semiconductor regions 30, 40, and 50 (the first electrode reinforcement portion 92T and the second electrode reinforcement portion 93T are formed according to the overall shape of the semiconductor regions 30, 40, and 50). With this structure, peeling from both sides of the adhesive layer 81 can be further prevented.

[0133] Figure 27 This diagram illustrates yet another example of the semiconductor light-emitting element of this disclosure, showing two semiconductor light-emitting element chips AA and BB mounted on a light-transmitting substrate 80 via adhesive layers 81, 81. (The diagram is incomplete and requires further context to translate accurately.) Figure 24 The method shown is the same as that used to form a first electrode post 92P, a second electrode post 93PA, and a second electrode post 93PB. The first electrode post 92P is connected to the first electrode 92A of semiconductor light-emitting element chip AA and the first electrode 92B of semiconductor light-emitting element chip BB, serving as a common electrode. The first electrodes 92A and 92B can be formed integrally or independently. The second electrode post 93PA is connected to the second electrode 93A of semiconductor light-emitting element chip AA, and the second electrode post 93PB is connected to the second electrode 93B of semiconductor light-emitting chip BB. With this structure, multiple semiconductor light-emitting element chips are packaged together and integrated into... Figure 25 The external power supply unit shown is (98; sub-substrate, interposer, wiring board, display pixel, etc.). With this structure, when the semiconductor light-emitting element chips AA and BB are micro LED chips, instead of inspecting each semiconductor light-emitting element chip set on each panel (pixel) and replacing it when it fails, the inspection is performed at the package level, and then it is fixed to the panel (pixel). Afterwards, when a failure occurs, it is replaced on a package-by-package basis. When two semiconductor light-emitting element chips AA and BB emit light of the same color, they can be grown on a growth substrate and formed through the processes described above. When the two semiconductor light-emitting element chips AA and BB emit light of different colors, each semiconductor light-emitting element chip AA and BB, unlike the example above, is moved onto the light-transmitting substrate 80 through adhesive layers 81, 81 using various transfer process techniques (e.g., pick and place for mechanically moving and arranging chips, stamp for moving and arranging chips by creating a stamp structure patterned using an adhesive material (e.g., silicon-based PDMS), a method for moving and arranging chips using an electrostatic force or electromagnetic force structure, self-assembly for moving and arranging chips by combining a fluid with a specified uniform viscosity and an electromagnetic force structure, and laser-induced forward transfer for moving and arranging chips by combining a laser source and an explosive adhesive material). Each semiconductor light-emitting element chip AA and BB is formed into Figure 11 (e) Figures 12 to 22 In the state shown, with the growth substrate 1, 10, support substrate, or light-transmitting substrate 80 removed (preferably, as shown in the diagram), Figure 11 (e) and Figure 23As shown, with the growth substrate 10 removed, a passivation layer 94 is formed on the upper and side surfaces of the semiconductor regions 30, 40, and 50, and electrodes 91, 92, and 93 are also formed. The material is then moved onto the light-transmitting substrate 80. In this state, while moving to the light-transmitting substrate 80 via the adhesive layer 81, to prevent the semiconductor light-emitting element chips AA, BB and / or the light-transmitting substrate 80 from being exposed to the glass of the adhesive layer 81, the passivation layer 94A is introduced. On this passivation layer 94A, first electrodes 92A, 92B and second electrodes 93A, 93B are connected to the light-transmitting substrate 80, and first electrode posts 92P and second electrode posts 93PA and 93PB are formed on it. Regarding the materials of adhesive layers 81 and 81, in addition to BCB (250℃) organic adhesive, there are many well-known organic adhesives for wafer bonding, such as polyimide (160℃), SU-8 (90℃), parylene (230℃), epoxy resin (150℃), silicon (100-300℃), SiO2, SOG (Spin On Glass), etc.

[0134] Figure 28 This diagram illustrates yet another example of the semiconductor light-emitting element of this disclosure, showing three semiconductor light-emitting element chips (AA, BB, CC; for example: RGB LED) on a transparent substrate 80. The method for moving them onto the transparent substrate 80 has been described in [the original text]. Figure 27 The semiconductor light-emitting element includes a first electrode post 92PA, a second electrode post 93PA, a second electrode post 93PB, and a second electrode post 93PC. First electrodes 92A, 92B, and 92C and second electrodes 93A, 93B, and 93C are respectively formed on three semiconductor light-emitting element chips AA, BB, and CC. The first electrodes 92A, 92B, and 92C are integrally connected to each other. Alternatively, the first electrodes 92A, 92B, and 92C can be formed individually, while the second electrodes 93A, 93B, and 93C are integrally connected to each other. The first electrode post 92PA is connected to the first electrodes 92A, 92B, and 92C and serves as a common electrode. Second electrode posts 93PA, 93PB, and 93PC are formed on each of the second electrodes 93A, 93B, and 93C formed on the three semiconductor light-emitting element chips AA, BB, and CC. Using an adhesive layer 81 (see reference) Figure 27 After attaching three semiconductor light-emitting element chips AA, BB, and CC to the light-transmitting substrate 80, a passivation layer 94A is formed (see reference). Figure 27Next, the first electrodes 92A, 92B, 92C and the second electrodes 93A, 93B, 93C are connected to the light-transmitting substrate 80 to form the first electrode post 92PA and the second electrode posts 93PA, 93PB, 93PC (e.g., copper plated with gold). Preferably, as shown... Figure 27 As shown, the space between the first electrode post 92PA and the second electrode posts 93PA, 93PB, and 93PC is filled with sealant 99.

[0135] ① With this structure, mini or micro LEDs with windows (transparent substrate 80) having sufficient thickness can be manufactured.

[0136] ②With this structure, instead of placing mini or micro LEDs into the panel (pixel) in chip form, mini or micro LEDs are placed into the panel (pixel) in package form, thereby simplifying the operation and making it easier to inspect and replace.

[0137] ③ By using this structure (constructing all RGB LED chips as p-sideup flip chips), the problems of using n-sideup flip chips can be solved (excessive heat is generated due to the non-uniform current flow in the N-type as the chip size is miniaturized).

[0138] ④ With such a structure (passivation layer 94 and / or first electrodes 92A, 92B, 92C and second electrodes 93A, 93B, 93C connected to a light-transmitting substrate 80 with or without adhesive layer 81 removed), it is possible to manufacture highly reliable mini or micro LEDs (which can reduce the possibility of peeling off from both sides of adhesive layer 81).

[0139] ⑤ With the above structure, it is possible to manufacture mini or micro LED packages in which all RGB chips are configured as p-sideup flip chips while ensuring component reliability. In this case, the red LED chip is formed as a p-sideup flip chip through two wafer bonding operations, while the green and blue LED chips are formed as p-sideup flip chips through zero or two wafer bonding operations. Four wafer bonding operations can also be used if needed.

[0140] Figure 31 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure, and... Figure 27Unlike the semiconductor light-emitting element shown, this device has a semiconductor light-emitting element chip AA and a thin-film transistor 82 (TFT) on a light-transmitting substrate 80. The TFT 82 is formed using a known vapor deposition technique before the semiconductor light-emitting element chip AA is transferred to the light-transmitting substrate 90, and includes a gate electrode 83, an insulating layer 84, a semiconductor layer 85, a first electrode 86 (e.g., a source electrode), and a second electrode 87 (e.g., a drain electrode). Preferably, it also includes an insulating layer 88. The semiconductor layer 103 is made of amorphous silicon (a-Si) or polycrystalline silicon LTPS. If the light-transmitting substrate 80 is made of a material capable of withstanding temperatures above 500°C, such as sapphire, quartz, or glass, it is made of an oxide semiconductor (e.g., IGZO (Indium Gallium Zinc Oxide), TiO2, ZnO, WO3, SnO2). After the semiconductor light-emitting element chip AA is transferred, it is combined with... Figure 27 Similarly, after forming a passivation layer 94A and etching to create the required openings and even holes, the first electrode 92A, the second electrode 93A, and the connecting electrode 95A are formed. Next, the first electrode post 92A, the second electrode post 93PA, and the third electrode post 94PA are formed (see reference). Figure 32 Finally, a sealant 99 is formed. A passivation layer 94A is attached to the thin-film transistor 82, a first electrode 92A is connected to the first electrode 86 of the thin-film transistor 82, and a connecting electrode 95A electrically connects the second electrode 87 and the second electrode post 92PA of the thin-film transistor 82. For ease of explanation, in... Figure 31 The third electrode post 94PA is omitted. (Refer to the third electrode post 94PA...) Figure 32 When an action signal is received, the semiconductor layer 85 is activated through the gate electrode 83 connected to the third electrode post 94PA. The first electrode 86 and the second electrode 87 are turned on, and current flows through the second electrode post 93PA, the second electrode 93A, the first electrode 92A, the first electrode 86 of the thin-film transistor 82, the second electrode 87 of the thin-film transistor 82, the connecting electrode 95A, and the first electrode post 92PA, causing the semiconductor light-emitting element chip AA to emit light. If the transparent substrate 80 is the growth substrate for the semiconductor light-emitting element chip AA, the thin-film transistor 82 can be formed after the semiconductor light-emitting element chip AA is formed. In this case, the adhesive layer 81 can be omitted.

[0141] Figure 32 It means Figure 31A diagram illustrating an example configuration of a semiconductor light-emitting element disclosed herein shows a gate electrode post or a third electrode post 94PA connected to the gate electrode 83 of a thin-film transistor 82. The gate electrode 83 and the third electrode post 94PA are electrically connected via a connecting electrode 97A, which can be formed separately or as part of the gate electrode 83 during the formation of the gate electrode 93. The portion of the first electrode 92A connecting the first electrode 92A and the first electrode 86, and the portion of the second electrode 93A connecting the second electrode post 93PA and the second electrode 93, are connecting electrodes and can be formed separately from the first electrode 92A and the second electrode 93A.

[0142] Figure 33 It means Figure 31 The diagram shows a modified example of the semiconductor light-emitting element, and... Figure 31 and Figure 32 Unlike the semiconductor light-emitting element disclosed herein, the thin-film transistor 82 is disposed between the second electrode post 93PA and the second electrode 93A of the semiconductor light-emitting element chip AA. The first electrode 86 of the thin-film transistor 82 is electrically connected to the second electrode post 93PA via a connecting electrode, the second electrode 87 of the thin-film transistor 82 is electrically connected to the second electrode 93A of the semiconductor light-emitting element chip AA, and the first electrode 92A of the semiconductor light-emitting element chip AA is directly connected to the first electrode post 92PA.

[0143] Figure 34 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure. Figure 28 The semiconductor light-emitting element shown also includes thin-film transistors 82A, 82B, and 82C, which serve as switches for the three semiconductor light-emitting element chips AA, BB, and CC respectively. This is in addition to the external power supply unit 98 (see reference). Figure 25 For example, the sub-substrate, interposer, wiring substrate, and display pixels receive signals for driving the individual thin-film transistors 82A, 82B, and 82C, and are also provided with third electrode posts or gate electrode posts 94PA, 94PB, and 94PC. The third electrode posts or gate electrode posts 94PA, 94PB, and 94PC, along with the first electrode posts 92PA, 92PB, and 92PC, and the second electrode post 93PA, are formed to the same height using the same method, with the second electrode post 93PA serving as a common electrode. Of course, applicable... Figure 33 In the structure shown, one of the first electrode posts 92PA, 92PB, and 92PC is formed as a common electrode.

[0144] pass Figures 31 to 34 The semiconductor light-emitting element shown is not located in the external power supply section 98 (see reference). Figure 25On the side of the semiconductor light-emitting element mounted in a package, specifically on the light-emitting side of the semiconductor light-emitting element, i.e., the light-transmitting substrate 80 (light window) side, thin-film transistors 82A, 82B, and 82C are formed. On the other hand, if it is necessary to form the semiconductor layer 84 from an oxide semiconductor, the external power supply section 98 is constructed without being limited by the conditions required for depositing the semiconductor layer 84 onto the substrate (withstanding temperatures above 500°C). Figure 25 On the other hand, such as Figure 34 As shown, a semiconductor light-emitting element can be individually integrated into an external power supply unit 98 (see reference). Figure 25 Alternatively, the light-transmitting substrate 80 may not be cut or cut to a specific size or in a wafer-level state. Figure 34 The semiconductor light-emitting element is continuously connected in two or more states) and transferred to the external power supply unit 98 (see reference). Figure 25 This can reduce the time and resources required to transfer hundreds of thousands of chips or even package them.

[0145] Return to Figure 24 Regarding the passivation layer 94, it can also be named the non-conductive reflective film 94. (As for...) Figure 15 and Figure 16 As explained, the non-conductive reflective film 94 consists of a single-layer electrolyte film (e.g., SiO2). x TiO x It is composed of or combined with a multilayer electrolyte membrane (e.g., SiO2 / TiO2), such as Ta2O5 and MgF2.

[0146] Figure 35 This figure illustrates yet another example of the semiconductor light-emitting element of this disclosure, in which, apart from the dots where black matrix material (BM) is formed on the light-transmitting substrate 80, the semiconductor light-emitting element... Figure 24 The semiconductor light-emitting elements shown are almost identical. The side surfaces LS of semiconductor layers 30, 40, and 50 are tilted, thus functioning to emit the light generated by the active layer 40 to the surface U side of the light-transmitting substrate 80. As mentioned above, this is even more effective when the non-conductive reflective film 94 includes a reflective film such as DBR. To improve light extraction efficiency, rough surfaces S, S are formed on the surface W and / or surface U of the light-transmitting substrate 80. The rough surfaces S, S also provide the function of increasing the bonding area of ​​the adhesive layer 81 and / or the black matrix material BM. The non-conductive reflective film 94 has a light-reflecting function, thereby minimizing the light absorbed by the black matrix material BM formed on the surface W of the light-transmitting substrate 80. With this structure, when the display is not in operation, the screen appears relatively dark overall, providing a display that is not the screen in front of the display but rather... Figure 35The package and even the interlayer shown are semiconductor light-emitting elements in the form of the black matrix material used.

[0147] Figures 36 to 38 It is shown Figure 28 A diagram illustrating an example of a method for manufacturing a semiconductor light-emitting element disclosed herein, firstly, as... Figure 36 As shown, three semiconductor light-emitting element chips AA, BB, and CC are prepared. These three chips AA, BB, and CC are in the form of a substrate (ST; for example: a light-transmitting substrate 80, growth substrates 1 and 10), and may have, for example, [missing information - likely related to substrate configuration]. Figure 11 The publicly disclosed form or Figure 22 The disclosed configuration (insulating layer 5 can be omitted). Next, three semiconductor light-emitting element chips AA, BB, and CC are attached to a temporary substrate 73 (e.g., PDMS marking), and then the substrate ST is removed by wet etching (GaAs growth substrate) and / or laser ablation (Sapphire growth substrate). Additionally, wet etching can be used when removing the light-transmitting substrate 80 with the adhesive layer 81. For reference, in the case of transfer in the state of a GaAs growth substrate, the sacrificial layer can be separated during AlAs wet etching.

[0148] Next, as Figure 37 As shown in (a), three semiconductor light-emitting element chips AA, BB, and CC are transferred to a light-transmitting substrate 80 (e.g., sapphire, quartz, glass) having an adhesive layer 81 (e.g., an organic transparent adhesive (BCB, SOG, silicon, acrylate)). The adhesive layer 81 can be composed of an inorganic transparent adhesive such as SiO2, in addition to an organic material.

[0149] Next, as Figure 37 As shown in (b), the adhesive layer 81 in the area where the three semiconductor light-emitting element chips AA, BB, and CC are not located is removed to expose the light-transmitting substrate 80. In the case of organic transparent adhesives such as BCB, a dry etching process using plasma including oxygen (O2) is preferred. In the case of inorganic transparent bonding materials such as SiO2, a dry etching process using plasma including chlorine (Cl) is preferred.

[0150] As needed, such as Figure 37 As shown in (c), additional black matrix material (BM) can be formed; see reference. Figure 35The black matrix material BM is formed as follows: when it is a photosensitive material, it can be photolithographically patterned in the same way as PR; when it is a non-photosensitive material, after protecting the chip with chip protection PR material, the black matrix material BM is completely coated, and then etched by dry etching until the chip protection PR is exposed, and then the PR is removed, etc.

[0151] Next, as Figure 38 As shown in (a), a passivation layer 94A is formed. The passivation layer 94A can be formed in a liquid state (e.g., SOG) within a temperature range where the black matrix material BM will not suffer thermal damage. In this case, planarization can be achieved when the passivation layer 94A is formed in a liquid state.

[0152] Next, as Figure 38 As shown in (b), the required holes are formed in the passivation layer 94A, and the first electrodes 92A, 92B, 92C and the second electrodes 93A, 93B, 93C are formed in the three semiconductor light-emitting element chips AA, BB, and CC, respectively.

[0153] Next, as Figure 38 As shown in (c), a first pillar electrode 92PC and a second pillar electrode 93PA are formed as pad electrodes.

[0154] The three semiconductor light-emitting element chips AA, BB, CC, the first electrodes 92A, 92B, 92C, the second electrodes 93A, 93B, 93C, the first post electrodes 92PA, 92PB, 92PC, and the common electrode, i.e., the second post electrode 93PA, have the following characteristics: Figure 28 The configuration shown.

[0155] Finally, as Figure 38 (d) and Figure 38 (e) As illustrated, a sealant (99; white or black silicon) is formed (e.g., screen printed) and planarized to expose the first post electrode 92PC and the second post electrode 93PA.

[0156] Figure 39 This diagram illustrates yet another example of the manufacturing method of the semiconductor light-emitting element disclosed herein. First, with... Figure 36 Similarly, three semiconductor light-emitting element chips AA, BB, and CC are prepared as shown. These three chips AA, BB, and CC are configured with a substrate (ST; for example: a light-transmitting substrate 80, growth substrates 1 and 10), and may have, for example, [missing information - likely related to substrate configuration]. Figure 11 The shape or Figure 22The configuration shown (insulating layer 5 can be omitted). Preferably, the substrates ST for each of the three semiconductor light-emitting element chips AA, BB, and CC are prepared in a form that allows for laser ablation, so that laser ablation can be used when removing the substrate ST. For example, in the case of chips emitting ultraviolet light, blue light, and green light, the growth substrate (e.g., a sapphire substrate) is transparent, so it can be used directly as the substrate ST. In the case of chips emitting red light, the growth substrate (e.g., a GaAs substrate) is opaque and cannot be laser ablated, so it is used in… Figures 8 to 11 The process disclosed herein involves preparing the substrate ST as a light-transmitting substrate 80, such as... Figure 8 As shown in (e), after removing the growth substrate 10, the replacement Figure 9 (a) The adhesive layer 81 shown in the diagram utilizes a metal bonding layer 71 and a sacrificial layer 72 to attach the light-transmitting substrate 80 and the semiconductor regions 30, 40, and 50. As described above, this can be achieved by... Figures 8 to 11 The process shown is used to manufacture chips that emit ultraviolet light, blue light, and green light.

[0157] Next, as Figure 39 As shown in (a), three semiconductor light-emitting element chips AA, BB, and CC are attached to a temporary substrate 74 having an adhesive layer 75. The temporary substrate 74 is preferably made of a material with a similar or identical substrate ST and lattice constant to the respective substrates ST of the three semiconductor light-emitting element chips AA, BB, and CC; for example, a sapphire substrate can be used. When the adhesive layer 75 is an organic material, it can be made of, for example, BCB, polyimide, SU-8, parylene, epoxy, or silicon. Three semiconductor light-emitting element chips AA, BB, and CC are transferred to the chip level on the substrate ST, respectively. Various transfer process techniques are used (e.g., pick and place to mechanically move and arrange chips, stamping to move and arrange chips using patterned stamp structures made of adhesive materials (e.g., silicon-based PDMS), methods for moving and arranging chips using electrostatic or electromagnetic force structures, self-assembly by combining a fluid with specified uniform viscosity and an electromagnetic force structure, and laser-induced forward transfer by combining a laser source and an explosive adhesive material) to move and arrange chips onto the light-transmitting substrate 80 via adhesive layers 81, 81. Additionally, electrodes 92, 93 (see reference) are formed. Figure 11The transfer is performed in the state of (e)), so the quality of the chip can be identified before the transfer. Additionally, all electrode formation steps 92 and 93 (see reference) are performed before the transfer. Figure 11 (e) up to the high-temperature process required in the chip manufacturing process, thus the adhesive layer 75 has a wider range of material options.

[0158] Next, as Figure 39 As shown in (b), the substrate ST of each of the three semiconductor light-emitting element chips AA, BB, and CC is removed by laser ablation. Figure 9 As shown in (c), laser ablation is used to prevent damage to the adhesive layer 75 during the separation of the substrate ST. Afterwards, the metal bonding layer 71 is removed, preferably as follows: Figure 8 As shown in (e), an additional surface texturing process is performed to remove a portion or all of the undoped semiconductor region 23 (e.g., etching) to improve the light extraction efficiency in the first semiconductor region 30.

[0159] Next, as Figure 39 As shown in (c), an adhesive layer 81 (e.g., OCA, OCR, polyimide, SU-8, parylene, epoxy, silicon, SiO2, SOG) and a light-transmitting substrate 80 (e.g., sapphire, quartz, glass) are attached to the AA, BB, and CC sides of the three semiconductor light-emitting element chips. Then, a temporary substrate 74 and an adhesive layer 75 are removed. Alternatively, the adhesive layer 75 on the temporary substrate 74 side can be used as a planarization layer without removing it. The adhesive layer 81 on the light-transmitting substrate 80 side is composed of a transparent adhesive with organic or inorganic properties, such as OCA (Optical Clear Adhesive), OCR (Optical Clear Resin), polyimide, SU-8, parylene, epoxy, silicon, SiO2, or SOG. The adhesive layer 81 can also be BCB, as long as it is a high-transmittance adhesive that ensures high reliability in optics. The adhesive layer 81 ultimately remains in the interposer (PKG, Module) product. Therefore, to avoid quality problems, it is preferable to make it composed of materials with high temperature resistance and environmental resistance (OCA, OCR, M2, SiO2, SOG).

[0160] Preferably, such as Figure 39As shown in (d), a planarization layer 76 is formed, and first electrodes 92A, 92B, and 92C and second electrodes 93A, 93B, and 93C are formed on the three semiconductor light-emitting element chips AA, BB, and CC, respectively. Without removing the adhesive layer 75 on the temporary substrate 74 side, the electrode portions are exposed to form electrodes. This is to allow for the connection with... Figure 39 (a) Electrodes 92 and 93, respectively, have been formed on the three semiconductor light-emitting element chips AA, BB, and CC (refer to...). Figure 11 (e) Distinguish between the first electrodes 92A, 92B, and 92C and the second electrodes 93A, 93B, and 93C, which are called wiring electrodes. Electrodes 92 and 93 (refer to...) Figure 11 (e) can be composed solely of a transparent electrode 91 (e.g., ITO), or a reflective electrode or reflective electrode structure (e.g., Ti / Ag, Al / Au) composed of a highly reflective metal (e.g., Ag, Al, Au), or simply composed of an ohmic metal / blocking metal / bonding metal (e.g., Cr / Ni / Au, Ti / Ni / Au), or a combination thereof. Therefore, regarding electrodes 92, 93 (refer to...) Figure 11 (e) can be understood as including Figures 1 to 38 This concept applies to various forms of electrode materials, electrode structures, and electrode configurations applicable to semiconductor light-emitting element chips. The planarization layer and even the step reduction layer 76 are... Figure 21 The liquid insulating layer 5 shown (e.g., thermosetting plastics such as OCA, OCR, polyimide, SU-8, parylene, epoxy, silicone, BCB, acrylate, SOG, etc.) can also be made of simple materials. Figure 38 The passivation layer or non-conductive reflective film 94A shown can be formed by such a combination. For example... Figure 37 (b) shows the removal of the adhesive layer 81 from the area where the three semiconductor light-emitting element chips AA, BB, and CC are not located, thus exposing the light-transmitting substrate 80. As shown, regarding the wiring operation for the micro-LEDs, instead of screen printing (where errors can occur in the orientation and position of the micro-LEDs during placement), the wiring is performed at the wafer level, i.e., with multiple semiconductor light-emitting element chips AA, BB, and CC fixed on the light-transmitting substrate 80, through a vapor deposition process such as sputtering, thereby improving the accuracy of the wiring operation. The multiple semiconductor light-emitting element chips AA, BB, and CC, wired in this way, can be directly attached to the external power supply unit 98 (see reference). Figure 25 ).exist Figure 39Only three are shown on the multiple semiconductor light-emitting element chips AA, BB, and CC, but this is only an example.

[0161] Finally, as Figure 39 As shown in (e), by means of Figure 28 The configuration shown forms electrode posts 92PC and 93PA, which are supported by sealant 99. Regarding electrode posts 92PC and 93PA, from the connection to the external power supply section 98 (see reference...) Figure 25 In terms of meaning, it can be called a bonding pad.

[0162] Figure 40 and Figure 41 This is a diagram illustrating yet another example of the manufacturing method of the semiconductor light-emitting element disclosed herein, and... Figure 39 Different, such as Figure 40 As shown in (a), three semiconductor light-emitting element chips AA, BB, and CC are prepared, each having only a light-transmitting electrode 91 (e.g., ITO).

[0163] Next, from Figure 40 (b) to Figure 41 (a) Until execution and from Figure 39 (b) to Figure 39 (d) The same process as before, such as Figure 41 As shown in (b), a mesa process is performed to expose the n-type semiconductor region (see reference). Figure 11 (b)), and then form Figure 39 Electrodes 92 and 93 as described in the text (refer to...) Figure 11 (e) and passivation layer 94A. Of course, electrodes 92 and 93 can also be interchanged (see reference). Figure 11 (e)) and the formation sequence of passivation layer 94A.

[0164] Next, as Figure 41 As shown in (c), first electrodes 92A, 92B, 92C and second electrodes 93A, 93B, 93C are formed as wiring electrodes. Depending on the requirements, a planarization layer or even a step reduction layer 76 is first formed, and then the first electrodes 92A, 92B, 92C and the second electrodes 93A, 93B, 93C are formed.

[0165] Finally, as Figure 41 As shown in (d), with Figure 39 (e) Similarly, electrode posts 92PC and 93PA are formed as bonding pads and supported by sealant 99.

[0166] and Figure 39 The manufacturing methods shown are compared. Figure 40 and Figure 41The manufacturing method shown clearly possesses features and advantages. Firstly, as a feature, the manufacturing process is designed as follows: a process of high-speed transfer of only electrically and optically good products, i.e., relatively large chips, to a temporary substrate 74 having an adhesive layer 75, followed by a laser ablation process to remove the substrate ST from the three semiconductor light-emitting element chips AA, BB, and CC respectively. Figure 41 (a) Then, on a wafer-level substrate (e.g., a circular or quadrilateral sapphire interposer), a chip fabrication process including photolithography is used to fix the three semiconductor light-emitting element chips, ensuring the degree of freedom in size adjustment and the correct chip position (e.g., the same as the chip position on the photolithographic mask). Additionally, as an advantage, the concept of redundancy is introduced to improve yield. There is no need to add additional chips to transfer light-emitting elements that emit the same color of light. Figure 41 (b) In step 3, the three semiconductor light-emitting element chips are etched and separated into two or more chips, which makes it easy to connect the same color and / or the three semiconductor light-emitting element chips in series, parallel, or series-parallel connection.

[0167] Figure 42 This figure illustrates another example of the manufacturing method of the semiconductor light-emitting element disclosed herein, showing a method of removing each substrate ST while three semiconductor light-emitting element chips AA, BB, and CC are attached to an external power supply unit 98. The external power supply unit 98 has a configuration where conductive portions CV are formed in vias, and is formed of a material similar to or the same as the substrate ST (e.g., sapphire). Such a configuration of an external power supply unit 98 is disclosed in U.S. Patent Publication No. 2017-0317230. As the adhesive layer 81, an ACF (Anisotropic Conductive Film) can be used, and soldering can also be employed. The external power supply unit 98 illustrated herein can be considered as a substrate ST.

[0168] Figure 43 This diagram illustrates an example of a semiconductor light-emitting element applicable to this disclosure, showing a configuration in which three semiconductor light-emitting elements E, F, and G are housed within a single pixel (approximately 400 μm x 400 μm in size). Figure 28The illustrated semiconductor light-emitting element differs in that the three semiconductor light-emitting element chips AA, BB, and CC do not use a single transparent substrate, but rather each uses its own transparent substrate 80°. The three semiconductor light-emitting elements E, F, and G each possess a minimum size that can be cut from the transparent substrate (currently 100μm x 200μm, but potentially 50μm x 100μm in the future) (thickness less than 100μm). The three semiconductor light-emitting element chips AA, BB, and CC each possess a size smaller than the minimum size that can be cut from the transparent substrate (one side of a microLED is less than 50μm), thus overcoming the size limitations of the transparent substrate. In fact, the light-emitting element chips are microLED-sized, but the size and manufacturing process of the transparent substrate and bonding electrodes (92PC, 93PC) are the same as for mini-LEDs, easily enabling the creation of microLED display products. This structure reduces color crosstalk effects between the three semiconductor light-emitting elements E, F, and G. Furthermore, although not illustrated, a pixel is formed by grouping three semiconductor light-emitting elements E, F, and G using a known CSP process. In this case, the transparent substrate 80 is electrically insulating, and thus can be a pixel bound together by filling it with white or black resin (EMC, SMC, Black Matrix) while the chips are arranged in contact or maintaining a predetermined distance between them. In this case, the height of the white or black resin filling between the chips is at least the thickness of the transparent substrate 80.

[0169] At least one of the three semiconductor light-emitting elements E, F, and G constitutes a configuration. Figure 24 and Figure 35 The configuration shown allows for the use of p-sideup flip chips while utilizing the first electrode post 92PC and the second electrode post 93PC, i.e., the large bonding pads, thereby improving bonding strength. When the growth substrate is used directly as the light-transmitting substrate 80, the adhesive layer 81 is omitted.

[0170] In addition, at least one of the three semiconductor light-emitting elements E, F, and G constitutes Figure 27 In the configuration shown, the semiconductor light-emitting element chips AA and BB are connected in series or in parallel (this is achieved by connecting the first electrodes 92A and 93A and the second electrodes 92B and 93B in series or in parallel), so that even if one of the semiconductor light-emitting element chips AA and BB fails, the display can still be used without repair. Similarly, when the growth substrate is used directly as the light-transmitting substrate 80, the adhesive layer 81 is omitted.

[0171] In addition, at least one of the three semiconductor light-emitting elements E, F, and G constitutes Figure 31 The configuration shown allows for various designs of the electrical wiring below the pixels and even the electrical wiring (configuration structure of source lines and data lines) of the entire display. Of course, in addition to the thin-film transistor 82, non-light-emitting elements such as Zener diodes can be included. Similarly, if the growth substrate is used directly as the light-transmitting substrate 80, the adhesive layer 81 can be omitted.

[0172] Furthermore, the concept of redundancy is introduced to improve yield. There is no need to add additional chips to transfer light-emitting elements that emit the same color of light. Although not illustrated, by etching the three semiconductor light-emitting elements E, F, and G onto two or more light-emitting element chips AA, BB, and CC respectively, it is easy to achieve series, parallel, or series-parallel connections between semiconductor light-emitting element chips of the same color and / or the three semiconductor light-emitting element chips.

[0173] Figure 44 and Figure 45 This is a diagram illustrating yet another example of a semiconductor light-emitting element applicable to this disclosure. First, as shown... Figure 44 As shown in (a), semiconductor regions 30, 40, and 50 are provided on the substrate ST. Next, as... Figure 44 As shown in (b), the light-emitting portion M is retained in a mesa shape suitable for the size of a microLED, and semiconductor regions 30, 40, and 50 are etched. At this time, the n-type semiconductor region 30 is retained. Next, a first electrode 92 and a second electrode 93 are formed as ohmic electrodes. Then, as... Figure 44 As shown in (c), a planarization layer and even a step reduction layer 76 are formed. Next, as... Figure 44 As shown in (d), a first electrode 92B and a second electrode 93B are formed as wiring electrodes and / or bonding pads to prepare a semiconductor light-emitting element chip AA. Next, as... Figure 45 As shown in (a), with Figure 42 Similarly, as shown, the semiconductor light-emitting element chip AA is bonded to the external power supply section 98 having an adhesive layer 81 (e.g., ACF), and the substrate ST is removed. The external power supply section 98 in this example can be considered as a substrate ST. Next, as... Figure 45 As shown in (b), a black matrix material BM is preferably formed in the n-type semiconductor region 30, excluding the light-emitting region L. The black matrix material BM also serves as a protective layer; therefore, in addition to the black matrix material BM, materials such as a dielectric layer (SiO2) or white silicon, which can be used as a protective layer, can be employed. Figure 35 As shown, a rough surface s can be formed by surface texturing after removing the substrate ST from the n-type semiconductor region 30. Finally, as... Figure 45 As shown in (c), Figure 43The configuration shown arranges semiconductor light-emitting elements E, F, and G within a single pixel. This structure enables... Figure 43 The advantages of the structure shown. Furthermore, in Figure 43 In the structure shown, the semiconductor light-emitting element chips AA, BB, and CC each use a transparent substrate 80, thus cross-talk can occur between them. Figure 45 In the case of the structure shown, such color crosstalk can be reduced.

[0174] Figure 46 This figure illustrates an example of a method for transferring semiconductor light-emitting element chips and semiconductor light-emitting elements according to this disclosure, specifically demonstrating the transfer of semiconductor light-emitting element chips AA, BB, and CC onto a transfer receiving substrate 98P. Figure 46 The 98P is used as a transfer storage substrate to illustrate a wiring substrate, but of course, other substrates can also be used. Figure 28 The light-transmitting substrate 80 shown Figure 31 The light-transmitting substrate 80 shown Figure 34 The light-transmitting substrate 80 shown.

[0175] like Figure 46As shown in (a), firstly, the sorted semiconductor light-emitting element chips AA are attached to a carrier 80C containing a laser reactive material 81L for preparation. The laser reactive material 81L is a material that fixes the semiconductor light-emitting element chips AA to the carrier 80C and removes the semiconductor light-emitting element chips AA from the carrier 80C when irradiated by a laser LS. The laser reactive material 81L can be divided into an ablation process, in which the semiconductor light-emitting element chips AA are removed together with the residue of the absorbent material by absorbing the laser light with optical energy and instantly converting it into heat energy and heating it to a high temperature above the melting point of the absorbent material, and then removing the semiconductor light-emitting element chips AA together with the absorbent material residue; and a blistering process, in which the semiconductor light-emitting element chips AA attached to the absorbent material are removed by mechanical expansion force through thermal expansion or gas explosion when the absorbent material undergoes a thermochemical decomposition reaction with the laser light during irradiation. The laser reactive material 81L can be any material that can undergo both the ablation process and the blistering process. Furthermore, it could also be a combination of the two processes described above. Firstly, in the case of the ablation process, the material directly formed on the substrate at 80°C could be a single-crystal group 3-5 nitride semiconductor including GaN, a single-crystal group 2-6 oxide semiconductor including ZnO, a transparent polycrystalline conductive oxide including ITO, a polycrystalline conductive nitride including TiN, or a material including SiO2 or SiN. x The amorphous dielectric is preferably used in a multilayer structure. Next, in the case of a blstering process, a polyimide (PI) film, a photo-decomposition polymer (triazene polymer) layer, and a specific metal film (Ti, Au, Pt, Cr, Al, Ag, Cu) layer can be formed on the carrier 80C. Various structures can be formed by combining the materials from the ablation and blistering processes (for example, InGaN / PIFilm, ITO / PIFilm, ZnO / PIFilm, triazene polymer layer / PIFilm), and the sorted semiconductor light-emitting element chip AA is transferred to the transfer receiving substrate 98P or... Figure 47When the transfer receiving substrate 98IP with adhesive layer 81IP is shown, a structure that is beneficial to the characteristics and yield of semiconductor light-emitting element chip AA and / or process simplification is preferred. The carrier 80C is basically any light-transmitting material, and is not limited to inorganic or organic materials. Inorganic materials that can be used as carrier 80C include glass, sapphire, and quartz, while representative examples of organic materials include silicon-based materials including PDMS.

[0176] Next, the carrier 80C is moved via the transfer receiving substrate 98P equipped with the mask MS. The mask MS has an open shape that exposes the pads (Q, Q; e.g., SACT6, ESP) of the transfer receiving substrate 98P, which is bonded to the semiconductor light-emitting element chip AA. The semiconductor light-emitting element chip AA, which is attached and detached from the carrier 80C, is transferred to the transfer receiving substrate 98P by irradiation with laser LS. Tolerances are provided to reduce errors in posture and position. The mask MS has holes MH formed according to the size of the semiconductor light-emitting element chip AA. The mask MS is manufactured in the same manner as stencil shadow masks, which are generally known. In particular, Invar alloy, a metal material capable of ultra-precision machining, is preferred, but there are no limitations on the material and / or manufacturing process. In particular, ceramic, sapphire, and glass materials that can form micro-holes can be used instead of Invar metal materials.

[0177] Next, laser LS is irradiated with the disassembled semiconductor light-emitting element chip AA and the hole MH in an aligned state, thereby transferring the semiconductor light-emitting element chip AA from the carrier 80C to the transfer receiving substrate 98P. On the other hand, using, as Figure 24 In the case of the semiconductor light-emitting element chip AA with the shape shown, a light-transmitting substrate 80 (see reference) is provided on the side irradiated by the laser. Figure 24 Therefore, it can prevent damage to the chip caused by laser irradiation.

[0178] Next, as Figure 46 As shown in (b), the same transfer operation is performed on the semiconductor light-emitting element chip BB.

[0179] Next, as Figure 46 As shown in (c), the same transfer operation is performed on the semiconductor light-emitting element chip CC.

[0180] When multiple semiconductor light-emitting element chips AA, BB, and CC, which emit different lights, are repeatedly transferred to different positions on a transfer receiving substrate 98P, the transfer process requires a long time. For example, if the conventional pick and place process is used for direct transfer, since the transfer receiving substrate 98P has tens of thousands to hundreds of thousands of pixels, tens of thousands to hundreds of thousands of ×3 operations are required, necessitating a large amount of pick and place equipment and a long processing time. According to this disclosure, a conventional sorting machine is used in the sorting process, but a laser capable of high-speed transfer is used in the transfer process. That is, a technique is disclosed in which semiconductor light-emitting element chips AA, BB, and CC are sorted into a carrier 98C using a conventional pick and place-based sorting machine and chip bonding machine, and then the semiconductor light-emitting element chips AA, BB, and CC are transferred to the transfer receiving substrate 98P at high speed using a laser LS. Furthermore, to prevent errors in the position and orientation of the semiconductor light-emitting element chips AA, BB, and CC that can occur through laser LS irradiation, a mask MS is introduced. When using conventional pick and place equipment, the average level is 25-200 KUPH (Units Per Hour), although there may be some differences. However, when using the laser irradiation method, it can be above 100 MUPH.

[0181] In addition to semiconductor light-emitting element chips AA, BB, and CC, this transfer method can also be applied to the transfer of semiconductor light-emitting elements (including the form of semiconductor light-emitting element chips) disclosed herein.

[0182] Figure 47 The figure illustrates yet another example of a method for transferring a semiconductor light-emitting element chip and a semiconductor light-emitting element according to this disclosure. Apart from the case where a transfer receiving substrate 98IP with an adhesive layer 81IP is used instead of a transfer receiving substrate 98P, Figure 47 (a) to Figure 47 (c) process and Figure 46 (a) to Figure 46 (c) The process is the same. The transfer storage substrate 98IP, for example, has... Figure 37 The shape or shape of the light-transmitting substrate 80 shown Figure 42 The external power supply unit 98 is shown in its configuration. Depending on the needs, such as... Figure 47 As shown in (c), an additional process for removing the mask MS can be performed. The adhesive layer 81IP essentially comprises sticky physical properties, a representative example being a silicon-based material including PDMS, and may also include, depending on the intended use, other materials. Figure 46The laser reactive material 81L mentioned above is a foaming material that loses its viscous properties and expands rapidly while being heated from the outside. In the case of an external power supply unit 98, ACF (Anisotropic Conductive Film) can be used. For example... Figure 46 As shown, the concept of a stencil shadow mask can be applied as another method, using general photolithography processes and PR materials for patterning. In this way, the semiconductor light-emitting element chips AA, BB, and CC transferred to the transfer receiving substrate 98IP can be used as themselves (in the case of the external power supply unit 98) or directly transferred to pixels, other carriers, or interposers. Of course, depending on the application, the orientation of the electrodes of the semiconductor light-emitting element chips AA, BB, and CC can be different. For example... Figure 47 As shown in (e), when transferring to other locations, the following is omitted. Figure 47 The process shown in (d) prevents the semiconductor light-emitting element chips AA, BB, and CC from becoming disordered during the re-transfer process.

[0183] Return to Figure 39 and Figure 41 When using an organic adhesive like BCB as the adhesive layer 81, BCB is best suited for chips that emit red light. However, for chips emitting ultraviolet, blue, and green light, there is a possibility of thermal degradation and discoloration, so the use of an inorganic adhesive layer needs to be considered. From the perspective of wafer bonding, wafer bonding using an organic adhesive like BCB is called adhesive bonding, while wafer bonding using materials like Si or SiO2 without any other materials sandwiched in between is called direct wafer bonding (DWB). For DWB to be applicable, the two surfaces involved in the bonding need to be clean, flat, and smooth (see https: / / en.wikipedia.org / wiki / Direct_bonding). On the other hand, SiO2-SiO2 direct bonding (DWB) is described in detail in the paper (Oxide-Oxide Thermocompression Direct Bonding Technologies with Capillary Self-Assembly for MultiChip-to-Wafer Heterogeneous 3D System Integration; Micromachines. 2016 Oct 10; 710).

[0184] Figure 48 This diagram illustrates the problems encountered when applying DWB at the wafer level to semiconductor light-emitting devices, as shown below. Figure 48 As shown in (a), the wafer formed by the growth substrate 10 made of a heterogeneous material and the semiconductor regions 30, 40, and 50 grown thereon typically exhibits a curved shape at room temperature due to the differences in their lattice constants and coefficients of thermal expansion. For example, in the case of a red light-emitting wafer using a GaAs substrate, the center bow is approximately 150–250 μm, while in the case of a blue light-emitting wafer using a sapphire substrate, the center bow is approximately 30–100 μm. Figure 48 As shown in (b), SiO261 is formed on semiconductor regions 30, 40, and 50, and SiO289 is formed on the light-transmitting substrate 80. When they are bonded using the DWB method, as shown... Figure 48 As shown in (c), the wafer is bent, thus creating a region R along the edge of the wafer that is not properly bonded.

[0185] Figure 49 This is a diagram illustrating yet another example of a method for manufacturing a semiconductor light-emitting element according to the present disclosure, in conjunction with... Figure 40 (a) and Figure 40 (b) Perform in the same manner Figure 49 (a) and Figure 49 (b) process, then as Figure 49 As shown in (c), after removing the substrate ST, it is preferable to form an adhesive layer 81a made of SiO2 in the n-type semiconductor region 30 (e.g., PECVD method) after reducing the thickness of the n-type semiconductor region 30. SOG can also be used, or SOG can be coated on SiO2 deposited by PECVD. SOG is sticky, thus facilitating initial bonding. Figure 49 (c) The adhesive layer 81a is formed only on the upper part of the semiconductor region, but it can also be formed on the adhesive layer 75. Next, as... Figure 49 As shown in (d), an adhesive layer 81b made of SiO2 is also prepared on the light-transmitting substrate 80. Next, preferably, after plasma surface treatment, DWB is performed using water (H2O) (see reference). Figure 49 (e)). Adhesive layers 81a and 81b constitute adhesive layer 80. Subsequent processes are... Figure 40 (d) and Figure 41 The situation is the same as that disclosed in the document. Below, for ease of explanation and to be consistent with... Figure 36 (a) The semiconductor light-emitting element chips AA, BB, and CC with electrodes shown are distinguished. Figure 40 (a) and Figure 49The semiconductor light-emitting element chips AA, BB, and CC disclosed in (a) are referred to as semiconductor light-emitting element wafers (Die). The semiconductor light-emitting element wafer only needs to have semiconductor regions 30, 40, and 50 on the growth substrate 10 or the light-transmitting substrate 80; it is not necessary to have a light-transmitting electrode 91 and / or an adhesive layer 81a. With this structure, a semiconductor light-emitting element chip, or even a semiconductor light-emitting element, can be formed by an inorganic adhesive layer 80. Additionally, a strongly magnetic metal layer (not shown) such as nickel (Ni), cobalt (Co), or iron (Fe) can be additionally provided on the adhesive layer 91a, which is required during the transfer process when magnetic and / or electromagnetic forces are utilized. With this structure, the semiconductor light-emitting element chip is formed on the light-transmitting substrate 80 by transfer at the semiconductor light-emitting element wafer level, not at the wafer level, thereby achieving... Figure 48 The wafer-level fabrication of semiconductor light-emitting element chips and even semiconductor light-emitting elements with inorganic binders, as shown in the diagram, solves the problem caused by substrate bending. On the other hand, as... Figure 41 As shown in (a'), the semiconductor light-emitting element chips AA, BB, and CC are etched separately to divide them into multiple parts, thereby reducing the number of transfers of the semiconductor light-emitting element chips AA, BB, and CC. In the case of chips requiring very small size, there are limitations on the transfer method, but by adopting this method, the transfer method can be performed without limitation even when chips requiring very small size are required.

[0186] Figure 50 This is a diagram illustrating yet another example of a method for manufacturing a semiconductor light-emitting element according to the present disclosure, as shown below. Figure 50 As shown in (a), an adhesive layer 75a composed of SiO2 is formed on the light-transmitting electrode 91, as follows: Figure 50 As shown in (b), an adhesive layer 75b composed of SiO2 is also formed on the temporary substrate 74, and they are bonded together by the DWB method to form the adhesive layer 75. On the other hand, in order to remove the temporary substrate 74 by laser ablation, a space is provided between the adhesive layer 75b and the temporary substrate 74. Figure 8 The sacrificial layer 72 and the protective layer 71 are shown. The protective layer 71 is not mandatory; it can be provided by the metal bonding layer 71 (see reference). Figure 8 The same material forms the protective layer 71, but it does not serve an adhesive function; rather, it acts as a protective layer during laser ablation. For example... Figure 50 As shown in (c), after Figure 49 (d) and Figure 49Following process (e), the temporary substrate 74 is removed by laser ablation. Subsequent processes are the same. This structure allows for the fabrication of mini-LEDs or micro-LEDs without the use of organic adhesives. Subsequent processes are the same as... Figure 49 (e) The subsequent steps are the same.

[0187] Figure 51 and Figure 52 This is a diagram illustrating yet another example of a method for manufacturing a semiconductor light-emitting element according to the present disclosure, as shown below. Figure 51 As shown in (a), with Figure 8 (a) Similarly, semiconductor regions 20, 30, 40, and 50 are formed on the growth substrate 10. Then, as... Figure 51 As shown in (b), an adhesive layer 71a is formed in the second semiconductor region 50 (P-type semiconductor region). Next, as... Figure 51 As shown in (c), a sacrificial layer 72, a metal bonding layer, a protective layer 71, and an adhesive layer 71b are formed on the first light-transmitting substrate 70. Although with Figure 8 The manufacturing method of the semiconductor light-emitting element shown is similar, except that it utilizes a metal bonding layer 71 (see reference). Figure 8 In addition to metal bonding, adhesive bonding can also be used. If laser ablation is not used in the subsequent process of removing the first transparent substrate 70, the sacrificial layer 72 and protective layer 71 can be omitted. For process stability, in the second semiconductor region 50 (P-type semiconductor region)... Figure 8 (b) Similarly, a protective layer 60 may be provided. When separating the first light-transmitting substrate 70 using LLO, a sacrificial layer 72 and an adhesive layer 71b are required. The adhesive layer 71b consists only of a metal bonding layer 71 (see reference). Figure 8 It is composed of a protective layer 71 and an organic adhesive. When separating the first light-transmitting substrate 70 using CLO, the sacrificial layer 72 of LLO is not required.

[0188] Next, as Figure 51 As shown in (d), adhesive layers 71a and 71b are bonded together to form adhesive layer 71c. That is, with... Figure 48 Unlike the situation shown, it does not utilize the DWB method, but primarily relies on adhesives with viscosity or that form a liquid state (e.g., BCB) or metal overlap to avoid causing... Figure 48 The problem shown in (c) is addressed by bonding the first transparent substrate 70 side and the second semiconductor region (50: P-type semiconductor region) side. Then, as... Figure 51As shown in (e), the growth substrate 10 is removed. In the case of a GaAs substrate, CLO (Chemical Lift Off) using a chemical etching solution is employed; in the case of a sapphire substrate, LLO (Laser Lift Off) using a laser beam energy is employed. On the other hand, by removing the growth substrate 10, the bending caused by the adhesion of the growth substrate 10 and the semiconductor regions 30, 40, and 50, which have different lattice constants and coefficients of thermal expansion, can be alleviated, and the adhesive layer 71c can absorb some of the bending relief. Next, as... Figure 52 As shown in (a), an adhesive layer 81a made of SiO2 is formed on the side of the first semiconductor region 30 (N-type semiconductor region), and an adhesive layer 81b made of SiO2 is formed on the side of the second light-transmitting substrate 80. Next, as... Figure 52 As shown in (b), adhesive layers 81a and 81b are bonded using the DWB method, thereby forming adhesive layer 81. Finally, as... Figure 52 As shown in (c), the first transparent substrate 70 is removed by laser ablation. As described above, when using a CLO, the sacrificial layer 72 and the metal bonding layer 71 can be omitted. Afterwards... Figure 10 The wafer of this disclosure is completed by the process shown, thereby manufacturing Figure 40 The semiconductor light-emitting element wafer shown is or has undergone Figure 11 The process shown is used to manufacture semiconductor light-emitting element chips. Of course, in Figure 11 Prior to the process shown, a light-transmitting electrode 91 may be formed in the second semiconductor region 50 (P-type semiconductor region). Figure 40 ), and it cannot be ruled out that Figure 8 In step (a), a transparent electrode 91 is formed.

[0189] Figure 53 This is a diagram illustrating yet another example of a method for manufacturing a semiconductor light-emitting element according to the present disclosure, as shown below. Figure 53 As shown in (a), the first semiconductor region (30: N-type semiconductor region) side is bonded to the light-transmitting substrate 80, thereby directly enabling the application of a material suitable for... Figure 51 (c) Structure. A protective layer 60 and an adhesive layer 81a made of SiO2 are formed in the first semiconductor region (30; N-type semiconductor region), and a sacrificial layer 72, a protective layer 71 and an adhesive layer 81b made of SiO2 are provided on the second light-transmitting substrate 80 side. Figure 53 (b) and Figure 53 The process shown in (c) is similar to Figure 52 (b) and Figure 50 The process shown in (c) is the same. With this structure, semiconductor light-emitting element wafers, semiconductor light-emitting element chips, and semiconductor light-emitting element packages with a second light-transmitting substrate 80 that can be removed by laser ablation can be manufactured.

[0190] Figure 54 This figure illustrates yet another example of a method for manufacturing a semiconductor light-emitting element according to the present disclosure. Figure 54 (a) Re-shown Figure 9 The shape shown in (b). Next, as... Figure 54 As shown in (b), the thickness of the second transparent substrate 80 is reduced to 30 μm to 100 μm by masking it. Next, as... Figure 54 As shown in (c), the third light-transmitting substrate (80a: for example, a sapphire substrate) is bonded to the second light-transmitting substrate 80 side through the metal bonding layer 71 while the sacrificial layer 72 is sandwiched between it. Of course, the metal bonding layer 71 can be formed on the second light-transmitting substrate 80. The third light-transmitting substrate 80a is made of the same material as the second light-transmitting substrate 80. Then, while the second light-transmitting substrate 80 is supported by the third light-transmitting substrate 80a, the process is performed from... Figure 9 (c) to Figure 10 (b) The process continues until the third light-transmitting substrate 80a is separated from the second light-transmitting substrate 80. This process reduces the thickness of the second light-transmitting substrate 80, thereby minimizing the size of the wafer or chip in the process of manufacturing a semiconductor light-emitting element wafer or chip from a wafer state (dicing process). That is, with a thicker light-transmitting substrate 80, it is difficult to manufacture the wafer into a single wafer or chip, and particularly difficult to manufacture micro-LEDs. However, according to this disclosure, by reducing the thickness of the second light-transmitting substrate 80 while the first light-transmitting substrate 70 is present, and removing the first light-transmitting substrate 70 while the third light-transmitting substrate 80a is present, it is possible to stably perform the process to achieve… Figure 10 (b) is the process. In Figure 52 (b) Publicly available form and Figure 53 The configuration shown in (b) is also applicable. That is, a metallic bonding agent or an organic adhesive can be used for bonding with the first light-transmitting substrate 70, an organic adhesive or DWB can be used for bonding with the second light-transmitting substrate 80, and various bonding methods such as adhesive bonding, metallic bonding agent, and DWB can be used for bonding with the third light-transmitting substrate 80a. When DWB is used for bonding with the second light-transmitting substrate 80, it is preferable to use adhesive bonding for bonding with the first light-transmitting substrate 70.

[0191] Below, in addition to the growth substrates (sapphire substrates and GaAs substrates) mentioned above, we will further expand the application to heterogeneous growth substrates such as Si substrates, and thus summarize the examples described above for explanation.

[0192] Table 1 shows the results in Figure 8 , Figure 9 , Figure 11 and Figure 23 The examples shown are applicable to Si substrates, summarized as follows.

[0193] [Table 1]

[0194]

[0195] In the case of a Si substrate, similar to a sapphire substrate, the growth substrate 10 can be used as a growth substrate for semiconductor light-emitting elements that emit ultraviolet light, blue light, and green light. Except for a process where mechanical polishing (grinding) is performed before removing the growth substrate 10, followed by complete etching using a wet solution, or a CMP (Chemical Mechanical Polishing) process where mechanical polishing (grinding) is performed simultaneously with a wet solution to finish the process, the same process as when using a sapphire substrate can be applied. Since the growth substrate 10 is removed via a CMP process, the sacrificial layer required for either a LLO (Laser Lift-Off) process or a CLO (Chemical Lift-Off) process can be omitted during the growth of semiconductor regions 20, 30, 40, and 50. For reference, the LLO and CLO processes require a sacrificial layer to separate the growth substrate 10 and the first light-transmitting substrate 70 during the growth of semiconductor regions 20, 30, 40, and 50 or during the attachment of the first light-transmitting substrate 70, while the CMP process does not require an additional sacrificial layer. Specifically, in the case of a GaAs growth substrate for a red light-emitting element, when the GaAs growth substrate is separated and removed using the CLO process, an AlAs material layer is preferably used as the sacrificial layer. However, when the GaAs growth substrate is removed by the CMP process, a GaInP material layer is preferably inserted into the etch stop layer (ESL) during the CMP process to protect semiconductor regions 20, 30, 40, and 50. The CMP process can be considered a type of CLO process, and in the following description, it should be understood that the CLO process includes the CMP process. Table 2 lists the sacrificial layers for the growth of semiconductor regions 20, 30, 40, and 50. Figures 36 to 38 The examples shown are applicable to Si substrates, and the following is a summary.

[0196] [Table 2]

[0197]

[0198] Similar to Table 1, except for the substrate (ST; e.g., transparent substrate 80, growth substrate 1, 10) removal process, the same processes as when using a sapphire substrate can be applied. Table 3 lists the processes for... Figure 39 The examples shown are applicable to Si substrates, and the following is a summary.

[0199] [Table 3]

[0200]

[0201] Unlike the cases shown in Table 2, there are differences in the utilization of LLO when removing the substrate ST from semiconductor light-emitting element chips AA, BB, and CC manufactured using sapphire substrates, GaAs substrates, and Si substrates as growth substrates 10. When a light-transmitting substrate such as a sapphire substrate is used as the growth substrate 10, and the growth substrate 10 is directly used as the substrate ST, a sacrificial layer can be introduced during the growth of semiconductor regions 20, 30, 40, and 50. However, when the growth substrate 10 is not a light-transmitting substrate, or when the growth substrate 10 is removed and the (second) light-transmitting substrate 80 is used as the substrate ST, as... Figure 39 , Figure 53 and Figure 54 As explained, a metal bonding layer 71 and a sacrificial layer 72 are provided between the transparent substrate 80 and the semiconductor regions 30, 40, and 50, allowing the substrate ST to be removed via a LLO process. When the substrate ST is a non-transparent substrate (e.g., GaAs substrate, Si substrate), it can naturally be removed via a CLO process. In this case, when the semiconductor light-emitting element chips AA, BB, and CC emit blue light, green light, and red light sequentially, the substrate ST can be removed using various methods such as LLO-LLO-LLO, LLO-LLO-CLO, CLO-CLO-CLO, and CLO-CLO-LLO. Table 4 lists the methods for removing the substrate ST. Figure 40 and Figure 41 The examples shown are applicable to Si substrates and are summarized below.

[0202] [Table 4]

[0203]

[0204] The process is performed in the same manner as shown in Table 3. Furthermore, for substrate ST made of sapphire substrate, the LLO process is applicable; for substrate ST made of GaAs substrate and Si substrate, the CLO process can also be applied. That is, after a semiconductor light-emitting element chip or wafer emitting ultraviolet light, blue light, or green light is grown into a growth substrate 10 made of sapphire, the sapphire growth substrate 10 can be used directly as substrate ST, or a light-transmitting substrate 80 made of sapphire after two bonding processes can be used as substrate ST. The sapphire substrate ST can be removed by the LLO process. Similarly, after a semiconductor light-emitting element chip or wafer emitting ultraviolet light, blue light, or green light is grown into a growth substrate 10 made of Si, the Si growth substrate 10 can be used directly as substrate ST, or a light-transmitting substrate 80 made of sapphire after two bonding processes can be used as substrate ST. The Si substrate ST can be removed by the CLO process, and the sapphire substrate ST can be removed by the LLO process. After a semiconductor light-emitting element chip or even a wafer emitting red light is grown onto a growth substrate 10 made of GaAs, the GaAs growth substrate 10 can be used directly as substrate ST, or a light-transmitting substrate 80 made of sapphire after two bonding processes can be used as substrate ST. The GaAs substrate ST can be removed by a CLO process, and the sapphire substrate ST can be removed by an LLO process. The substrate ST is either a growth substrate or a support substrate bonded by bonding. In the above cases, sapphire substrates and Si substrates are used as examples for semiconductor light-emitting element chips or wafers emitting ultraviolet light, blue light, and green light, and GaAs substrates are used as examples for semiconductor light-emitting element chips or wafers emitting red light. However, this can of course be applied to all growth substrates and support substrates that are currently available and can be developed in the future. In addition, regarding the number of bonding operations on the support substrate, it is described as 2 times based on the preferred example of a p-sideup chip or wafer, but it can be not only an even number of bonding operations such as 4 or 6 times, but also an odd number of bonding operations such as 1, 3, or 5 times. Furthermore, when the substrate ST is made of a light-transmitting material, a sacrificial layer suitable for CLO (Chip-on-Layer) processing can be introduced into the epitaxial growth process or the chip process (wafer bonding process) to apply the CLO process. Table 5 lists the applications in... Figure 49 The examples shown are summarized below when Si substrates are used.

[0205] [Table 5]

[0206]

[0207] The same process applies as shown in Table 4, except that the adhesive layer 81 is made of a transparent inorganic adhesive such as SiO2 or SOG through the DWB process. Table 6 applies to... Figure 50 The following is a summary of the cases when Si substrates are used in the examples shown.

[0208] [Table 6]

[0209]

[0210] Except for the application of DWB in the bonding of temporary substrate 74 and semiconductor light-emitting element wafers AA, BB, CC, and the application of LLO process in the removal of temporary substrate 74 to introduce protective layer and even metal bonding layer 71 and sacrificial layer 72, the same process as the examples shown in Table 5 can be applied. Table 7 shows the processes in... Figure 51 and Figure 52 The examples shown are applicable to Si substrates and are summarized below.

[0211] [Table 7]

[0212]

[0213] Compared to the example shown in Table 1, everything is the same except that DWB is applied to adhesive layer 81 and adhesive bonding is applied to adhesive layer 71c for this purpose. Furthermore, the CLO process can also be applied when removing the growth substrate 10 made of sapphire. In the case of removing the adhesive layer 81 bonded using the CLO process, a non-transparent substrate can be used instead of the first transparent substrate 70. Table 8 shows the details of... Figure 53 The examples shown are applicable to Si substrates, and the following is a summary.

[0214] [Table 8]

[0215]

[0216] Except where a metal bonding layer 71 and a sacrificial layer 72 are introduced between the second light-transmitting substrate 80 and the adhesive layer 81, the same process as in the examples shown in Table 7 can be applied. Figures 40 to 41 The example shown is a baseline. In order to remove the substrate ST of each of the semiconductor light-emitting element chips AA, BB, and CC, a substrate ST of a light-transmitting material and a sacrificial layer 72 are required when LLO is applied, and a sacrificial layer for CLO is required when CLO is applied.

[0217] from Figure 40 (c) to Figure 41 (c) Up to this point, the following considerations are made based on the combination of the substrates ST of the semiconductor light-emitting element chips AA, BB, and CC. Assume that the semiconductor light-emitting element chip CC emits red light.

[0218] ① Applications of growth substrates made of sapphire (blue) / growth substrates made of sapphire (green) / growth substrates made of GaAs (red) - LLO - LLO - CLO

[0219] Regarding the LLO and CLO processes, either process can be performed in the order specified. However, considering the material stability of the solution used to remove the growth substrate made of GaAs, it is preferable to perform the CLO process first, followed by the LLO process.

[0220] During the LLO and CLO processes, for wafers without corresponding processes, a protective process mask layer (e.g., photoresistor, oxide, metal layer) is applied to prevent damage caused by the process. Additionally, when removing the temporary substrate 74 and adhesive layer 75, the wafer AA, BB, and CC can be protected using the protective process mask layer (e.g., photoresistor, oxide, metal layer).

[0221] ② Applications of sapphire growth substrate (blue) / sapphire growth substrate (green) / sapphire transparent substrate (red) or sapphire transparent substrate (blue) / sapphire transparent substrate (green) / sapphire transparent substrate (red) - LLO - LLO - LLO

[0222] Semiconductor light-emitting element wafers AA, BB, and CC all have light-transmitting substrates, so LLO sacrificial layers can be selected from various materials (e.g., group III nitrides, group II oxides, ITO, SiO2). Therefore, compared with case ①, the damage to semiconductor light-emitting element wafers AA, BB, and CC can be reduced during the process.

[0223] ③ Application of growth substrates made of Si (blue) / growth substrates made of Si (green) / growth substrates made of GaAs (red) - CLO - CLO - CLO - CLO

[0224] To remove oxides (SiO2, Ga2O3) from the surface of the Si growth substrate (blue and green) and the GaAs growth substrate (red), a solution containing hydrofluoric acid (HF) is used. After removing the surface oxides, a wet etching solution, sulfuric acid and water (H2SO4 + H2O2) or ammonia and water (NH4OH + H2SO2) is used to etch away both the Si and GaAs growth substrates equally or selectively (CLO process). Of course, a mechanical polishing process (CMP process) can be performed before removing the surface oxides (SiO2, Ga2O3).

[0225] ④ Applications of growth substrates made of Si (blue) / growth substrates made of Si (green) / transparent substrates made of sapphire (red) - CLO - CLO - LLO

[0226] Semiconductor light-emitting element wafers emitting blue and green light are first attached to a temporary substrate. Then, the growth substrate made of Si is removed by the CLO process (CMP process), and a semiconductor light-emitting element wafer emitting red light is attached. The light-transmitting substrate made of sapphire is then removed by the LLO process.

[0227] Figure 55 and Figure 56 This is a diagram illustrating yet another example of the semiconductor light-emitting element manufacturing method of this disclosure, as a comparison with... Figure 54 The different methods shown provide methods for reducing the thickness of the growth substrate 10, the light-transmitting substrate 80, or the substrate ST.

[0228] Figure 55 (a) shows again Figure 41 The form shown in (c) differs in that all semiconductor light-emitting element chips CC are composed of chips that emit red light. Of course, it is also applicable to semiconductor light-emitting element chips that are composed of chips that emit light of different wavelengths, grown using a growth substrate 10 made of Si, and after removing the substrate 10, to the case of semiconductor light-emitting element chips having a light-transmitting substrate 80.

[0229] Next, as Figure 55(b) shows that a support substrate (G; for example, a sapphire substrate) is attached to the semiconductor light-emitting element chip CC via an adhesive layer (T; for example, double-sided UV tape). Preferably, a protective layer (Q; for example, a PR coating) is provided to cover the semiconductor light-emitting element chip CC. As the protective layer Q, it may contain at least one layer of a photoresistor PR, epoxy resin, glue, SU-8, silicone organic material, SOG (Spin On Glass), BCB, polyimide, or parylene. As the adhesive layer T, double-sided UV tape or double-sided foam tape (which has the function of separating the two substrates by expanding when a process including mechanical polishing is completed after attaching two substrates to both sides of the tape at room temperature and applying a specified temperature or above) can be used. Alternatively, an LLO sacrificial layer (not shown) can be introduced into the adhesive layer T. After the LLO sacrificial layer and the defined adhesive portion T are formed on the support substrate G, the transparent substrate 80 with the protective layer Q formed is attached by thermoforming wafer bonding. At this time, the protective layer Q is formed from the same material as the adhesive layer T. The LLO sacrificial layer can be a single-crystal group 3-5 nitride semiconductor including GaN, a single-crystal group 2-6 oxide semiconductor including ZnO, a transparent polycrystalline conductive oxide including ITO, a polycrystalline conductive nitride including TiN, or a material including SiO2 or SiN. x Amorphous dielectrics, etc., are preferably used in multilayer structures. Other materials may include polyimide (PI) films, photo-decomposition polymers (i.e., triazene polymers), and specific metal films (Ti, Au, Pt, Cr, Al, Ag, Cu). The adhesive layer T can be an organic material such as BCB, silicon, SU-8, SiO2, SOG, acrylate, urethane, OCA, or OCR, or a eutectic metal-bonded material such as AuSn (300°C), AuIn (275°C), NiSn (300°C), or CuSn (270°C). The support substrate G is preferably an optically transparent material considering its coefficient of thermal expansion, such as sapphire, quartz, or glass.

[0230] Next, as Figure 55 As shown in (c), the thickness of the light-transmitting substrate 80 is reduced by polishing and tapping. Preferably, the thickness is reduced to 100 μm or less.

[0231] Next, as Figure 55As shown in (d), the semiconductor light-emitting element chip CC on the light-transmitting substrate 80 with reduced thickness is isolated. This isolation is achieved using methods such as laser scribing or sailing. In the case of a passivation layer 94A, the isolation of the passivation layer 94A becomes problematic; this problem is eliminated by pre-removing the passivation layer 94A along the line (not shown) where the laser scribing is performed.

[0232] Next, as Figure 56 As shown in (a), a support W (e.g., blue tape) is attached to the side of the light-transmitting substrate 80 with reduced thickness.

[0233] Next, as Figure 56 (b) shows the removal of the support substrate G. When using double-sided UV tape as the adhesive layer G, UV light is irradiated to remove the support substrate G from the protective layer Q and the adhesive layer G, thus allowing the support substrate G to be reused. When using UV light, a light-transmitting substrate such as a sapphire substrate can be used for the support substrate G.

[0234] Next, as Figure 56 As shown in (c), the protective layer G is removed.

[0235] Finally, as Figure 56 As shown in (d), the support W is expanded to reliably individualize the semiconductor light-emitting element chip CC or arrange the semiconductor light-emitting element chip GG at the required intervals.

[0236] Figure 57 and Figure 58 This is a figure illustrating yet another example of the semiconductor light-emitting element manufacturing method of this disclosure. Figure 57 Zhongyu Figure 55 Unlike the case shown in (a), a semiconductor light-emitting element chip AA is provided on the growth substrate 10, which is then subjected to... Figure 55 and Figure 56 The process is the same as the method shown, and the final result is as follows: Figure 58 As shown, semiconductor light-emitting element chips AA are arranged on the support W at the required intervals. Figure 56 (d) shows the light-transmitting substrate 80 and Figure 58 The growth substrate 10 shown can be used as a window through which light emitted from semiconductor light-emitting element cores AA and CC can pass and be emitted.

[0237] The following is a detailed description of an example of applying the manufacturing method of this disclosure to a vertical chip.

[0238] Figure 59 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure, and... Figure 24The examples shown differ in that the first electrode 92 has a shape that is electrically connected to the n-type semiconductor region 30 below it. Since the light generated in the active region 40 is directed towards the transparent substrate 80, the first electrode 92 needs to be made of a transparent material, and the adhesive layer 81 also needs to be made of a transparent material. If necessary, a transparent conductive material (38; for example: indium oxide (ITO), nitride, nitride oxide) with ohmic contact properties can be formed in the n-type semiconductor region 30. Of course, the positions of the n-type semiconductor region 30 and the p-type semiconductor region 50 can be interchanged. The first electrode 92 is made of a transparent conductive oxide (TCO) such as ITO or ZnO, a transparent conductive nitride (TCN) such as a compound or mixture of TiN, ITN, or InN-TiN, a transparent conductive oxide (TCON) such as ITON, a silver nanowire, a carbon nanotube (CNT), graphene, a conductive polymer, or a metal or alloy with a specified thickness such as tungsten (W)r with a light transmittance of 50% or more. The adhesive layer 81 is preferably made of a material that is electrically conductive, optically transparent, and has bonding strength between materials. It can be made of metals or alloys such as Ag, Au, Pt, Pd, In, Sn, and Zn with a specified thickness or less; compounds or mixtures such as NiO-Au, NiO-Ag, ITO-Au, ITO-Ag, ZnO-Au, ZnO-Ag, TiN-Au, TiN-Ag, CNT-Au, and CNT-Ag with a specified thickness or less; a polymer film in the form of a sphere surrounded by PSS (Polystrene Sulfonate) like an electrical wire sheath, or a transparent conductive polymer such as 'PEDOT:PSS' where PSS is melted to the maximum extent to improve conductivity and PEDOTs are interconnected. Here, the specified thickness refers to a thickness of less than the thickness of the material to achieve light transmittance. Furthermore, the adhesive layer 81 and the first electrode 92 can be formed into a single structure, which can have a thickness of 1... st TCO / Alloy / 2 ndTCO configuration. Specifically, the metal or alloy between the two TCOs has a specified thickness and serves as a bonding element, possessing at least 50% light transmittance. On the opposite side of the first electrode 92, to reflect light generated from the active region 40 to the transparent substrate 80 side, the current diffusion electrode 91R is constructed of a transparent electrode such as ITO, as... Figure 24 As shown, the passivation layer 94 serves as a non-conductive reflective film 94. The non-conductive reflective film 94 is composed of a single-layer electrolyte film (e.g., SiO₂). x TiO x The structure can be composed of a multilayer electrolyte membrane (e.g., SiO2 / TiO2), a DBR reflective film (e.g., SiO2 / TiO2), or a combination thereof. Additionally, the current diffusion electrode 91R itself possesses a metal reflective film structure (e.g., Ag / Ni / Au, Al / Ni / Au) as described above to function as a reflector. In this case, the ITO current diffusion electrode can be omitted, and the metal reflective film structure itself can perform this function. The positions of the p-type semiconductor region 50 and the n-type semiconductor region 30 can be interchanged; in this case, they can be omitted. Figure 8 The first light-transmitting substrate 70 shown and Figure 40 The temporary substrate 74 shown is used. The semiconductor light-emitting element manufactured is... Figure 25 Similarly, as shown, the first electrode post 92P and the second electrode post 93P are electrically and mechanically connected to the external power supply section (98; sub-substrate, interposer, wiring board, display pixel, etc.). Explanation of identical symbols not explicitly stated is omitted.

[0239] Figure 60 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure, and... Figure 59 Unlike the example shown, the light generated in the active region 40 is emitted towards the opposite side of the transparent substrate 80; therefore, the current diffusion electrode 91 is made of a transparent material such as ITO. The passivation layer 94 is made of a transparent material such as SiO2. The second electrode 93 is configured to cover only a portion of the p-type semiconductor region 50 to fully emit light, and the first electrode 92 serves as a reflector. To supply an external power source to the first electrode 92 and the second electrode 93, [the following is a description of a process involving...]. Figure 59 Unlike other light-emitting substrates, the first electrode post 92P and the second electrode post 93P are not vertically positioned above the light-transmitting substrate 80, but are formed as pillars within the light-transmitting substrate 80 by gold plating. Such a light-transmitting substrate 80 is disclosed in US Patent Publication No. US2017 / 0317230. Of course, the first electrode post 92A and the second electrode post 93P can be omitted, and wiring can be directly formed between the first electrode 92 and the second electrode 93 placed on the light-transmitting substrate 80. The manufactured semiconductor light-emitting element and... Figure 25 Similarly, as shown, the light-transmitting substrate 80 is electrically and mechanically connected to the external power supply section (98; sub-substrate, interposer, wiring board, display pixel, etc.). Explanation of identical symbols not explicitly stated is omitted. The first electrode 92 is essentially composed of a reflective metallic material (e.g., Al, Ag, Rh, Cr, Ni, Au, Pt, Pd, Ti, Cu, and their alloys) or a laminated structure of the aforementioned metallic material and a transparent conductive material (oxide, nitride, oxynitride). The second electrode 93 is essentially composed of a reflective metallic material (e.g., Al, Ag, Rh, Cr, Ni, Au, Pt, Pd, Ti, Cu) and their alloys.

[0240] Figure 61 This figure illustrates yet another example of the semiconductor light-emitting element of this disclosure, showing... Figure 59 The semiconductor light-emitting element shown is suitable for Figure 28 Examples of semiconductor light-emitting elements are shown. For example... Figure 59 The process is identical except that the first electrodes 92A, 92B, and 92C are formed as common electrodes at the bottom of the three semiconductor light-emitting element chips (AA, BB, CC; for example, RGB LED). Figure 43 Similarly, the three semiconductor light-emitting element chips (AA, BB, CC; for example: RGBLED) shown can each have a light-transmitting substrate 80.

[0241] Figure 62 This figure illustrates yet another example of the semiconductor light-emitting element of this disclosure, showing... Figure 60 The disclosed semiconductor light-emitting element is suitable for Figure 28 The example shown is a semiconductor light-emitting element. (As per...) Figure 60 As explained, except that the first electrode post 92PA, the second electrode post 93PA, the second electrode post 93PB, and the second electrode post 93PC are not erected on the light-transmitting substrate 80, but are formed as pillars within the light-transmitting substrate 80, specifically within holes formed in the light-transmitting substrate 80, by gold plating. All other aspects are the same. Of course, with... Figure 43 Similarly, the three semiconductor light-emitting element chips (AA, BB, CC; for example: RGBLED) shown each have a light-transmitting substrate 80.

[0242] Figure 63 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure, and... Figure 41Unlike the semiconductor light-emitting element shown in (d), the substrate ST is not removed between the semiconductor regions 30, 40, 50 and the light-transmitting substrate 80. The semiconductor light-emitting element includes a light-transmitting substrate 80, three semiconductor light-emitting element chips AA, BB, and CC, an adhesive layer 81, a black matrix material BM, a planarization layer 76, and a sealant 99. The three semiconductor light-emitting element chips AA, BB, and CC respectively include a first semiconductor region 30, an active region 40, a second semiconductor region 50, a light-transmitting electrode 91, a protective layer 60 (optional), first ohmic electrodes 92Aa, 92Ba, and 92Ca, first wiring electrodes 92Ab, 92Bb, and 92Cb, a first bonding electrode 92Ac, second ohmic electrodes 93Aa, 93Ba, and 93Ca, second wiring electrodes 93Ab, 93Bb, and 93Cb, and second bonding electrodes 93Ac, 93Bc, and 93Cc. The first ohmic electrodes 92Aa, 92Ba, and 92Ca, and the second ohmic electrodes 93Aa, 93Ba, and 93Ca, respectively correspond to... Figure 23 The first electrode 92 and the second electrode 93 shown, the first wiring electrodes 92Ab, 92Bb, 92Cb and the second wiring electrodes 93Ab, 93Bb, 93Cb respectively correspond to Figure 27 and Figure 28 The first wiring electrodes 92A, 92B, 92C and the second wiring electrodes 93A, 93B, 93C shown, and the first bonding electrode 92Ac and the second bonding electrodes 93Ac, 93Bc, 93Cc respectively correspond to Figure 27 and Figure 28 The first electrode post 92PA and the second electrode posts 93PA, 93PB, and 93PC are shown. First wiring electrodes 92Ab, 92Bb, and 92Cb are connected to each other on the planarization layer 76, and the first bonding electrode 92Ac serves as a common electrode. Of course, the semiconductor light-emitting element can be constructed from only one of the three semiconductor light-emitting element chips AA, BB, and CC. Although not preferred, the light-transmitting electrode 91, sealant 99, first bonding electrode 92Ac, and second bonding electrodes 93Ac, 93Bc, and 93Bc can be omitted. With this structure, difficulties occurring in the process of removing the substrate ST are reduced, and an additional light-scattering surface (in...) Figure 35In the process, the rough surfaces S and S are the same as those on the transparent substrate 80. Of course, rough surfaces S and S can be provided on the front and / or back of the transparent substrate 80, which helps to increase the bonding area and improve the adhesion of the adhesive layer 81. In addition, only components with excellent optical and / or electrical properties are sorted and applied before being bonded to the transparent substrate 80, thereby improving the quality of the final pixel light source. The semiconductor light-emitting element chips AA, BB, and CC are fixed (in the vertical direction) to the transparent substrate 80 by an optically transparent adhesive 81, so the structure is stable. That is, during the manufacturing of the pixel light source, chip breakage and peeling problems can be minimized in the mass transfer process. The fixation between the semiconductor light-emitting element chips AA, BB, and CC is further strengthened (in the horizontal direction) by the black matrix material BM.

[0243] Assuming three semiconductor light-emitting element chips AA, BB, and CC are formed on a transparent substrate 80 to constitute a pixel light source, specifically a pixel light source with a size of 300μm x 300μm or less, considering the spacing between chips, the width of a single chip cannot exceed approximately 80μm. The size of the pixel light source decreases from 300μm x 300μm, thus reducing the width of a single chip to less than 50μm. When a chip with a width of less than 80μm has a substrate (ST; typically, the thickness of the substrate ST is 80μm or more), as the chip width decreases, the chip width becomes significantly smaller than the chip height, leading to problems such as the chip tipping over. This makes chip handling difficult. From the perspective of the entire semiconductor light-emitting element, considering the thickness of the transparent substrate 80, a single pixel light source has excessive thickness and even height. On the other hand, by having a substrate ST, it is more difficult to fix the three semiconductor light-emitting element chips AA, BB, and CC, which consist only of semiconductor regions 30, 40, and 50, together as a single pixel light source. In the example below, the substrate ST has a thickness of less than 50 μm, or the sides D of the three semiconductor light-emitting element chips AA, BB, and CC are fixed by a material with strong bonding force. Figure 63 In the example shown, the substrate ST has a thickness of less than 50 μm, and a portion of the bottom surface (the bonding surface between the substrate ST and the transparent substrate 80) and the side surface D are bonded together by a material with strong adhesion and optical transparency (e.g., SOG, Fo). xThe substrate ST is fixed by an adhesive layer 81 composed of silicon. The substrate ST has a thickness of 50 μm or less, so even if the chip width is reduced to 80 μm or less, the height is greater than the width, thus solving the problem of difficult chip handling. On the other hand, to solve the problem of fixing the three semiconductor light-emitting element chips AA, BB, and CC caused by the substrate ST, the side surface D of the substrate ST is applied to fix the three semiconductor light-emitting element chips AA, BB, and CC. When the substrate ST is made of a non-conductive material (e.g., sapphire), the adhesive layer 81 can be made of not only non-conductive materials but also metals. Furthermore, by making the transparent substrate 80 thicker than the substrate ST, the reliability of the entire device can be improved. By limiting the thickness of the substrate ST to 50 μm or less, the height of the transparent substrate 80 can be designed without being limited by the height design of the pixel light source sample (e.g., height 300 μm or less) due to the reduction in the width of the pixel light source. The thickness of the optically transparent adhesive layer 81 is not particularly limited, but when bonding the semiconductor light-emitting element chips AA, BB, and CC to the light-transmitting substrate 80, the greater the thickness, the more it will affect the thermal stability and optical quality (mixed colors or color quantity difference; Mura phenomenon) represented by mechanical pressure.

[0244] Figure 64 It means Figure 63 The figure shows an example of a method for manufacturing a semiconductor light-emitting element, first as shown in the diagram. Figure 64 As shown in (a), three semiconductor light-emitting element wafers AA, BB, and CC are prepared. The three semiconductor light-emitting element wafers AA, BB, and CC each have semiconductor regions 30, 40, and 50, respectively, and a substrate ST. The substrate ST is formed to have a thickness of less than 50 μm. The substrate ST can be a growth substrate 10 (refer to...). Figure 8 ) or light-transmitting substrate 80 (refer to) Figure 10 As shown in U.S. Patent Publication No. 9,711,405, a separation line is formed by irradiating the interior of the substrate ST with a laser beam, and the substrate ST is ground on the side opposite to the semiconductor regions 30, 40, and 50. Alternatively, as shown in Japanese Patent Publication No. S64-038209, a separation line is formed by blading from the semiconductor regions 30, 40, and 50 to the substrate ST, and the substrate ST is ground on the side opposite to the semiconductor regions 30, 40, and 50 to form a thickness of 50 μm or less. Preferably, in subsequent processes, a transparent electrode 91 and a protective layer 60 (e.g., SiO2) are prepared in advance to protect the three semiconductor light-emitting element wafers AA, BB, and CC. Then, as... Figure 64As shown in (b), the substrate ST and the light-transmitting substrate 80 are bonded by an adhesive layer 81 that is optically transparent and has strong adhesion. Preferably, for strong adhesion between them, a liquid SOG (Spin On Glass), FOx (Flowable Oxide), or silicon material comprising SiO2 is spin-coated and formed by a curing process. By utilizing such a liquid spin-coating process, the adhesive layer 81 can be formed on a portion of the side surface D of the substrate ST. Then, as... Figure 64 As shown in (c), up to protective layer 60, a black matrix material (BM; for example, epoxy molding compound (EMC)) is filled using spin coating and capillary action. The black matrix material BM further enhances the suppression of optical gaps between semiconductor light-emitting element wafers AA, BB, and CC, and the bonding between semiconductor light-emitting element wafers AA, BB, and CC. Afterwards, the black matrix material BM on top of semiconductor light-emitting element wafers AA, BB, and CC is removed, at which point protective layer 60 serves to protect semiconductor light-emitting element wafers AA, BB, and CC. Next, as... Figure 64 As shown in (d), after etching processes of semiconductor regions 30, 40, 50, transparent electrode 91, and protective layer 60, first ohmic electrodes 92Aa, 92Ba, 92Ca and second ohmic electrodes 93Aa, 93Ba, 93Ca are formed. Figure 64 In process (a), such as Figure 37 As shown, when the semiconductor light-emitting element chips AA, BB, and CC are prepared in chip form rather than in die form, the following can be omitted. Figure 64 (d) is the procedure. Finally, as... Figure 63 As shown, a planarization layer 76 is formed, and after an etching process, first wiring electrodes 92Ab, 92Bb, 92Cb and second wiring electrodes 93Ab, 93Bb, 93Cb are formed. Then, a sealant 99 is formed, and after an etching process, first bonding electrode 92Ac and second bonding electrodes 93Ac, 93Bc, 93Cc are formed to complete the semiconductor light-emitting element.

[0245] Figure 65 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure, and... Figure 63Unlike the semiconductor light-emitting element shown, the transparent substrate 80 is removed, which reduces the overall height of the semiconductor light-emitting element. Therefore, the thickness of the substrate ST is not limited to 50 μm or less. When the height of the pixel light source is 300 μm or less, the thickness of the substrate ST can be formed to 150 μm or less, eliminating the need for additional operations to form the substrate ST to 50 μm or less. In addition, a portion of the adhesive layer 71 is removed, thereby providing a structure that allows the use of an adhesive layer 81 made of metal. Furthermore, only components with excellent optical and / or electrical properties are sorted before being bonded to the temporary substrate 74, thereby ultimately improving the quality of the pixel light source. Regarding the fixing (vertical direction) of the semiconductor light-emitting element chips AA, BB, and CC, the transparent substrate 80 is not required, and they are bonded only by an adhesive 81 with strong adhesion. Therefore, the thickness of the chips AA, BB, and CC can be freely formed. In particular, when a metallic material with strong adhesion is used as the adhesive 81, it is more beneficial to the stability of the structure.

[0246] Figure 66 It means Figure 65 The figure shows an example of a method for manufacturing a semiconductor light-emitting element. First, as shown... Figure 66 As shown in (a), prepare semiconductor light-emitting element chips AA, BB, and CC. Figure 64 Unlike the case shown in (a), a temporary substrate 74 (see reference) is used instead of the light-transmitting substrate 80. Figure 49 (b) A sacrificial layer 72 and a protective layer 71 are formed to remove the subsequently formed temporary substrate 74. The protective layer 71 can be omitted. Furthermore, the thickness of the substrate ST is not limited to 50 μm or less, but from the viewpoint of the final pixel light source quality, it is preferable to manufacture it to be as thin as possible. Next, as... Figure 66 As shown in (b), on the side opposite to the temporary substrate 74, an adhesive layer T (refer to...) is applied... Figure 55 (b) For example: double-sided UV tape, foamed heat-resistant tape) and attaching the support substrate G (refer to Figure 55 (b), for example: sapphire substrate). Next, as... Figure 66 As shown in (c), by removing the sacrificial layer 72 and the protective layer 71, the temporary substrate 74 is removed, exposing the adhesive layer 81. Finally, as... Figure 65 As shown, the substrate ST of each of the three semiconductor light-emitting element chips AA, BB, and CC is exposed, and the supporting substrate G is removed to complete the semiconductor light-emitting element.

[0247] Figure 67 This is a diagram illustrating yet another example of a semiconductor light-emitting element according to the present disclosure, wherein the semiconductor light-emitting element and... Figure 63Compared to the semiconductor light-emitting element shown, this one also has an adhesive layer 81 (upper adhesive layer) between the planarization layer 76 and the black matrix material BM. The difference lies in the point where the upper side surface E of the semiconductor light-emitting element chips AA, BB, and CC is strongly fixed, rather than the side surface D of the substrate ST, via the adhesive layer 81 (upper adhesive layer). Furthermore, before bonding to the temporary substrate 74, only components with excellent optical and / or electrical properties are sorted, thereby ultimately improving the quality of the pixel light source. Regarding the fixing of the semiconductor light-emitting element chips AA, BB, and CC (vertically), they are bonded to the light-transmitting substrate 80 using an optically transparent adhesive 81. Therefore, the structure is stable, minimizing chip breakage and peeling problems during the mass transfer process when manufacturing the pixel light source. Regarding the fixing between the semiconductor light-emitting element chips AA, BB, and CC (horizontally), it is further strengthened by a portion of the adhesive 81 with strong bonding force and the black matrix material BM.

[0248] Figure 68 It means Figure 67 The figure shows an example of a method for manufacturing a semiconductor light-emitting element. First, as shown... Figure 68 As shown in (a), with Figure 49 Similarly, in the case shown, semiconductor light-emitting element wafers AA, BB, and CC are attached to a temporary substrate 74 having a protective layer 71 and a sacrificial layer 72 via an adhesive layer (81; upper adhesive layer) with semiconductor regions 30, 40, and 50 as the bottom. Next, as shown... Figure 68 As shown in (b), after coating with the black matrix material BM, polishing is performed to form a substrate ST with a thickness and height of less than 50 μm. Then, as... Figure 68 As shown in (c), the light-transmitting substrate 80 is attached to the side opposite to the temporary substrate 74 via the adhesive layer 81 (lower adhesive layer). Next, the sacrificial layer 72 is removed to remove the temporary substrate 74, and the protective layer 71 is also removed to expose the adhesive layer 80 (upper adhesive layer). Then, a portion of the adhesive layer 81 (upper adhesive layer) is removed by etching. Next, after… Figure 64 As shown in step (d), after etching the semiconductor regions 30, 40, 50, the light-transmitting electrode 91, and the protective layer 60, the first ohmic electrodes 92Aa, 92Ba, 92Ca and the second ohmic electrodes 93Aa, 93Ba, 93Ca are formed. This step can be omitted when preparing semiconductor light-emitting element chips AA, BB, CC in chip form rather than wafer form. Finally, as... Figure 67As shown, a planarization layer 76 is formed, and after an etching process, first wiring electrodes 92Ab, 92Bb, 92Cb and second wiring electrodes 93Ab, 93Bb, 93Cb are formed. Then, a sealant 99 is formed, and after an etching process, first bonding electrodes 92Ac and second bonding electrodes 93Ac, 93Bc, 93Cc are formed to complete the semiconductor light-emitting element.

[0249] Figure 69 This figure illustrates yet another example of the semiconductor light-emitting element of this disclosure, except for the points where the adhesive layer 81 (upper adhesive layer) is absent. Figure 68 The semiconductor light-emitting element shown is the same. Such an element is achieved through... Figure 68 In step (d), the adhesive layer 81 (upper adhesive layer) is completely removed without retaining any portion. Furthermore, before bonding to the temporary substrate 74, only components with superior optical and / or electrical properties are sorted, thereby ultimately improving the quality of the pixel light source. Regarding the fixation (vertical direction) of the semiconductor light-emitting element chips AA, BB, and CC, they are bonded to the light-transmitting substrate 80 using an optically transparent adhesive 81. Therefore, the structure is stable, minimizing chip breakage and peeling issues during the mass transfer process when manufacturing the pixel light source. Regarding the fixation (horizontal direction) between the semiconductor light-emitting element chips AA, BB, and CC, it is further strengthened by the planarization layer 76 and the black matrix material BM.

[0250] Figure 70 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure, and... Figure 67 Unlike the semiconductor light-emitting element shown, the light-transmitting substrate 80 can be removed in the semiconductor light-emitting element. It possesses the same... Figure 65 It has the same advantages as the semiconductor light-emitting element shown. However, compared with... Figure 65 Unlike the semiconductor light-emitting device shown, the thickness of the substrate ST can be reduced to below 50 μm during the manufacturing process. The semiconductor light-emitting device is prepared... Figure 67 In the state of the semiconductor light-emitting element shown, applicable Figure 66The manufacturing process is carried out using the method shown. Furthermore, before bonding to the temporary substrate 74, only components with superior optical and / or electrical properties are sorted and applied, ultimately improving the quality of the pixel light source. Regarding the fixing (vertical direction) of the semiconductor light-emitting element chips AA, BB, and CC, they are bonded using an upper adhesive 81 and a lower adhesive 81 with strong bonding force without the need for a transparent substrate 80. Therefore, the thickness of the chips AA, BB, and CC can be freely formed. In particular, using a metallic material with strong bonding force as the adhesive 81 is beneficial for structural stability. Regarding the fixing (horizontal direction) between the semiconductor light-emitting element chips AA, BB, and CC, it is achieved using a portion of the upper and lower adhesive 81 with strong bonding force and a black matrix material BM. Therefore, a relatively thinner pixel light source is manufactured, thereby improving quality.

[0251] Figure 71 This is a diagram illustrating yet another example of the semiconductor light-emitting element of this disclosure, and... Figure 69 Unlike the semiconductor light-emitting element shown, the semiconductor light-emitting element can remove the light-transmitting substrate 80. It possesses the same... Figure 65 The semiconductor light-emitting element shown has the same advantages, and is similar to... Figure 65 Unlike the semiconductor light-emitting element shown, the thickness of the substrate ST can be reduced to below 50 μm during the manufacturing process. In preparation... Figure 69 In the state of the semiconductor light-emitting element shown, applicable Figure 66 The method shown is used to manufacture semiconductor light-emitting elements. Furthermore, only components with excellent optical and / or electrical properties are sorted before being bonded to the temporary substrate 74, thereby ultimately improving the quality of the pixel light source. Regarding the fixing (vertical direction) of the semiconductor light-emitting element chips AA, BB, and CC, a light-transmitting substrate 80 is not required; bonding is achieved using a portion of the lower adhesive 81 with strong bonding strength. Therefore, the thickness of chips AA, BB, and CC can be freely formed. In particular, using a metallic material with strong bonding strength as the adhesive 81 is beneficial for structural stability. Regarding the fixing (horizontal direction) between the semiconductor light-emitting element chips AA, BB, and CC, it is achieved using a portion of the lower adhesive 81 with strong bonding strength, a planarization layer 76, and a black matrix material BM. Therefore, a relatively thin pixel light source is manufactured, which is beneficial for improving quality.

[0252] The various implementations of this disclosure will now be described.

[0253] (1) A method for manufacturing a flip chip, i.e., a semiconductor light-emitting element, comprising the following steps: providing a growth substrate having a first semiconductor region having an N-type, an active region that generates light through recombination of electrons and holes, and a second semiconductor region having a P-type sequentially formed; bonding a first light-transmitting substrate to the second semiconductor region side; removing the growth substrate from the first semiconductor region side; attaching a second light-transmitting substrate to the first semiconductor region side where the growth substrate has been removed using an adhesive layer; performing laser ablation on the first light-transmitting substrate from the second semiconductor region side; removing a portion of the second semiconductor region and the active region to expose a portion of the first semiconductor region; and forming a first electrode of the flip chip and a second electrode of the flip chip on the exposed first semiconductor region and the second semiconductor region, respectively.

[0254] (2) Before the step of bonding the first light-transmitting substrate, the following step is included: forming a protective layer in the second semiconductor region.

[0255] (3) The first light-transmitting substrate has a sacrificial layer, and the sacrificial layer and the protective layer are bonded together by a metal bonding layer.

[0256] (4) After the step of removing the first light-transmitting substrate, and before the step of exposing a portion of the first semiconductor region, the metal bonding layer and the protective layer are removed sequentially.

[0257] (5) After the steps of removing the metal bonding layer and the protective layer in sequence, a portion of the adhesive layer is removed to expose the second light-transmitting substrate.

[0258] (6) After removing the metal bonding layer and the protective layer in sequence, the following steps are also included: forming a light-transmitting electrode in the second semiconductor region.

[0259] (7) In the provided step, an undoped semiconductor region is formed below the first semiconductor region, and at least a portion of the undoped semiconductor region is removed before the attachment step.

[0260] (8) A semiconductor light-emitting element comprising: a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region located between the first semiconductor region and the second semiconductor region, generating light by recombination of electrons and holes; a first electrode located in the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region and the second semiconductor region, electrically connected to the first semiconductor region and used as a flip chip bonding pad; and a second electrode located in other first semiconductor regions exposed by removing a portion of the first semiconductor region, the active region and the second semiconductor region, sandwiched by an insulating layer and insulated from the first semiconductor region, electrically connected to the second semiconductor region and used as a flip chip bonding pad.

[0261] (9) A semiconductor light-emitting element comprising: a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region located between the first semiconductor region and the second semiconductor region, generating light by recombination of electrons and holes; a first electrode located in the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region and the second semiconductor region, electrically connected to the first semiconductor region and used as a flip chip bonding pad; and a second electrode electrically connected to the second semiconductor region and used as a flip chip bonding pad, wherein the first electrode is connected to a non-light-emitting region, i.e., the second semiconductor region.

[0262] (10) A semiconductor light-emitting element comprising: a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region located between the first semiconductor region and the second semiconductor region, generating light by recombination of electrons and holes; a first electrode electrically connected to the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region and the second semiconductor region, and serving as a flip-chip bonding pad; a second electrode electrically connected to the second semiconductor region and serving as a flip-chip bonding pad; and an insulating layer filling the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region and the second semiconductor region, and located below the first electrode and the second electrode.

[0263] (11) Includes an additional insulating layer, which is exposed in the region below the first and second electrodes by removing the insulating layer.

[0264] (12) A semiconductor light-emitting element, comprising: a light-transmitting substrate; a semiconductor light-emitting element chip having a first semiconductor region having a first conductivity, an active region generating light by recombination of electrons and holes and a second semiconductor region having a second conductivity different from the first conductivity, the semiconductor light-emitting element chip being a first semiconductor light-emitting element chip having a first electrode electrically connected to the first semiconductor region and a second electrode electrically connected to the second semiconductor region; an adhesive layer for bonding the light-transmitting substrate and the first semiconductor region side of the first semiconductor light-emitting element chip; and a passivation layer for at least covering the first semiconductor light-emitting element chip and the adhesive layer.

[0265] (13) The passivation layer is attached to the light-transmitting substrate that is exposed without forming an adhesive layer.

[0266] (14) The first electrode and the second electrode are formed on the passivation layer and connected to the light-transmitting substrate exposed without the adhesive layer.

[0267] (15) includes: a first electrode post formed on a first electrode and a second electrode connected to a light-transmitting substrate at a height higher than that of a first semiconductor light-emitting element chip; and a second electrode post.

[0268] (16) includes: a sealant that covers the first semiconductor light-emitting element chip and supports the first electrode post and the second electrode post.

[0269] (17) Includes a second semiconductor light-emitting element chip disposed on a light-transmitting substrate. The second semiconductor light-emitting element chip has a first semiconductor region having a first conductivity, an active region that generates light by recombination of electrons and holes, a second semiconductor region having a second conductivity different from the first conductivity, a first electrode electrically connected to the first semiconductor region and connected to the light-transmitting substrate, a second electrode electrically connected to the second semiconductor region and connected to the light-transmitting substrate, a first electrode post and a second electrode post formed on the first electrode and the second electrode connected to the light-transmitting substrate in a manner higher than the height of the second semiconductor light-emitting element chip, and one of the first electrode post of the first semiconductor light-emitting element chip and the first electrode post of the second semiconductor light-emitting element chip and the second electrode post of the second semiconductor light-emitting element chip is integrally formed as a common electrode.

[0270] (18) includes: a sealant that covers the first semiconductor light-emitting element chip and the second semiconductor light-emitting element chip, and supports the first electrode post of the first semiconductor light-emitting element chip and the second electrode post of the first semiconductor light-emitting element chip and the first electrode post of the second semiconductor light-emitting element chip and the second electrode post of the second semiconductor light-emitting element chip.

[0271] (19) The passivation layer covers the first semiconductor light-emitting element chip and the second semiconductor light-emitting element chip.

[0272] (20) Includes a third semiconductor light-emitting element chip disposed on a light-transmitting substrate. The third semiconductor light-emitting element chip has a first semiconductor region having a first conductivity, an active region that generates light by recombination of electrons and holes, a second semiconductor region having a second conductivity different from the first conductivity, a first electrode electrically connected to the first semiconductor region and connected to the light-transmitting substrate, a second electrode electrically connected to the second semiconductor region and connected to the light-transmitting substrate, and a first electrode post and a second electrode post formed on the first electrode and the second electrode connected to the light-transmitting substrate respectively at a height higher than that of the third semiconductor light-emitting element chip. The first electrode post of the first semiconductor light-emitting element chip, the first electrode post of the second semiconductor light-emitting element chip and the first electrode post of the third semiconductor light-emitting element chip, and the second electrode post of the first semiconductor light-emitting element chip, the second electrode post of the second semiconductor light-emitting element chip and the second electrode post of the third semiconductor light-emitting element chip are integrally formed as a common electrode.

[0273] (21) includes: a sealant that covers the first semiconductor light-emitting element chip, the second semiconductor light-emitting element chip and the third semiconductor light-emitting element chip, and supports the first electrode post and the second electrode post of the first semiconductor light-emitting element chip, the first electrode post of the second semiconductor light-emitting element chip and the second electrode post of the second semiconductor light-emitting element chip, and the first electrode post and the second electrode post of the third semiconductor light-emitting element chip.

[0274] (22) The second semiconductor region of the first semiconductor light-emitting element chip, the second semiconductor region of the second semiconductor light-emitting element chip and the second semiconductor region of the third semiconductor light-emitting element chip are disposed on opposite sides of the light-transmitting substrate with their respective active regions as a reference.

[0275] (23) The passivation layer covers the first semiconductor light-emitting element chip, the second semiconductor light-emitting element chip and the third semiconductor light-emitting element.

[0276] (24) A semiconductor light-emitting element, comprising: a light-transmitting substrate; a semiconductor light-emitting element chip having a first semiconductor region having a first conductivity, an active region generating light by recombination of electrons and holes and a second semiconductor region having a second conductivity different from the first conductivity, the semiconductor light-emitting element chip being a first semiconductor light-emitting element chip having a first electrode electrically connected to the first semiconductor region and a second electrode electrically connected to the second semiconductor region, and being a window for emitting light from the light-transmitting substrate; and a first thin-film transistor controlling the light emission of the first semiconductor light-emitting element chip and being deposited onto the light-transmitting substrate.

[0277] (25) The first electrode and the second electrode are connected to the light-transmitting substrate, and the first electrode and the second electrode connected to the light-transmitting substrate respectively include: a first electrode post formed at a height higher than the first semiconductor light-emitting element chip; and a second electrode post.

[0278] (26) The first thin film transistor includes a first gate electrode for controlling the light emission of the first semiconductor light-emitting element chip, and includes a first gate electrode post formed on a light-transmitting substrate in a manner that is electrically connected to the first gate electrode and is higher than the height of the first semiconductor light-emitting element chip.

[0279] (27) includes: a sealant that covers the first semiconductor light-emitting element chip and supports the first electrode post, the second electrode post and the first gate electrode post.

[0280] (28) includes: a second semiconductor light-emitting element chip disposed on a light-transmitting substrate; and a second thin-film transistor that controls the light emission of the second semiconductor light-emitting element chip and is deposited onto the light-transmitting substrate. The second semiconductor light-emitting element chip includes, sequentially grown, a first semiconductor region having a first conductivity, an active region that generates light by recombination of electrons and holes, a second semiconductor region having a second conductivity different from the first conductivity, a first electrode electrically connected to the first semiconductor region and connected to the light-transmitting substrate, a second electrode electrically connected to the second semiconductor region and connected to the light-transmitting substrate, and a first electrode post and a second electrode post formed on the first electrode and the second electrode connected to the light-transmitting substrate, respectively, at a height higher than that of the second semiconductor light-emitting element chip. The second thin-film transistor includes a second gate electrode for controlling the light emission of the second semiconductor light-emitting element chip, and includes a second gate electrode post formed on the light-transmitting substrate, electrically connected to the second gate electrode, at a height higher than that of the second semiconductor light-emitting element chip.

[0281] (29) includes: a third semiconductor light-emitting element chip disposed on a light-transmitting substrate; and a third thin-film transistor that controls the light emission of the third semiconductor light-emitting element chip and is deposited onto the light-transmitting substrate. The third semiconductor light-emitting element chip has a first semiconductor region having a first conductivity, an active region that generates light by recombination of electrons and holes, a second semiconductor region having a second conductivity different from the first conductivity, a first electrode electrically connected to the first semiconductor region and connected to the light-transmitting substrate, a second electrode electrically connected to the second semiconductor region and connected to the light-transmitting substrate, and a first electrode post and a second electrode post formed on the first electrode and the second electrode connected to the light-transmitting substrate, respectively, at a height higher than that of the third semiconductor light-emitting element chip. The third thin-film transistor includes a third gate electrode for controlling the light emission of the third semiconductor light-emitting element chip, and includes a third gate electrode post formed on the light-transmitting substrate that is electrically connected to the third gate electrode and at a height higher than that of the third semiconductor light-emitting element chip.

[0282] (30) One of the first electrode post of the first semiconductor light-emitting element chip, the first electrode post of the second semiconductor light-emitting element chip, the first electrode post of the third semiconductor light-emitting element chip, and the second electrode post of the first semiconductor light-emitting element chip, the second electrode post of the second semiconductor light-emitting element chip, and the second electrode post of the third semiconductor light-emitting element chip is integrally formed as a common electrode.

[0283] (31) Includes a sealant that covers the first semiconductor light-emitting element chip, the second semiconductor light-emitting element chip and the third semiconductor light-emitting element chip, and supports the first electrode post and the second electrode post of the first semiconductor light-emitting element chip, the first electrode post and the second electrode post of the second semiconductor light-emitting element chip, the first electrode post and the second electrode post of the third semiconductor light-emitting element chip and the first gate electrode post, the second gate electrode post and the third gate electrode post.

[0284] (32) includes: a transparent adhesive layer that bonds the first semiconductor light-emitting element chip, the second semiconductor light-emitting element chip and the third semiconductor light-emitting element chip to a light-transmitting substrate respectively.

[0285] (33) A semiconductor light-emitting element, comprising: a light-transmitting substrate having a first surface and a second surface opposite to the first surface; a semiconductor light-emitting element chip having a first semiconductor region having a first conductivity, an active region generating light by recombination of electrons and holes and a second semiconductor region having a second conductivity different from the first conductivity, and having a first electrode electrically connected to the first semiconductor region and a second electrode electrically connected to the second semiconductor region, wherein the semiconductor light-emitting element chip is formed on the first surface of the light-transmitting substrate and is a window for emitting light generated in the active region on the second surface of the light-transmitting substrate; and a black matrix material disposed on at least one of the first surface and the second surface.

[0286] (34) The first electrode and the second electrode are connected to the light-transmitting substrate, and the first electrode and the second electrode connected to the light-transmitting substrate respectively include: a first electrode post formed in a manner higher than the height of the semiconductor light-emitting element chip; and a second electrode post.

[0287] (34) The first surface has a black matrix material, and a non-conductive reflective film is included between the black matrix material and the first electrode and the second electrode.

[0288] (35) A method for manufacturing a semiconductor light-emitting element, comprising the following steps: preparing three semiconductor light-emitting element chips, the three semiconductor light-emitting element chips respectively having an n-type semiconductor region, a p-type second semiconductor region and an active region between the n-type semiconductor region and the p-type semiconductor region and generating light by recombination of electrons and holes; and bonding the three semiconductor light-emitting element chips to a light-transmitting substrate having an adhesive layer, wherein the n-type semiconductor region of each of the three semiconductor light-emitting element chips is located on the adhesive layer side.

[0289] (36) Each of the three semiconductor light-emitting element chips has a first electrode electrically connected to an n-type semiconductor region and a second electrode electrically connected to a p-type semiconductor region. In the bonding step, the first electrode and the second electrode of each of the three semiconductor light-emitting element chips are bonded on the opposite side of the n-type semiconductor region with reference to the active region.

[0290] (37) The n-type semiconductor region, active region and p-type semiconductor region of each of the three semiconductor light-emitting element chips are grown sequentially using a growth substrate. In the bonding step, the n-type semiconductor region of each of the three semiconductor light-emitting element chips is bonded to the adhesive layer while the growth substrate is removed.

[0291] (38) The first and second electrodes of each of the three semiconductor light-emitting element chips are connected to the light-transmitting substrate. Multiple electrode pillars are formed on the first and second electrodes of each of the three semiconductor light-emitting element chips to supply power to the three semiconductor light-emitting element chips.

[0292] (39) One of the multiple electrode posts is a common electrode.

[0293] (40) further includes the following steps: the light-transmitting substrate has a first surface and a second surface opposite to the first surface, and a black matrix material is formed on at least one of the first surface and the second surface.

[0294] (41) A method for manufacturing a semiconductor light-emitting element, comprising the following steps: preparing a plurality of semiconductor light-emitting element chips, the plurality of semiconductor light-emitting element chips respectively comprising an n-type semiconductor region, a p-type semiconductor region, an active region between the n-type semiconductor region and the p-type semiconductor region and generating light by recombination of electrons and holes, and a light-transmitting substrate on which the n-type semiconductor region, the active region and the p-type semiconductor region are placed, wherein at least one of the plurality of semiconductor light-emitting element chips is coupled to the light-transmitting substrate after the n-type semiconductor region, the active region and the p-type semiconductor region are grown; the plurality of semiconductor light-emitting element chips are coupled to a first substrate; and the light-transmitting substrate of each of the plurality of semiconductor light-emitting element chips is removed by laser ablation. Figures 39 to 42The example illustrates three semiconductor light-emitting element chips, but the manufacturing method disclosed herein can also be applied to two or more semiconductor light-emitting element chips. The chips can autonomously emit ultraviolet light, blue light, green light, and red light, but they can also utilize the form of coating phosphors or quantum dots (QDs) on chips that emit light of the same wavelength.

[0295] (42) further includes the steps of: bonding a second substrate to a plurality of semiconductor light-emitting element chips on one side of the light-transmitting substrate being removed; and removing the first substrate.

[0296] (43) In the step of bonding to the first substrate, the bonding is performed such that the n-type semiconductor regions of each of the multiple semiconductor light-emitting element chips are located on the side of the first substrate.

[0297] (44) A method for manufacturing a micro-LED display having multiple pixels, comprising the following steps: preparing multiple semiconductor light-emitting elements, each of the multiple semiconductor light-emitting elements having an n-type semiconductor region, a p-type semiconductor region, an active region between the n-type semiconductor region and the p-type semiconductor region and generating light by recombination of electrons and holes, a first electrode and a second electrode serving as bonding pads and electrically connected to the n-type semiconductor region and the p-type semiconductor region respectively, and a substrate for placing the n-type semiconductor region, the active region and the p-type semiconductor region; and placing the multiple semiconductor light-emitting elements in one of the multiple pixels.

[0298] (45) The substrate is a light-transmitting substrate. In the step of placing the pixel, the first electrode and the second electrode are located on the pixel side. The substrate is located on the opposite side of the first electrode and the second electrode with reference to the n-type semiconductor region, the active region and the p-type semiconductor region.

[0299] (46) The first electrode and the second electrode are disposed on the substrate on which the n-type semiconductor region, the active region and the p-type semiconductor region are not formed.

[0300] (47) At least one of the multiple semiconductor light-emitting elements has two light-emitting portions on the substrate.

[0301] (48) At least one of the multiple semiconductor light-emitting elements has a non-light-emitting element on the substrate.

[0302] (49) The substrate has conductive portions that are respectively bonded to the first electrode and the second electrode. In the step of placing the substrate in the pixel, the substrate is located on the pixel side, and the first electrode and the second electrode are located on the substrate side with reference to the n-type semiconductor region, the active region and the p-type semiconductor region.

[0303] (50) The n-type semiconductor regions of each of the multiple semiconductor light-emitting elements are located on opposite sides of the first electrode and the second electrode with reference to the active region.

[0304] (51) A black matrix is ​​present in the n-type semiconductor region.

[0305] (52) A method for transferring multiple semiconductor light-emitting element chips, wherein multiple first semiconductor light-emitting element chips emitting a first color and multiple second semiconductor light-emitting element chips emitting a second color different from the first color are alternately arranged and transferred to a transfer receiving substrate, comprising the following steps: preparing a first carrier on which multiple first semiconductor light-emitting element chips emitting the first color are attached by a laser reactive material; irradiating the transfer receiving substrate with a mask having a posture and position for supporting multiple first semiconductor light-emitting element chips to transfer multiple first semiconductor light-emitting element chips from the first carrier to the transfer receiving substrate; preparing a second carrier on which multiple second semiconductor light-emitting element chips emitting a second color different from the first color are attached by a laser reactive material; and irradiating the transfer receiving substrate with a mask having a posture and position for supporting multiple second semiconductor light-emitting element chips to transfer multiple second semiconductor light-emitting element chips from the second carrier to the transfer receiving substrate.

[0306] (53) A plurality of first semiconductor light-emitting element chips and a plurality of second semiconductor light-emitting element chips each have a light-transmitting substrate, and the light-transmitting substrates of the plurality of first semiconductor light-emitting element chips and the plurality of second semiconductor light-emitting element chips are formed in a state of being attached to a first carrier and a second carrier.

[0307] (54) includes the following steps: the transfer receiving substrate is a light-transmitting substrate, and the multiple first semiconductor light-emitting element chips and multiple second semiconductor light-emitting element chips transferred to the transfer receiving substrate are transferred again in the state of using the mask.

[0308] (55) A semiconductor light-emitting element structure, comprising: a transfer receiving substrate having an adhesive layer and a mask having a posture for supporting the semiconductor light-emitting element; a semiconductor light-emitting element attached to the adhesive layer in a posture supported by the mask, wherein the transfer receiving substrate is a light-transmitting substrate and the adhesive layer is made of a material that can be disassembled and reassembled by means of re-transferring the semiconductor light-emitting element.

[0309] (56) A method for manufacturing a semiconductor light-emitting element, comprising the following steps: sequentially growing an n-type semiconductor region, an active region, and a p-type semiconductor region on a growth substrate; bending the growth substrate in an upwardly protruding manner after growth; bonding a first support substrate to the p-type semiconductor region side using one of a metal bonding agent and an organic adhesive; removing the growth substrate; bonding a second support substrate to the n-type semiconductor region side after the growth substrate has been removed using a direct wafer bonding method; and removing the first support substrate. Here, the semiconductor light-emitting element essentially has a semiconductor wafer state, and can be categorized as a semiconductor light-emitting element wafer, a semiconductor light-emitting element chip, or a semiconductor light-emitting element package.

[0310] (57) Utilization of SiO2 in direct wafer bonding.

[0311] (58) In the step of removing the first support substrate, after reducing the thickness of the second support substrate, the first support substrate is removed while the third support substrate is attached to the second support substrate with the reduced thickness.

[0312] (59) A semiconductor light-emitting element comprising: a light-transmitting substrate; a light-transmitting adhesive layer disposed on the light-transmitting substrate and composed of an inorganic material; an n-type semiconductor region disposed on the light-transmitting adhesive layer; an active region disposed on the n-type semiconductor region; and a p-type semiconductor region disposed on the active region.

[0313] (60) The light-transmitting adhesive layer includes SiO2.

[0314] (61) Includes a transparent electrode formed on a p-type semiconductor region.

[0315] (62) Includes a sacrificial layer disposed between the light-transmitting adhesive layer and the light-transmitting substrate.

[0316] (63) A method for manufacturing a semiconductor light-emitting element, comprising the following steps: preparing a plurality of semiconductor light-emitting element wafers, each having a substrate, an n-type semiconductor region, an active region, and a p-type semiconductor region in sequence; bonding the plurality of semiconductor light-emitting element wafers to a temporary substrate having an adhesive layer, wherein the plurality of semiconductor light-emitting element wafers are bonded with the substrate facing upwards; removing the substrates of the plurality of semiconductor light-emitting element wafers; bonding a light-transmitting substrate to the n-type semiconductor region side of the removed substrates of the plurality of semiconductor light-emitting element wafers by direct wafer bonding; and removing the temporary substrate.

[0317] (64) Multiple semiconductor light-emitting element chips are formed by a first electrode electrically connected to an n-type semiconductor region and a second electrode electrically connected to a p-type semiconductor region, respectively.

[0318] (65) A semiconductor light-emitting element, comprising: a light-transmitting substrate; a light-transmitting adhesive layer disposed on the light-transmitting substrate and composed of an inorganic material; and a plurality of semiconductor light-emitting element chips bonded to the light-transmitting adhesive layer, each semiconductor light-emitting element chip having an n-type semiconductor region, an active region disposed on the n-type semiconductor region and a p-type semiconductor region disposed on the active region, the n-type semiconductor region being located on the side of the light-transmitting adhesive layer.

[0319] (66) The light-transmitting adhesive layer includes SiO2.

[0320] (67) A light-transmitting electrode is formed on the p-type semiconductor region.

[0321] (68) A method for manufacturing a semiconductor light-emitting element, comprising the following steps: preparing a light-emitting portion having a first area when viewed from above, comprising a substrate, an n-type semiconductor region, an active region, and a p-type semiconductor region in sequence; bonding the light-emitting portion to a temporary substrate having an adhesive layer, with the substrate of the light-emitting portion facing towards the substrate; removing the substrate of the light-emitting portion; bonding a light-transmitting substrate to the n-type semiconductor region side of the substrate from which the light-emitting portion has been removed; removing the temporary substrate; and reducing the light-emitting portion to a second area smaller than the first area by etching while the light-emitting portion is bonded to the light-transmitting substrate.

[0322] (69) A transparent substrate is bonded by direct wafer bonding.

[0323] (70) In the shrinking step, the light-emitting part is divided into multiple parts.

[0324] (71) After the shrinking step, a first electrode and a second electrode are formed that are electrically connected to the n-type semiconductor region and the p-type semiconductor region, respectively.

[0325] (72) includes the following steps: preparing three semiconductor light-emitting element wafers that emit blue light, green light, and red light respectively, and having a substrate, an n-type semiconductor region, an active region, and a p-type semiconductor region; attaching the three semiconductor light-emitting element wafers to a temporary substrate with their respective substrates facing each other; removing the respective substrates of the three semiconductor light-emitting element wafers; attaching a light-transmitting substrate to one side of the removed substrates of the three semiconductor light-emitting element wafers; and removing the temporary substrate, wherein at least two of the three semiconductor light-emitting element wafers have growth substrates for growing n-type semiconductor regions, active regions, and p-type semiconductor regions respectively. In the preparation step, the growth substrates of at least two semiconductor light-emitting element wafers are removed by chemical lifting (CLO), and in the substrate removal step, the substrates of the three semiconductor light-emitting element wafers are removed by laser dissolution (LLO).

[0326] (73) At least two semiconductor light-emitting element wafers are each grown on a substrate made of Si and a substrate made of GaAs.

[0327] (74) In the step of removing the substrate, the substrate is removed to expose the n-type semiconductor region of the three semiconductor light-emitting element wafers.

[0328] (75) includes the following steps: preparing three semiconductor light-emitting element wafers that emit blue light, green light, and red light respectively, and having a substrate, an n-type semiconductor region, an active region, and a p-type semiconductor region; attaching the three semiconductor light-emitting element wafers to a temporary substrate with their respective substrates facing upwards; removing the respective substrates of the three semiconductor light-emitting element wafers; attaching a light-transmitting substrate to one side of the removed substrates of the three semiconductor light-emitting element wafers; and removing the temporary substrate, wherein the substrate is a growth substrate grown on the n-type semiconductor region, active region, and p-type semiconductor region of each of the three semiconductor light-emitting element wafers, and in the step of removing the substrate, the surface oxide of the growth substrate of each of the three semiconductor light-emitting element wafers is removed in one process.

[0329] (76) A method for manufacturing a semiconductor light-emitting element, comprising the following steps: preparing a plurality of semiconductor light-emitting element chips having a first electrode and a second electrode respectively on opposite sides of a light-transmitting substrate; attaching a support substrate to the first electrode and the second electrode side; reducing the thickness of a light-transmitting substrate; separating a light-transmitting substrate to isolate the plurality of semiconductor light-emitting element chips; attaching a support to the separated light-transmitting substrate side with reduced thickness; and removing the support substrate.

[0330] (77) also includes the following steps: enlarging the support to increase the spacing between multiple semiconductor light-emitting element chips.

[0331] (78) Prior to the step of attaching the support substrate, the following step is also included: forming a protective layer covering multiple semiconductor light-emitting element chips.

[0332] (79) In the step of attaching the support substrate, the support substrate and the protective layer are attached by means of an adhesive layer.

[0333] (80) A light-transmitting substrate is a growth substrate.

[0334] (81) An adhesive layer is provided between a light-transmitting substrate and multiple semiconductor light-emitting element chips.

[0335] (82) The step of preparing multiple semiconductor light-emitting element chips includes the process of removing the growth substrate of multiple semiconductor light-emitting element chips.

[0336] (83) The growth substrate is a Si substrate.

[0337] (84) A semiconductor light-emitting element, comprising: at least one light-emitting portion, each light-emitting portion including a first semiconductor region having a first conductivity, a second semiconductor region having a second conductivity different from the first conductivity, and an active region between the first semiconductor region and the second semiconductor region for generating light through recombination of electrons and holes; a light-transmitting substrate supporting the at least one light-emitting portion; a first electrode formed on the light-transmitting substrate and electrically connected to the first semiconductor region; an adhesive layer formed on the first electrode for bonding the at least one light-emitting portion and the light-transmitting substrate; and a second electrode electrically connected to the second semiconductor region.

[0338] (85) The first electrode and the adhesive layer are made of a light-transmitting material so that the light generated in the active region is radiated to the light-transmitting substrate side.

[0339] (86) further includes: a first electrode post and a second electrode post, which are formed on a light-transmitting substrate and electrically connected to the first electrode and the second electrode respectively to supply an external power source.

[0340] (87) The adhesive layer between the first semiconductor region and the transparent substrate and the first electrode are transparent in the form of a transparent conductive oxide film-bonding metal or their alloy-transparent conductive oxide film and provide conductivity and bonding between the first semiconductor region and the transparent substrate.

[0341] (88) The first electrode has a metal reflector so that light generated in the active region is radiated to the opposite side of the light-transmitting substrate.

[0342] (89) also includes: a first electrode post and a second electrode post, which are formed in the light-transmitting substrate and electrically connected to the first electrode and the second electrode, respectively, to supply external power.

[0343] (90) A semiconductor light-emitting element constituting a pixel light source, comprising: at least one semiconductor light-emitting portion, each light-emitting portion including a first light-transmitting substrate having a first thickness, a first semiconductor region having a first conductivity formed on the first light-transmitting substrate, a second semiconductor region having a second conductivity different from the first conductivity, an active region that emits light between the first semiconductor region and the second semiconductor region, a first electrode portion electrically connected to the first semiconductor region, and a second electrode portion electrically connected to the second semiconductor region; a second light-transmitting substrate having a second thickness greater than the first thickness; and a light-transmitting lower adhesive layer that bonds the first light-transmitting substrate and the second light-transmitting substrate of at least one semiconductor light-emitting portion.

[0344] (91) The lower adhesive layer fixes the side of the first light-transmitting substrate.

[0345] (92) further includes: an upper adhesive layer, which fixes at least one side of a semiconductor light-emitting part to the opposite side of the first light-transmitting substrate.

[0346] (93) further includes: a black matrix material, which is formed on the lower adhesive layer at a height less than that of at least one semiconductor light-emitting part to fix the side of at least one semiconductor light-emitting part.

[0347] (94) The first thickness has a thickness of less than 50 μm.

[0348] (95) A semiconductor light-emitting element constituting a pixel light source, comprising: at least two semiconductor light-emitting portions, each light-emitting portion having a first light-transmitting substrate, a first semiconductor region formed on the first light-transmitting substrate and having a first conductivity, a second semiconductor region having a second conductivity different from the first conductivity, an active region that emits light between the first semiconductor region and the second semiconductor region, a first electrode portion electrically connected to the first semiconductor region and a second electrode portion electrically connected to the second semiconductor region; and a lower adhesive layer, which is bonded to each of the first light-transmitting substrates on the opposite side of the first semiconductor region based on the first light-transmitting substrate to fix at least two semiconductor light-emitting portions, and opening a portion of each of the first light-transmitting substrates to radiate light generated in each active region to the outside.

[0349] (96) The lower adhesive layer fixes the side of the first light-transmitting substrate.

[0350] (97) further includes: an upper adhesive layer, which fixes at least one side of a semiconductor light-emitting part to the opposite side of the first light-transmitting substrate.

[0351] (98) further includes: a black matrix material, which is formed on the lower adhesive layer at a height less than that of at least one semiconductor light-emitting part to fix the side of at least one semiconductor light-emitting part.

[0352] (99) The lower adhesive layer is made of a light-transmitting material.

[0353] (100) The lower adhesive layer is made of metal.

[0354] (101) The first light-transmitting substrate has a thickness of less than 50 μm.

[0355] The method for manufacturing semiconductor light-emitting elements disclosed herein further improves yield and reliability, providing a flip-chip semiconductor light-emitting element with enhanced productivity. In particular, it significantly improves productivity when applied to mini-LEDs or micro-LEDs.

[0356] According to the semiconductor light-emitting element disclosed herein, the structural tilt (height difference) of the first and second electrodes used as bonding pads for flip chips can be reduced. This allows for uniform adjustment of the direction of light emitted from the semiconductor light-emitting element, ultimately improving light quality in applications such as displays and lighting.

[0357] According to the semiconductor light-emitting element disclosed herein, it is possible to manufacture a package for mini or micro LEDs in which all RGB chips are composed of p-sideup flip chips, while ensuring the reliability of the element.

[0358] According to the semiconductor light-emitting element disclosed herein, a mini or micro LED package (so-called an interlayer) is provided, which does not use conventional transparent sealants, but instead uses a light-transmitting substrate (e.g., sapphire, quartz, glass) in the form of a plate as a window (light emitting part).

Claims

1. A manufacturing method of a semiconductor light emitting element which is a flip chip, the manufacturing method comprising the steps of: providing a growth substrate in which a first semiconductor region having an N type, an active region which generates light by recombination of an electron and a hole, and a second semiconductor region having a P type are formed in this order; bonding a first light-transmissive substrate to the second semiconductor region side; removing the growth substrate from the first semiconductor region side; attaching a second light-transmissive substrate to the first semiconductor region side from which the growth substrate is removed, using an adhesive layer; laser ablating the first light-transmissive substrate from the second semiconductor region side; removing a part of the second semiconductor region and the active region to expose a part of the first semiconductor region; and forming a first electrode of the flip chip and a second electrode of the flip chip on the exposed first semiconductor region and the second semiconductor region, respectively, wherein a step of forming a protective layer on the second semiconductor layer is included before the step of bonding the first light-transmissive substrate, the first light-transmissive substrate includes a sacrificial layer, and the sacrificial layer and the protective layer are bonded by a metal bonding layer.

2. The manufacturing method of the semiconductor light emitting element according to claim 1, wherein the metal bonding layer and the protective layer are removed in this order after the step of removing the first light-transmissive substrate before the step of exposing a part of the first semiconductor layer.

3. The manufacturing method of the semiconductor light emitting element according to claim 2, wherein a part of the adhesive layer is removed to expose the second light-transmissive substrate after the step of removing the metal bonding layer and the protective layer in this order.

4. The manufacturing method of the semiconductor light emitting element according to claim 2, wherein a step of forming a light-transmissive electrode on the second semiconductor layer is included after the step of removing the metal bonding layer and the protective layer in this order. ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​

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