Control Circuit, Power Supply Circuit, and Electronic Device

Abstract

Embodiments of the present application relate to a control circuit, a power supply circuit, and an electronic device. The control circuit includes: a mode control module configured to generate a first control signal in response to an externally input wake-up signal to switch the control circuit to a wake-up mode and output a second control signal; a power supply control module connected to the mode control module, configured to be connected to the power supply and turn on the power supply path of the power supply according to the first control signal; a reset control module connected to the mode control module, configured to output a reset signal according to the second control signal and an externally input reset enable signal, where the reset signal is used to indicate a reset of a processor. In the embodiments of the present application, by time-division multiplexing the mode control module, the required circuit components are reduced, the integration degree is improved, and thus the overall volume of the control circuit is reduced.

Description

Technical Field

[0001] The embodiments of the present application relate to the technical field of radio frequency identification, and particularly to a control circuit, a power supply circuit, and an electronic device. Background Art

[0002] With the continuous development of science and technology, various portable electronic devices have continuously entered people's lives. However, due to the increasing number of control functions of electronic devices, the corresponding control circuits have become more and more complex. For example, the power supply control circuit needs to implement multiple control functions, resulting in a relatively large overall volume of the power supply control circuit, and further causing the size of the electronic device to become larger and larger, unable to meet people's requirements for portability. Summary of the Invention

[0003] The embodiments of the present application provide a control circuit, a power supply circuit, and an electronic device, which can improve the integration degree of the control circuit of the power supply, thereby reducing the overall volume of the control circuit.

[0004] A control circuit includes:

[0005] A mode control module, configured to generate a first control signal in response to an externally input wake-up signal to switch the control circuit to a wake-up mode, and output a second control signal;

[0006] A power supply control module, connected to the mode control module, configured to be connected to the power supply, and conduct the power supply path of the power supply according to the first control signal;

[0007] A reset control module, connected to the mode control module, configured to output a reset signal according to the second control signal and an externally input reset enable signal, where the reset signal is used to indicate the reset of the processor.

[0008] A power supply circuit includes:

[0009] The control circuit as described above;

[0010] A power supply, connected to the power supply control module of the control circuit;

[0011] An interface module, connected to the reset control module of the control circuit, configured to receive a reset enable signal.

[0012] An electronic device includes the power supply circuit as described above.

[0013] The above control circuit, power supply circuit and electronic device, the control circuit includes: a mode control module, configured to generate a first control signal in response to an externally input wake-up signal to switch the control circuit to a wake-up mode and output a second control signal; a power supply control module, connected to the mode control module, configured to be connected to the power supply and turn on the power supply path of the power supply according to the first control signal; a reset control module, connected to the mode control module, configured to output a reset signal according to the second control signal and an externally input reset enable signal, where the reset signal is used to indicate the reset of the processor. In the embodiments of the present application, the mode control module is both used to control the power supply control module to enable the power supply to supply power to the system of the electronic device, thereby switching the control circuit to the wake-up mode, and is also used to control the reset control module to output a reset signal when the control circuit is already in the wake-up mode to reset the processor of the electronic device, that is, in the embodiments of the present application, by multiplexing the mode control module in time division, the required circuit components are reduced, the integration degree is improved, and thus the overall volume of the control circuit is reduced. Description of the Drawings

[0014] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0015] Figure 1 It is a structural block diagram of a control circuit according to an embodiment;

[0016] Figure 2 It is a circuit diagram of a mode control module and a power supply control module according to an embodiment;

[0017] Figure 3 It is a circuit diagram of a mode control module and a reset control module according to an embodiment;

[0018] Figure 4 It is one of the circuit diagrams of a control circuit according to an embodiment;

[0019] Figure 5 It is a simulation diagram of the control process of a control circuit according to an embodiment;

[0020] Figure 6 It is the second circuit diagram of a control circuit according to an embodiment.

[0021] Element Label Description:

[0022] Mode control module: 100; First control circuit: 110; First switch circuit: 120; Second control circuit: 130; Sleep control circuit: 140; Power supply control module: 200; Reset control module: 300; Second switch circuit: 310. Detailed implementation

[0023] To facilitate the understanding of this application, the following will provide a more comprehensive description of this application with reference to the relevant attached drawings. Embodiments of this application are shown in the attached drawings. However, this application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the disclosure of this application more thorough and comprehensive.

[0024] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field to which this application belongs. The terms used in the specification of this application herein are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0025] It can be understood that the terms "first", "second", etc. used in this application can be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish a first element from another element. For example, without departing from the scope of this application, the first control signal can be referred to as the second control signal, and similarly, the second control signal can be referred to as the first control signal. Both the first control signal and the second control signal are control signals, but they are not the same control signal.

[0026] It can be understood that the "connection" in the following embodiments should be understood as "electrical connection", "communication connection", etc. if there is an electrical signal or data transfer between the connected circuits, modules, circuits, etc.

[0027] The control circuit of the embodiment of this application is used to control the on / off of the power supply path of the power supply of the electronic device, and is also used to control the processor of the electronic device to perform a reset operation when the electronic device crashes. Among them, the power supply of this application can be the battery of the electronic device, and the electronic device can be a sports bracelet, watch, mobile phone, tablet computer, laptop computer, personal digital assistant, television, multimedia display screen, etc. devices including a battery.

[0028] From the time of factory production until it is sold, an electronic device usually requires a certain transportation and storage period. During transportation and storage, since there is a micro-circulation in the circuit of the battery in the electronic device, the electrical energy stored in the battery will be consumed. At the same time, for the protection of the lithium cobalt oxide battery in the electronic device, a protection circuit is usually built into the battery cell. When the battery voltage drops below the threshold voltage (for example, 0.9V), the protection circuit can prohibit the battery from receiving a charging signal, thereby preventing the lithium cobalt oxide chemical substance from reacting and avoiding the phenomenon of the battery bulging in the electronic device.

[0029] However, if the transportation and storage period of the electronic device is too long and the battery of the electronic device is over-discharged, the user will not be able to turn on the device and charge it normally after purchase, which greatly affects the user experience and the company's brand trust. Therefore, it is crucial to reduce the power consumption problem of electronic devices during transportation and warehouse storage. It can be understood that for electronic devices with a relatively large battery capacity such as tablets and mobile phones, this power consumption problem is within an acceptable range. However, for electronic devices with a relatively small battery capacity such as bracelets and smart watches, the battery capacity is usually 500mAh. Through actual measurement and analysis, when the storage standby time of the smart watch is about 5000h, that is, 200 days, the battery voltage will drop below 0.9V. At this time, the charge prohibition function of the protection circuit of the lithium cobalt oxide battery is activated, and the watch can no longer be charged normally, so it will be misjudged as a defective device. In the prior art, an isolation device such as a thin sheet can be used to separate the battery from the smart watch to avoid battery power consumption. However, current smart watches usually have usage scenarios such as swimming and bathing. Therefore, inserting a thin sheet into the battery series node from the outside to cut off the battery will greatly affect the waterproof performance of the smart watch.

[0030] In the embodiment of the present application, taking a wearable electronic device such as a smart watch as an example, a control circuit is provided. The control circuit in this embodiment is used to control the on-off of the power supply path of a power supply DC1 taking the battery as an example, and to control the electronic device to perform a reset operation. Figure 1 For the structural block diagram of the control circuit in an embodiment, refer to Figure 1 , in this embodiment, the control circuit includes a mode control module 100, a power supply control module 200, and a reset control module 300.

[0031] In this embodiment, the control circuit is configured with two operating modes, namely the sleep mode and the wake-up mode. Before the electronic device is sold, the control circuit can be configured to the sleep mode. When the control circuit is in the sleep mode, the power supply path of the power supply DC1 is disconnected, thereby disconnecting the microcirculation of the circuit, avoiding power consumption of the power supply DC1, and further preventing the protection circuit of the battery from enabling the charge prohibition function, improving the reliability of the electronic device. After the electronic device is sold, the user can send a wake-up signal to the control circuit through a specific wake-up operation. After receiving the wake-up signal, the control circuit can switch to the wake-up mode. When the control circuit is in the wake-up mode, the power supply path of the power supply DC1 is turned on, and the power supply DC1 can supply power to each hardware structure in the electronic device to support the normal operation of the electronic device. Moreover, when the control circuit is in the wake-up mode, if the electronic device freezes, the user can also send a reset enable signal to the control circuit through a specific reset operation. After receiving the reset enable signal, the control circuit can automatically generate a reset signal, and the reset signal can be output to the reset enable terminal of structures such as the processor to control the processor to be reset.

[0032] Specifically, the mode control module 100 is used to generate a first control signal in response to an externally input wake-up signal to switch the control circuit to the wake-up mode and output a second control signal. Among them, the user sends a wake-up signal to the control circuit through a specific wake-up operation. The specific wake-up operation can be received by a key of the electronic device. Exemplarily, if the power key of the electronic device is switched from the off state to the on state under the manual operation of the user and maintains the on state for a preset duration, it can be considered that the mode control module 100 receives the wake-up signal. After receiving the wake-up signal, the mode control module 100 outputs the first control signal to the power supply control module 200 to instruct the power supply control module 200 to turn on, so as to supply power to each hardware structure in the electronic device.

[0033] Further, after the control circuit completes waking up, the user can confirm the completion of waking up through a preset operation. For example, the user can release the power key of the electronic device to restore the power key to the off state. After the control circuit confirms the completion of waking up through the above operation of the user, it can send the second control signal to the reset control module 300. It can be understood that the above method of generating the wake-up signal is only used for illustrative purposes and does not limit the protection scope of the present application. In other embodiments, methods such as pressing multiple keys simultaneously or connecting the mode control module 100 of the control circuit to an external wake-up device can also be used.

[0034] The power supply control module 200 is connected to the mode control module 100, and is used to be connected to the power supply DC1, and conduct the power supply path of the power supply DC1 according to the first control signal. Exemplarily, the power supply control module 200 can be a voltage control switch, and the first control signal is a voltage signal with a preset voltage value, and this preset voltage value can be determined according to the parameter characteristics of the voltage control switch, for example, it can be 0V. Another exemplarily, the power supply control module 200 can also be a current control switch, and the first control signal is a current signal with a preset current range, for example, it can be from 1.5 mA to 1.7 mA. When the power supply control module 200 does not receive the first control signal, the power supply control module 200 controls the power supply path to be disconnected; when the power supply control module 200 receives the first control signal, that is, when the signal received by the control end of the power supply control module 200 meets the conditions of the above preset value or preset range, the power supply control module 200 controls the power supply path to be conducted, and the power supply DC1 can supply power to each hardware structure in the electronic device.

[0035] The reset control module 300 is connected to the mode control module 100, and is used to output a reset signal according to the second control signal and an externally input reset enable signal, and the reset signal is used to indicate the reset of the processor. Specifically, the voltage of the reset signal can be set according to the regulations of the reset enable terminal of the processor. Exemplarily, if the signal received by the reset enable terminal of the processor is a low-level signal for reset, then the signal normally output by the reset control module 300 can be set to a high-level signal, and a low-level reset signal is output when the reset enable signal is received to control the processor to reset. It can be understood that the reset function of the electronic device is only used in the case of a crash, and the probability of a crash occurring under normal circumstances is very low. Therefore, the hardware structure used to support the reset function is idle most of the time, and in this embodiment, the reset operation is performed under the control of the second control signal and the reset enable signal, that is, the reset function of this embodiment is jointly implemented based on the mode control module 100 and the reset control module 300, and the above mode control module 100 is also used to jointly implement the on-off control of the power supply path with the power supply control module 200. Therefore, the mode control module 100 of this embodiment is time-division multiplexed to achieve different functions, thereby greatly improving the integration degree of the control circuit compared with the independently set wake-up structure and reset structure.

[0036] In this embodiment, the control circuit includes: a mode control module 100, configured to generate a first control signal in response to an externally input wake-up signal, so as to switch the control circuit to the wake-up mode and output a second control signal; a power supply control module 200, connected to the mode control module 100, configured to be connected to the power supply DC1, and turn on the power supply path of the power supply DC1 according to the first control signal; a reset control module 300, connected to the mode control module 100, configured to output a reset signal according to the second control signal and an externally input reset enable signal, where the reset signal is used to indicate the reset of the processor. Based on the above hardware structure, the mode control module 100 is used to control the power supply control module 200 to supply power to the system of the electronic device by the power supply DC1, so as to switch the control circuit to the wake-up mode, and is also used to control the reset control module 300 to output a reset signal to reset the processor of the electronic device when the control circuit is already in the wake-up mode. That is, in this embodiment, by multiplexing the mode control module 100 in time division, the required circuit components are reduced, the integration degree is improved, and thus the overall volume of the control circuit is reduced.

[0037] Figure 2 FIG. is a circuit diagram of the mode control module 100 and the power supply control module 200 in an embodiment for reference Figure 2 In this embodiment, the power supply control module 200 includes a fourth transistor Q4. The fourth transistor Q4 can be a P-type MOS transistor. The gate of the fourth transistor Q4 is the control end. The control end of the fourth transistor Q4 is connected to the mode control module 100. The drain of the fourth transistor Q4 is the first end. The first end of the fourth transistor Q4 is used to be connected to the power supply DC1. The source of the fourth transistor Q4 is the second end. The second end of the fourth transistor Q4 is used to output a power supply signal VOUT. When the gate voltage of the fourth transistor Q4 is at a high level, the fourth transistor Q4 is not turned on, and then the voltage VOUT = 0V, and the power supply DC1 does not supply power to each hardware structure in the electronic device.

[0038] Further, the mode control module 100 includes a first control circuit 110 and a first switch circuit 120. One end of the first switch circuit 120 is respectively connected to the first control circuit 110 and the reset control module 300. The other end of the first switch circuit 120 is connected to the ground terminal. The first switch circuit 120 is configured to conduct the path between the first control circuit 110 and the ground terminal in response to the wake-up signal. Specifically, the first switch circuit 120 can be Figure 2The switch SW in it. The SW switch can be a four-corner surface-mount push-button switch. It can be understood that there are two available paths for the surface-mount switch, while the power-on button POWER_ON only uses one of them. Therefore, in this embodiment, the other idle path is utilized, thus saving device costs. At the same time, pressing the power-on button to start the circuit also conforms to normal logic.

[0039] The first control circuit 110 is respectively connected to the power supply DC1 and the power supply control module 200. The first control circuit 110 is used to generate the first control signal according to the power supply DC1 signal and the ground signal. Taking the fourth switch transistor that conducts with a low level as an example, the first control signal is a low-level signal. For a clearer description, each embodiment of the present application is described with the power supply DC1 voltage being 4V. It can be understood that in other embodiments, the power supply DC1 voltage can also be 4.5V, 5V, etc. In one embodiment, the first control circuit 110 includes a series-connected first capacitor C1 and a first resistor R1, and the node between the first capacitor C1 and the first resistor R1 is used to output the first control signal.

[0040] Specifically, when the switch SW is disconnected, the path between the power supply DC1, the first capacitor C1, the first resistor R1 and the ground terminal is disconnected, and the gate voltage VQ4 of the fourth transistor Q4 is clamped at the power supply DC1 voltage of 4V. When the switch SW is closed, the path between the power supply DC1, the first capacitor C1, the first resistor R1 and the ground terminal is conducted, and the first capacitor C1 and the first resistor R1 form an RC charge-discharge circuit. At the moment when SW is closed, that is, when the user presses the power button for the first time, since the voltage across the capacitor cannot change suddenly, the voltage at the upper end of the first resistor R1 is 4V. At this time, the voltage difference Ugs between the gate and the source of the fourth transistor Q4 is 0V, and the fourth transistor Q4 cannot conduct. However, as the RC circuit continues to charge, the voltage across the first capacitor C1 gradually increases, and the voltage across the first resistor R1 gradually decreases. When the voltage difference between the gate and the source of the fourth transistor Q4 exceeds the threshold of the transistor, the fourth transistor Q4 conducts, and the output voltage VOUT is pulled up to the power supply DC1 voltage, and then a power supply signal can be output to each hardware structure in the electronic device, and the control circuit switches to the wake-up mode, and the electronic device operates normally.

[0041] Further, the resistance value of the first resistor R1 can be 330 kΩ, and the capacitance value of the first capacitor C1 can be 1 uF. The time constant τ of the charge-discharge circuit composed of the first resistor R1 and the first capacitor C1 is τ = R1 × C1 = 0.33 s. When the switch SW is disconnected, τ = R1(C1 / / C2) = 0.165 s. It can be understood that usually taking 2τ - 3τ can be considered that the charge and discharge of the RC charge-discharge circuit are completed. Therefore, the user can complete the initial startup in a very short time.

[0042] Continue to refer to Figure 2 The mode control module 100 further includes a second control circuit 130. The second control circuit 130 is respectively connected to the ground terminal and the first control circuit 110, and is configured to output a second control signal when the control circuit is in the wake-up mode and the first switch circuit 120 is disconnected. Further, the second control circuit 130 includes a first transistor Q1 and a second capacitor C2. The first transistor Q1 can be an N-type MOS transistor. The control terminal of the first transistor Q1 is connected to the power supply control module 200 for receiving the VOUT voltage. The first end of the first transistor Q1 is connected to the ground terminal, and the second end of the first transistor Q1 is connected to the second capacitor C2. When the voltage difference between the gate and the source of the first transistor Q1 is greater than the threshold value, the first transistor Q1 is turned on, so as to transmit the voltage of the ground terminal to the second end of the first transistor Q1, that is, the drain. One end of the second capacitor C2 is connected to the second end of the first transistor Q1, and the other end of the second capacitor C2 is connected to the first control circuit 110. The node between the second capacitor C2 and the first control circuit 110 is used to output the second control signal.

[0043] When the fourth transistor Q4 is not turned on before the initial wake-up, the voltage difference between the gate and the source of the first transistor Q1 is less than the threshold value, and the first transistor Q1 is turned off. The voltage at the node between the second capacitor C2 and the first control circuit 110 is 0V. When the fourth transistor Q4 is turned on, the voltage difference between the gate and the source of the first transistor Q1 is greater than the threshold value, and the first transistor Q1 is turned on. The power supply DC1, the first capacitor C1, the first resistor R1, the second capacitor C2 and the ground terminal jointly form an RC charge and discharge circuit. Taking the capacitance values of the first capacitor C1 and the second capacitor C2 as the same as an example, when the RC charge and discharge circuit of the first capacitor C1, the first resistor R1 and the second capacitor C2 reaches the steady state, the voltages across the first capacitor C1 and the second capacitor C2 are both 2V. Therefore, when the wake-up operation of the initial boot is completed and the switch SW is disconnected, the voltage of the first capacitor C1 will gradually rise to 2V, and the gate voltage VQ4 of the fourth transistor Q4 is 2V after reaching the steady state. Therefore, no matter what state it is in again after the switch SW is initially closed, the gate voltage of the fourth transistor Q4 is always less than the voltage of the power supply DC1, which is 4V. Therefore, the fourth transistor Q4 is always turned on and the circuit works normally. Therefore, this embodiment provides a control circuit with a fast wake-up speed and a reliable state after wake-up.

[0044] Figure 3 Is the circuit diagram of the mode control module 100 and the reset control module 300 of an embodiment. Refer to Figure 3, in this embodiment, the reset control module 300 includes a second switch circuit 310 and a third transistor Q3. Among them, the control end of the second switch circuit 310 is used to receive a reset enable signal, the first end of the second switch circuit 310 is connected to the mode control module 100, the control end of the third transistor Q3 is connected to the second end of the second switch circuit 310, the first end of the third transistor Q3 is connected to the ground terminal, and the second end of the third transistor Q3 is used to output the reset signal.

[0045] Specifically, when the electronic device freezes, since it cannot be restarted and the low-level reset of the smart watch is effective, the reset control module 300 is required to power down the kernel for reset, that is, VREV should be able to be 0 in this circuit. Exemplarily, the above-mentioned reset enable signal can be input by the user. For example, the user can connect the interface module of the electronic device to an external reset device to receive the reset enable signal. The interface module can be, but is not limited to, a USB interface, a type-C interface, etc., and the reset device can be a computer, a power adapter, etc. The second switch circuit 310 can be a high-level enabled switch circuit, such as a fifth transistor Q5 of an N-type MOS transistor.

[0046] When the interface module receives a high-level reset enable signal, the voltage difference between the gate and the source of the fifth transistor Q5 is greater than the threshold, and the fifth transistor Q5 conducts. The second control signal from the mode control module 100 can be transmitted through the fifth transistor Q5 to the control end of the third transistor Q3, thereby controlling the third transistor Q3 to conduct. The ground terminal voltage can be output as a low-level reset signal VREV through the third transistor Q3. When the interface module does not receive the reset enable signal, the voltage difference between the gate and the source of the fifth transistor Q5 is less than the threshold, the fifth transistor Q5 is disconnected, and the voltage at the second end of the third transistor Q3 is pulled up to a high level, and no reset signal VREV is output. Through the overall structure of the above-mentioned mode control module 100 and reset control module 300, the reset signal can be accurately and quickly output to control the processor of the electronic device to reset.

[0047] Furthermore, the voltage at the second end of the third transistor Q3 can be directly pulled up by the power supply DC1, or the voltage at the second end of the third transistor Q3 can be pulled up by additionally setting a constant voltage source module. Specifically, it can be set according to the circuit layout and the required voltage. This application does not make specific limitations.

[0048] Continue to refer to Figure 3, the third transistor Q3 can be a triode. The reset control module 300 further includes a second resistor R2, and the second resistor R2 is respectively connected to the mode control module 100 and the first end of the second switch circuit 310. It can be understood that when the third transistor Q3 is a triode, it is controlled by the magnitude of the current received at its control terminal. Therefore, by selecting an appropriate resistance value for the second resistor R2, the accurate conduction of the third transistor Q3 can be ensured. Among them, the resistance value of the second resistor R2 can be 10 kΩ. It can be understood that in other embodiments, if the third transistor Q3 is a voltage-controlled device such as a MOS transistor, the second resistor R2 may not be provided. Further, the reset control module 300 may further include a third resistor R3. One end of the third resistor R3 is connected to the second end of the third transistor Q3, and the other end of the third resistor R3 is used to output a low-level reset signal. By setting the third resistor R3 as a pull-up resistor, the stability and reliability of the reset control module 300 can be effectively improved. Among them, the resistance value of the third resistor R3 can be 10 kΩ.

[0049] Based on Figure 3 , when the electronic device is not deadlocked, no reset enable signal is input, and the fifth transistor Q5 is not turned on. At this time, VREV is clamped to 4V by the pull-up resistor and no reset is performed; when the electronic device is deadlocked, the reset enable signal can be obtained by inserting a USB to turn on the fifth transistor Q5, and the third transistor Q3 is connected to the circuit. At this time, the circuit will enter the following three dynamic processes:

[0050] Process 1: The RC charge and discharge circuit composed of the first capacitor C1, the second capacitor C2, and the first resistor R1 is charged. The time constant τ = R1(C1 / / C2) = 0.165 s. The state of this process 1 continues until the voltage at the node between the second capacitor C2 and the first resistor R1 reaches 0.7V;

[0051] Process 2: When the voltage at the node between the second capacitor C2 and the first resistor R1 reaches 0.7V, the Vbc of the third transistor Q3 is also 0.7V. The third transistor Q3 is in a critical conduction state, and the second resistor R2 enters the RC charge and discharge circuit. At this time, since the current charging the first capacitor C1 is shunted at the node of the third transistor Q3, the current in the second resistor R2 loop gradually increases, and then a current is generated at the base (i.e., the control terminal) of the third transistor Q3. The third transistor Q3 is turned on and in a saturated state. The emitter and collector of the third transistor Q3 are almost short-circuited, and VREV is grounded to 0V, that is, a reset signal is generated. At this time, the processor of the electronic device starts to reset. Due to the shunt at the third transistor Q3, the voltage of the second capacitor C2 starts to gradually become smaller than the voltage across the first capacitor C1 until the current in the second resistor R2 loop no longer increases;

[0052] Process 3: When the current in the second resistor R2 loop no longer increases, the base current of the third transistor Q3 begins to decrease until it reaches a steady state, and the current in the second resistor R2 loop also gradually decreases. When the circuit reaches a stable state, the Vbc of the third transistor Q3 is 0.7V, and the voltage across the first capacitor C1 is 3.3V. At this time, there is no current flowing in the circuit. Therefore, the third transistor Q3 is no longer conducting, and the reset is completed.

[0053] Figure 4 is one of the circuit diagrams of the control circuit of an embodiment. Refer to Figure 4 , in this embodiment, the connection relationship between the mode control module 100 and the power supply control module 200 can be referred to Figure 2 in the embodiment. The connection relationship between the mode control module 100 and the reset control module 300 can be referred to Figure 3 in the embodiment. Based on Figure 4 the control circuit shown, this embodiment provides a simulation diagram of the control process of the control circuit as shown in Figure 5 . Refer to Figure 5 , during the wake-up process, the voltage VOUT can quickly rise to the power supply voltage DC1 of 4V, so as to achieve a quick wake-up; during the reset process, define the moment when the reset voltage VREV drops from a high level to a low level as T1, and the moment when the reset voltage VREV starts to rise from a low level to a high level as T2, then the reset time T = T2 - T1 is about 300ms. Therefore, the composite circuit can achieve a quick reset after about two time constants. It can be understood that the first resistor R1 is the main influencing factor for the time constant of the reset control module 300, and the resistance value of the first resistor R1 can be selected according to the actual situation, so as to set the reset time of different times to meet more reset requirements.

[0054] Figure 6 is the second circuit diagram of the control circuit of an embodiment. Refer to Figure 6 , in this embodiment, the mode control module 100 further includes a sleep control circuit 140. It can be understood that after the user turns on the device for the first time, the electronic device has been in a conducting state, and during daily use, the electronic device will be charged, so there will be no situation where the voltage of the lithium cobalt oxide battery is lower than 0.9v and cannot be charged. However, considering some return situations, after the user wakes up and returns the device without reason within seven days of turning it on, the flawless electronic device returns to the warehouse and will continue to consume power slowly, thus there is a risk of over-discharge. Therefore, in this embodiment, by adding the sleep control circuit 140, the power supply path can be cut off again after the electronic device wakes up, thereby improving the reliability of the control circuit.

[0055] Specifically, the sleep control circuit 140 is respectively connected to the first switch circuit 120 and the first control circuit 110. The sleep control circuit 140 is configured to disconnect the path between the first switch circuit 120 and the first control circuit 110 in response to an externally input sleep signal, so that the first control circuit 110 outputs a third control signal, and the third control signal is used to control the power supply control module 200 to disconnect the power supply path of the power supply DC1.

[0056] In one embodiment, the sleep control circuit 140 includes a third control circuit and a second transistor Q2. The third control circuit is configured to generate a fourth control signal in response to the sleep signal. The control terminal of the second transistor Q2 is connected to the third control circuit. The first terminal of the second transistor Q2 is connected to the first control circuit 110, and the second terminal of the second transistor Q2 is connected to the first switch circuit 120. Wherein, the second transistor Q2 can be a P-type MOS transistor.

[0057] Wherein, the third control circuit can be connected to the power supply DC1 and generate a fourth control signal by means of resistor voltage division or the like. Specifically, the voltage of the fourth control signal can be a preset multiple of the voltage of the power supply DC1, and this preset multiple is related to the first capacitor C1 and the second capacitor C2. The above preset multiple can be C2 / (C1 + C2). Specifically, when the RC charge and discharge circuit of the first capacitor C1, the first resistor R1 and the second capacitor C2 is fully charged, the ratio between the voltage across the first capacitor C1 and the voltage across the second capacitor C2 is determined by the capacitance value. Therefore, if the voltage value of the fourth control signal is set in the above manner, the voltage difference between the gate and the source of the second transistor Q2 can always be 0V, so as to achieve the purpose of stably turning off the second transistor Q2.

[0058] Further, the third control circuit may include a third capacitor C3 and a fourth resistor R4. One end of the third capacitor C3 is connected to the ground terminal, the other end of the third capacitor C3 is connected to one end of the fourth resistor R4, and the other end of the fourth resistor R4 is connected to a voltage of the power supply DC1 at a preset multiple. Taking the capacitance values of the first capacitor C1 and the second capacitor C2 as equal as an example, the other end of the fourth resistor R4 is connected to half of the voltage of the power supply DC1. Specifically, a sleep signal can be input using the power-on button to introduce a half-voltage division of the 4V voltage of the power supply DC1 into the third control circuit. Set τ = R4 × C3 to be 4s. Therefore, after 2 - 3 time periods, that is, when the power-on button is long-pressed for about 10 seconds, the 2V voltage charges the third capacitor C3 through the fourth resistor R4 to 2V, and the voltage at the source of the second transistor Q2 is exactly half of the battery. Therefore, even if the battery power is consumed, the voltage difference Ugs between the gate and the source of the second transistor Q2 is always zero, and the purpose of stably turning off the second transistor Q2 can be achieved. When it is necessary to wake up again, the input voltage of the gate of the second transistor Q2 can be first pulled low to turn on the second transistor Q2, and then the fourth transistor Q4 is turned on to complete the wake-up, that is, the control circuit is switched to the wake-up mode.

[0059] Continuing to refer to Figure 6 , this application also provides a power supply circuit, including a power supply DC1, an interface module, and the control circuit as described above. The power supply DC1 is connected to the power supply control module 200 of the control circuit, and the interface module is connected to the reset control module 300 of the control circuit for receiving a reset enable signal. Among them, the interface module can be, for example, a USB interface. It can be understood that the control method and connection relationship of the power supply circuit in this embodiment can refer to the embodiment of the control circuit described above, and will not be elaborated here. Based on the above structure, this embodiment provides a power supply circuit with high integration and small volume.

[0060] This application also provides an electronic device, including the power supply circuit according to the above. Based on the above structure, this embodiment provides an electronic device with high integration, small volume, and lightweight.

[0061] In the description of this specification, the description referring to terms such as "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials, or features described in connection with the embodiment or example are included in at least one embodiment or example of the embodiments of this application. In this specification, the schematic description of the above terms does not necessarily refer to the same embodiment or example.

[0062] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the various technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered to be within the scope described in this specification.

[0063] The above-described embodiments only express several implementation manners of the embodiments of the present application. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the embodiments of the present application, several deformations and improvements can still be made, and these all belong to the protection scope of the embodiments of the present application. Therefore, the protection scope of the patent of the embodiments of the present application should be subject to the appended claims.

Claims

1. A control circuit, characterized in that, Comprising: A mode control module, configured to generate a first control signal in response to an externally input wake-up signal, so as to switch a control circuit to a wake-up mode and output a second control signal; A power supply control module, connected to the mode control module, configured to be connected to a power supply and turn on a power supply path of the power supply according to the first control signal; A reset control module, connected to the mode control module, configured to output a reset signal according to the second control signal and an externally input reset enable signal, where the reset signal is used to indicate a reset of a processor; Wherein, the mode control module includes: A first control circuit, respectively connected to the power supply and the power supply control module; A first switch circuit, one end of the first switch circuit is respectively connected to the first control circuit and the reset control module, and the other end of the first switch circuit is connected to a ground terminal; Wherein, the first switch circuit is configured to conduct a path between the first control circuit and the ground terminal in response to the wake-up signal, and the first control circuit is configured to generate the first control signal according to a power supply signal and a ground signal.

2. The control circuit according to claim 1, wherein, The first control circuit includes a first capacitor and a first resistor connected in series, and a node between the first capacitor and the first resistor is configured to output the first control signal.

3. The control circuit according to claim 1, wherein The mode control module further includes: A second control circuit, respectively connected to the ground terminal and the first control circuit, configured to output a second control signal when the control circuit is in the wake-up mode and the first switch circuit is off.

4. The control circuit according to claim 3, wherein The second control circuit includes: A first transistor, a control end of the first transistor is connected to the power supply control module, and a first end of the first transistor is connected to the ground terminal; A second capacitor, one end of the second capacitor is connected to a second end of the first transistor, and the other end of the second capacitor is connected to the first control circuit.

5. The control circuit according to claim 1, characterized in that The mode control module further includes: A sleep control circuit, respectively connected to the first switch circuit and the first control circuit, the sleep control circuit is configured to disconnect a path between the first switch circuit and the first control circuit in response to an externally input sleep signal, so that the first control circuit outputs a third control signal, and the third control signal is used to control the power supply control module to disconnect the power supply path of the power supply.

6. The control circuit according to claim 5, wherein The sleep control circuit includes: A third control circuit, configured to generate a fourth control signal in response to the sleep signal, and a voltage of the fourth control signal is a preset multiple of a voltage of the power supply; A second transistor, a control end of the second transistor is connected to the third control circuit, a first end of the second transistor is connected to the first control circuit, and a second end of the second transistor is connected to the first switch circuit.

7. The control circuit according to claim 1, wherein The reset control module includes: A second switch circuit, a control end of the second switch circuit is configured to receive a reset enable signal, and a first end of the second switch circuit is connected to the mode control module; A third transistor, a control terminal of the third transistor is connected to a second terminal of the second switching circuit, a first terminal of the third transistor is connected to a ground terminal, and a second terminal of the third transistor is configured to output the reset signal; Wherein, the second switching circuit is configured to transmit the second control signal to the control terminal of the third transistor in response to the reset enable signal.

8. The control circuit according to claim 7, wherein The reset control module further includes: A second resistor, which is respectively connected to the mode control module and a first terminal of the second switching circuit.

9. The control circuit according to claim 1, wherein The power supply control module includes: A fourth transistor, a control terminal of the fourth transistor is connected to the mode control module, a first terminal of the fourth transistor is configured to be connected to the power supply, and a second terminal of the fourth transistor is configured to output a power supply signal.

10. A power supply circuit, characterized in that, Comprising: The control circuit according to any one of claims 1 to 9; A power supply, connected to the power supply control module of the control circuit; An interface module, connected to the reset control module of the control circuit, for receiving a reset enable signal.

11. An electronic device, characterized in that, Including the power supply circuit according to claim 10.

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