Program running process-based breakpoint setting method, electronic device, and storage medium

Abstract

The disclosure provides a breakpoint setting method based on program running process, an electronic device and a storage medium, wherein the breakpoint setting method comprises: scanning a disassembly file of a program to be run, identifying all branch node types, setting related branch node instruction information according to an instruction set architecture, and obtaining an initial jump table recording all branch node information; analyzing the initial jump table and executing a preset instruction to set a breakpoint table; when the program is scheduled to a running state, sequentially setting breakpoint addresses of the preset instruction according to a fixed breakpoint interval granularity based on the breakpoint table, and / or when a certain branch node is detected to be fault-free, modifying the breakpoint interval granularity through an instruction, adjusting the breakpoint address of the branch node and updating the breakpoint table. Thus, full-automatic analysis in a software verification process can be realized, and only one configuration for the instruction set architecture is needed, which can effectively improve the operation efficiency of the program.

Description

Technical Field

[0001] This disclosure relates to the technical field of program debugging, specifically to a method for setting breakpoints based on the program's running process, an electronic device, and a storage medium. Background Technology

[0002] Debuggers can stop program execution at will, mainly through software breakpoints and hardware breakpoints. Software breakpoints are breakpoint instructions added to the program; the program stops when it reaches the breakpoint instruction (i.e., a software interrupt).

[0003] In chip software verification, especially when using large software as a benchmark and employing automated testing techniques, it is often necessary to quickly locate fault points within the program flow for analysis and verification. To locate faults, it is necessary to export context information. When the processor hardware does not have a trace module, exporting context information requires pausing and setting breakpoints. Therefore, breakpoint setting methods are of great importance for fault localization.

[0004] Traditional breakpoint setting methods and their drawbacks: 1. Starting from an initial breakpoint, subsequent breakpoints are set manually based on experience. The drawback is that it requires extremely high knowledge and skills from the debugger, has low debugging efficiency, and is prone to missing paths. 2. Using single-step breakpoints, recording the context information after each instruction is executed. The drawback is extremely high time cost and it can only be used for debugging local program segments, unable to achieve full program path coverage. Summary of the Invention

[0005] To address the aforementioned technical issues, this disclosure provides a method for setting breakpoints based on the program's running process, an electronic device, and a storage medium. This method can minimize the set of breakpoints while ensuring full coverage of the program's running process, thereby saving time and costs and enabling accurate and rapid fault location.

[0006] On the one hand, this disclosure provides a method for setting breakpoints based on the program's execution process, which includes:

[0007] Scan the disassembled file of the program to be run, identify all branch node types, set relevant branch node instruction information according to the instruction set architecture, and obtain an initial jump table that records all branch node information;

[0008] The initial jump table is parsed, and preset instructions are executed to set the breakpoint table;

[0009] When the program is scheduled to run, the breakpoint addresses are sequentially set according to the aforementioned breakpoint table and the fixed breakpoint interval granularity of the preset instructions, and / or when no fault is detected at a certain branch node, the breakpoint interval granularity is modified by the instructions, the breakpoint address of the branch node is adjusted, and the aforementioned breakpoint table is updated.

[0010] Optionally, the aforementioned branch node types include unconditional branch nodes, conditional branch nodes, Trap return branch nodes, and exception branch nodes.

[0011] Furthermore, the aforementioned steps of parsing the initial jump table and executing preset instructions to set the breakpoint table include:

[0012] Analyze the conditional branch node information in the jump table to determine whether the granularity of the loop breakpoint interval needs to be adjusted.

[0013] If confirmed, then find and mark the branch node with reverse conditional jump in the jump table, remove the target point corresponding to the branch node with reverse conditional jump in the breakpoint table from the breakpoint table, or modify its register address to a conditional breakpoint using an instruction.

[0014] If not, analyze the abnormal branch node information in the jump table to determine whether to adjust the abnormal breakpoint;

[0015] If confirmed, locate the handler entry address corresponding to the fault based on the program source code and disassembly file, set a new breakpoint, and replace the exception breakpoint corresponding to the aforementioned entry address with the new breakpoint.

[0016] If you are not sure, then end the breakpoint settings in the program's execution process.

[0017] Optionally, the branch nodes stored in the aforementioned jump table include a first branch node and a second branch node. When the program is scheduled to run, the first branch node sequentially sets the breakpoint addresses of the program instructions according to a fixed breakpoint interval granularity.

[0018] When the program is scheduled to run, the second branch node sets breakpoint addresses sequentially according to a certain granularity of program instructions, and / or when no fault is detected in a certain branch node, it modifies the breakpoint interval granularity through instructions, adjusts the breakpoint address of the second branch node, and updates the aforementioned breakpoint table.

[0019] Optionally, the aforementioned second branch node includes a first-state branch node and a second-state branch node. The aforementioned step of modifying the breakpoint interval granularity, adjusting the breakpoint address of the second branch node, and updating the aforementioned breakpoint table by means of an instruction when a certain branch node is found to be fault-free includes:

[0020] Before the program is scheduled to run, the aforementioned first-state branch node is set with the aforementioned breakpoint address according to preset instructions; and

[0021] When the program is scheduled to run, the aforementioned second state branch node will dynamically set and update the aforementioned jump table by performing the step of adjusting the granularity of the loop breakpoint interval according to the instruction information of its branch node, and will also perform the step of adjusting the abnormal breakpoint to set new breakpoints and update the aforementioned breakpoint table.

[0022] Optionally, the aforementioned step of sequentially setting breakpoint addresses for preset instructions according to a breakpoint table and a fixed breakpoint interval granularity includes:

[0023] When the program reaches the current branch node, it queries the jump table to determine whether the current branch node matches the jump point address of the unconditional branch node.

[0024] If a match is found, the target register value is read, the jump point address of the target point is determined, and the execution instruction of the temporary breakpoint is set at that jump point address.

[0025] Optionally, the aforementioned step of sequentially setting breakpoint addresses for preset instructions according to a breakpoint table and a fixed breakpoint interval granularity further includes:

[0026] After determining that there is no jump point address that matches the unconditional branch node, the jump table is queried to determine whether the current branch node matches the jump point address of the branch node returned by Trap.

[0027] If a match is found, the xepc register value corresponding to the current instruction level is read to determine the jump point address of the target point, and the execution instruction of the temporary breakpoint is set at that jump point address.

[0028] Optionally, the aforementioned step of sequentially setting breakpoint addresses for preset instructions according to a breakpoint table and a fixed breakpoint interval granularity further includes:

[0029] After determining that there is no jump point address matching the Trap return branch node, the jump table is queried to determine whether the current branch node matches the abnormal entry point setting node address of the abnormal branch node;

[0030] If a match is found, the xtvec register value corresponding to the current instruction level is read to determine the jump point address of the target point;

[0031] Update the jump point address of the target point to the corresponding position of the current branch node in the aforementioned jump table;

[0032] Write the breakpoints into the breakpoint table and set breakpoints based on the instruction information of the branch nodes, and determine whether there are similar branch nodes in the jump table;

[0033] If it is confirmed to exist, the jump point address of the target point corresponding to the same branch node in the jump table is modified to the value of unknown, and the corresponding register address is deleted from the breakpoint table, and the corresponding breakpoint is deleted from the debugging tool.

[0034] Optionally, the aforementioned step of sequentially setting breakpoint addresses for preset instructions according to a breakpoint table and a fixed breakpoint interval granularity further includes:

[0035] If the current branch node is found to be faulty or the program runs without errors when it reaches the current branch node, the program will repeatedly execute the steps of querying the jump table, determining whether the current branch node matches the jump point address of the unconditional branch node, and so on, until the instruction terminates the current program execution process or there are no errors when traversing all branch nodes in the jump table.

[0036] On the other hand, this disclosure provides an electronic device including a processor and a memory, wherein the memory stores a program executable by the processor, and when the program is executed by the processor, it implements the steps of the breakpoint setting method as described above.

[0037] On the other hand, this disclosure also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the breakpoint setting method as described above.

[0038] The beneficial effects of this disclosure are as follows: This disclosure provides a method, electronic device, and storage medium for setting breakpoints based on program execution process. The breakpoint setting method includes: scanning the disassembled file of the program to be run, identifying all branch node types, setting relevant branch node instruction information according to the instruction set architecture, and obtaining an initial jump table recording all branch node information; parsing the initial jump table and executing preset instructions to set the breakpoint table; when the program is scheduled to run, sequentially setting breakpoint addresses according to the aforementioned breakpoint table and a fixed breakpoint interval granularity for the preset instructions, and / or when no fault is detected at a certain branch node, modifying the breakpoint interval granularity through instructions, adjusting the breakpoint address of that branch node, and updating the aforementioned breakpoint table. This enables fully automated analysis during software verification, requiring only one configuration for the instruction set architecture (ISA), effectively improving program operation efficiency.

[0039] Secondly, this breakpoint setting method analyzes various non-sequential processes such as unconditional branch nodes, conditional branch nodes, trap return branch nodes, and abnormal branch nodes. After the breakpoint is set, it will cover the entire program execution path without any omissions, thus greatly improving the accuracy and efficiency of software verification.

[0040] Furthermore, this breakpoint setting method can control the breakpoint set to a minimum range by changing the granularity of the breakpoint interval, while ensuring full coverage of the program's running process. This saves time and improves the efficiency of fault location in a targeted manner, thereby enabling accurate and rapid fault location.

[0041] It should be noted that the above general description and the following detailed description are exemplary and explanatory only, and do not limit this disclosure. Attached Figure Description

[0042] The above and other objects, features and advantages of this disclosure will become clearer from the following description of embodiments of this disclosure with reference to the accompanying drawings.

[0043] Figure 1 A schematic diagram of an electronic device provided in an embodiment of this disclosure is shown;

[0044] Figure 2 This diagram illustrates a flowchart of a breakpoint setting method based on a program execution process, as provided in an embodiment of this disclosure.

[0045] Figures 3a-3d Show each Figure 2 The diagram shows the model of unconditional branch nodes, conditional branch nodes, Trap return branch nodes, and abnormal branch nodes in the breakpoint setting method.

[0046] Figure 4 Show Figure 2 The breakpoint setting method shown is a schematic diagram of a breakpoint table set according to a jump table in one specific embodiment.

[0047] Figure 5 Show Figure 2 The breakpoint setting method shown in the diagram is illustrated in another specific embodiment of the jump table and breakpoint table corresponding to the abnormal branch node during program execution.

[0048] Figure 6 Show Figure 2 A schematic diagram of the initial breakpoint setting process of the breakpoint setting method shown.

[0049] Figure 7 Show Figure 2 The diagram shows a model illustrating the dynamic breakpoint setting process for the second branch node in the breakpoint setting method shown. Detailed Implementation

[0050] To facilitate understanding of this disclosure, a more complete description will be given below with reference to the accompanying drawings, which illustrate preferred embodiments of the present disclosure. However, this disclosure may be implemented in various forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the contents of this disclosure.

[0051] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terminology used in this disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of this disclosure.

[0052] The present disclosure will now be described in detail with reference to the accompanying drawings.

[0053] System Overview

[0054] Figure 1 A schematic block diagram of an electronic device according to an embodiment of this disclosure is shown. This electronic device 10 can be built based on various processors currently available on the market and powered by Windows. TM Operating system versions, UNIX operating systems, Linux operating system drivers, etc. In addition, electronic device 10 can be hardware such as PCs, desktops, laptops, servers, and mobile communication devices.

[0055] like Figure 1 As shown, the electronic device 10 of this disclosure embodiment may include one or more processors 12 and a memory 14.

[0056] The memory 14 may be main memory (or simply main memory or RAM). It is used to store instruction information and / or data information represented by data signals, such as data provided by the processor 12 (e.g., calculation results), and may also be used to realize data exchange between the processor 12 and the external storage device 17 (or auxiliary memory or external memory).

[0057] In some situations, the processor 12 may need to access memory 14 to retrieve or modify data in memory 14. Because memory 14 has a relatively slow access speed, to alleviate the speed difference between the processor 12 and memory 14, the electronic device 10 also includes a cache memory 18 coupled to the bus 11. The cache memory 18 is used to cache program data or message data that may be repeatedly accessed in memory 14. The cache memory 18 is implemented, for example, by a storage device of the type Static Random Access Memory (SRAM). The cache memory 18 can be a multi-level structure, such as a three-level cache structure with a Level 1 cache (L1 cache), a Level 2 cache (L2 cache), and a Level 3 cache (L3 cache), or a cache structure with more than three levels or other types of cache structures. In some embodiments, a portion of the cache memory 18 (e.g., the Level 1 cache, or the Level 1 cache and the Level 2 cache) can be integrated inside the processor 12 or integrated with the processor 12 on the same on-chip system.

[0058] The processor 12 may include an instruction execution unit 121, a memory management unit 122, and other components. When executing instructions that require modification of memory (such as modifying the process control block stored in memory), the instruction execution unit 121 initiates a write access request. This write access request specifies the data to be written to memory and the corresponding physical address. The memory management unit 122 is used to translate the virtual address specified by these instructions into the physical address mapped by that virtual address. The physical address specified by the write access request may be the same as the physical address specified by the corresponding instruction.

[0059] Information exchange between memory 14 and cache memory 18 is typically organized in blocks. In some embodiments, cache memory 18 and memory 14 may be divided into data blocks of the same spatial size, and a data block may serve as the smallest unit of data exchange between cache memory 18 and memory 14 (including one or more data of a preset length). For clarity, each data block in cache memory 18 will be referred to as a cache block (or cache line), and different cache blocks will have different cache block addresses; each data block in memory 14 will be referred to as a memory block, and different memory blocks will have different memory block addresses. Cache block addresses may include, for example, physical address tags used to locate the data blocks.

[0060] Due to space and resource limitations, cache memory 18 cannot cache all the contents of memory 14; that is, the storage capacity of cache memory 18 is usually smaller than that of memory 14, and the addresses of individual cache blocks provided by cache memory 18 cannot correspond to all the memory block addresses provided by memory 14. When processor 12 needs to access memory, it first accesses cache memory 18 via bus 11 to determine whether the content to be accessed is already stored in cache memory 18. If so, cache memory 18 is hit, and processor 12 directly retrieves the content to be accessed from cache memory 18. If the content to be accessed by processor 12 is not in cache memory 18, processor 12 needs to access memory 14 via bus 11 to find the corresponding information in memory 14. Because the access speed of cache memory 18 is very fast, when cache memory 18 is hit, the efficiency of processor 12 can be significantly improved, thereby improving the performance and efficiency of the entire electronic device 10.

[0061] In addition, electronic device 10 may also include input / output devices such as storage device 17, display device 13, audio device 15, and mouse / keyboard 16. Storage device 17 is, for example, a hard disk, optical disk, or flash memory that is coupled to bus 11 via a corresponding interface for information storage and retrieval. Display device 13 is, for example, coupled to bus 11 via a corresponding graphics card for displaying information according to display signals provided by bus 11.

[0062] Electronic device 10 typically also includes communication device 19, thus enabling communication with networks or other devices in various ways. Communication device 19 may include, for example, one or more communication modules. As an example, communication device 19 may include a wireless communication module adapted to a specific wireless communication protocol. For instance, communication device 19 may include a WLAN module for implementing Wi-Fi™ communication conforming to the IEEE 802.11 standard; communication device 19 may also include a WWAN module for implementing wireless wide area communication conforming to cellular or other wireless wide area protocols; communication device 19 may also include communication modules employing other protocols, such as Bluetooth modules, or other custom-type communication modules; communication device 19 may also be a port for serial data transmission.

[0063] Of course, the structure of different electronic devices 10 may vary depending on the motherboard, operating system, and instruction set architecture. For example, many electronic devices 10 currently have an input / output control center connected between the bus 11 and various input / output devices, and this input / output control center may be integrated into the processor 12 or independent of the processor 12.

[0064] Breakpoint setting method

[0065] In the software verification process of chips, especially when using large software as a benchmark and employing automated testing techniques, it is often necessary to quickly locate fault points in the program flow for analysis and verification. To locate faults, it is necessary to export the context information. When the processor hardware does not have a trace module, exporting context information requires pausing and setting breakpoints. Therefore, breakpoint setting methods are of great importance for fault location. Traditional breakpoint setting methods are based on single-step breakpoint setting, which leads to a sharp increase in time costs and is unsuitable for fault location across the entire program. Furthermore, when the program is not executed sequentially, various branches make it quite difficult to cover the entire program execution path with breakpoints. Additionally, breakpoint setting requires a thorough understanding of the processor's assembly instruction set, resulting in low efficiency for manual analysis. Therefore, this disclosure provides a breakpoint setting method based on the program's execution process. This method is executed by the processor 12 executing a program stored in memory 14. The relevant program can also be stored on a computer-readable storage medium and then read into memory 14.

[0066] Figure 2 This diagram illustrates a flowchart of a breakpoint setting method based on program execution process provided in an embodiment of this disclosure. Figures 3a-3d Show each Figure 2 The diagram illustrates the model of unconditional branch nodes, conditional branch nodes, Trap return branch nodes, and abnormal branch nodes in the breakpoint setting method. Figure 4 Show Figure 2 The diagram illustrates a breakpoint setting method based on a jump table, as shown in one specific embodiment. Figure 5 Show Figure 2 The breakpoint setting method shown in the diagram is illustrated in another specific embodiment, illustrating the jump table and corresponding breakpoint table of the exception branch node during program execution. (See also...) Figure 2 The breakpoint setting method includes:

[0067] Step S110: Scan the disassembled file of the program to be run, identify all branch node types, set relevant branch node instruction information according to the instruction set architecture, and obtain an initial jump table that records all branch node information.

[0068] During software verification, software interruptions typically occur in three ways: interrupts caused by the INT interrupt instruction, interrupts caused by certain CPU calculation errors, and interrupts set by debug programs. Debugging tools (or programs) can be used to set breakpoints on activities within a workflow running in the development environment. There are two basic types of workflows: sequential workflows and state machine workflows. The main difference is that the former emphasizes the sequential process, while the latter emphasizes state changes. A sequential workflow executes a continuous sequence of steps; after completing one activity, it proceeds to the next. Its execution is predictable and always progresses until completion. State machine workflows are the most powerful and convenient to use. A state machine contains a series of states (including initial and final states) and events. A state machine always remains in a preset state until an event is triggered, at which point it jumps to a new state. Therefore, breakpoints set for workflows can be categorized into "sequential flow" breakpoints and "non-sequential flow" breakpoints.

[0069] In step S110, the branch nodes of the "non-sequential flow" breakpoints are classified according to the non-program flow type. The branch node types mentioned above include unconditional branch nodes, conditional branch nodes, Trap return branch nodes, and exception branch nodes. The jump table records all branch node information and corresponds to unconditional branch nodes, conditional branch nodes, Trap return branch nodes, and exception branch nodes. Figures 3a-3d The jump models for these four types of branch nodes are described respectively, where each record in the jump table is called a branch node (or breakpoint). Figure 3a Taking the unconditional jump of the cash box as an example, the vertical grid (each record) represents a branch node (or breakpoint) in the program's workflow. When the program runs to A1, it directly jumps to the address of the target point 1 corresponding to A2 and executes the corresponding program instructions.

[0070] For "non-sequential flow" breakpoints, first analyze the disassembled file of the program to be run to obtain an initial "jump table". Specifically, identify all branch nodes and record the addresses related to all branches in the table according to a specific format. This analysis process can be automated; simply set the relevant branch instruction information according to the ISA settings.

[0071] As described above, in this embodiment of the disclosure, the branch nodes stored in the jump table may include a first branch node ("sequential flow" breakpoint, hereinafter the same) and a second branch node ("non-sequential flow" breakpoint, hereinafter the same). When the program is scheduled to run, the first branch node only needs to sequentially set its breakpoint address according to a fixed breakpoint interval granularity. When the program is scheduled to run, the first branch node can sequentially set its breakpoint address according to a certain breakpoint interval granularity, and / or, when no fault is detected at a certain branch node, modify the breakpoint interval granularity through instructions, adjust the breakpoint address of the second branch node, and update the breakpoint table to specifically improve fault location efficiency. For example, to improve debugging speed, the handling of "loops" (backward conditional branches) and "exceptions" can be adjusted.

[0072] Therefore, without relying on the hardware Trace module, software methods can be used to analyze the disassembly of the program under test and obtain the initial full-process branch nodes, i.e., the initial jump table.

[0073] Step S120: Parse the initial jump table and execute preset instructions to set the breakpoint table.

[0074] In step S120, Figure 4 A schematic table model of the breakpoint setting method provided in this disclosure is given in a specific embodiment, showing the setting of an initial breakpoint table based on an initial jump table. The initial jump table is parsed, and as described above, the setting of the second branch node is based on the jump table, and the breakpoint table is set according to a certain strategy; this process can be automated.

[0075] In this embodiment of the disclosure, combined with

[0076] Figure 6 The given schematic model analysis of the initial breakpoint setting process, after the aforementioned steps of parsing the initial jump table and executing preset instructions to set the breakpoint table, the breakpoint setting method can perform the following steps:

[0077] Analyze the conditional branch node information in the jump table to determine whether the granularity of the loop breakpoint interval needs to be adjusted.

[0078] If confirmed, then find and mark the branch nodes with reverse conditional jumps in the jump table, remove the target points corresponding to the filtered reverse conditional jump branch nodes from the breakpoint table, or modify their register addresses to conditional breakpoints using instructions.

[0079] If not, analyze the abnormal branch node information in the jump table to determine whether to adjust the abnormal breakpoint;

[0080] If confirmed, locate the handler entry address corresponding to the fault based on the program source code and disassembly file, set a new breakpoint, and replace the exception breakpoint corresponding to the aforementioned entry address with the new breakpoint.

[0081] If you are not sure, then end the breakpoint settings in the program's execution process.

[0082] In this embodiment, by analyzing the jump table and using the above-mentioned breakpoint setting strategy, a breakpoint table covering the entire path can be automatically generated.

[0083] Step S130: When the program is scheduled to run, set the breakpoint addresses of the preset instructions sequentially according to the aforementioned breakpoint table and the fixed breakpoint interval granularity, and / or when no fault is detected at a certain branch node, modify the breakpoint interval granularity through instructions, adjust the breakpoint address of the branch node and update the aforementioned breakpoint table.

[0084] In some optional embodiments, step S130 may be performed as follows: when the program is scheduled to run, the first branch node sets the breakpoint address of the preset instructions sequentially according to the aforementioned breakpoint table and a fixed breakpoint interval granularity.

[0085] In some optional embodiments, step S130 can also be performed: when no fault is detected in a certain branch node, the breakpoint interval granularity is modified by instruction, the breakpoint address of the second branch node is adjusted and the breakpoint table is updated, so as to improve the efficiency of fault location in a targeted manner.

[0086] In some optional embodiments, step S130 can also be performed as follows: when the program is scheduled to run, the first branch node is set to the breakpoint address of the preset instruction according to the aforementioned breakpoint table and the fixed breakpoint interval granularity. When a branch node is found to be fault-free, the breakpoint interval granularity is modified by the instruction, the breakpoint address of the second branch node is adjusted and the breakpoint table is updated, so as to improve the fault location efficiency in a targeted manner.

[0087] In step S130, combined Figure 7 The schematic model shown illustrates the dynamic breakpoint setting process for the second branch node. In an optional embodiment of this disclosure, the aforementioned step of sequentially setting breakpoint addresses for preset instructions according to a breakpoint table and a fixed breakpoint interval granularity may include:

[0088] When the program reaches the current branch node, it queries the jump table to determine whether the current branch node matches the jump point address of the unconditional branch node.

[0089] If a match is found, the target register value is read, the jump point address of the target point is determined, and the execution instruction of the temporary breakpoint is set at that jump point address.

[0090] In another optional embodiment of this disclosure, the aforementioned step of sequentially setting breakpoint addresses for preset instructions according to a breakpoint table at fixed breakpoint intervals may further include:

[0091] After determining that there is no jump point address that matches the unconditional branch node, the jump table is queried to determine whether the current branch node matches the jump point address of the branch node returned by Trap.

[0092] If a match is found, the xepc register value corresponding to the current instruction level is read to determine the jump point address of the target point, and the execution instruction of the temporary breakpoint is set at that jump point address.

[0093] In another optional embodiment of this disclosure, the aforementioned step of sequentially setting breakpoint addresses for preset instructions according to a breakpoint table and a fixed breakpoint interval granularity further includes:

[0094] After determining that there is no jump point address matching the Trap return branch node, the jump table is queried to determine whether the current branch node matches the abnormal entry point setting node address of the abnormal branch node;

[0095] If a match is found, the xtvec register value corresponding to the current instruction level is read to determine the jump point address of the target point;

[0096] Update the jump point address of the target point to the corresponding position of the current branch node in the aforementioned jump table;

[0097] Write the breakpoints into the breakpoint table and set breakpoints based on the instruction information of the branch nodes, and determine whether there are similar branch nodes in the jump table;

[0098] If its existence is confirmed, the jump point address of the target point corresponding to the same branch node in the jump table is modified to an "unknown" value, and the corresponding register address is deleted from the breakpoint table, as well as the corresponding breakpoint is deleted from the debugging tool. Based on the above publicly available information, for second-state branch nodes, a dynamic method can be used to update the jump table to achieve dynamic breakpoint setting. For "loops" (backward conditional branches) and "exceptions," different and efficient breakpoint setting strategies can be provided by combining the source code.

[0099] The breakpoint setting method provided in this disclosure comprehensively analyzes various non-sequential processes such as unconditional branch nodes, conditional branch nodes, trap return branch nodes, and abnormal branch nodes. After the breakpoint is set, it will cover the entire path of program execution without omission, thus greatly improving the accuracy and efficiency of software verification.

[0100] Furthermore, in the breakpoint setting method provided in the embodiments of this disclosure, "non-sequential flow" breakpoints and "sequential flow" breakpoints can be used in combination, which to some extent expands the applicability and compatibility of the breakpoint setting method of this disclosure.

[0101] In yet another optional embodiment of this disclosure, the aforementioned step of sequentially setting breakpoint addresses for preset instructions according to a breakpoint table at fixed breakpoint intervals further includes:

[0102] If the current branch node is found to be faulty or the program runs without errors when it reaches the current branch node, the program will repeatedly execute the steps of querying the jump table, determining whether the current branch node matches the jump point address of the unconditional branch node, and so on, until the instruction terminates the current program execution process or there are no errors when traversing all branch nodes in the jump table.

[0103] In an optional embodiment of this disclosure, the aforementioned second branch node includes a first state branch node and a second state branch node. Figure 5 Taking an "exception" type branch node as an example, this illustrates the changes in the jump table and breakpoint table contents during runtime. The steps described above, which involve modifying the breakpoint interval granularity through instructions at different stages of debugging to adjust the breakpoint setting strategy for this second branch node, can include:

[0104] Before the program is scheduled to run, the aforementioned first-state branch node is set with the aforementioned breakpoint address according to preset instructions; and

[0105] When the program is scheduled to run, the aforementioned second-state branch node is dynamically set and updated according to the instruction information of its branch node, and the aforementioned jump table is set and updated according to the step of adjusting the granularity of the loop breakpoint interval. In addition, the step of adjusting the abnormal breakpoint is executed to set new breakpoints and update the aforementioned breakpoint table, thereby further improving the debugging speed.

[0106] Therefore, this breakpoint setting method can control the breakpoint set to a minimum range by changing the breakpoint interval granularity, while ensuring full coverage of the program's running process, thus saving time and improving the efficiency of fault location in a targeted manner, thereby accurately and quickly locating faults.

[0107] In summary, this disclosure provides a breakpoint setting method, electronic device, and storage medium based on program execution process. The breakpoint setting method includes: scanning the disassembled file of the program to be run, identifying all branch node types, setting relevant branch node instruction information according to the instruction set architecture, and obtaining an initial jump table recording all branch node information; parsing the initial jump table and executing preset instructions to set the breakpoint table; when the program is scheduled to run, sequentially setting breakpoint addresses according to the aforementioned breakpoint table and a fixed breakpoint interval granularity for the preset instructions, and / or, when no fault is detected at a certain branch node, modifying the breakpoint interval granularity through instructions, adjusting the breakpoint address of that branch node, and updating the aforementioned breakpoint table. This enables fully automated analysis during software verification, requiring only one configuration for the instruction set architecture, effectively improving program operation efficiency.

[0108] Secondly, this breakpoint setting method analyzes various non-sequential flows, such as unconditional jump branch nodes, conditional branch nodes, trap return branch nodes, and abnormal branch nodes. It can automatically set breakpoints during program testing and execution, avoiding errors that may be caused by manual operation and reducing the time spent on repetitive operations. It saves operation steps to improve breakpoint setting efficiency, ensuring high efficiency and accuracy of breakpoint setting while saving labor costs. Moreover, after the breakpoints are set, they will cover the entire program execution path without omissions, thus greatly improving the accuracy and efficiency of software verification.

[0109] Furthermore, this breakpoint setting method can control the breakpoint set to a minimum range by changing the granularity of the breakpoint interval, while ensuring full coverage of the program's running process. This saves time and improves the efficiency of fault location in a targeted manner, thereby enabling accurate and rapid fault location.

[0110] It should be understood that the above description is merely a preferred embodiment of this disclosure and is not intended to limit this disclosure. For those skilled in the art, there are many variations of the embodiments in this specification. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.

[0111] It should be understood that the various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, for the method embodiments, since they are basically similar to the methods described in the apparatus and system embodiments, the description is relatively simple, and relevant parts can be referred to the descriptions of other embodiments.

[0112] It should be understood that the foregoing describes specific embodiments of this specification. Other embodiments are within the scope of the claims. In some cases, the actions or steps recited in the claims may be performed in a different order than that shown in the embodiments and may still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require the specific or sequential order shown to achieve the desired result. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0113] It should be understood that the use of a singular form to describe an element or to show only one element in the accompanying drawings does not imply that the number of such element is limited to one. Furthermore, modules or elements described or shown as separate herein may be combined into a single module or element, and modules or elements described or shown as single herein may be broken down into multiple modules or elements.

[0114] It should also be understood that the terminology and expressions used herein are for descriptive purposes only, and one or more embodiments described herein should not be limited to these terms and expressions. The use of these terms and expressions does not exclude any illustrative and descriptive equivalent features (or parts thereof), and it should be recognized that various modifications that may exist should also be included within the scope of the claims. Other modifications, variations, and substitutions may also exist. Accordingly, the claims should be considered to cover all such equivalents.

Claims

1. A method for setting breakpoints based on program execution process, characterized in that, include: Scan the disassembled file of the program to be run, identify all branch node types, set relevant branch node instruction information according to the instruction set architecture, and obtain an initial jump table that records all branch node information. The branch node types include unconditional branch nodes, conditional branch nodes, Trap return branch nodes, and abnormal branch nodes. The initial jump table is parsed, and a preset instruction is executed to set the breakpoint table; When the program is scheduled to run, breakpoint addresses are sequentially set according to the preset instructions based on the breakpoint table and a fixed breakpoint interval granularity. And / or, when no fault is detected at a certain branch node, the breakpoint interval granularity is modified via instructions to adjust the breakpoint address of that branch node and update the breakpoint table. The step of parsing the initial jump table and executing preset instructions to set the breakpoint table includes: Analyze the conditional branch node information in the jump table to determine whether the granularity of the loop breakpoint interval needs to be adjusted. If confirmed, then find and mark the branch node with reverse conditional jump in the jump table, remove the target point corresponding to the branch node with reverse conditional jump in the breakpoint table from the breakpoint table, or modify its register address to a conditional breakpoint. If not, analyze the abnormal branch node information in the jump table to determine whether to adjust the abnormal breakpoint; If confirmed, then find the handler entry address corresponding to the fault based on the program source code and disassembly file, set a new breakpoint, and replace the exception breakpoint corresponding to the entry address with the new breakpoint; If you are not sure, terminate the breakpoint settings in the program's execution process.

2. The breakpoint setting method according to claim 1, characterized in that, The branch nodes stored in the jump table include a first branch node and a second branch node. When the program is scheduled to run, the first branch node sequentially sets the breakpoint addresses of the program instructions according to a fixed breakpoint interval granularity. When the program is scheduled to run, the second branch node sets the breakpoint addresses sequentially according to a certain granularity of the program instructions, and / or when no fault is detected at a certain branch node, it modifies the breakpoint interval granularity through instructions, adjusts the breakpoint addresses of the second branch node, and updates the breakpoint table.

3. The breakpoint setting method according to claim 2, characterized in that, The second branch node includes a first-state branch node and a second-state branch node. The step of modifying the breakpoint interval granularity, adjusting the breakpoint address of the second branch node, and updating the breakpoint table by means of an instruction when no fault is detected at a certain branch node includes: Before the program is scheduled to run, the breakpoint address of the first state branch node is set according to the preset instruction; and When the program is scheduled to run, the second state branch node is dynamically set and updated according to the instruction information of its branch node, and the step of adjusting the granularity of the loop breakpoint interval is executed to set new breakpoints and update the breakpoint table.

4. The breakpoint setting method according to claim 1, characterized in that, The step of sequentially setting breakpoint addresses for the preset instructions according to the breakpoint table and a fixed breakpoint interval granularity includes: When the program reaches the current branch node, the jump table is queried to determine whether the current branch node matches the jump point address of the unconditional branch node; If a match is found, the value of the target register after the jump is read, the jump point address of the target point is determined, and the execution instruction of the temporary breakpoint is set at that jump point address.

5. The breakpoint setting method according to claim 4, characterized in that, The step of sequentially setting breakpoint addresses for the preset instructions according to the breakpoint table and a fixed breakpoint interval granularity further includes: After determining that there is no jump point address matching the unconditional branch node, the jump table is queried to determine whether the current branch node matches the jump point address of the branch node returned by Trap. If a match is found, the xepc register value corresponding to the current instruction level is read to determine the jump point address of the target point, and the execution instruction of the temporary breakpoint is set at that jump point address.

6. The breakpoint setting method according to claim 5, characterized in that, The step of sequentially setting breakpoint addresses for the preset instructions according to the breakpoint table and a fixed breakpoint interval granularity further includes: After determining that there is no jump point address matching the Trap return branch node, the jump table is queried to determine whether the current branch node matches the abnormal entry setting node address of the abnormal branch node; If a match is found, the xtvec register value corresponding to the current instruction level is read to determine the jump point address of the target point; Update the jump point address of the target point to the corresponding position of the current branch node in the jump table; Write the breakpoints into the breakpoint table and set breakpoints according to the instruction information of the branch nodes, and determine whether there are similar branch nodes in the jump table; If it is confirmed that the jump point address of the target point corresponding to the same type of branch node in the jump table is modified to unknown, and the corresponding register address is deleted from the breakpoint table, and the corresponding breakpoint is deleted from the debugging tool.

7. The breakpoint setting method according to claim 6, characterized in that, The step of sequentially setting breakpoint addresses for the preset instructions according to the breakpoint table and a fixed breakpoint interval granularity further includes: If the current branch node is found to be faulty or the program runs without error when it reaches the current branch node, the steps of querying the jump table and determining whether the current branch node matches the jump point address of the unconditional branch node are executed repeatedly until the instruction terminates the current program execution process or there are no errors when traversing all branch nodes in the jump table.

8. An electronic device, characterized in that, include: A processor and a memory, wherein the memory stores a program that can be executed by the processor, the program being executed by the processor to implement the steps of the method as described in any one of claims 1-7.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the method as described in any one of claims 1-7.

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