Constant on-time buck converter

Abstract

A constant on-time buck converter includes a first transistor, a second transistor, a drive circuit, an inductor, a first resistor, a second resistor, a capacitor, a load, and a feedback loop control circuit. The feedback loop control circuit includes a first switch, a second switch, an error amplifier, a comparator, a frequency-locked loop circuit, an inverter, and a constant on-time logic circuit. This constant on-time buck converter improves DC regulation efficiency and response time.

Description

Technical Field

[0001] The present invention relates to a constant on-time (COT) buck converter, and more particularly to a COT buck converter capable of improving transient response. Background Art

[0002] The operation of a conventional buck converter can be described as follows. A conventional buck converter includes a pair of power transistors as switches that can be turned on or off to regulate the output voltage to be equal to a reference voltage. Specifically, the power transistors are alternately turned on and off to generate a switching voltage V at the switch output node SW (also referred to as the switch node). SW The switch node is coupled to an LC filter circuit comprising an inductor and a capacitor to generate an output voltage having a substantially constant magnitude. The output voltage can then be used to drive a load.

[0003] Figure 1 FIG. 1 is a schematic diagram of a conventional buck converter 1 of the prior art. The buck converter 1 comprises a pair of power transistors T1 and T2 for receiving an input voltage V IN and alternately turns on and off to generate a switching voltage V at the switch node SW SW . Switching voltage V SW Directly coupled to the circuit including inductor L1 and capacitor C OUT The LC filter circuit generates a stable output voltage V at the node OUT with a substantially constant magnitude. OUT The output voltage V OUT Drive load 30, the buck converter 1 provides load current I Load So that the output voltage V OUT Keep it at a constant level.

[0004] Buck converter 1 includes a feedback control circuit for regulating the energy transfer to the LC filter circuit to keep the output voltage V within the expected load limit of the circuit. OUT Specifically, the feedback control circuit turns on or off the power transistors T1 and T2 to maintain the output voltage V OUT Regulated to be equal to the reference voltage V REF , or adjusted to be equal to the reference voltage V REF In the buck converter 1, a voltage divider including resistors R1 and R2 is used to divide the output voltage V OUT The voltage is divided and then used as the feedback voltage V on the feedback node FB FB The error processing circuit (such as the comparator 12) converts the feedback voltage V FB With reference voltage V REFThe output of the comparator 12 is coupled to the driver circuit 14 to generate a control voltage for the power transistor based on the switching regulator control mechanism. The control voltage is used to generate gate drive signals for the power transistors T1 and T2.

[0005] A constant on-time (COT) buck converter is a buck converter that uses ripple mode control. A COT buck converter regulates the output voltage based on the ripple component in the output signal. Due to the switching action of the power transistors, all switch-mode regulators generate output ripple current through the output inductor. Due to the output capacitor C OUT The equivalent series resistance (ESR) and equivalent series inductance (ESL) in the circuit are placed in parallel with the load, and the current ripple will be displayed as output voltage ripple. Figure 1 In the output capacitor C OUT The ESR and ESL of the resistor R ESR and inductor L ESL express.

[0006] Coated-on-transient (COT) buck converters are widely used in industry due to their advantages, such as fast transient response and easy-to-control regulation from high input voltage to low output voltage. However, conventional COT buck converters still have disadvantages, such as jitter caused by low noise immunity, poor direct-current (DC) regulation, and transient response. Summary of the Invention

[0007] An embodiment of the present invention provides a constant on-time (COT) buck converter, comprising a first transistor, a second transistor, a driving circuit, an inductor, a first resistor, a second resistor, a capacitor, a load, and a feedback control circuit. The first transistor includes a first terminal for receiving an input voltage, a second terminal coupled to a switch node, and a control terminal. The second transistor includes a first terminal coupled to the switch node, a second terminal coupled to ground, and a control terminal. The driving circuit is coupled to the control terminal of the first transistor and the control terminal of the second transistor for controlling the first and second transistors. The inductor includes a first terminal coupled to the switch node and a second terminal coupled to an output node. The first resistor includes a first terminal coupled to the output node and a second terminal coupled to a feedback node. The second resistor includes a first terminal coupled to the feedback node and a second terminal coupled to ground. The capacitor includes a first terminal coupled to the output node and a second terminal coupled to ground. The load includes a first terminal coupled to the output node and a second terminal coupled to ground. The feedback control circuit includes a first switch, a second switch, an error amplifier, a comparator, a frequency-locked loop circuit, an inverter, and a COT logic circuit. The first switch includes a first terminal coupled to a feedback node; a second terminal; and a control terminal. The second switch includes a first terminal coupled to the second terminal of the first switch; a second terminal; and a control terminal. The error amplifier includes a negative input terminal coupled to the second terminal of the first switch; a positive input terminal for receiving a reference voltage; and an output terminal coupled to the second terminal of the second switch for outputting an error signal. The comparator is used to compare the error signal with the feedback voltage at the feedback node and output a comparison signal. The frequency-locked loop circuit is used to generate a frequency signal. The inverter includes an input terminal coupled to the frequency-locked loop circuit and the control terminal of the second switch; and an output terminal coupled to the control terminal of the first switch. The COT logic circuit is used to receive the frequency signal and the comparison signal and generate a COT signal to the drive circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 FIG. 1 is a schematic diagram of a conventional buck converter in the prior art.

[0009] Figure 2 Schematic diagram of a COT buck converter according to an embodiment of the present invention.

[0010] Figure 3 for Figure 2 Timing diagram of the output voltage signal in .

[0011]

Explanation of symbols

[0012] 1: Buck Converter

[0013] 12. CMP: Comparator

[0014] 24, OUT: Node

[0015] 14,110: driving circuit

[0016] 100:COT Buck Converter

[0017] 120: COT logic circuit

[0018] 30,130:load

[0019] 150: Feedback control circuit

[0020] C OUT :capacitance

[0021] EA: Error Amplifier

[0022] FB: Feedback Node

[0023] FLL: Frequency Locked Loop Circuit

[0024] GND: Ground terminal

[0025] I L :Current

[0026] I Load :Load current

[0027] INV:Inverter

[0028] L1, L: inductor

[0029] R1: first resistor

[0030] R2: Second resistor

[0031] R ESR :resistance

[0032] L ESL :inductance

[0033] S1: First switch

[0034] S2: Second switch

[0035] SW: switch node

[0036] t0 to t2: time

[0037] T1: first transistor

[0038] T2: Second transistor

[0039] V FB :Feedback voltage

[0040] V IN :Input voltage

[0041] V OUT :Output voltage

[0042] V REF :Reference voltage

[0043] V SW :Switching voltage DETAILED DESCRIPTION

[0044] The present disclosure will be understood by referring to the following detailed description in conjunction with the accompanying drawings. The various figures of this disclosure have been simplified for the purpose of clearly illustrating the present disclosure. However, the elements in the figures are not drawn to scale. Furthermore, the number and size of each element shown in the figures are for illustrative purposes only and are not intended to limit the scope of this disclosure.

[0045] Throughout this specification and the appended claims, certain terms will be used to refer to specific components. As those skilled in the art will appreciate, electronic device manufacturers may refer to components by different names. The present disclosure is not limited to components that have different names but the same function. In the following description and claims, the words "including" and "having" are used in an open-ended manner and should be interpreted as meaning "including, but not limited to..."

[0046] Figure 2 Schematic diagram of a COT buck converter 100 according to an embodiment of the present invention. The COT buck converter 100 comprises a first transistor T1, a second transistor T2, a driving circuit 110, an inductor L, a first resistor R1, a second resistor R2, a capacitor C OUT , a load 130 and a feedback control circuit 150. The feedback control circuit 150 includes a first switch S1, a second switch S2, an error amplifier EA, a comparator CMP, a frequency-locked loop circuit FLL, an inverter INV and a COT logic circuit 120.

[0047] The first transistor T1 comprises a first terminal for receiving an input voltage V IN , a second end coupled to the switch node SW, and a control end. The second transistor T2 includes a first end coupled to the switch node SW, a second end coupled to the ground end GND, and a control end. The driving circuit 110 is coupled to the control end of the first transistor T1 and the control end of the second transistor T2, and the driving circuit 110 is used to control the first transistor T1 and the second transistor T2. The inductor L includes a first end coupled to the switch node SW, and a second end coupled to the output node OUT. The first resistor R1 includes a first end coupled to the output node OUT, and a second end coupled to the feedback node FB. The second resistor R2 includes a first end coupled to the feedback node FB, and a second end coupled to the ground end GND. The capacitor C OUTThe first switch S1 includes a first terminal coupled to the output node OUT and a second terminal coupled to the ground terminal GND. The load 130 includes a first terminal coupled to the output node OUT and a second terminal coupled to the ground terminal GND. The first switch S1 includes a first terminal coupled to the feedback node FB, a second terminal and a control terminal. The second switch S2 includes a first terminal coupled to the second terminal of the first switch S1, a second terminal and a control terminal. The error amplifier EA includes a negative input terminal coupled to the second terminal of the first switch S1 and a positive input terminal for receiving a reference voltage V REF , and an output terminal coupled to the second terminal of the second switch S2 for outputting an error signal. The comparator CMP is used to compare the error signal with the feedback voltage V fed back by the node FB. FB , and outputs a comparison signal. The frequency-locked loop circuit FLL is used to generate a frequency signal. The inverter INV includes an input terminal coupled to the frequency-locked loop circuit FLL and the control terminal of the second switch S2, and an output terminal coupled to the control terminal of the first switch S1. The COT logic circuit 120 is used to receive the frequency signal and the comparison signal and generate a COT signal to the driver circuit 110.

[0048] In this embodiment, the first switch S1 and the second switch S2 may be metal oxide semiconductor field effect transistors (MOSFETs). However, in other embodiments, the first switch S1 and the second switch S2 may be bipolar junction transistors. In this embodiment, the first transistor T1 is a P-type transistor. The second transistor T2 is an N-type transistor. The actual implementation of the switches S1 and S2 and the transistors T1 and T2 is not critical to the embodiments of the present invention.

[0049] Transistors T1 and T2 can receive input voltage V IN and alternately turns on and off to generate a switching voltage V at the switch node SW SW The switch node SW is directly coupled to the LC filter circuit to generate a regulated output voltage V OUT , the LC filter circuit includes inductor L and capacitor C OUT , output voltage V OUT The load 130 is driven and has a substantially constant magnitude.

[0050] The COT buck converter 100 includes a feedback control circuit 150 for regulating the energy transfer to the LC filter circuit to maintain the output voltage constant within the desired load limit of the circuit. Specifically, the feedback control circuit 150 can turn on or off transistors T1 and T2 to adjust the output voltage V OUT Adjust to equal the reference voltage V REF, or adjusted to be equal to the reference voltage V REF The voltage divider includes a first resistor R1 and a second resistor R2, which are used to adjust the output voltage V OUT The divided voltage is then used as the feedback voltage V on the feedback node FB FB The feedback voltage V is fed back to the feedback control circuit 150. In a stable state, the first switch S1 of the feedback control circuit 150 is turned on and the second switch S2 is turned off. The error amplifier EA can compare the feedback voltage V FB With reference voltage V REF The error signal output by the error amplifier EA is output to the comparator CMP and is compared with the feedback voltage V FB Then, the COT logic circuit 120 uses the comparison result signal from the comparator CMP and the frequency signal from the frequency-locked loop circuit FLL to generate a constant on-time (COT) signal for the driver circuit 110. The driver circuit 110 generates control signals for transistors T1 and T2 based on a constant on-time control mechanism according to the COT signal.

[0051] The switching action of the constant on-time feedback control is based on the feedback voltage V FB In order to achieve constant on-time feedback control, when the feedback ripple drops to the reference voltage V REF Below, the switch voltage V SW At the end of the fixed on-time, the switch voltage V SW will be switched to a low level (the inductor is not energized) until the feedback voltage V FB Again drops to the reference voltage V REF At this time, another new fixed on-time will be started. If the feedback voltage V FB Still lower than the reference voltage V REF , then the switch voltage V SW It is switched low only for the minimum off-time and then switches back to high again for the fixed on-time.

[0052] Figure 3 for Figure 2 The output voltage signal V OUT The transient response can be improved by configuring the feedback control circuit 150. In the stable state, the first switch S1 is turned on and the second switch S2 is turned off. At time t0, the switch voltage V SW is switched, the output voltage V OUTThe voltage is boosted from 4.82V to 4.98V. At this point, the frequency-locked loop circuit FLL transmits a frequency signal to turn on the second switch S2 and turn off the first switch S1 via the inverter INV. The error amplifier EA is set to unity gain, meaning that the error signal output by the error amplifier EA is equal to the voltage at the negative input terminal of the error amplifier EA. By setting the error amplifier EA to unity gain, the COT buck converter 100 achieves faster transient response.

[0053] like Figure 3 As shown, the COT buck converter 100 can reduce the output voltage V OUT Gradually adjust the output voltage back to 4.82V from 4.98V. OUT When the voltage is regulated back to 4.82 V, the frequency-locked loop circuit FLL sends another signal to turn off the second switch S2 and turn on the first switch S1 . Therefore, the COT buck converter 100 will operate in a steady state again.

[0054] Likewise Figure 3 As shown, the buck converter 1 of the related art will convert the output voltage V OUT The output voltage V OUT By adjusting back to 4.82V, the COT buck converter 100 improves the transient response time of the output voltage compared to the buck converter 1 in the prior art.

[0055] The above are only preferred embodiments of the present invention. All equivalent changes and modifications made according to the claims of the present invention should fall within the scope of the present invention.

Claims

1. A constant on-time buck converter, comprising: A first transistor comprising: A first terminal for receiving an input voltage; The second terminal is coupled to the switch node; and Control terminal; A second transistor comprising: A first terminal coupled to the switch node; The second terminal is coupled to the ground terminal; and Control terminal; a driving circuit coupled to the control terminal of the first transistor and the control terminal of the second transistor, for controlling the first transistor and the second transistor; Inductors, including: A first terminal coupled to the switch node; and The second terminal is coupled to the output node; The first resistor comprises: A first terminal coupled to the output node; and The second terminal is coupled to the feedback node; The second resistor comprises: A first end coupled to the feedback node; and A second end coupled to the ground end; Capacitors, including: A first terminal coupled to the output node; and A second end coupled to the ground end; Load, including: A first terminal coupled to the output node; and A second terminal coupled to the ground terminal; and Feedback control circuit, including: The first switch comprises: A first end coupled to the feedback node; the second end; and Control terminal; The second switch comprises: a first end coupled to the second end of the first switch; the second end; and Control terminal; Error amplifier, including: a negative input terminal coupled to the second terminal of the first switch; a positive input terminal for receiving a reference voltage; and an output terminal coupled to the second terminal of the second switch, for outputting an error signal; a comparator for comparing the error signal with the feedback voltage at the feedback node and outputting a comparison signal; A frequency-locked loop circuit for generating a frequency signal; Inverter, including: an input terminal coupled to the frequency-locked loop circuit and the control terminal of the second switch; and an output terminal coupled to the control terminal of the first switch; and The constant on-time logic circuit is used for receiving the frequency signal and the comparison signal and generating a constant on-time signal to the driving circuit.

2. The constant on-time buck converter according to claim 1, wherein: The first switch and the second switch are metal-oxide-semiconductor field-effect transistors (MOSFETs).

3. The constant on-time buck converter according to claim 1 , wherein: The first switch and the second switch are bipolar junction transistors (BJTs).

4. The constant on-time buck converter according to claim 1 , wherein: The first transistor is a P-type transistor.

5. The constant on-time buck converter according to claim 1 , wherein: The second transistor is an N-type transistor.

Images