Task scheduling device, task scheduling method, chip, equipment and medium

Abstract

The present disclosure provides a task scheduling apparatus, a task scheduling method, a chip, a device and a medium, wherein the method includes: after obtaining a task to be processed, determining the operating status of each of a plurality of operating units; querying at least one first operating unit in an idle state among the plurality of operating units based on the operating status; obtaining a first operating parameter value determined based on power usage information of a second operating unit in a non-idle state; and when it is determined based on the first operating parameter value that the first operating unit meets the task scheduling requirements, allocating tasks to be executed to at least part of the first operating units in the task to be processed; the first operating parameter is used to determine the available power information of the first operating unit.

Description

Technical Field

[0001] The present disclosure relates to the field of chip technology, and in particular to a task scheduling apparatus, a task scheduling method, a chip, a device, and a medium. Background Art

[0002] Currently, to better enable integrated circuits to complete training tasks, they typically include a large number of computing units and exhibit a high flip rate. When a chip is tasked with numerous parallel computing tasks, these units must operate simultaneously. This high flip rate draws a significant amount of current, making it susceptible to overshoot. Severe overshoot can cause malfunction.

[0003] In the related art, the overshoot phenomenon of the integrated chip is generally alleviated by packaging a large number of capacitors in the integrated chip. However, the above method of packaging a large number of capacitors often leads to the phenomenon of excessive configuration of capacitors, which not only increases the cost of the integrated chip but also wastes a lot of resources. Summary of the Invention

[0004] The embodiments of the present disclosure provide at least one task scheduling apparatus, a task scheduling method, a chip, a device, and a medium.

[0005] In a first aspect, an embodiment of the present disclosure provides a task scheduling device, which includes: a controller for determining the operating status of each of a plurality of operating units after obtaining a task to be processed; and querying at least one first operating unit in an idle state among the plurality of operating units based on the operating status; and obtaining a first operating parameter value determined based on power usage information of a second operating unit in a non-idle state; a scheduler for allocating tasks to be executed to at least part of the first operating units in the task to be processed when it is determined that the first operating unit meets the task scheduling requirements based on the first operating parameter value; the first operating parameter is used to determine the available power information of the first operating unit.

[0006] In the above implementation, it is possible to dynamically allocate tasks to be executed to the first computing unit, thereby avoiding overshoot of the chip due to excessive processing tasks, thereby ensuring the effectiveness of task execution and further improving the service life of the chip.

[0007] In an optional embodiment, the task scheduling device also includes: a first timer; the first timer is used to determine a target query interval based on a target number of times when the first operation unit does not meet the task scheduling requirements; wherein the target number of times is used to indicate the number of times the obtained first operating parameter value fails to meet the task scheduling requirements continuously; the controller is also used to re-acquire the second operating parameter value determined based on the power usage information of the second operation unit after the target query interval; the scheduler is also used to allocate tasks to be executed to at least part of the first operation units in the pending tasks when it is determined that the first operation unit meets the task scheduling requirements based on the second operating parameter value.

[0008] In an optional embodiment, the first timer is further used to: obtain preset step information, wherein the preset step information is used to indicate the time interval for obtaining the power usage information of the second operation unit; determine the step extension information of the preset step information based on the target number of times; extend the preset step information based on the step extension information to obtain new step information, and determine the new step information as the target query interval.

[0009] In the above embodiment, the scheduler can no longer assign tasks to be executed to idle computing units if the first operating parameter value does not meet the task scheduling requirements, thereby avoiding overshooting of the chip due to excessive task execution. In addition, the above-mentioned first timer can determine a target query interval based on a target number of times, and the controller can re-acquire a second operating parameter value determined based on the power usage information of the second computing unit after the target query interval has passed. The scheduler can assign tasks to be executed to at least some of the first computing units among the tasks to be processed if it is determined based on the second operating parameter value that the first computing unit meets the task scheduling requirements, thereby determining the second operating parameter based on the power usage information of the second computing unit on a regular basis, and then promptly assigning tasks to be executed to at least some of the first computing units, thereby ensuring that the tasks to be processed are completed as soon as possible and improving work efficiency.

[0010] In an optional embodiment, the first timer is also used to: obtain initial time information; determine time adjustment information of the initial time information based on the target number of times, wherein the time adjustment information is used to indicate the time adjustment direction and / or time adjustment size of the initial time information; adjust the initial time information based on the time adjustment information to obtain the step extension information.

[0011] In the above embodiment, after obtaining the initial time information, the first timer can determine the time adjustment information of the initial time information based on the target number of times, and adjust the initial time information based on the time adjustment information to obtain the step extension information, so that the step extension information obtained can be dynamically adjusted based on the target number of times, thereby obtaining a more reasonable and effective step extension time.

[0012] In an optional embodiment, the controller is also used to: obtain the register value of the identification register; wherein the register value in the identification register is used to indicate the operating status of each of the operation units; and determine the target value in the register value, and determine the operation unit corresponding to the target value, wherein the target value is used to indicate that the operation unit is in an idle state; and determine the at least one first operation unit based on the operation unit corresponding to the target value.

[0013] In the above embodiment, the process of querying and obtaining at least one first operation unit in multiple operation units can be simplified by obtaining the register value of the identification register and determining at least one first operation unit in the register value, thereby improving the query efficiency.

[0014] In an optional embodiment, the task scheduling device also includes: a second timer; the second timer is used to start timing when it is determined based on the running status that the multiple operating units do not include a first operating unit in an idle state, and when the timing time of the second timer is a preset step information, trigger the controller to query at least one first operating unit in the multiple operating units again based on the running status.

[0015] In the above embodiment, when all operation units are in a non-idle state, the second timer can query the first operation again after the preset step information, so that the operation units in the idle state can be queried regularly, so that the operation units in the idle state can be found in time and the tasks to be executed can be allocated in time, thereby improving the execution efficiency of the tasks.

[0016] In an optional embodiment, the controller is also used to: obtain the target parameter value collected by the target sensor; and determine the power usage information of the second operation unit based on the target parameter value; and determine the first operating parameter value based on the total power supply information and the power usage information, wherein the target sensor is used to detect the operating parameters of each of the operation units.

[0017] In the above embodiment, the controller can first obtain the target parameter value collected by the target sensor, and determine the first operating parameter value of the second operation unit based on the target parameter value. Through this processing method, the parameter accuracy of the operating parameters of each operation unit can be improved, and then it can be further ensured that the amount of tasks performed by each operation unit will not be too high, thereby avoiding overshoot.

[0018] In an optional embodiment, the scheduler is further used to: when the first operating parameter value is a voltage value, and when it is determined that the voltage value is greater than or equal to a preset voltage threshold, determine that the first operation unit meets the task scheduling requirements.

[0019] In a second aspect, an embodiment of the present disclosure provides a task scheduling method, which includes: after obtaining a task to be processed, determining the operating status of each of a plurality of operating units; querying at least one first operating unit in an idle state among the plurality of operating units based on the operating status; obtaining a first operating parameter value determined based on power usage information of a second operating unit in a non-idle state; when it is determined based on the first operating parameter value that the first operating unit meets the task scheduling requirements, allocating tasks to be executed to at least part of the first operating units in the task to be processed; the first operating parameter is used to determine the available power information of the first operating unit.

[0020] In a third aspect, an embodiment of the present disclosure further provides a chip, characterized in that it includes a task scheduling device as described in any one of the above items.

[0021] In a fourth aspect, an embodiment of the present disclosure further provides an electronic device, comprising: a processor, a memory, and a bus, wherein the memory stores machine-readable instructions executable by the processor, and when the electronic device is running, the processor and the memory communicate through the bus, and when the machine-readable instructions are executed by the processor, the steps of the above-mentioned first aspect, or any possible implementation of the first aspect, are executed, or the steps of the above-mentioned second aspect are executed.

[0022] In a fifth aspect, an embodiment of the present disclosure further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the computer program executes the steps of the above-mentioned first aspect, or any possible implementation of the first aspect, or executes the steps of the above-mentioned second aspect.

[0023] For a description of the effects of the above-mentioned task scheduling device, electronic device, and computer-readable storage medium, please refer to the description of the above-mentioned task scheduling method, which will not be repeated here.

[0024] In order to make the above-mentioned objectives, features and advantages of the present disclosure more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the following briefly introduces the drawings required for use in the embodiments. The drawings herein are incorporated into and constitute a part of the specification. These drawings illustrate embodiments consistent with the present disclosure and, together with the specification, are used to illustrate the technical solutions of the present disclosure. It should be understood that the following drawings only illustrate certain embodiments of the present disclosure and should not be regarded as limiting the scope. For those of ordinary skill in the art, other relevant drawings can be obtained based on these drawings without inventive effort.

[0026] Figure 1 A flowchart of a task scheduling method provided by an embodiment of the present disclosure is shown;

[0027] Figure 2 A flowchart of another task scheduling method provided by an embodiment of the present disclosure is shown;

[0028] Figure 3 A flow chart of a method for determining a target query interval based on target times provided by an embodiment of the present disclosure is shown;

[0029] Figure 4 A schematic diagram of a task scheduling process provided by an embodiment of the present disclosure is shown;

[0030] Figure 5 A schematic diagram of a task scheduling device provided by an embodiment of the present disclosure is shown;

[0031] Figure 6 A schematic diagram of a task scheduling device provided by an embodiment of the present disclosure is shown;

[0032] Figure 7 A schematic diagram of an electronic device provided by an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0033] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. The components of the embodiments of the present disclosure generally described and shown in the drawings herein can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present disclosure provided in the drawings is not intended to limit the scope of the disclosure for which protection is sought, but merely represents selected embodiments of the present disclosure. Based on the embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present disclosure.

[0034] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0035] The term "and / or" herein simply describes an association relationship, indicating that three relationships can exist. For example, A and / or B can represent the existence of A alone, the simultaneous existence of A and B, and the existence of B alone. In addition, the term "at least one" herein refers to any combination of at least two of any one or more of a plurality of items. For example, "at least one of A, B, and C" can represent any one or more elements selected from the set consisting of A, B, and C.

[0036] Research has found that in related technologies, the overshoot phenomenon of integrated chips is generally alleviated by packaging a large number of capacitors on the integrated chip. However, this method of packaging a large number of capacitors often leads to excessive capacitor configuration, which not only increases the cost of the integrated chip but also wastes a lot of resources.

[0037] Based on the above research, the present disclosure provides a task scheduling device, a task scheduling method, a chip, a device and a medium. In an embodiment of the present disclosure, the controller can determine the operating status of each of the multiple operating units contained in the chip after obtaining the task to be processed. Afterwards, the controller can query at least one first operating unit in the multiple operating units based on the operating status. Then, the controller can obtain a first operating parameter value determined based on the power usage information of the second operating unit in the chip that is in a non-idle state. At this time, the scheduler can determine that the first operating unit meets the task scheduling requirements based on the first operating parameter value, and allocate tasks to be executed to at least part of the first operating units in the task to be processed.

[0038] From the above description, it can be seen that the embodiment of the present disclosure can obtain the first operating parameter value and, when it is determined based on the first operating parameter value that the first operating unit meets the task scheduling requirements, allocate tasks to be executed to the first operating unit, thereby dynamically allocating tasks to be executed to the first operating unit, avoiding overshoot of the chip due to excessive amount of processing tasks, and thus ensuring the effectiveness of task execution and further improving the service life of the chip.

[0039] To facilitate understanding of this embodiment, a task scheduling method disclosed in the embodiment of the present disclosure is first introduced in detail. The execution subject of the task scheduling method provided in the embodiment of the present disclosure is generally an electronic device with certain computing capabilities.

[0040] See also Figure 1 FIG. 1 is a flowchart of a task scheduling method provided by an embodiment of the present disclosure, wherein the method includes steps S101 to S105, wherein:

[0041] S101: After obtaining a task to be processed, determining the operating status of each of a plurality of computing units.

[0042] Here, the task to be processed can be a model training task (for example, an image recognition model training task), a parallel computing task (for example, a hash operation task), or other tasks that can be calculated using a chip. This disclosure does not specifically limit the task to be processed, and the task is based on actual needs. Here, the multiple computing units can be computing units in any chip.

[0043] In the embodiments of the present disclosure, the operating states of the computing unit can be divided into the following two types: one is that the computing unit is in an idle state, and the other is that the computing unit is in a non-idle state. The idle state of the computing unit can be understood as the computing unit not executing the corresponding task, and the non-idle state of the computing unit can be understood as the computing unit is executing the corresponding task or is about to execute the corresponding task.

[0044] S103: Query at least one first operating unit in an idle state among the multiple operating units based on the running state.

[0045] In the disclosed embodiment, after obtaining a task to be processed, the operating status of each of the multiple computing units included in the chip can be determined. Thereafter, the idle computing unit in the multiple computing units included in the chip can be searched and the idle computing unit can be determined as the first computing unit.

[0046] Here, the number of the first operation units may be one or more. The present disclosure does not impose any specific limitation on the number of the first operation units, and the number shall be determined based on actual needs.

[0047] S105: Obtain a first operating parameter value determined based on power usage information of the second computing unit in a non-idle state.

[0048] In the embodiment of the present disclosure, the power usage information of the second computing unit can be understood as the total power consumed by the second computing units in the chip that are in a non-idle state.

[0049] In an embodiment of the present disclosure, after obtaining the power usage information of the second computing unit in a non-idle state in the chip, the power information allocated by the chip to multiple computing units (i.e., the total power supply information in the following embodiment) can be obtained, and the above-mentioned first operating parameter value can be determined based on the total power supply information and the power usage information.

[0050] In the embodiments of the present disclosure, the first operating parameter value can be understood as the remaining power information provided by the chip in addition to the total power supply information used by the second computing unit. The first operating parameter value can be a voltage value, a current value, or a power value. The present disclosure does not specifically limit the type of the first operating parameter value, which is subject to implementation.

[0051] S107: When it is determined based on the first operating parameter value that the first operating unit meets the task scheduling requirements, assign tasks to be executed to at least part of the first operating units in the tasks to be processed; the first operating parameter is used to determine the available power information of the first operating unit.

[0052] In the embodiment of the present disclosure, the task scheduling requirement can be understood as the minimum power requirement when the first operating unit can stably execute the corresponding task. For example, the minimum power requirement can be the minimum voltage threshold requirement (or minimum current threshold requirement, or minimum power threshold requirement) when the first operating unit can stably execute the task.

[0053] In an embodiment of the present disclosure, the power usage information of the second operating unit in the chip that is in a non-idle state can be obtained, so as to determine the above-mentioned first operating parameter value based on the power usage information and the power supply of the chip, and when it is determined that the first operating parameter value meets the task scheduling requirements, it is determined that the first operating unit meets the task execution requirements. At this time, the first operating unit can be assigned a task to be executed among the tasks to be processed.

[0054] Here, if it is determined based on the first operating parameter value that each first operating unit is capable of stably executing tasks, then the tasks to be executed may be allocated to each first operating unit in the tasks to be processed. If it is determined based on the first operating parameter value that some of the first operating units are capable of stably executing tasks, then the tasks to be executed may be allocated to some of the first operating units in the tasks to be processed.

[0055] It can be seen from the above description that after obtaining the task to be processed, the operating status of each of the multiple operating units contained in the chip can be determined first, and at least one first operating unit in an idle state can be queried among the multiple operating units based on the operating status. Afterwards, the first operating parameter value determined based on the power usage information of the second operating unit in the non-idle state in the chip can be obtained, and when it is determined that the first operating parameter value meets the task scheduling requirements, tasks to be executed can be allocated to at least part of the first operating units in the task to be processed. In the above embodiment, by obtaining the first operating parameter value and allocating tasks to be executed to the first operating unit when it is determined that the first operating parameter value meets the task scheduling requirements, it is possible to dynamically allocate tasks to be executed to the first operating unit in the chip, avoid overshooting of the chip due to excessive amount of processing tasks, and thus ensure the effectiveness of the chip in executing tasks, and further improve the service life of the chip.

[0056] In an optional embodiment, with respect to the above S105: obtaining a first operating parameter value determined based on the power usage information of the second computing unit in a non-idle state, specifically includes:

[0057] Step S1051: acquiring a target parameter value collected by a target sensor, and determining power usage information of the second computing unit based on the target parameter value;

[0058] Step S1052: Determine the first operating parameter value based on the total power supply information and the power usage information, wherein the target sensor is used to detect the operating parameters of each of the operation units.

[0059] In the embodiment of the present disclosure, the target sensor may be a sensor pre-installed in the chip. The target sensor may be a voltage sensor, a current sensor, or a resistance sensor. The present disclosure does not specifically limit the type of the target sensor, and the type may be based on actual needs.

[0060] In the embodiment of the present disclosure, the target parameter value collected by the target sensor can be obtained, and the first operating parameter value of the second operation unit can be determined based on the target parameter value.

[0061] Here, the number of target sensors may be one or more. For example, a corresponding target sensor may be set for all computing units in the chip, or a corresponding target sensor may be set for each computing unit in the chip.

[0062] Assume that the target sensor is a voltage sensor, and the target parameter value is a voltage value. When the arithmetic unit in the chip is performing the corresponding task, the voltage value across the arithmetic unit is non-zero and non-negligible. When the arithmetic unit in the chip is not performing the corresponding task, the voltage value across the arithmetic unit is negligible.

[0063] When a corresponding target sensor is set for all the computing units in the chip, the target sensor can detect the operating parameter values ​​of all the computing units in the chip, thereby obtaining the target parameter value. For example, the voltage value across the first computing unit to the last computing unit in the chip can be detected by the target sensor, and the voltage value can be determined as the target parameter value. Here, the voltage value across the first computing unit to the last computing unit can be understood as the sum of the voltage values ​​across each computing unit. If a computing unit in the chip does not perform the corresponding task, the voltage value across the computing unit can be ignored. Therefore, the voltage value detected by the target sensor can be approximated as the sum of the voltage values ​​across the computing units that perform the task in the chip.

[0064] Based on this, the power usage information of the second computing unit can be determined based on the target parameter value. Assuming that the target parameter value is a voltage value, then the target parameter value can be understood as the total voltage value across the computing units in the chip in the working state. In this case, the power usage information of the computing units in the working state (that is, the power usage information of the second computing unit) can be determined based on this total voltage value.

[0065] When a corresponding target sensor is set for each computing unit in the chip, the operating parameter value of each computing unit in the chip can be detected by each target sensor to obtain the target parameter value of each computing unit. For example, the voltage value of each computing unit in the chip can be detected and the voltage value of each computing unit can be determined as the target parameter value.

[0066] Based on this, the target parameter value can be summed up, and the power usage information of the second operation unit can be determined based on the summation result. Assuming that the target parameter value is a voltage value, then the target parameter value can be understood as the voltage value across each operation unit (i.e., each second operation unit) in the working state in the chip. At this time, the voltage value across each second operation unit can be summed up to obtain the total voltage value, and the power usage information of the operation unit in the working state (i.e., the power usage information of the second operation unit) can be determined based on the total voltage value.

[0067] After determining the power usage information of the second computing unit in the manner described above, the first operating parameter value, i.e., the available power information of the first computing unit, can be determined based on the power supply information of the chip and the power usage information. The power supply information of the chip can be understood as the power supply information that the chip can provide to all computing units. In a specific implementation, the difference between the power supply information of the chip and the power usage information of the second computing unit can be calculated, and the first operating parameter value can be determined based on the difference.

[0068] In the above embodiment, the target parameter value collected by the target sensor in the chip can be obtained first, and the power usage information of the second operation unit can be determined based on the target parameter value, and then the first operating parameter value can be determined based on the power usage information and the power supply information of the chip. Through this processing method, more accurate operating parameters of each operation unit in the chip can be obtained, and then it can be further ensured that the amount of tasks performed by each operation unit in the chip will not be too high, thereby avoiding overshoot.

[0069] In an optional implementation, when the first operating parameter value is a voltage value, the following process may be performed for the above S107: determining that the first operation unit meets the task scheduling requirement based on the first operating parameter value.

[0070] When it is determined that the voltage value is greater than or equal to the preset voltage threshold, it is determined that the first operation unit meets the task scheduling requirement.

[0071] Here, the preset voltage threshold can be understood as the minimum voltage value at which at least one first operation unit can stably execute the corresponding task. For example, the preset voltage threshold can be the minimum voltage value at which each first operation unit can stably execute the corresponding task. For another example, the preset voltage threshold can be the minimum voltage value at which all first operation units can stably execute the corresponding task. Therefore, when it is determined that the voltage value is greater than or equal to the preset voltage threshold, it is determined that the first operation unit corresponding to the preset voltage threshold meets the task scheduling requirement.

[0072] The first operation unit corresponding to the preset voltage threshold may be understood as: a first operation unit in the at least one first operation unit that can operate normally under the preset voltage threshold.

[0073] For example, assuming the preset voltage threshold is 0.5V, when the obtained voltage value (i.e., the first operating parameter value) is 0.8V, it can be determined that the first operation unit meets the task scheduling requirement. In this case, a task to be executed can be assigned to the first operation unit that matches the preset voltage threshold among the tasks to be processed. Here, a first operation unit that can operate normally at 0.8V can be determined from at least one first operation unit as the first operation unit that matches the preset voltage threshold.

[0074] Assume that, if the obtained voltage value (i.e., the first operating parameter value) is 0.4V, it can be determined that the first computing unit does not meet the task scheduling requirements. That is, at least one first computing unit does not include a first computing unit that can operate normally at 0.4V. In this case, the task to be executed cannot be assigned to the first computing unit.

[0075] In an optional embodiment, if Figure 2 As shown, with respect to the above S101 to S107, the method disclosed herein further includes the following steps:

[0076] Step S21: if the first operation unit does not meet the task scheduling requirement, determining a target query interval based on a target number of times; wherein the target number of times indicates the number of times the obtained first operating parameter value fails to meet the task scheduling requirement continuously;

[0077] Step S22: after the target query interval has elapsed, reacquiring a second operating parameter value determined based on the power usage information of the second computing unit in the chip;

[0078] Step S23: when it is determined based on the second operating parameter value that the first operating unit meets the task scheduling requirement, assign tasks to be executed to at least part of the first operating unit in the tasks to be processed.

[0079] In an embodiment of the present disclosure, if it is determined based on the first operating parameter that the first computing unit does not meet the task scheduling requirement, the step of assigning the task to be executed to the first computing unit is not performed. In this case, the number of times the first computing unit fails to meet the task scheduling requirement consecutively, as determined based on the first operating parameter, can be counted and determined as the target number.

[0080] In the disclosed embodiment, after determining the target number of times, a target query interval can be determined based on the target number of times. After the target query interval has elapsed, a second operating parameter value determined based on the power usage information of the second operating unit in the chip is reacquired. The principle for determining the second operating parameter value is the same as that for determining the first operating parameter value and will not be described in detail here.

[0081] Here, the target query interval can be understood as the time interval for obtaining the power usage information of the second computing unit in the chip that is in a non-idle state when it is continuously determined that the first computing unit does not meet the task scheduling requirement.

[0082] In an embodiment of the present disclosure, when the target number of times changes, it can be continuously determined that the first operation unit does not meet the task scheduling requirements. At this time, in order to save chip resources, it is possible to avoid frequently determining the second operating parameter value in the manner described above, thereby avoiding waste of resources. Based on this, when it is determined that the target number of times has changed, the size of the target query interval can be set to change. Here, in order to avoid frequently determining the second operating parameter value, it is possible to choose to extend the target query interval to reduce the frequency of determining the second operating parameter value, thereby avoiding waste of resources. For example, when the target number of times is 1, the target query interval can be 0.1 seconds, when the target number of times is 2, the target query interval can be 0.2 seconds, and when the target number of times is 3, the target query interval can be 0.4 seconds.

[0083] In an embodiment of the present disclosure, when the second operating parameter value is a voltage value, if the second operating parameter is greater than or equal to a preset voltage threshold, it is determined that the first operation unit meets the task scheduling requirement. In this case, the first operation unit to which the task is to be assigned can be determined from at least one first operation unit, wherein the first operation unit to which the task is to be assigned can be all or some of the first operation units.

[0084] When determining the first computing unit to be assigned a task, a first computing unit that can operate normally under the support of the second operating parameter can be determined as the first computing unit to be assigned a task based on the preset voltage threshold.

[0085] In an optional embodiment, if Figure 3 As shown, the target query interval is determined based on the target number of times, specifically including the following steps:

[0086] Step S31: Acquire preset step information, wherein the preset step information is used to indicate a time interval for acquiring power usage information of the second computing unit;

[0087] Step S32: Determine step length extension information of the preset step length information based on the target number of times;

[0088] Step S33: Extend the preset step length information based on the step length extension information to obtain new step length information, and determine the new step length information as the target query interval.

[0089] In the embodiments of the present disclosure, the preset step length information can be understood as pre-set step length information, which is used to indicate the time interval for re-acquiring the power usage information of the second computing unit when it is determined that the first computing unit does not meet the task scheduling requirements at the current moment. For example, the preset step length information can be 0.1 seconds, 0.2 seconds, or 1 second. The present disclosure does not specifically limit the value corresponding to the preset step length information, and the value is determined to meet actual needs.

[0090] Here, in order to reduce the frequency of determining the second operating parameter value and save chip resources, the target query interval can be extended. Based on this, the step length extension information of the preset step length information can be determined based on the target number of times, that is, different step length extension information corresponds to different target numbers.

[0091] For example, when the target number is 1, the step extension information of the preset step information can be determined to be 0; when the target number is greater than 1, the step extension information of the preset step information can be determined to be not 0, and the specific value of the step extension information is associated with the target number.

[0092] After the step length extension information is determined, the preset step length information is extended based on the step length extension information to obtain new step length information. At this time, the new step length information can be determined as the target query interval.

[0093] In the embodiment of the present disclosure, the process of determining the step length extension information based on the target number of times can be specifically described as follows:

[0094] (1) Obtain initial time information;

[0095] (2) determining time adjustment information of the initial time information based on the target number of times, wherein the time adjustment information is used to indicate a time adjustment direction and / or a time adjustment size of the initial time information;

[0096] (3) Adjusting the initial time information based on the time adjustment information to obtain the step extension information.

[0097] In the embodiment of the present disclosure, the initial time information can be understood as a pre-set adjustment initial value. For example, the initial time information can be 1, or the initial time information can be 2. The present disclosure does not make any specific limitations on the initial time information, and it is subject to meeting actual needs.

[0098] Here, the step of determining the step length extension information based on the target number of times can be implemented in the chip through programming. When the chip compiles and executes the edited program, the numbers used in the chip's calculation process are all binary numbers. Therefore, the initial time information obtained above is presented as a binary number during the specific implementation process.

[0099] In this case, when the initial time information obtained is 1, the initial time information can be displayed as a binary number 0001 during the implementation process, and when the initial time information obtained is 2, the initial time information can be displayed as a binary number 0010 during the implementation process.

[0100] In the disclosed embodiments, after obtaining the initial time information, time adjustment information for the initial time information can be determined based on the target number of times. If the initial time information is a binary number, the time adjustment information indicates the adjustment direction and number of "1" bits in the binary number, where the number of adjustment bits can be used to determine the size of the time adjustment.

[0101] In a specific implementation, assuming that the target number is N, where N is a natural number, the value of N can be first determined, and the time adjustment direction and / or the number of adjustment bits in the time adjustment information can be determined based on the determined value of N. For example, when the target number is N and N>1, the time adjustment direction can be determined as: "1" in the binary number is shifted to the left of the binary number, and the number of adjustment bits can be determined as: adjusting N-1 bits. When the target number is N and N=1, the time adjustment direction can be determined as: not shifting, and / or the number of adjustment bits can be determined as: adjusting 0 bits.

[0102] In the embodiment of the present disclosure, after the adjustment direction and the number of adjustment bits are determined based on the target number of times, the initial time information can be adjusted based on the adjustment direction and the number of adjustment bits to obtain the step extension information.

[0103] For example, assuming the initial time information is the binary number 0001, and based on the target number of times, the time adjustment information determines that the time adjustment direction is to move the "1" in the binary number to the left, and the number of adjustment bits is 1, the time adjustment information can be determined as: the "1" in the initial time information is moved one bit to the left. In this case, if the initial time information is the binary number 0001, after adjusting the initial time information according to the time adjustment information, the adjustment result can be 0010. In this case, the step length extension information can be determined to be 2.

[0104] In the above embodiment, after obtaining the initial time information, the initial time information is dynamically adjusted based on the target number of times by determining time adjustment information for the initial time information based on the target number of times, and the step extension information is obtained by adjusting the initial time information based on the time adjustment information. By determining the step extension information in this manner, a more reasonable and effective step extension time can be obtained, thereby ensuring stable operation of the chip.

[0105] In the embodiment of the present disclosure, after determining the step length extension information, the preset step length information can be extended based on the step length extension information to obtain new step length information. In this case, the step length extension information can be understood as the extension multiple of the preset step length information. For example, if the step length extension information is 2, the preset step length information can be extended to 2 times the preset step length information based on the step length extension information, thereby obtaining new step length information. For example, if the preset step length information is 0.1 seconds, if the extension multiple is 2, the new step length information that can be obtained is 0.2 seconds.

[0106] For another example, when the step length extension information is 4, the preset step length information can be extended to 4 times the preset step length information based on the step length extension information to obtain new step length information. For example, when the preset step length information is 0.1 seconds, the new step length information obtained is 0.4 seconds.

[0107] Furthermore, the step length extension information may also be cumulative information for extending the preset step length information. For example, if the step length extension information is 4, the preset step length information may be extended based on the step length extension information by accumulating the preset step length information four times, and the cumulative result is determined as the new step length information. For example, if the preset step length information is 0.1 seconds, then the new step length information obtained by accumulating the preset step length information four times is 0.4 seconds. This disclosure does not impose any specific limitations on the step length extension information, and is subject to implementation.

[0108] In an embodiment of the present disclosure, after obtaining the new step length information, the new step length information can be determined as a target query interval. After the target query interval has elapsed, a second operating parameter value determined based on the power usage information of the second computing unit in the chip can be re-acquired. If it is determined based on the second operating parameter value that the first computing unit meets the task scheduling requirements, tasks to be executed are assigned to at least some of the tasks to be processed for the first computing unit.

[0109] In the case where it is determined based on the second operating parameter value that the first operating unit does not meet the task scheduling requirements, the value corresponding to the target number can be increased by 1 to obtain a new target number, and the target query interval can be re-determined based on the new target number. After the target query interval, the second operating parameter value is again determined based on the power usage information of the second operating unit in the chip. In the case where it is determined based on the second operating parameter value that the first operating unit meets the task scheduling requirements, tasks to be executed can be allocated to at least part of the first operating unit in the tasks to be processed. In the case where it is determined based on the second operating parameter value that the first operating unit still does not meet the task scheduling requirements, the second operating parameter value is continued to be re-acquired according to the above process until it is determined based on the second operating parameter value that the first operating unit meets the task scheduling requirements.

[0110] It should be noted here that due to the characteristics of high-performance computing of the chip, the second operation unit in the chip will definitely end the high-intensity computing task at a certain target time. When the acquisition time of the new second operating parameter value is at the target time or after the target time, it can be determined based on the acquired new second operating parameter value that the first operation unit meets the task scheduling requirements. Therefore, in the embodiment of the present disclosure, when it is determined based on the second operating parameter value that the first operation unit does not meet the task scheduling requirements, the target query time interval can be continuously extended based on the target number of times without affecting the processing efficiency of the chip.

[0111] In the above embodiment, when it is determined based on the first operating parameter value that the first operation unit does not meet the task scheduling requirements, the operation unit in the idle state in the chip (i.e., the first operation unit) will no longer be assigned tasks to be executed, thereby avoiding the overshoot phenomenon caused by the chip executing too many tasks.

[0112] In addition, in the above-mentioned embodiment, after the target query interval, the second operating parameter value determined based on the power usage information of the second operating unit in the chip can be re-obtained, and when it is determined based on the second operating parameter value that the first operating unit meets the task scheduling requirements, at least part of the first operating unit can be assigned tasks to be executed in the tasks to be processed. This can achieve regular viewing of the power usage information of the second operating unit in the chip and timely assignment of tasks to be executed to the first operating unit in the chip, thereby ensuring that the chip can complete the tasks to be processed as soon as possible and improve work efficiency.

[0113] In an optional embodiment, the above S103: querying at least one first operation unit among the multiple operation units based on the operating status specifically includes the following steps:

[0114] Step S41: obtaining a register value of an identification register; wherein the register value in the identification register is used to indicate the operating status of each operation unit;

[0115] Step S42: determining a target value in the register value, and determining a computing unit corresponding to the target value, wherein the target value is used to indicate that the computing unit is in an idle state;

[0116] Step S43: Determine the at least one first operation unit based on the operation unit corresponding to the target value.

[0117] In the embodiment of the present disclosure, the identification register can be understood as an identification register used to store the operating status of multiple computing units in a chip.

[0118] For example, when the operating state of the operation unit is an idle state, it can be determined that the identifier corresponding to the idle state is 0. At this time, the register value stored for the operation unit in the identification register is 0; when the operating state of the operation unit is a non-idle state, it can be determined that the identifier corresponding to the non-idle state is 1. At this time, the register value stored for the operation unit in the identification register is 1.

[0119] In the disclosed embodiment, the operating status of each computing unit in the chip can be determined by obtaining the register value of the identification register in the chip. In this case, the at least one first computing unit found among the multiple computing units included in the chip based on the operating status of each computing unit can be understood as the computing unit for which the register value in the identification register is 1.

[0120] In the above embodiment, by determining the register value of the identification register to determine at least one first operation unit, the process of querying and obtaining at least one first operation unit from multiple operation units included in the chip can be simplified, thereby improving query efficiency.

[0121] In an optional embodiment, the method provided in the embodiment of the present disclosure further includes:

[0122] When it is determined based on the running status that the multiple operating units do not include a first operating unit in an idle state, after the preset step information, the step of querying at least one first operating unit in the multiple operating units based on the running status is returned to.

[0123] In an embodiment of the present disclosure, when multiple computing units included in a chip are all in a non-idle state, it can be determined that the chip does not include a first computing unit in an idle state. In this case, the chip can wait for preset step information before performing the step of querying at least one first computing unit among the multiple computing units based on the operating status of each computing unit. The preset step information has the same meaning as the preset step information described above and is not described in detail here.

[0124] Here, the specific implementation steps of querying at least one first operation unit among multiple operation units based on the operating status of each operation unit may be the steps described in S41 to S43 above, which will not be described in detail here.

[0125] In the above embodiment, when all the computing units in the chip are in a non-idle state, after the preset step information, the first operation method can be queried again, and the computing units in the chip that are in an idle state can be queried periodically, so that the computing units in the idle state can be found in time and the tasks to be executed can be allocated in time, thereby improving the efficiency of the chip in executing tasks.

[0126] The following will describe in detail the implementation process of the task scheduling method provided by the present disclosure with reference to a specific flowchart. Figure 4 As shown, the task scheduling method specifically includes the following steps:

[0127] S401: Determine the operating status of each computing unit in the chip.

[0128] In specific implementation, after obtaining the task to be processed, the operating status of each of the multiple computing units included in the chip is first determined.

[0129] S402: Determine whether the plurality of operation units include the first operation unit. If so, execute step S403; otherwise, return to execute S401 after a preset step length (ie, the preset step length information in the above embodiment).

[0130] In a specific implementation, after obtaining a task to be processed, it can be determined whether a first computing unit in an idle state is included in the plurality of computing units. After determining that the chip does not include the first computing unit in an idle state, it can be re-queried for a first computing unit in an idle state among the plurality of computing units included in the chip after a preset step size.

[0131] S403: Obtaining an operating parameter value A determined based on the power usage information of the second computing unit in the chip that is in a non-idle state, wherein step S403 is the same as step S105 above and is not described in detail here. The operating parameter value A is the first operating parameter value.

[0132] S404: Determine whether the first operation unit meets the task scheduling requirement based on the first operating parameter value; if so, execute S405; otherwise, execute S406.

[0133] S405: Allocate tasks to be executed to at least some of the first computing units in the tasks to be processed. This process ends.

[0134] S406: Determine a target query interval based on a target number of times; wherein the target number of times is used to indicate the number of times the obtained first operating parameter value fails to meet the task scheduling requirement continuously.

[0135] After the target query interval has passed, the process returns to step S403 to obtain the operating parameter value B. The operating parameter value B is the second operating parameter value.

[0136] In an embodiment of the present disclosure, after determining that there is a first operating unit in an idle state, power usage information of a second operating unit in a non-idle state in the chip can be obtained, and an operating parameter value A can be determined based on the power usage information, and based on the operating parameter value A, it can be judged whether the first operating unit meets the task scheduling requirements.

[0137] When it is determined based on the operating parameter value A that at least part of the first operating units meet the task scheduling requirement, tasks to be executed may be allocated to at least part of the first operating units among the tasks to be processed.

[0138] When it is determined that the operating parameter value A does not meet the task scheduling requirements, the target query interval can be determined, and after the target query interval, the operating parameter B determined based on the power usage information of the second operating unit can be re-obtained, and when it is determined based on the operating parameter B that the first operating unit meets the task scheduling requirements, tasks to be executed are allocated to at least part of the first operating unit in the tasks to be processed.

[0139] See also Figure 5 , which is a schematic diagram of a task scheduling device provided by an embodiment of the present disclosure, the task scheduling device includes: a controller 51 and a scheduler 52, wherein the controller 51 and the scheduler 52 are connected in sequence.

[0140] The controller 51 is configured to, after obtaining a task to be processed, determine an operating state of each of the plurality of operating units; query at least one first operating unit in an idle state among the plurality of operating units based on the operating state; and obtain a first operating parameter value determined based on power usage information of a second operating unit in a non-idle state;

[0141] The scheduler 52 is used to receive relevant information of the first operating unit and the first operating parameter value sent by the controller 51, and when it is determined based on the first operating parameter value that the first operating unit meets the task scheduling requirements, allocate tasks to be executed to at least part of the first operating units in the tasks to be processed; the first operating parameter is used to determine the available power information of the first operating unit.

[0142] In an embodiment of the present disclosure, after the chip obtains the task to be processed, the operating status of each of the multiple operating units contained in the chip can be determined by the controller. Afterwards, the controller can query at least one first operating unit in an idle state among the multiple operating units based on the operating status. Then, the controller can obtain the first operating parameter value determined by the power usage information of the second operating unit in the chip that is in a non-idle state. At this time, when the scheduler determines that the first operating unit meets the task scheduling requirements based on the first operating parameter value, tasks to be executed can be allocated to at least part of the first operating units in the task to be processed.

[0143] In the above implementation, it is possible to dynamically allocate tasks to be executed to the first computing unit in the chip, thereby avoiding overshoot of the chip due to excessive processing tasks, thereby ensuring the effectiveness of the chip in executing tasks and further improving the service life of the chip.

[0144] In one possible implementation, Figure 5 As shown, the task scheduling device provided by the embodiment of the present disclosure further includes: a first timer 53.

[0145] a first timer 53, configured to determine a target query interval based on a target number of times when the first operation unit does not meet the task scheduling requirement; wherein the target number of times indicates the number of times the obtained first operating parameter value continuously fails to meet the task scheduling requirement;

[0146] The controller 51 is further configured to reacquire a second operating parameter value determined based on the power usage information of the second computing unit in the chip after the target query interval has elapsed;

[0147] The scheduler 52 is further configured to allocate tasks to be executed to at least part of the first operating units in the tasks to be processed when it is determined based on the second operating parameter value that the first operating unit meets the task scheduling requirement.

[0148] In an embodiment of the present disclosure, the scheduler 52 may send a timing start message to the first timer when it is determined based on the second operating parameter value that the first operation unit does not meet the task scheduling requirements. After receiving the timing start message, the first timer may determine the target query interval based on the target number of times and start timing, wherein the timing time is the above-mentioned target query interval. After the timing result of the first timer, a trigger signal may be sent to the controller 51 so that the controller 51 re-acquires the second operating parameter value determined based on the power usage information of the second operation unit of the chip after receiving the trigger signal sent by the first timer, and sends the re-determined second operating parameter value to the scheduler 52 again. Afterwards, the scheduler may allocate tasks to be executed to at least part of the first operation unit in the tasks to be processed when it is determined based on the re-determined second operating parameter value that the first operation unit meets the task scheduling requirements. Through the above-mentioned processing method, the target query interval can be adjusted at any time based on the target number of times, thereby avoiding the problem of resource waste caused by excessive queries.

[0149] In one possible embodiment, the first timer 53 is further used to: obtain preset step information, wherein the preset step information is used to indicate the time interval for obtaining the power usage information of the second operation unit; determine the step extension information of the preset step information based on the target number of times; extend the preset step information based on the step extension information to obtain new step information, and determine the new step information as the target query interval.

[0150] In the disclosed embodiment, preset step length information can be first obtained, and then step length extension information for the preset step length information can be determined based on the target number of times. Subsequently, the preset step length information can be extended based on the step length extension information to obtain new step length information. In this case, the new step length information is the target query interval. The specific implementation process is detailed in the process described in steps S31 to S33 above and will not be further described here.

[0151] In one possible embodiment, the first timer 53 is also used to: obtain initial time information; determine time adjustment information of the initial time information based on the target number of times, wherein the time adjustment information is used to indicate the time adjustment direction and / or time adjustment size of the initial time information; adjust the initial time information based on the time adjustment information to obtain the step extension information.

[0152] In an embodiment of the present disclosure, when a first timer determines the step extension information of the preset step information based on the target number of times, the first timer may first obtain initial time information and determine time adjustment information of the initial time information based on the target number of times. Thereafter, the first timer may adjust the initial time information based on the time adjustment information to obtain the step extension time. The specific implementation process is detailed in the processes described in (1) to (3) above and will not be repeated here.

[0153] In one possible embodiment, the controller 51 is also used to: obtain a register value of an identification register; wherein the register value in the identification register is used to indicate the operating status of each of the operation units; and determine a target value in the register value, and determine the operation unit corresponding to the target value, wherein the target value is used to indicate that the operation unit is in an idle state; and determine the at least one first operation unit based on the operation unit corresponding to the target value.

[0154] In an embodiment of the present disclosure, a controller can query multiple arithmetic units for at least one first arithmetic unit that is in an idle state based on the operating status of each arithmetic unit. Specifically, this can be accomplished by first obtaining the register value of an identification register in the chip, then determining a target value from the obtained register value, and determining the arithmetic unit corresponding to the target value. In this case, the arithmetic unit corresponding to the target value is the aforementioned first arithmetic unit.

[0155] When there are multiple target values ​​in the register value, multiple first operation units can be determined. The specific implementation process is detailed in the process described in steps S41 to S33 in the above embodiment, and will not be repeated here.

[0156] In one possible implementation, Figure 5 As shown, the task scheduling device provided by the embodiment of the present disclosure further includes: a second timer 54 .

[0157] The second timer 54 is used to start timing when it is determined based on the running status that the multiple operating units do not include the first operating unit in the idle state, and when the timing time of the second timer is the preset step information, trigger the controller to query at least one first operating unit in the multiple operating units again based on the running status.

[0158] In an embodiment of the present disclosure, when the controller determines that the chip does not contain a first operation unit in an idle state based on the operating status of each operation unit, it can send a start timing information to the second timer. After receiving the start timing information, the second timer starts timing, wherein the timing time of the second timer is the preset step information. After the second timer ends, a trigger signal is sent to the controller to trigger the controller to query at least one first operation unit in multiple operation units based on the operating status of each operation unit again based on the trigger signal. Among them, the preset step information has the same meaning as the above-mentioned preset step information and will not be described in detail here.

[0159] In one possible embodiment, the controller 51 is also used to: obtain the target parameter value collected by the target sensor; and determine the power usage information of the second operation unit based on the target parameter value; and determine the first operating parameter value based on the total power supply information and the power usage information, wherein the target sensor is used to detect the operating parameters of each of the operation units.

[0160] In an embodiment of the present disclosure, a first operating parameter value determined by the power usage information of the second operating unit in a non-idle state in the chip can be obtained by the controller. In specific implementation, the controller can first obtain the target parameter value collected by the target sensor in the chip, and determine the power usage information of the second operating unit based on the target parameter value. Afterwards, the controller can determine the first operating parameter value based on the power supply information and power usage information of the chip. The specific implementation steps are described in the process of steps S1051 to S1052 in the above embodiment and will not be described in detail here.

[0161] In a possible implementation, when the first operating parameter value is a voltage value, the scheduler is further configured to: upon determining that the voltage value is greater than or equal to a preset voltage threshold, determine that the first operation unit meets the task scheduling requirement.

[0162] In an embodiment of the present disclosure, when the first operating parameter value is a voltage value, the scheduler determines that the first operation unit meets the task scheduling requirements based on the first operating parameter value. The scheduler can determine that the first operation unit meets the task scheduling requirements when it determines that the voltage value corresponding to the first operating parameter value is greater than or equal to a preset voltage threshold.

[0163] Those skilled in the art will understand that in the above-mentioned method of the specific implementation method, the writing order of each step does not mean a strict execution order and does not constitute any limitation on the implementation process. The specific execution order of each step should be determined by its function and possible internal logic.

[0164] Based on the same inventive concept, the embodiment of the present disclosure also provides a task scheduling device corresponding to the task scheduling method. Since the principle of solving the problem by the device in the embodiment of the present disclosure is similar to the above-mentioned task scheduling method in the embodiment of the present disclosure, the implementation of the device can refer to the implementation of the method, and the repeated parts will not be repeated.

[0165] Reference Figure 6 FIG. 1 is a schematic diagram of a task scheduling device provided by an embodiment of the present disclosure, wherein the device includes: a determination unit 61, a query unit 62, an acquisition unit 63, and an allocation unit 64; wherein,

[0166] A determining unit 61 is configured to determine the operating status of each of the plurality of computing units after obtaining the task to be processed;

[0167] a query unit 62, configured to query at least one first computing unit in an idle state among the plurality of computing units based on the running state;

[0168] An acquiring unit 63 is configured to acquire a first operating parameter value determined based on power usage information of a second computing unit in a non-idle state;

[0169] An allocation unit 64 is used to allocate tasks to be executed to at least part of the first operating units in the tasks to be processed when it is determined based on the first operating parameter value that the first operating unit meets the task scheduling requirements; the first operating parameter is used to determine the available power information of the first operating unit.

[0170] It can be seen from the above description that after obtaining the task to be processed, the operating status of each of the multiple operating units contained in the chip can be determined first, and at least one first operating unit can be queried in the multiple operating units based on the operating status. Afterwards, the first operating parameter of the second operating unit in the chip can be obtained, and when it is determined that the first operating parameter meets the task scheduling requirements, the task to be executed can be assigned to each first operating unit in the task to be processed. In the above embodiment, by obtaining the first operating parameter value and assigning the task to be executed to the first operating unit when it is determined that the first operating parameter value meets the task scheduling requirements, it is possible to dynamically assign the task to be executed to the first operating unit in the chip, thereby avoiding the overshoot phenomenon of the chip due to excessive execution of processing tasks, thereby ensuring the effectiveness of the chip in executing tasks and further improving the service life of the chip.

[0171] In one possible embodiment, the allocation unit is further used to: determine a target query interval based on a target number of times when the first operating unit does not meet the task scheduling requirements; wherein the target number of times is used to indicate the number of times the obtained first operating parameter value fails to meet the task scheduling requirements continuously; after the target query interval, re-acquire a second operating parameter value determined based on the power usage information of the second operating unit; and when it is determined that the first operating unit meets the task scheduling requirements based on the second operating parameter value, allocate tasks to be executed to at least part of the first operating units in the tasks to be processed.

[0172] In one possible implementation, the allocation unit is further used to: obtain preset step information, wherein the preset step information is used to indicate the time interval for obtaining the power usage information of the second operation unit; determine the step extension information of the preset step information based on the target number of times; extend the preset step information based on the step extension information to obtain new step information, and determine the new step information as the target query interval.

[0173] In one possible implementation, the allocation unit is further used to: obtain initial time information; determine time adjustment information of the initial time information based on the target number of times, wherein the time adjustment information is used to indicate the time adjustment direction and / or time adjustment size of the initial time information; and adjust the initial time information based on the time adjustment information to obtain the step extension information.

[0174] In one possible implementation, the query unit is further used to: obtain a register value of an identification register; wherein the register value in the identification register is used to indicate the operating status of each operation unit; determine a target value in the register value, and determine the operation unit corresponding to the target value, wherein the target value is used to indicate that the operation unit is in an idle state; and determine the at least one first operation unit based on the operation unit corresponding to the target value.

[0175] In one possible implementation, the query unit is further used to: when it is determined based on the running status that the multiple operating units do not include a first operating unit in an idle state, after passing through a preset step information, return to execute the step of querying at least one first operating unit among the multiple operating units based on the running status.

[0176] In one possible implementation, the allocation unit is further used to: obtain the target parameter value collected by the target sensor, and determine the power usage information of the second operating unit based on the target parameter value; determine the first operating parameter value based on the total power supply information and the power usage information, wherein the target sensor is used to detect the operating parameters of each operating unit in the chip.

[0177] In one possible implementation, the allocation unit is further configured to: when the first operating parameter value is a voltage value, and when it is determined that the voltage value is greater than or equal to a preset voltage threshold, determine that the first operation unit meets the task scheduling requirement.

[0178] For descriptions of the processing flow of each module in the device and the interaction flow between each module, reference can be made to the relevant descriptions in the above method embodiment, which will not be described in detail here.

[0179] Corresponding to Figure 1 The task scheduling method in the present disclosure embodiment also provides an electronic device 700, such as Figure 7 FIG. 1 is a schematic diagram of the structure of an electronic device 700 provided in an embodiment of the present disclosure, including:

[0180] Processor 71, memory 72, and bus 73; memory 72 is used to store execution instructions, including internal memory 721 and external memory 722; the internal memory 721 is also called internal memory, which is used to temporarily store operation data in the processor 71 and data exchanged with external memory 722 such as a hard disk. The processor 71 exchanges data with the external memory 722 through the internal memory 721. When the electronic device 700 is running, the processor 71 communicates with the memory 72 via the bus 73, so that the processor 71 executes the following instructions:

[0181] After obtaining the task to be processed, determining the operating status of each of the plurality of computing units;

[0182] querying at least one first computing unit in an idle state among the plurality of computing units based on the operating state;

[0183] obtaining a first operating parameter value determined based on power usage information of a second computing unit in a non-idle state;

[0184] When it is determined based on the first operating parameter value that the first operating unit meets the task scheduling requirements, tasks to be executed are allocated to at least part of the first operating units in the tasks to be processed; the first operating parameter is used to determine the available power information of the first operating unit.

[0185] The present disclosure also provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the computer program executes the steps of the task scheduling method described in the above method embodiment. The storage medium can be a volatile or non-volatile computer-readable storage medium.

[0186] The embodiments of the present disclosure also provide a computer program product, which carries program code. The instructions included in the program code can be used to execute the steps of the task scheduling method described in the above method embodiment. For details, please refer to the above method embodiment and will not be repeated here.

[0187] The computer program product may be implemented in hardware, software, or a combination thereof. In one embodiment, the computer program product is implemented as a computer storage medium. In another embodiment, the computer program product is implemented as a software product, such as a software development kit (SDK).

[0188] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the system and device described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here. In the several embodiments provided in the present disclosure, it should be understood that the disclosed system and method can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some communication interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0189] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0190] In addition, each functional unit in each embodiment of the present disclosure may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0191] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a non-volatile computer-readable storage medium that is executable by a processor. Based on this understanding, the technical solution of the present disclosure, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling an electronic device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present disclosure. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0192] Finally, it should be noted that the above-described embodiments are only specific implementation methods of the present disclosure, which are used to illustrate the technical solutions of the present disclosure, rather than to limit them. The scope of protection of the present disclosure is not limited thereto. Although the present disclosure has been described in detail with reference to the above-described embodiments, those skilled in the art should understand that any person skilled in the art can modify or easily conceive of changes to the technical solutions described in the above-described embodiments within the technical scope disclosed in the present disclosure, or replace some of the technical features therein with equivalents. Such modifications, changes, or replacements do not deviate from the spirit and scope of the technical solutions of the embodiments of the present disclosure, and should be included in the scope of protection of the present disclosure. Therefore, the scope of protection of the present disclosure shall be subject to the scope of protection of the claims.

Claims

1. A task scheduling device, characterized in that: include: A controller, configured to determine the operating state of each of the plurality of computing units after obtaining the task to be processed; and querying at least one first computing unit in an idle state among the plurality of computing units based on the operating state; and obtaining a first operating parameter value determined based on power usage information of the second computing unit in a non-idle state; a scheduler configured to allocate tasks to be executed to at least some of the tasks to be processed if it is determined based on the first operating parameter value that the first operating unit meets a task scheduling requirement; the first operating parameter being used to determine information about available power of the first operating unit; The controller is also used for: Obtain target parameter values ​​collected by target sensors; as well as The power usage information of the second operation unit is determined based on the target parameter value; and the first operating parameter value is determined based on the total power supply information and the power usage information, wherein the target sensor is used to detect the operating parameters of each of the operation units.

2. The task scheduling device according to claim 1, characterized in that: The task scheduling device further includes: a first timer; The first timer is configured to determine a target query interval based on a target number of times when the first operation unit does not meet the task scheduling requirement; wherein the target number of times indicates the number of times the obtained first operating parameter value continuously fails to meet the task scheduling requirement; The controller is further configured to reacquire a second operating parameter value determined based on the power usage information of the second operation unit after the target query interval has elapsed; The scheduler is further configured to allocate tasks to be executed to at least part of the first operating units among the tasks to be processed when it is determined based on the second operating parameter value that the first operating unit meets the task scheduling requirement.

3. The task scheduling device according to claim 2, characterized in that: The first timer is further configured to: Acquiring preset step information, wherein the preset step information is used to indicate a time interval for acquiring power usage information of the second computing unit; Determining step length extension information of the preset step length information based on the target number of times; The preset step length information is extended based on the step length extension information to obtain new step length information, and the new step length information is determined as the target query interval.

4. The task scheduling device according to claim 3, characterized in that: The first timer is further configured to: Get initial time information; Determining time adjustment information of the initial time information based on the target number of times, wherein the time adjustment information is used to indicate a time adjustment direction and / or a time adjustment size of the initial time information; The initial time information is adjusted based on the time adjustment information to obtain the step extension information.

5. The task scheduling device according to claim 1, characterized in that: The controller is also used for: Obtaining a register value of an identification register; wherein the register value in the identification register is used to indicate the operating status of each of the operation units; and Determine a target value in the register value and determine an operation unit corresponding to the target value, wherein the target value is used to indicate that the operation unit is in an idle state; and determine the at least one first operation unit based on the operation unit corresponding to the target value.

6. The task scheduling device according to any one of claims 1 to 5, characterized in that: The task scheduling device further includes: a second timer; The second timer is used to start timing when it is determined based on the running status that the multiple operating units do not include the first operating unit in the idle state, and when the timing time of the second timer is the preset step information, trigger the controller to query at least one first operating unit in the multiple operating units again based on the running status.

7. The task scheduling device according to claim 1, characterized in that: The first operating parameter value is a voltage value; The scheduler is further configured to: When it is determined that the voltage value is greater than or equal to the preset voltage threshold, it is determined that the first operation unit meets the task scheduling requirement.

8. A task scheduling method, characterized in that: include: After obtaining the task to be processed, determining the operating status of each of the plurality of computing units; querying at least one first computing unit in an idle state among the plurality of computing units based on the operating state; obtaining a first operating parameter value determined based on power usage information of a second computing unit in a non-idle state; When it is determined based on the first operating parameter value that the first operating unit meets the task scheduling requirement, allocating tasks to be executed to at least part of the tasks to be processed; the first operating parameter is used to determine the available power information of the first operating unit; The first operating parameter value is determined by: acquiring a target parameter value collected by a target sensor, and determining power usage information of the second computing unit based on the target parameter value; The first operating parameter value is determined based on the total power supply information and the power usage information, wherein the target sensor is used to detect the operating parameters of each of the operation units.

9. A chip, characterized in that: The method comprises the task scheduling device according to any one of claims 1 to 7.

10. An electronic device, characterized in that: include: A processor, a memory and a bus, wherein the memory stores machine-readable instructions executable by the processor. When the electronic device is running, the processor and the memory communicate via the bus, and when the machine-readable instructions are executed by the processor, the steps of the task scheduling method as described in claim 8 are performed.

11. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, which, when executed by a processor, executes the steps of the task scheduling method according to claim 8.

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