Image sensing device and method of operation thereof

Abstract

The present disclosure relates to an image sensing device and an operating method thereof, the image sensing device including: a pixel array including unit pixels adapted to transfer and store electric charges in response to a transfer signal, and read out a pixel signal corresponding to the stored electric charges in response to a selection signal provided to the unit pixels; a signal converter adapted to compare the pixel signal with a ramp signal based on a switching signal to generate a distance information signal; and a signal controller adapted to generate the switching signal for initializing the signal converter in a time interval in which the pixel signal is read out.

Description

TECHNICAL FIELD

[0001] Exemplary embodiments of the present application relate to a semiconductor design technology, and more particularly, to an image sensing device and a method for operating an image sensing device. BACKGROUND

[0002] An image sensing device is a device that captures an image using a characteristic of a semiconductor that reacts to light. The image sensing device is generally classified into an image sensing device employing a charge-coupled device (CCD) and an image sensing device employing a complementary metal-oxide semiconductor (CMOS) device. Recently, the image sensing device using the CMOS device is widely used due to an advantage that it can directly implement analog and digital control circuits on an integrated circuit (IC). SUMMARY

[0003] Embodiments of the present application are directed to an image sensing device capable of reducing noise by setting an offset voltage for analog / digital (A / D) conversion based on a readout pixel signal, and a method for operating an image sensing device.

[0004] According to an embodiment of the present application, an image sensing device can include a pixel array including unit pixels adapted to transfer and store a charge in response to a transfer signal, and to read out a pixel signal corresponding to the stored charge in response to a selection signal provided to the unit pixels; a signal converter adapted to compare the pixel signal with a ramp signal to generate a distance information signal based on a switching signal; and a signal controller adapted to generate the switching signal for initializing the signal converter in a time interval in which the pixel signal is read out.

[0005] According to another embodiment of the present application, a method for operating an image sensing device can include the steps of reading out first and second pixel signals corresponding to first and second charges stored in unit pixels, respectively, in response to a selection signal; setting an offset voltage between the readout first and second pixel signals and a ramp signal in response to a switching signal; resetting the first and second pixel signals in response to a transfer signal; and generating a distance information signal corresponding to a voltage change difference between the reset first and second pixel signals in response to the ramp signal.

[0006] According to another embodiment of the present application, a method for operating an image sensing device having a pixel array including unit pixels, the unit pixels including a first pixel and a second pixel, the method can include the steps of: storing a first charge in the first pixel based on a first photodiode output, the first charge a) based on a reflection signal returned to the image sensing device from an object, and b) generated in response to a first phase signal that is in phase with an optical signal output from the image sensing device; storing a second charge in the second pixel based on a second photodiode output, the second charge a) based on the reflection signal, and b) generated in response to a second phase signal that has a phase difference from the optical signal output from the image sensing device; reading out a first pixel signal corresponding to the first charge from the first pixel; reading out a second pixel signal corresponding to the second charge from the second pixel; and comparing the first pixel signal and the second pixel signal with a reference signal that is ramped up to generate a distance information signal corresponding to a voltage change difference. BRIEF DESCRIPTION OF DRAWINGS

[0007] Figure 1 is a block diagram illustrating an image sensing device according to an embodiment of the present application.

[0008] Figure 2 is a circuit diagram illustrating a unit pixel included in the pixel array shown in Figure 1

[0009] Figure 3 is a block diagram illustrating a signal converter shown in Figure 1

[0010] Figure 4 is a timing chart illustrating an operation of the image sensing device shown in Figure 1

[0011] Figure 5 is a flowchart describing an operation of the image sensing device according to one embodiment of the present application. DETAILED DESCRIPTION

[0012] Exemplary embodiments of the present application will be described below in greater detail with reference to the accompanying drawings. The present application may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the application to those skilled in the art. Throughout the disclosure, like reference numerals refer to like parts throughout the various embodiments of the present application and embodiments of the present application.

[0013] ​​​It should be understood that when an element is referred to as being "coupled" or "connected" to another element, it can be directly coupled or connected to the other element or intervening elements can be present. In contrast, it should be understood that when an element is referred to as being "directly coupled" or "directly connected" to another element, there are no intervening elements present. Other expressions that describe the relationship between elements should be construed in the same fashion unless expressly indicated otherwise.

[0014] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. In this disclosure, the singular forms are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes," "including," "has," "have," "has" or any variation thereof, when used in this specification, specify the presence of the stated feature, quantity, step, operation, element, component, and / or combination, but do not exclude the presence or addition of one or more other features, quantities, steps, operations, elements, components, and / or combinations.

[0015] Figure 1 is a block diagram illustrating an image sensing device 100 according to an embodiment of the present application.

[0016] Referring to Figure 1 , the image sensing device 100 can generate a distance information signal DOUT indicating a depth from an object 200 by using a time-of-flight (TOF) method. For example, the image sensing device 100 can detect a phase difference between a first optical signal MS output to the object 200 and a second optical signal RS reflected from the object 200 to generate the distance information signal DOUT. The image sensing device 100 can include an optical transmitter 110, an optical receiver 120, a signal controller 130, a pixel array 140, and a signal converter 150.

[0017] The optical transmitter 110 can output the first optical signal MS to the object 200. Herein, the first optical signal MS can be a periodic signal periodically switched.

[0018] The optical receiver 120 can receive the second optical signal RS reflected from the object 200. The optical receiver 120 can remove noise originating from ambient light from the second optical signal RS and provide a third optical signal RS' corresponding to the first optical signal MS to the pixel array 140.

[0019] The signal controller 130 can generate control signals MIXA, MIXB, ROW, SW, and VRAMP for controlling the pixel array 140 and the signal converter 150. Referring to Figure 1 , the signal controller 130 can include a phase signal generator 132, a control signal generator 134, and a ramp signal generator 136.

[0020] The phase signal generator 132 can generate a first phase signal MIXA and a second phase signal MIXB having different phases. For example, the first phase signal MIXA and the second phase signal MIXB can have a phase difference of, for example, about 180 degrees, but other phase differences can be used. The first phase signal MIXA and the second phase signal MIXB can have the same period as the first optical signal MS, and one of the first phase signal MIXA and the second phase signal MIXB can have the same phase as the phase of the first optical signal MS, and the other have a phase difference of about 180 degrees (see Figure 4 ).

[0021] The control signal generator 134 can generate a plurality of row signals ROW for controlling the pixel array 140 on a row basis. For example, the control signal generator 134 can generate a first row signal for controlling pixels arranged in a first row of the pixel array 140 and generate an nth row signal for controlling pixels arranged in an nth row of the pixel array 140 (where 'n' is a natural number greater than 2). In addition, the control signal generator 134 can generate a switching signal SW for initializing the signal converter 150.

[0022] The ramp signal generator 136 can generate a ramp signal VRAMP and transmit the ramp signal VRAMP to the signal converter 150. The ramp signal VRAMP can include a signal having a voltage level that rises at a predetermined slope between a low voltage level and a high voltage level.

[0023] The pixel array 140 can generate a plurality of pixel signals VPX based on the third optical signal RS', the first phase signal MIXA and the second phase signal MIXB, and the row signal ROW. The pixel array 140 can include at least one unit pixel 142 for measuring a distance to the object 200 (for example, shown in Figure 2 In one embodiment, the unit pixel 142 can be selected based on the row signal ROW, and the unit pixel 142 can generate pixel signals VPX such as a first pixel signal VPX_A and a second pixel signal VPX_B based on the first phase signal MIXA and the second phase signal MIXB (one having the same phase as the first optical signal MS, and the other having a predetermined phase difference such as 180 degrees from the first optical signal MS) and the third optical signal RS' (having a different phase from the first optical signal MS). The structure of the unit pixel 142 will be described in more detail with reference to Figure 2 .

[0024] The signal converter 150 can generate a distance information signal DOUT indicating the distance to the object 200 based on the pixel signal VPX. For example, the signal converter 150 can perform analog-to-digital (A / D) conversion on the first pixel signal VPX_A and the second pixel signal VPX_B to generate a digital signal and generate the distance information signal DOUT by processing the obtained digital signal.

[0025] Figure 2 Examples include Figure 1 The circuit diagram of a unit pixel 142 in the pixel array 140 shown. (Refer to...) Figure 2 The unit pixel 142 may include the first pixel TAPA and the second pixel TAPB.

[0026] The first pixel TAPA can be used to generate the first pixel signal VPX_A based on the reset signal RX, the transfer signal TX, the selection signal SX, and the first phase signal MIXA. The reset signal RX, the transfer signal TX, and the selection signal SX can be signals included in the previously described row signal ROW. (See reference...) Figure 2 The first pixel TAPA may include a first sensing circuit P1, a first reset circuit RT1, a first transfer circuit TT1, a first charge storage circuit C1, a first driving circuit DT1, and a first selection circuit ST1.

[0027] A first sensing circuit P1 may be connected between a first node N1 and a low-voltage terminal. The first sensing circuit P1 may generate a first charge corresponding to a third optical signal RS' in response to a first phase signal MIXA. In one embodiment, the first sensing circuit P1 may include a photodiode that receives the third optical signal RS' and converts it into a first digital signal related to the first charge, and (in response to the first phase signal MIXA) provides the first digital signal to the first node N1.

[0028] A first reset circuit RT1 can be connected between a high-voltage terminal and a first node N1. The first reset circuit RT1 can reset the first sensing circuit P1 and the first charge storage circuit C1 in response to a reset signal RX. In one embodiment, the first reset circuit RT1 may include an NMOS transistor.

[0029] The first transfer circuit TT1 can be coupled between the first node N1 and the first floating diffusion node FD1. The first transfer circuit TT1 can reset the first charge storage circuit C1 in response to a transfer signal TX, and transfer a first charge generated from the first sensing circuit P1 to the first charge storage circuit C1. According to one embodiment of the present application, the first transfer circuit TT1 can reset the first charge storage circuit C1 in response to the transfer signal TX in a readout interval of the first pixel TAPA. In one embodiment, the first transfer circuit TT1 can include an NMOS transistor.

[0030] The first charge storage circuit C1 can be coupled between the first floating diffusion node FD1 and a low voltage terminal. As described above, the first charge storage circuit C1 can be reset by the first transfer circuit TT1 in a readout interval of the first pixel TAPA. In one embodiment, the first charge storage circuit C1 can include a capacitor and / or a parasitic capacitor added between the first floating diffusion node FD1 and the low voltage terminal.

[0031] The first drive circuit DT1 can be coupled between a high voltage terminal and the first selection circuit ST1. The first drive circuit DT1 can drive the first column line COL1 with a high voltage provided through the high voltage terminal based on a voltage applied to the first floating diffusion node FD1. In one embodiment, the first drive circuit DT1 can include an NMOS transistor.

[0032] The first selection circuit ST1 can be coupled between the first drive circuit DT1 and the first column line COL1. The first selection circuit ST1 can selectively couple the first drive circuit DT1 to the first column line COL1 in response to a selection signal SX. In one embodiment, the first selection circuit ST1 can include an NMOS transistor.

[0033] The second pixel TAPB can generate a second pixel signal VPX_B based on a reset signal RX, a transfer signal TX, a selection signal SX, and a second phase signal MIXB. Referring to Figure 2 , the second pixel TAPB can include a second sensing circuit P2, a second reset circuit RT2, a second transfer circuit TT2, a second charge storage circuit C2, and a second drive circuit DT2, and a second selection circuit ST2.

[0034] A second sensing circuit P2 can be coupled between the second node N2 and a low voltage terminal (which can be, but is not necessarily, a low voltage terminal of TAPA). The second sensing circuit P2 can generate a second charge corresponding to the third optical signal RS' in response to the second phase signal MIXB. In one embodiment, the second sensing circuit P2 can include a photodiode that receives the third optical signal RS' and converts the third optical signal RS' to a second digital signal related to the second charge, and (in response to the second phase signal MIXB) provides the second digital signal to the second node N2.

[0035] A second reset circuit RT2 can be coupled between a high voltage terminal (which can be, but is not necessarily, a high voltage terminal of TAPA) and the second node N2. The second reset circuit RT2 can reset the second sensing circuit P2 and the second charge storage circuit C2 in response to a reset signal RX. In one embodiment, the second reset circuit RT2 can include an NMOS transistor.

[0036] A second transfer circuit TT2 can be coupled between the second node N2 and a second floating diffusion node FD2. The second transfer circuit TT2 can reset the second charge storage circuit C2 and transfer the second charge generated from the second sensing circuit P2 to the second charge storage circuit C2 in response to a transfer signal TX. According to one embodiment of the present application, the second transfer circuit TT2 can reset the second charge storage circuit C2 in response to the transfer signal TX in the readout interval of the second pixel TAPB. In one embodiment, the second transfer circuit TT2 can include an NMOS transistor.

[0037] The second charge storage circuit C2 can be coupled between the second floating diffusion node FD2 and the low voltage terminal. As described above, the second charge storage circuit C2 can be reset by the second transfer circuit TT2 in the readout interval of the second pixel TAPB. In one embodiment, the second charge storage circuit C2 can include a capacitor and / or a parasitic capacitor added between the second floating diffusion node FD2 and the low voltage terminal.

[0038] The second drive circuit DT2 can be coupled between the high voltage terminal and a second selection circuit ST2. The second drive circuit DT2 can drive the second column line COL2 with a high voltage provided through the high voltage terminal based on a voltage applied to the second floating diffusion node FD2. In one embodiment, the second drive circuit DT2 can include an NMOS transistor.

[0039] A second selection circuit ST2 can be coupled between the second driving circuit DT2 and the second column line COL2. The second selection circuit ST2 can selectively couple the second driving circuit DT2 to the second column line COL2 in response to a selection signal SX. In one embodiment, the second selection circuit ST2 can include an NMOS transistor.

[0040] Figure 3 is illustrated Figure 1 a block diagram of an example of the signal converter 150.

[0041] The signal converter 150 can generate the first and second count signals CNT1 and CNT2 corresponding to the voltage level difference between the first and second pixel signals VPX_A and VPX_B and the ramp signal VRAMP. Since the signal converter 150 can have the same structure to process the first and second pixel signals VPX_A and VPX_B, the first and second count signals CNT1 and CNT2 can have the same value. Figure 3 Only the structure to process one of the first and second pixel signals VPX_A and VPX_B is illustrated.

[0042] Referring to Figure 3 , the signal converter 150 can include first and second input units (first and second input circuits) C3 and C4 (e.g., a capacitance circuit that can include a capacitor), first and second switch units (first and second switch circuits) SW1 and SW2 (e.g., a switch circuit that can include a transistor-controlled switch), a comparison unit 310 (e.g., a comparator), and a count unit 320 (e.g., a counter). In one embodiment, the signal converter 150 can include a structure such as a logic operation unit (e.g., a logic circuit) that calculates the first and second count signals CNT1 and CNT2 and outputs the difference between the count values CNT1 and CNT2 as the distance information signal DOUT.

[0043] The first input unit C3 can generate an input signal VIN_A or VIN_B by receiving the first or second pixel signal VPX_A or VPX_B. For example, the first input unit C3 can include a capacitor that samples the first or second pixel signal VPX_A or VPX_B to generate the input signal VIN_A or VIN_B.

[0044] The second input unit C4 can generate a reference signal VREF by receiving the ramp signal VRAMP. For example, the second input unit C4 can include a capacitor that samples the ramp signal VRAMP to generate the reference signal VREF.

[0045] The comparison unit 310 can compare the input signal VIN_A (or VIN_B) with the reference signal VREF to output a comparison signal VOUTP_A (or VOUTP_B). The comparison unit 310 can maintain the comparison signal VOUTP_A (or VOUTP_B) at a logic high level (or a logic low level) until the voltage level of the reference signal VREF becomes the same as the input signal VIN_A (or VIN_B).

[0046] The first and second switching units SW1 and SW2 can be coupled between the input and output nodes of the comparison unit 310. The first and second switching units SW1 and SW2 can selectively couple the input and output nodes of the comparison unit 310 in response to a switching signal SW. The first and second switching units SW1 and SW2 can be turned on to couple the input node to the output node of the comparison unit 310 when the switching signal SW transitions between a logic low level and a logic high level.

[0047] The counting unit 320 can count the clock signal CLK in response to the comparison signal VOUTP_A (or VOUTP_B) and output a count signal CNT1 (or CNT2). The counting unit 320 can output the count signal CNT1 (or CNT2) having a count value corresponding to an interval in which the logic level of the comparison signal VOUTP_A or VOUTP_B is maintained.

[0048] Figure 4 is illustrated Figure 1 a timing diagram illustrating an operation of the image sensing device 100.

[0049] Referring to Figure 4 The first and second pixels TAPA and TAPB can perform a reset operation during a reset interval RESET in response to a reset signal RX and a transfer signal TX. In one embodiment, when the reset signal RX is activated, the first sensing circuit P1 of the first pixel TAPA and the second sensing circuit P2 of the second pixel TAPB can be reset. In addition, the first and second charge storage circuits C1 and C2 of the first and second pixels TAPA and TAPB can be reset in response to activation of the reset signal RX and the transfer signal TX.

[0050] Subsequently, during the exposure interval EXPOSURE, the first pixel TAPA and the second pixel TAPB can generate, transfer and store the first and second charges based on the third optical signal RS', the transfer signal TX and the first and second phase signals MIXA and MIXB, respectively. In one embodiment, the first sensing circuit P1 can generate the first charge based on the third optical signal RS' and the first phase signal MIXA. The first charge storage circuit C1 can store the first charge when the first transfer circuit TT1 of the first pixel TAPA transfers the first charge in response to the transfer signal TX. Similarly, the second sensing circuit P2 can generate the second charge based on the third optical signal RS' and the second phase signal MIXB. The second charge storage circuit C2 can store the second charge when the second transfer circuit TT2 of the second pixel TAPB transfers the second charge in response to the transfer signal TX. In this case, the first and second phase signals MIXA and MIXB can have a phase difference of, for example, about 180 degrees.

[0051] During the time readout interval READOUT (shown in FIG. 1) of the first and second pixels TAPA and TAPB, the reset signal RX and the select signal SX can be activated to a logic high level. The first and second pixels TAPA and TAPB can read out the first and second pixel signals VPX_A and VPX_B corresponding to the first and second charges stored in the first and second charge storage circuits C1 and C2 in response to the select signal SX. Figure 4

[0052] Similarly, in one embodiment, in the second pixel TAPB, the second selection circuit ST2 can electrically couple the second drive circuit DT2 and the second column line COL2 in response to the activation of the select signal SX. The second drive circuit DT2 can read out the second pixel signal VPX_B by driving the second column line COL2 at a high voltage according to a voltage applied to the second floating diffusion node FD2.

[0053] Similarly, in one embodiment, in the second pixel TAPB, the second selection circuit ST2 can electrically couple the second drive circuit DT2 and the second column line COL2 in response to the activation of the select signal SX. The second drive circuit DT2 can read out the second pixel signal VPX_B by driving the second column line COL2 at a high voltage according to a voltage applied to the second floating diffusion node FD2.

[0054] According to one embodiment of the present disclosure, the switch signal SW can be toggled between a logic low level and a logic high level at the beginning of the time readout interval READOUT. The control signal generator 134 of the signal controller 130 can generate the switch signal SW based on the reset signal RX and the select signal SX. The switch signal SW can be activated to a logic high level when the reset signal RX is activated to a logic high level and the select signal SX is activated to a logic low level. Figure 4 ​The select signal SX is activated in the time readout interval READOUT as shown in FIG. 1, and the switch signal SW can transition between a logic low level and a logic high level when the select signal SX is activated.

[0055] The signal converter 150 can be initialized in response to the transition of the switch signal SW from the logic low level to the logic high level. In one embodiment, the first switch unit SW1 and the second switch unit SW2 can be turned on to couple the input node and the output node of the comparison unit 310 in response to the transition of the switch signal SW to the logic high level. The offset voltage between the readout first pixel signal VPX_A and the second pixel signal VPX_B and the ramp signal VRAMP can be stored in the first input unit C3 and the second input unit C4. In one embodiment, the initialization operation of the signal converter 150 can include an auto-zero operation to offset the input offset voltage of the comparison unit 310.

[0056] In one embodiment, the control signal generator 134 of the signal controller 130 can activate the transfer signal TX after the switch signal SW transitions to the logic high level. When the transfer signal TX is activated while the reset signal RX is at the logic high level in the time readout interval READOUT (e.g., as shown in FIG. 1), the first pixel signal VPX_A and the second pixel signal VPX_B are reset. In one embodiment, the first reset circuit RT1 and the second reset circuit RT2 and the first transfer circuit TT1 and the second transfer circuit TT2 can initialize the first charge storage circuit C1 and the second charge storage circuit C2 in response to the activated reset signal RX and the transfer signal TX. Thus, as shown in the lower half of FIG. 1, the first pixel signal VPX_A and the second pixel signal VPX_B (i.e., the input signals VIN_A and VIN_B) can increase by the same amount as the voltage change of the reset (i.e., increase by AVPX_A and AVPX_B). Figure 4 Figure 4

[0057] After the transfer signal TX is activated, the ramp signal generator 136 of the signal controller 130 can generate the ramp signal VRAMP that rises (e.g., gradually rises) from a low voltage to a high voltage. The voltage level of the reference signal VREF can also increase proportionally with the ramp signal VRAMP. In one embodiment, the comparison unit 310 can compare the input signals VIN_A and VIN_B with the reference signal VREF and continuously produce the comparison signals VOUTP_A and VOUTP_B at the logic high level or the logic low level until the voltage level of the reference signal VREF becomes the same as the input signals VIN_A and VIN_B.

[0058] ​​In one embodiment, the counting unit 320 can count the clock signal CLK (shown in the lower half of FIG. 13) from a first time point when the ramp-up of the reference signal VREF starts to a respective second time point when the logic level of the comparison signal VOUTP_A and VOUTP_B changes, and generate a first count signal CNT1 and a second count signal CNT2 corresponding to the voltage changes ΔVPX_A and ΔVPX_B, respectively. Figure 4 The signal converter 150 can process the first count signal CNT1 and the second count signal CNT2 (corresponding to the voltage changes ΔVPX_A and ΔVPX_B) to output a distance information signal DOUT corresponding to the difference between the first charge and the second charge generated in the first pixel TAPA and the second pixel TAPB.

[0059] Figure 5 is a flowchart describing the operation of the image sensing device according to one embodiment of the present application.

[0060] In step S510, the unit pixels of the pixel array 140 can read out the first pixel signal VPX_A and the second pixel signal VPX_B in response to the selection signal SX. In the readout section READOUT, the control signal generator 134 of the signal controller 130 can activate the selection signal SX to the logic high level. When the selection signal SX is activated, the first pixel TAPA and the second pixel TAPB can read out the first pixel signal VPX_A and the second pixel signal VPX_B corresponding to the first charge and the second charge stored in the first charge storage circuit C1 and the second charge storage circuit C2.

[0061] In step S520, the signal converter 150 can set the offset voltage between the readout first pixel signal VPX_A and the second pixel signal VPX_B and the ramp signal VRAMP. After the selection signal SX is activated to the logic high level in the readout section READOUT, the control signal generator 134 can cause the switching signal SW to be switched between the logic low level and the logic high level. In response to the switching of the switching signal SW, the switching units SW1 and SW2 of the signal converter 150 can be connected, and the offset voltage between the readout first pixel signal VPX_A and the second pixel signal VPX_B and the ramp signal VRAMP can be stored in the first input unit C3 and the second input unit C4 of the signal converter 150.

[0062] In step S530, the unit pixel 142 of the pixel array 140 can reset the first pixel signal VPX_A and the second pixel signal VPX_B in response to the transfer signal TX. After the switching signal SW is converted, the control signal generator 134 can activate the transfer signal TX to a logic high level. When the transfer signal TX is activated, the first pixel TAPA and the second pixel TAPB can initialize the first charge storage circuit C1 and the second charge storage circuit C2, and reset the first pixel signal VPX_A and the second pixel signal VPX_B.

[0063] In step S540, the signal converter 150 can generate the distance information signal DOUT corresponding to the difference between the voltage changes AVPX_A and AVPX_B of the reset first pixel signal VPX_A and the second pixel signal VPX_B in response to the ramp signal VRAMP. When the transfer signal TX is activated, the ramp signal generator 136 of the signal controller 130 can increase (e.g., gradually increase) the ramp signal VRAMP from a low voltage to a high voltage.

[0064] The signal converter 150 can generate the first count signal CNT1 corresponding to the voltage change AVPX_A by comparing the rising ramp signal VRAMP with the reset first pixel signal VPX_A. Also, the signal converter 150 can generate the second count signal CNT2 corresponding to the voltage change AVPX_B by comparing the rising ramp signal VRAMP with the reset second pixel signal VPX_B. The signal converter 150 can generate the distance information signal DOUT corresponding to the difference between the voltage changes AVPX_A and AVPX_B by processing the first count signal CNT1 and the second count signal CNT2.

[0065] According to one embodiment of the present application, the image sensing device can set an offset voltage for an analog / digital (A / D) conversion based on a read-out pixel signal, and perform an analog / digital (A / D) conversion operation in a state in which the pixel signal is reset. While the offset voltage is set and the analog / digital conversion is performed, a transistor included in the unit pixel (i.e., a driving transistor) can maintain the same state. Accordingly, noise (e.g., fixed pattern noise) caused by a change in threshold voltage of the transistor of the unit pixel can be removed, and a signal-to-noise ratio of a distance information signal generated from the image sensing device can be improved.

[0066] While the present application has been described with respect to specific embodiments thereof, it will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the application as defined in the following claims.

[0067] Cross Reference to Related Applications

[0068] This application claims priority to Korean Patent Application No. 10-2021-0007819, filed on January 20, 2021, the entire contents of which are incorporated herein by reference.

Claims

1. An image sensing device, the image sensing device comprising: A pixel array comprising unit pixels that transfer and store charge in response to a transfer signal, and read out at least one pixel signal corresponding to the stored charge in response to a selection signal provided to the unit pixels; A signal converter that compares a pixel signal with a ramp signal in response to a switch signal to generate a distance information signal, wherein the ramp signal has a voltage level that rises at a predetermined slope between a low voltage level and a high voltage level. The signal converter includes a comparator and a switching circuit connected between the input and output nodes of the comparator, and sets an offset voltage between the pixel signal and the ramp signal via the switching circuit in response to the switch signal during a readout time interval for reading the pixel signal, thereby canceling the input offset voltage of the comparator. A signal controller generates control signals for controlling the pixel array and the signal converter. The signal controller includes: A ramp signal generator, the ramp signal generator being used to generate the ramp signal and transmit the ramp signal to the signal converter; and A control signal generator is configured to generate a plurality of row signals for controlling the pixel array based on rows, and to generate a switch signal for initializing the signal converter during the time readout interval, and to activate the transfer signal after the switch signal conversion to reset the pixel signal to its initial value. The distance information signal is generated by comparing the voltage level of the rising ramp signal with the corresponding voltages of the first pixel signal and the second pixel signal. The signal converter, in response to the ramp signal, generates a distance information signal corresponding to the difference between the voltage changes of the first pixel signal and the second pixel signal, which have been reset to their respective initial values.

2. The image sensing device according to claim 1, wherein, The signal controller generates the active selection signal during the time readout interval, and When the selection signal is activated, the signal controller switches the switch signal from a first logic level to a second logic level.

3. The image sensing device according to claim 2, wherein, The signal converter includes: A first input circuit receives the pixel signal to generate an input signal; A second input circuit receives the ramp signal to generate a reference signal; The comparator compares the input signal with the reference signal to output a comparison signal; The switching circuit, which selectively connects the input and output nodes of the comparator in response to the switching signal; and A counter that counts the clock signal in response to the comparison signal.

4. The image sensing device according to claim 2, wherein, When the switch signal changes, the signal controller generates an activated transfer signal, and The unit pixel resets the pixel signal in response to the activated transfer signal.

5. The image sensing device according to claim 4, wherein, The unit pixel includes: A charge storage circuit, wherein the charge storage circuit stores the charge; A reset circuit that resets the charge storage circuit in response to a reset signal; A transfer circuit, which transfers the charge to the charge storage circuit in response to the transfer signal; and A selection circuit, in response to the selection signal, generates a pixel signal corresponding to the charge stored in the charge storage circuit.

6. The image sensing device according to claim 5, wherein, The signal controller generates the reset signal that is activated simultaneously with the selection signal during the time readout interval.

7. The image sensing device according to claim 6, wherein, Responding to the activated reset signal and the activated transfer signal, respectively. The reset circuit and the transfer circuit initialize the charge storage circuit.

8. The image sensing device according to claim 4, wherein, The ramp signal gradually rises from a low voltage level to a high voltage level when the transfer signal is activated.

9. The image sensing device according to claim 1, wherein, The unit pixel includes: A first pixel, which generates a first charge in response to an optical signal and a first phase signal, and generates a first pixel signal corresponding to the first charge in response to the selection signal; and The second pixel generates a second charge in response to the optical signal and the second phase signal, and generates a second pixel signal corresponding to the second charge in response to the selection signal.

10. The image sensing device according to claim 9, wherein, The signal converter includes: A first signal converter generates a first counting signal corresponding to a first voltage level difference between the first pixel signal and the ramp signal; A second signal converter generates a second counting signal corresponding to a second voltage level difference between the second pixel signal and the ramp signal; and A logic circuit that processes the first counting signal and the second counting signal to generate a count value and outputs the difference between the count values ​​as the distance information signal.

11. The image sensing device according to claim 9, wherein, The first phase signal and the second phase signal have a phase difference of 180 degrees.

12. A method for operating an image sensing device, the method comprising the steps of: In response to the selection signal, the first pixel signal and the second pixel signal, which correspond to the first charge and the second charge stored in the unit pixel, are read out respectively; In response to a switch signal, an offset voltage is set between the read first pixel signal and the second pixel signal and a ramp signal, wherein the ramp signal has a voltage level that rises at a predetermined slope between a low voltage level and a high voltage level, the offset voltage is stored through a switch circuit of the signal converter to cancel the input offset voltage of the comparator of the signal converter, and the switch circuit is connected between the input node and the output node of the comparator. After the switch signal transition, the first pixel signal and the second pixel signal are reset to their initial values ​​in response to the transfer signal; and The voltage level of the rising ramp signal is compared with the corresponding voltages of the reset first pixel signal and the reset second pixel signal, thereby generating a distance information signal in response to the ramp signal that corresponds to the voltage change difference between the reset first pixel signal and the reset second pixel signal, which are reset to their respective initial values.

13. The method according to claim 12, wherein, The selection signal is activated during the readout interval when the first pixel signal and the second pixel signal are read out, and When the selection signal is activated, the switch signal switches from a first logic level to a second logic level.

14. The method according to claim 13, wherein, After the switch signal is switched, the transfer signal is activated.

15. The method according to claim 14, wherein, When the transfer signal is activated, the ramp signal gradually rises from a low voltage to a high voltage.

16. The method according to claim 12, wherein, The steps for generating the distance information signal include the following: Compare the ramp signal with the reset first pixel signal to generate a first counting signal corresponding to a first voltage change in the reset first pixel signal; Compare the ramp signal with the reset second pixel signal to generate a second counting signal corresponding to a second voltage change in the reset second pixel signal; and The first counting signal and the second counting signal are processed to generate the distance information signal.

17. A method for operating an image sensing apparatus having a pixel array comprising unit pixels, the unit pixels comprising a first pixel and a second pixel, the method comprising the following steps: A first charge is stored in the first pixel based on the output of a first photodiode, the first charge being a) based on a reflected signal returning from an object to the image sensing device, and b) generated in response to a first phase signal that is in phase with an optical signal output from the image sensing device; A second charge is stored in the second pixel based on the output of the second photodiode, the second charge being a) based on the reflected signal and b) generated in response to a second phase signal having a phase difference with the optical signal output from the image sensing device; Read the first pixel signal corresponding to the first charge from the first pixel; Read the second pixel signal corresponding to the second charge from the second pixel; An offset voltage is set between the read first pixel signal and the second pixel signal and the ramp signal in response to a switch signal, wherein the ramp signal has a voltage level that rises at a predetermined slope between a low voltage level and a high voltage level, the offset voltage is stored by a switch circuit of the signal converter to cancel the input offset voltage of the comparator of the signal converter, and the switch circuit is connected between the input node and the output node of the comparator. After the switch signal transition, the first pixel signal and the second pixel signal are reset to their initial values ​​in response to the transfer signal; and The corresponding voltages of the first pixel signal and the second pixel signal are compared with the voltage level of the ramp signal to generate a distance information signal in response to the ramp signal, corresponding to the voltage change difference between the reset first pixel signal and the reset second pixel signal, which are reset to their respective initial values.

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