Self-assembled monolayers as sacrificial capping layers

Abstract

A substrate processing method is disclosed that includes providing a substrate including a metal surface and a dielectric material surface, selectively forming a sacrificial capping layer including a self-assembled monolayer on the metal surface, removing the sacrificial capping layer to restore the metal surface, and processing the restored metal surface and the dielectric material surface. The sacrificial capping layer can be used to prevent metal diffusion into the dielectric material and to prevent oxidation and contamination of the metal surface while waiting for further processing of the substrate.

Description

[0001] Cross Reference to Related Applications

[0002] This application claims priority to U.S. Provisional Patent Application No. 62 / 946,243, filed December 10, 2019, entitled “Self-Assembled Monolayers as Sacrificial Capping Layers”; the disclosure of which is expressly incorporated by reference herein in its entirety. TECHNICAL FIELD

[0003] The present invention relates to semiconductor processing and semiconductor processing systems, and more particularly, to a method for forming a self-assembled monolayer as a sacrificial capping layer to protect an exposed material during semiconductor processing. BACKGROUND

[0004] Many metals readily diffuse into dielectric materials under thermal and / or electrical stress, resulting in dielectric failure. In semiconductor devices, copper (Cu) metal is used as an interconnect conductor to provide low resistance within the device. To prevent metal diffusion, the Cu metal deposited in a recessed feature is surrounded by one or more diffusion barrier layers on the sides and bottom of the recessed feature. The Cu metal fill of the recessed feature is typically followed by a chemical mechanical polishing (CMP) process to remove excess Cu metal and planarize the Cu metal in the recessed feature relative to the adjacent dielectric material. After the CMP process, a capping layer can be deposited on the planarized Cu metal. Ta / TaN or CoWP capping layers have been used, but the process of selectively depositing a metal capping layer on the Cu metal and subsequently removing the metal capping layer is problematic and can impact the reliability of the Cu metal interconnect. In addition, dielectric capping layers and dielectric etch stop layers (e.g., SiN, SiC, SiCN, and SiCO) have been used, but they are difficult to selectively deposit on the Cu metal surface. SUMMARY

[0005] A substrate processing method is described that selectively deposits a sacrificial capping layer on a metal surface to prevent metal diffusion into a dielectric material and to prevent oxidation and contamination of the metal surface while the substrate is awaiting further processing. The sacrificial capping layer can then be removed to provide a clean metal surface for further processing of the substrate.

[0006] According to one embodiment, a substrate processing method includes providing a substrate including a metal surface and a dielectric material surface, selectively forming a sacrificial capping layer including a self-assembled monolayer on the metal surface, removing the sacrificial capping layer to restore the metal surface, and processing the restored metal surface and the dielectric material surface.

[0007] Forming the sacrificial capping layer selectively on the metal surface can include dispensing a chemical solution on the substrate while rotating the substrate, the chemical solution can include a compound including a carbon group, a bonding group coupled to the carbon group, a terminal group coupled to the carbon group opposite the bonding group, and a solvent solution, and annealing the substrate after dispensing the chemical solution on the substrate. BRIEF DESCRIPTION OF DRAWINGS

[0008] A more complete understanding of embodiments of the application and the many attendant advantages thereof will become apparent from the following detailed description read in connection with the accompanying drawings, wherein:

[0009] Figure 1 is an illustration of a representative embodiment of a spin-on processing system, including a cross-sectional illustration of a coating module of the spin-on processing system;

[0010] Figure 2 is an illustration of a representative embodiment of a set of self-assembled monolayers; and

[0011] Figures 3A-3D shows a schematic cross-sectional view of a method of processing a substrate according to one embodiment of the application. DETAILED DESCRIPTION

[0012] A substrate processing method is described. The substrate can include any material group or structure of a device, particularly a semiconductor or other electronic device, and can be, for example, a base substrate structure, such as a semiconductor substrate, or a layer, such as a thin film, on or overlying the base substrate structure. Thus, the substrate is not intended to be limited to any particular base structure, underlying or overlying layers, whether patterned or unpatterned, but is contemplated to include any such layers or base structures, as well as any combination of layers and / or base structures. The following description can refer to a particular type of substrate, but this is for illustrative purposes only and not for purposes of limitation. The substrate can include a circular substrate (wafer) having a diameter of at least 150 mm, 200 mm, 300 mm, or 450 mm.

[0013] Figure 1A spin-on processing system 100 is depicted for dispensing chemicals onto a substrate 102 using a coating module 104 that is in fluid communication with a liquid delivery system 106 that can dispense one or more types of liquid chemicals. The system 100 can also include a gas delivery system 108 that can provide a gas to the coating module 104 that can be removed via an exhaust system 110. A liquid exhaust (not shown) can also be incorporated into the exhaust system to remove liquids from the coating module 104. The system 100 can also include an anneal module 112 that can bake or apply optical radiation to the substrate 102 after the chemicals are dispensed. A controller 114 can be used to control the components of the system 100 using an electrical communication network that can send or receive computer executable instructions or electrical signals between the components of the system 100. The controller 114 can include one or more computer processors 116 and memory 118 that can store computer executable instructions that can be executed by the computer processors or other logic / processing devices. The controller 114 can store a processing component 136 that can include a recipe or process condition recipe that can be implemented by controlling or directing the components of the system 100 to achieve certain conditions within the coating module 104 and / or the anneal module 112. Communication between the components can be achieved through processing and electrical communication techniques known to those of ordinary skill in the art as shown by the dashed lines 120.

[0014] The computer processors 116 can include one or more processing cores and be configured to access and execute computer-readable instructions stored (at least partially) in one or more memories. The one or more computer processors 116 can include, without limitation: a central processing unit (CPU), a digital signal processor (DSP), a reduced instruction set computer (RISC), a complex instruction set computer (CISC), a microprocessor, a microcontroller, a field programmable gate array (FPGA), or any combination thereof. The computer processors 116 can also include one or more chipsets (not shown) for controlling communication between the components of the system 100. In certain embodiments, the computer processors can be based on Intel TM Architecture or ARM TM Architecture, and the one or more processors and chipsets can be from the Intel TM family of processors and chipsets. The one or more computer processors can also include one or more application specific integrated circuits (ASICs) or application specific standard products (ASSPs) for processing specific data processing functions or tasks.

[0015] The memory 118 can include one or more non-transitory computer-readable storage media ("CRSM"). In some embodiments, the one or more memories can include a non-transitory medium such as random access memory ("RAM"), flash RAM, magnetic media, optical media, solid-state media, and the like. The one or more memories can be volatile (where information is retained for only as long as power is provided) or non-volatile (where information is retained when power is turned off). Still further embodiments can also be provided, for example, as a computer program product including a non-transitory machine-readable medium (in compressed or uncompressed form). Examples of machine-readable

[0016] Figure 1 A representative illustration 122 of one embodiment of a coating module 104 that can dispense chemicals onto the substrate 102 is also included. The system 100 can be used to dispense one or more liquid chemicals that can be distributed across the substrate 102 in a rotating substrate 102, a translating substrate 102, or a rotating or translating position of the liquid dispenser. The liquid dispensers 124, 126 can be positioned above the substrate 102 and can be moved back and forth above the substrate 102 or adjacent to the substrate in any position using a positioning mechanism 128. In Figure 1 In embodiments of the system 100, the positioning mechanism 128 can move forward and backward in a horizontal and / or vertical plane as indicated by the arrows adjacent to the positioning mechanism 128. The positioning mechanism 128 can also rotate about a vertical axis 130 of the positioning mechanism 128. The positioning mechanism 128 can dispense chemicals at discrete positions around the substrate 102, or the chemicals can be dispensed as the positioning mechanism 128 moves across the substrate 102. The chemicals can be disposed onto the substrate in a continuous or discontinuous manner. The chemicals can be dispensed one at a time in several passes across the substrate 102, or the chemicals can be dispensed at the same position but at different times.

[0017] The substrate 102 can be secured to a rotary chuck 132 that supports the substrate 102 and can rotate the substrate 102 during chemical dispensing. The substrate 102 can be rotated about a rotational axis 134 at speeds up to 2200 revolutions per minute (rpm). Chemical dispensing can occur before, during, and / or after the substrate 102 is started rotating.

[0018] Substrate 102 can be treated in anneal module 112 before or after chemical dispensing, which can heat substrate 102 to remove moisture from substrate 102 before chemical dispensing or to treat a film deposited on substrate 102 by coating module 104. Anneal module 112 can include, but is not limited to, a resistive heating element (not shown) that transfers heat to substrate 102 via conduction. In another embodiment, anneal module 112 can include a radiation source (not shown) that exposes substrate 102 to radiation. The radiation source can include, but is not limited to, an ultraviolet light (UV) source (not shown). Anneal module 112 can also heat substrate 102 via convection by receiving heated gas from gas delivery system 108. Anneal module 112 can also treat substrate 102 with a gas that is relatively inert with respect to substrate 102 or a deposited film to prevent chemical reactions with ambient or surrounding environments (e.g., oxygen, moisture, etc.). These gases can also be used to remove gases or fluids that outgas from a deposited film during an anneal treatment. Outgassed chemicals can be removed by exhaust system 110, which removes gases from anneal module 112.

[0019] Figure 2 is an illustration of a representative embodiment of a set of self-assembled monolayers (SAMs) 200 that can be formed on substrate 102. SAMs are widely known as surface modifiers and adhesion layers. Figure 2 SAM 200 shown in FIG. 1 is intended to explain components of SAM 200 for illustrative purposes. In application, SAM 200 can be used with a plurality of SAMs 200 that arrange themselves on substrate 102 in a systematic manner. In brief, the plurality of SAMs 200 can form a three-dimensional crystalline or semi-crystalline structure on a surface of substrate 102. SAM 200 can have a thickness of less than 1 nm. SAM 200 can include a compound that includes a terminal group 202, a chain group 204, and a bonding group 206. These groups can form building blocks of SAM 200, and interactions between these groups and substrate 102 can form a three-dimensional structure. Molecular self-assembly can spontaneously form highly ordered, low-dimensional structures on substrate 102 or an overlying film (not shown) due to a combination of van der Waals interactions, hydrophobic interactions, and / or molecule-substrate interactions.

[0020] Broadly, bonding group 206 can couple or chemisorb onto substrate 102. Bonding group 206 can chemically attract to substrate 102 or a film or layer on substrate 102, such as a metal layer. However, terminal group 202 and chain group 204 can not couple or chemisorb onto substrate 102, or at least not in the same manner as bonding group 206. Chain group 204 and terminal group 202 can be attracted to each other, as well as to bonding group 206, as described below. Figure 2The SAM 200 can appear to be standing up as a result of this selective assembly, with the bonding groups 206 fixed to the substrate 102 and the terminal groups 202 and chain groups 206 tethered to the substrate 102 via the bonding groups 206.

[0021] The SAM 200 can be used for various applications, and the composition of these groups or building blocks can vary depending on the desired structure and type of substrate 102. According to one embodiment, the bonding groups 206 can be any reactive element that can bond or chemically react with a desired layer of material on the substrate 102 (e.g., a metal layer) and weakly bond to a different material (e.g., a dielectric material). In the case of a metal layer, the bonding groups 206 can include a thiol, silane, or phosphonate in some instances. The chain groups 204 can include a chain of carbon elements that can be linked or bonded together. While Figure 2 A set of SAMs 200 is shown, but the chain groups 204 can bond with adjacent chain groups that can form larger SAM structures (not shown). The chain groups 204 can include C x H y molecules that can bond together to form a three-dimensional structure of the SAM 200 across the surface of the substrate 102. The terminal groups 202 can assemble over the chain groups 204 and can be selected based on the application of the SAM 200. Examples of the SAM 200 include, but are not limited to, 1-octadecanethiol (CH3(CH2) 16 CH2SH), perfluorodecyltrichlorosilane (CF3(CF2)7CH2CH2SiCl3), perfluorodecanethiol (CF3(CF2)7CH2CH2SH), chlorodecyl dimethyl silane (CH3(CH2)8CH2Si(CH3)2Cl), and t-butyl(chloro)dimethylsilane ((CH3)3CSi(Cl)(CH3)2).

[0022] According to one embodiment, the substrate 102 has metal wiring formed in a dielectric material, where the metal wiring is at least partially exposed. Some embodiments of the present invention describe a method for selectively forming a sacrificial capping layer comprising a self-assembled monolayer on a metal surface, which can be used to prevent diffusion of the metal into the dielectric material and to prevent oxidation of the exposed metal surface, thereby allowing the substrate 102 to be processed without being constrained by Q-time. Here, the term "Q-time" refers to a time limit set with respect to a time period after the substrate 102 is subjected to, for example, dry etching, in order to prevent oxidation of the exposed metal wiring by dry etching before the substrate 102 is subjected to further processing. When Q-time is set, it is necessary to manage time in order to comply with the Q-time. Therefore, there is a risk that productivity can decrease due to an increase in processing time. Furthermore, when the set Q-time is short, production line management becomes difficult. There is also a concern that productivity can decrease due to the complexity of production line management.

[0023] Figures 3A-3D A method using a self-assembled monolayer as a sacrificial capping layer according to one embodiment of the present invention is schematically illustrated. In Figure 3A In a schematic cross-sectional view in FIG. 3, a substrate 3 is patterned and includes a recessed feature in a dielectric material 300, where the recessed feature includes a barrier / liner layer 302 surrounding a metal 304 on sidewalls and a bottom of the recessed feature. The substrate 3 includes an exposed metal surface 303 and an exposed dielectric material surface 301. In one example, the metal surface 303 can include a metal selected from the group consisting of Cu, Al, Ta, Ti, W, Ru, Co, Ni, and Mo. In one example, the dielectric material surface includes silicon. In another example, the dielectric material surface includes SiO2or a low-k material.

[0024] The exemplary substrate 3 is planarized, where the metal surface 303 and the dielectric material surface 301 are in the same level. Planarization can utilize a CMP process, followed by a cleaning process to remove any impurities and oxidation from the surface of the substrate 3. In some examples, the substrate 3 can include a Cu metal surface 303 and a SiO2or low-k surface 301. In one example, a wet cleaning process using an aqueous citric acid solution can be used to remove oxidized Cu metal from the Cu metal surface 303. In another example, the cleaning process can include a dry cleaning process.

[0025] Following the cleaning process, the time between the cleaning process and further processing of the substrate 3 needs to be very short to prevent Cu metal from diffusing along the top of the substrate 3 from Cu metal 304 to the dielectric material 300, and to prevent the Cu metal surface 303 from oxidizing due to exposure to an oxygen-containing background gas. In one example, further processing may include selectively depositing a dielectric film on the dielectric material surface 301 by vapor phase exposure, wherein a clean, unoxidized Cu metal surface 303 is required to achieve the desired deposition selectivity between the dielectric material surface 301 and the Cu metal surface 303. Selective deposition of a dielectric film on the dielectric material surface 301 can be used to form a fully self-aligned via (FSAV) above the Cu metal surface 303.

[0026] like Figure 3B As schematically illustrated, the method further includes selectively forming a sacrificial capping layer 306 comprising a self-assembled monolayer on an exposed metal surface 303 relative to the dielectric material surface 301. This can be used... Figure 1 The spin coating system 100 described herein forms a sacrificial capping layer 306. A chemical solution containing SAM chemicals (e.g., 1-octadecylthiol) can be dispensed onto the substrate 3 via the coating module 104. The chemical solution may further contain a solvent, such as an organic solvent. The amount of chemical solution dispensed should be such that at least a majority of the substrate 3 is covered by the chemical solution. In one example, the concentration of SAM chemicals in the chemical solution may be about 5 mM or lower. During the application of the chemical solution, the substrate 3 may be rotated, for example, at a rotational speed between about 800 rpm and about 2200 rpm.

[0027] The bonding groups of the SAM chemicals contain reactive elements (e.g., thiol groups) that can bond or chemically react with the exposed metal surface 303 of the metal 304, while weakly interacting only with the dielectric surface 301 of the dielectric material 300. Subsequently, a rinsing solution (e.g., isopropanol (IPA)) can be dispensed onto the substrate 3 via the coating module 104 to remove any excess chemical solution from the substrate 3, including any weakly bonded SAM chemicals from the dielectric surface 301 of the dielectric material 300.

[0028] Thereafter, the substrate 3 can be removed from the coating module 104 to an annealing module 112, which can include resistive heating elements or a source of radiation (e.g., UV light). In the annealing module 112, the substrate 3 can be annealed at a temperature below the desorption temperature and the degradation temperature of the SAM on the exposed metal surface 303. In one example, using the SAM chemical 1-octadecanethiol, the substrate 3 can be annealed at a temperature below 160 °C (degradation temperature) for a period of about 5 minutes or less. In other embodiments, the substrate 3 can be removed from the system 100 and annealed in a separate tool (e.g., a bake oven, furnace, etc.). The annealing can enable or improve the self-assembly of the SAM chemical components on the substrate 3 to form the sacrificial capping layer 306 on the exposed metal surface 303 of the metal 304. Thereafter, the substrate 3 can be transferred to the coating module 104 for additional rinsing, followed by soft baking in the annealing module 112. The soft baking can be performed at a temperature below 160 °C. This series of steps selectively forms the ordered sacrificial capping layer 306 on the exposed metal surface 303 while the dielectric material surface 301 remains at least substantially free of the SAM chemical.

[0029] The properties of the sacrificial capping layer 306 can include one or more of the following properties: a thickness in the range of one monolayer, a uniform thickness distribution across the metal surface 303 of the substrate 3, and a uniform water contact angle suitable for the terminal group of the SAM. The sacrificial capping layer 306 protects the metal surface 303 from adverse effects, such as oxidation and diffusion of metal from the metal 304 into the dielectric material 300, thereby removing the need to set a Q-time. Since there is no need to set a Q-time, there is no need for time management to comply with the Q-time, preventing the complication of production line management due to compliance with the Q-time, thereby improving the productivity of device manufacturing.

[0030] After the sacrificial capping layer 306 is selectively formed on the metal surface 303, the substrate 3 can be placed in a hold pattern and stored before the sacrificial capping layer 306 is removed from the substrate 3 and the substrate 3 is further processed.

[0031] According to another embodiment, the sacrificial capping layer 306 can be formed on the exposed metal surface 303 by exposing the substrate 3 to a reactive gas including a compound capable of forming a self-aligned monolayer (e.g., 1-octadecanethiol). The reactive gas can further include an inert gas.

[0032] In one example, the substrate 3 can be transferred to the annealing module 112 and annealed at a temperature such that the sacrificial capping layer 306 desorbs from the substrate 3 to restore the metal surface 303 and the dielectric material surface 301 prior to further processing. The resulting substrate 3 is in a state ready for further processing. Figure 3CThe diagram is schematically shown. In another example, the substrate 3 can be transferred to another processing system or platform where the sacrificial capping layer 306 can be removed. Alternatively, the sacrificial capping layer 306 can be removed using gaseous exposure to plasma-excited H2 gas and optional substrate heating. In addition to removing the sacrificial capping layer 306, gaseous exposure to plasma-excited H2 gas can further clean the dielectric material surface 101 without damaging the dielectric material surface 101.

[0033] According to some embodiments of the invention, the metal surface and the restored metal surface are clean and have not been chemically modified. In one instance, the metal surface and the restored metal surface are not oxidized.

[0034] In one example, further processing may include a deposition process that includes selectively depositing a dielectric layer 308 (e.g., SiO2) on the exposed dielectric material surface 301 in a zone-selective deposition (ASD) process. This in Figure 3D The diagram is shown schematically. In one example, the selective deposition includes...

[0035] A metal-containing catalyst layer is adsorbed on the surface of a dielectric material, and

[0036] In the absence of any oxidizing and hydrolyzing agents, the substrate is exposed to a process gas containing silanol gas at a substrate temperature of approximately 150°C or lower to selectively deposit a SiO2 film on the dielectric material surface relative to the metal surface. The metal-containing catalyst layer may, for example, include aluminum (Al) or titanium (Ti). In one example, the metal-containing catalyst layer can be formed by exposing the substrate to AlMe3 gas. In one example, the silanol gas is selected from the group consisting of tris(tert-pentoxy)silanol, tris(tert-butoxy)silanol, and bis(tert-butoxy)(isopropoxy)silanol.

[0037] Several embodiments for forming a self-assembled monolayer as a sacrificial capping layer to protect exposed materials during semiconductor processing have been described. For illustrative and descriptive purposes, the foregoing description of embodiments of the invention has been presented. It is not intended to be exhaustive or to limit the invention to the exact forms disclosed. This specification and the appended claims include terms used for descriptive purposes only and should not be construed as limiting. Those skilled in the art will understand that many modifications and variations are possible in light of the above teachings. Therefore, it is intended that the scope of the invention be limited not by this specific embodiment, but by the appended claims.

Claims

1. A method for processing a substrate, comprising: Provides a substrate comprising a metal surface and a dielectric material surface; A sacrificial capping layer comprising a self-assembled monolayer is selectively formed on the metal surface, wherein the sacrificial capping layer prevents oxidation and contamination of the metal surface while awaiting further processing of the substrate; Remove the sacrificial coating to restore the metal surface; and After the sacrificial capping layer is removed, a dielectric film is selectively deposited on the dielectric material surface relative to the restored metal surface.

2. The method as described in claim 1, wherein, The metal surface and the restored metal surface were not chemically modified.

3. The method as described in claim 1, wherein, The metal surface and the restored metal surface were not oxidized.

4. The method of claim 1, wherein, Selectively forming the sacrificial capping layer on the metal surface includes: The substrate is exposed to a reactive gas comprising a compound containing a carbon group, a bonded group coupled to the carbon group, a terminal group coupled to the carbon group opposite the bonded group, and an inert gas.

5. The method of claim 1, wherein, Selectively forming the sacrificial capping layer on the metal surface includes: While the substrate is being rotated, a chemical solution is dispensed onto the substrate. This chemical solution comprises a compound containing a carbon group, a bonding group coupled to the carbon group, a terminal group opposite the bonding group and coupled to the carbon group, and a solvent solution; and The substrate is annealed after the chemical solution is applied to it.

6. The method of claim 5, further comprising: Before annealing the substrate, a rinsing solution is applied to the substrate to remove the chemical solution from the surface of the dielectric material.

7. The method of claim 5, further comprising: The oxidized metal is removed from the metal surface before the sacrificial coating is selectively formed.

8. The method of claim 5, wherein, The bonding group includes thiols, silanes, or phosphonates.

9. The method of claim 5, wherein, This compound includes 1-octadecyl mercaptan (CH3(CH2)). 16 CH2SH), perfluorodecyltrichlorosilane (CF3(CF2)7CH2CH2SiCl3), perfluorodecylthiol (CF3(CF2)7CH2CH2SH), chlorodecyldimethylsilane (CH3(CH2)8CH2Si(CH3)2Cl) or tert-butyl(chloro)dimethylsilane ((CH3)3CSi(Cl)(CH3)2)).

10. The method of claim 1, wherein, The metal surface comprises metals selected from the group consisting of Cu, Al, Ta, Ti, W, Ru, Co, Ni, and Mo.

11. The method of claim 1, wherein, Removing the sacrificial capping layer includes annealing the substrate at a temperature that causes the sacrificial capping layer to desorb from the substrate.

12. The method of claim 1, wherein, The surface of the dielectric material includes SiO2 or low-k materials.

13. The method of claim 1, further comprising: The oxidized metal is removed from the metal surface before the sacrificial coating is selectively formed.

14. A method for processing a substrate, comprising: Provides a substrate comprising a metal surface and a dielectric material surface; A sacrificial capping layer comprising a self-assembled monolayer is selectively formed on the metal surface, wherein the sacrificial capping layer prevents oxidation and contamination of the metal surface while awaiting further processing of the substrate; Remove the sacrificial coating to restore the metal surface; as well as After removing the sacrificial capping layer, a dielectric film is selectively deposited on the surface of the dielectric material by vapor phase exposure, including: adsorbing a metal-containing catalyst layer on the surface of the dielectric material; In the absence of any oxidizing and hydrolyzing agents, the substrate is exposed to a process gas containing silanol gas at a substrate temperature of approximately 150°C or lower to selectively deposit a SiO2 film on the dielectric material surface relative to the restored metal surface.

15. The method of claim 14, wherein, The silanol gas is selected from the group consisting of tris(tert-pentoxy)silanol, tris(tert-butoxy)silanol, and bis(tert-butoxy)(isopropoxy)silanol.

16. The method of claim 14, wherein, Selectively forming the sacrificial capping layer on the metal surface includes: While the substrate is being rotated, a chemical solution is dispensed onto the substrate. This chemical solution comprises a compound containing a carbon group, a bonding group coupled to the carbon group, a terminal group opposite the bonding group and coupled to the carbon group, and a solvent solution; and The substrate is annealed after the chemical solution is applied to it.

17. The method of claim 16, wherein, The bonding group includes thiols, silanes, or phosphonates.

18. The method of claim 14, wherein, The metal surface comprises metals selected from the group consisting of Cu, Al, Ta, Ti, W, Ru, Co, Ni, and Mo.

19. A method for processing a substrate, the method comprising: A substrate comprising a metal surface and a dielectric material surface is provided, wherein the metal surface is not oxidized; A sacrificial capping layer comprising a self-assembled monolayer is selectively formed on the metal surface, wherein the sacrificial capping layer prevents oxidation of the metal surface; Remove the sacrificial coating to restore the metal surface; as well as After removing the sacrificial capping layer, a dielectric film is selectively deposited on the surface of the dielectric material by vapor phase exposure.

20. The method of claim 19, wherein, Selectively forming the sacrificial capping layer on the metal surface includes: While rotating the substrate, a chemical solution is dispensed onto the substrate. The chemical solution comprises a compound containing a carbon group, a bonded group coupled to the carbon group, a terminal group coupled to the carbon group opposite the bonded group, and a solvent solution, wherein the bonded group includes thiols, silanes, or phosphonates. A rinsing solution is dispensed onto the substrate to remove the chemical solution from the surface of the dielectric material; and The substrate is annealed after the rinsing solution is applied to it.

21. The method of claim 19, wherein, This compound includes 1-octadecyl mercaptan (CH3(CH2)). 16 CH2SH), perfluorodecyltrichlorosilane (CF3(CF2)7CH2CH2SiCl3), perfluorodecylthiol (CF3(CF2)7CH2CH2SH), chlorodecyldimethylsilane (CH3(CH2)8CH2Si(CH3)2Cl) or tert-butyl(chloro)dimethylsilane ((CH3)3CSi(Cl)(CH3)2)).

22. The method of claim 19, wherein, Selectively forming the sacrificial capping layer on the metal surface includes: The substrate is exposed to a reactive gas comprising a compound containing a carbon group, a bonded group coupled to the carbon group, a terminal group coupled to the carbon group opposite the bonded group, and an inert gas.

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