Repairing deployed deep neural networks for autonomous machine applications

By introducing patch neural networks (PNNs) into autonomous or semi-autonomous vehicles to temporarily address the failure modes of DNNs, and combining this with a fusion mechanism to evaluate the output, the problem of prolonged downtime caused by failure modes after DNN deployment is solved, enabling rapid and effective fault repair and improving system reliability and user experience.

CN114841336BActive Publication Date: 2026-03-27NVIDIA CORP
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-01-27
Publication Date
2026-03-27

AI Technical Summary

Technical Problem

In existing technologies, when deep neural networks (DNNs) are deployed in autonomous or semi-autonomous vehicles and discover fault modes, they require a long period of retraining and verification, resulting in long system downtime and high costs. Furthermore, new fault modes that may not have been discovered during training may still exist, affecting user experience and trust.

Method used

A patch neural network (PNN) is used to temporarily resolve the failure modes of the DNN. The PNN is trained to generate new signals or patch the output of the DNN, while the parameters of the DNN are frozen. A fusion mechanism is used to evaluate the outputs of the DNN and PNN, reducing system downtime. The system is then pushed to consumer vehicles via OTA for verification and training.

Benefits of technology

It reduces DNN downtime, improves the efficiency of failure mode resolution, meets consumers' expectations for fast turnaround time, enhances system reliability and accuracy, and complies with regulatory and OEM testing requirements.

✦ Generated by Eureka AI based on patent content.

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Abstract

Deep neural networks related to patching deployment for autonomous machine applications. In various examples, rapid resolution of a deep neural network (DNN) failure mode can be achieved by deploying a patch neural network (PNN) trained to operate effectively on the failure mode of the DNN. The PNN can operate on the same or additional data as the DNN and can generate new signals that resolve the failure mode of the DNN in addition to those signals generated using the DNN. A fusion mechanism can be employed to determine which output to rely on for a given instance of the DNN / PNN combination. Thus, failure modes of the DNN can be resolved in a timely manner that requires minimal downtime or shutdown time of the DNN, features controlled using the DNN, and / or semi-autonomous or autonomous functions as a whole.
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Description

BACKGROUND

[0001] Autonomous and semi-autonomous vehicles utilize deep neural networks (DNNs) to assist in performing various tasks while in operation, such as, but not limited to, object detection, classification, and / or tracking, path planning, control decisions, obstacle avoidance, and / or other driving-related tasks. Due to the safety-critical nature of autonomous and semi-autonomous driving operations, these DNNs must be accurate and precise, but must also undergo extensive validation and testing before being deployed in vehicles in operation. For example, in some instances, especially where regulatory and / or original equipment manufacturer (OEM) requirements must be met, training, testing, and validating a DNN can take six months to a year or more. For example, an OEM can require that a retrained DNN not result in a change in behavior of the system observed over, for example, thousands of miles, during testing of the DNN. This lengthy timeline is in direct contrast to the expected turn-around time of a consumer, due to safety considerations involved in the autonomous functionality of a vehicle. For example, a consumer can expect a fault mode to be resolved within hours or days in order to use semi-autonomous or autonomous features therein to comfortably operate the vehicle.

[0002] Conventional approaches address this problem by retraining the DNN using additional training data that includes training data instances corresponding to the fault mode of the DNN. During this retraining and validation period (e.g., six months to a year or more), the DNN can continue to operate with the fault mode still present, or can result in deactivation of the DNN, features controlled using the DNN, and / or semi-autonomous or autonomous functionality as a whole. However, even where these retrained DNNs are put into use, the retrained DNNs can suffer from new or additional fault modes that were not discovered during training, testing, or validation. For example, new fault modes that were not realized during testing, training, and validation can arise during retraining to address discovered fault modes, e.g., due to unforeseen object types or road profiles or pose types, effects of certain weather conditions, etc. Each new fault mode then requires the DNN to be retrained, creating a cascading effect that can result in one or more features of the vehicle being unavailable for an extended period of time, thereby creating a negative user experience and potentially leading to a lack of trust in the product by the consumer. Thus, these revalidation approaches are time-consuming and costly, and are often infeasible for patching fault modes of DNNs deployed in a running environment. SUMMARY

[0003] Embodiments of the present disclosure relate to training and deployment of patches for deep neural networks (DNNs). Systems and methods are disclosed that allow for rapid resolution of DNN failure modes discovered during deployment runs of a DNN. For example, in addition to or as an alternative to retraining, retesting, and revalidating the DNN each time a failure mode is realized, one or more patch neural networks (PNNs) trained to operate effectively on the failure mode of the DNN can be deployed to at least temporarily resolve the failure mode without the DNN, features using the DNN, and / or the semi-autonomous or autonomous functionality as a whole being disabled. Thus, downtime of the DNN or other portions of the system can be significantly reduced when compared to conventional systems. Furthermore, during deployment of the PNN(s), updated versions of the DNN can be trained, tested, and validated before being deployed in vehicles, at which point the particular PNN(s) used to resolve the failure mode of the DNN can no longer be needed.

[0004] The PNNs can operate on the same or additional data as the DNN and can generate new signals in addition to the signals generated using the DNN. For example, in embodiments, the PNNs can be trained to generate outputs that resolve the failure mode of the DNN in addition to computing output types similar or identical to the DNN. A fusion mechanism can be employed to evaluate the outputs of the DNN and PNN and / or to evaluate additional criteria to determine which output to rely on for a given instance of the DNN / PNN combination. During training, the parameters (e.g., weights and biases) of the PNNs can be trained using a combination of the original training data used to train the DNN in addition to new training data selected to resolve the failure mode of the DNN. The parameters of the DNN can be fixed or frozen during training of the DNN such that the original performance of the DNN is maintained while enabling the PNNs to recreate the outputs of the DNN in addition to the new or updated outputs of the PNNs. The introduction of the PNNs can require additional computation due to the additional nodes and / or layers of the PNNs required to process the input data. Thus, the PNNs can undergo pruning during training to remove entire layers and / or nodes of layers to reduce the computational and latency impact of the PNNs on the system.

[0005] In some embodiments, once trained, the PNNs and / or fusion mechanism can be pushed over the air (OTA) to consumer vehicles and executed in a passive or non-active mode, where the code is executed but not actuated or acted upon. Data recorded during such (e.g., passive) mode can be evaluated to validate the performance of the PNNs and / or fusion mechanism or to indicate where additional training is needed. As such, training and validation of the PNN functionality within the system can be accelerated by leveraging the consumer fleet that has already implemented the deployed DNN— thereby increasing the likelihood of meeting the fast turnaround time expectations of consumers in addition to stringent testing and validation standards for the PNNs. BRIEF DESCRIPTION OF DRAWINGS

[0006] The present system and method for training and deploying patches for deep neural networks (DNNs) are described in detail below with reference to the following drawings, wherein:

[0007] Figure 1A is a dataflow diagram illustrating an example process for executing a patch neural network (PNN) in deployment, in accordance with some embodiments of the present disclosure;

[0008] Figure 1B depicts an example deep neural network (DNN) and PNN architecture for processing input data within a process of Figure 1A , in accordance with some embodiments of the present disclosure;

[0009] Figure 1C depicts an example layer implementation for a DNN, PNN, or combination thereof, in accordance with some embodiments of the present disclosure;

[0010] Figures 2A-2B depicts an example architecture for a combined PNN and DNN, in accordance with some embodiments of the present disclosure;

[0011] Figures 3A-3B depicts an example of a DNN and PNN architecture with selective activation of the PNN, in accordance with some embodiments of the present disclosure;

[0012] Figure 4 is a flow diagram illustrating a method for executing a PNN in deployment, in accordance with some embodiments of the present disclosure;

[0013] Figure 5A is an illustration of an example autonomous vehicle, in accordance with some embodiments of the present disclosure;

[0014] Figure 5B is an example of camera locations and fields of view for an example autonomous vehicle for Figure 5A , in accordance with some embodiments of the present disclosure;

[0015] Figure 5C is a block diagram of an example system architecture for an example autonomous vehicle for Figure 5A , in accordance with some embodiments of the present disclosure;

[0016] Figure 5D is a system diagram of communication between a cloud-based server and an example autonomous vehicle for Figure 5A , in accordance with some embodiments of the present disclosure;

[0017] Figure 6 is a block diagram of an example computing device suitable for implementing some embodiments of the present disclosure; and

[0018] Figure 7A block diagram illustrating an example data center suitable for implementing some embodiments of the present disclosure. DETAILED DESCRIPTION

[0019] Systems and methods related to training and deployment of patches for deep neural networks (DNNs) are disclosed. While the present disclosure can be described with respect to an example autonomous vehicle 500 (or, referred to herein as “vehicle 500” or “own vehicle 500,” with respect to Figures 5A-5D The present disclosure is described in terms of its examples) can be used by, but are not limited to, non-autonomous vehicles, semi-autonomous vehicles (e.g., in one or more adaptive driver assistance systems (ADAS)), manned and unmanned robots or robotic platforms, warehouse vehicles, off-road vehicles, vehicles coupled to one or more trailers, dirigibles, ships, shuttles, emergency response vehicles, motorcycles, electric or motorized bicycles, aircraft, construction vehicles, underwater vehicles, drones, and / or other vehicle types. Moreover, while the present disclosure can be described with respect to semi-autonomous or autonomous machine functionality, this is not intended to be limiting, and the systems and methods described herein can be used for augmented reality, virtual reality, mixed reality, robotics, security and surveillance, autonomous or semi-autonomous machine applications, medical imaging applications, language processing applications, smart home applications, deep learning applications, and / or any other technical space that can use neural networks or other types of machine learning models.

[0020] Referring to Figure 1A , Figure 1A is a dataflow diagram illustrating an example process for executing a patched neural network (PNN) 104B in deployment, in accordance with some embodiments of the present disclosure. It should be understood that this and other arrangements described herein are set forth only as examples. Other arrangements and elements (e.g., machines, interfaces, functions, orders, groupings of functions, etc.) can be used in addition to or instead of those shown, and some elements can be wholly omitted or consolidated. Further, many of the elements described herein are functional entities that can be implemented as discrete or distributed components or in conjunction with other components, and in any suitable combination and location. Individual functions described herein as being performed by an entity can be performed by hardware, firmware, and / or software. For instance, individual functions can be implemented by a processor executing instructions stored in memory. In some embodiments, training and / or deployment of a deep neural network (DNN) 104 (e.g., including a PNN 104B and / or a base DNN 104A) can be performed at least in part using example computing devices 600 as described herein with respect to FIG. 6, Figures 5A-5D vehicle 500, Figure 6 example computing device 600, and / or Figure 7similar components, features, and / or functions described with respect to the example data center 700. The DNN 104 can be referred to herein as a combined DNN 104 - e.g., including a combination of the base DNN 104A and the PNN 104B.

[0021] The process 100 can include generating and / or receiving input data 102 from one or more sources - e.g., sensors of a vehicle 500, a robot, a VR, AR, or mixed reality system, a medical imaging device, a microphone of a device for speech processing, and / or another source type. In some embodiments, as a non-limiting example, the input data 102 (alternatively referred to as“sensor data 102”) can be received from one or more sensors of a vehicle (e.g., a vehicle 500 as described herein Figures 5A-5D The sensor data 102 can be used by the vehicle 500, and within the process 100, for performing any number of operations - e.g., object detection, classification, and / or tracking, path planning, control operations, intersection structure detection, road layout determination, mapping and localization, etc. - during training and / or deployment of one or more base DNNs 104A and / or one or more PNNs 104B. During training, the sensor data 102 can be generated using one or more data collection vehicles that generate sensor data used to train DNNs such as the DNN 104, and / or can be pre-generated and included in a training dataset. The sensor data 102 used during training can additionally or alternatively be generated using simulated sensor data (e.g., sensor data generated using one or more virtual sensors of a virtual vehicle in a virtual environment) and / or augmented sensor data (e.g., sensor data generated using one or more data collection vehicles and modified with virtual data, respectively). Once trained and deployed in the vehicle 500, the sensor data 102 can be generated by one or more sensors of the vehicle 500 and processed by the DNN 104 to compute various outputs 106 as described herein.

[0022] In some embodiments, such as during training of PNN 104B, training sensor data can include additional and / or alternative training data compared to training data used to train base DNN 104A to account for causes of one or more failure modes of base DNN 104A that PNN 104B is trained to address. For example, a failure mode of base DNN 104A in a product or system of an end user can be identified, and input data 102 that caused the failure mode can be collected and used to train PNN 104B. In some embodiments, shadowing of base DNN 104A and / or PNN 104B can be used to identify input data instances for which base DNN 104A experienced a failure and / or for which output 106 of PNN 104B was determined to be more reliable or accurate. These identified input data instances corresponding to failure modes of base DNN(s) 104A can also be used to guide collection of additional training input data from one or more data collection vehicles, from a fleet of consumer vehicles, and / or within a simulated environment (e.g., if base DNN(s) 104A have a failure mode with respect to electric scooters, a simulation including electric scooters can be run in order to generate synthetic training data instances for training PNN(s) 104B).

[0023] Accordingly, sensor data 102 can include, but is not limited to, sensor data 102 from any sensor of vehicle 500, including, for example and with reference to Figures 5A-5CRADAR sensor(s) 560, ultrasonic sensor(s) 562, LIDAR sensor(s) 564, stereo camera(s) 568, wide-view camera(s) 570 (e.g., fisheye cameras), infrared camera(s) 572, surround camera(s) 574 (e.g., 360-degree cameras), long and / or mid-range camera(s) 578, microphone(s) 596, IMU sensor 566, GNSS sensor 558, speed sensor 544, and / or other sensor types. As another example, sensor data 102 can include virtual (e.g., simulated or augmented) sensor data generated from any number of sensors of a virtual vehicle or other virtual object in a virtual (e.g., test) environment. In such examples, the virtual sensors can correspond to a virtual vehicle or other virtual object in a simulated environment (e.g., for testing, training, and / or validating DNN performance), and the virtual sensor data can represent sensor data captured by the virtual sensors within the simulated or virtual environment. Thus, by using virtual sensor data, the DNN(s) 104 described herein can be tested, trained, and / or validated using simulated or augmented data in a simulated environment, which can allow for testing of more extreme scenarios outside of real-world environments, where such testing can be less safe.

[0024] In some embodiments, sensor data 102 can include image data representing image(s), image data representing video (e.g., a snapshot of a video), and / or sensor data representing a representation of a sensor’s sensory field (e.g., a depth map of a LIDAR sensor, a value map of an ultrasonic sensor, etc.). Where sensor data 102 includes image data, any type of image data format can be used, such as, for example and without limitation, compressed images such as Joint Photographic Experts Group (JPEG) or luminance / chrominance (YUV) formats, compressed images as frames sourced from a compressed video format such as H.264 / Advanced Video Coding (AVC) or H.265 / High Efficiency Video Coding (HEVC), raw images and / or other formats such as sourced from a red clear blue (RCCB), red clear color (RCCC), or other type of imaging sensor. Further, in some examples, sensor data 102 can be used within process 100 without any pre-processing (e.g., in raw or captured format), while in other examples, sensor data 102 can undergo pre-processing (e.g., noise balancing, demosaicing, scaling, cropping, enhancement, white balancing, tone curve adjustment, etc., such as using a sensor data pre-processor (not shown)). As used herein, sensor data 102 can refer to unprocessed sensor data, pre-processed sensor data, or a combination thereof.

[0025] Input data 102 used to train the base DNN(s) 104A and / or PNN(s) 104B can include raw input data (e.g., as captured by one or more image sensors), downsampled input data, upsampled input data, cropped or region of interest (ROI) input data, otherwise enhanced input data, and / or combinations thereof. The DNN(s) 104 can be trained using the input data 102, along with corresponding ground truth data, using one or more loss functions until the DNN(s) 104 converge to an acceptable or optimal level of accuracy.

[0026] In embodiments where the DNN(s) 104 (e.g., the base DNN(s) 104A and / or the PNN(s) 104B) are implemented outside of the vehicle 500, the input data 102 can include any type of data that the DNNs can be capable of processing. For example, the input data 102 can include audio data (e.g., a spectrogram), image data, textual data, location data, sensor data (e.g., from LiDAR sensors, RADAR sensors, etc.), and / or other data types that can be represented in an appropriate format (e.g., as an input vector or tensor) for processing by the DNNs.

[0027] The input data 102 can be applied to one or more DNNs 104, which can include a base DNN 104A and a PNN 104B. For example, the base DNN 104A can include an original or previously trained DNN that has one or more failure modes after deployment or in run-time. For example, for object detection, a failure mode can occur in which the base DNN 104A is trained to identify vulnerable road users (VRUs). In such an example, it can be determined once deployed that the base DNN 104A is not accurate enough when confronted with a VRU that includes a person on a scooter (e.g., an electric scooter). Thus, the PNN 104B can be trained as a specialized electric scooter detector. As another example, such as with respect to a particular road segment that the vehicle 500 has difficulty traversing based on the output of the base DNN 104A, the PNN 104B can be trained to handle that particular road segment and / or road segments similar to that particular road segment. Thus, when an existing signal 112 is received from a map or navigation system (e.g., indicating that the vehicle 600 is at or is approaching the road segment), the output of the PNN 104B can be used to explain the cause of the inaccuracy or failure mode of the base DNN 104A. As a further example, with respect to object classification, the base DNN 104A trained as a vehicle classifier can have difficulty accurately classifying a new car model, such as a truck that emerges in the future. In this example, the PNN 104B can be trained to accurately classify the new car model.

[0028] While examples are described herein with respect to using neural networks as the DNN 104, this is not intended to be limiting. For example, and without limitation, the DNN(s) 104 described herein can include any type of machine learning model, such as machine learning model(s) that use linear regression, logistic regression, decision trees, support vector machines (SVMs), Naive Bayes, k-nearest neighbors (Knn), K-means clustering, random forests, dimensionality reduction algorithms, gradient boosting algorithms, neural networks (e.g., autoencoders, convolutional, recurrent, perceptron, long / short term memory (LSTM), Hopfield, Boltzmann, deep belief, deconvolutional, generative adversarial, liquid machines, etc.), and / or other types of machine learning models. The PNN 104B can include the same type of DNN as the base DNN 104A, or can include a different type of DNN.

[0029] The base DNN 104A can be trained, tested, and validated on the training dataset, and once validated, it is deployed for vehicle 500. Once a fault mode is identified, a PNN 104B can be trained to cure or explain the cause of the fault mode of the base DNN 104A through training. This training, in various embodiments, uses some or all of the training data from the training dataset used to train the base DNN 104A, along with additional or alternative training data generated or retrieved to explain the cause of the fault mode of the base DNN 104A. During the training of the PNN 104B, the parameters of the base DNN 104A (e.g., weights and biases) can be fixed so that the base DNN 104A remains unchanged from its previous validated state. Furthermore, the connections between the outputs of the nodes of the PNN 104B and the inputs of the nodes of the base DNN 104A can be fixed or set to 0, such that the base DNN 104A does not process the outputs of the layers or nodes of the PNN 104B. Conversely, the parameters associated with the connections between the outputs of the nodes of the base DNN 104A and the inputs of the nodes of the PNN 104B can be trained so that the PNN 104B processes the outputs of the nodes or layers of the base DNN 104A in addition to processing the nodes or layers of the PNN 104B.

[0030] For example, such as Figure 1B As shown, input data 102 can be applied to layers 126 of both the base DNN 104A and PNN 104B (e.g., input layers 126A-1 and 126B-1), and the output of layer 126A of the base DNN 104A can be passed to the input of subsequent layers 126A and the input of subsequent layers 126B of the PNN 104B, while the output of layer 126B of the PNN 104B can only be passed to the input of subsequent layers 126B of the PNN 104B. Figure 1B A magnified illustration of the DNN / PNN combination in Figure 2AIn such examples, the integrity of the base DNN 104A can be maintained while the PNN 104B can only address failure modes of the base DNN 104A. In embodiments, the PNN 104B can predict each of the outputs 106A of the base DNN 104A and / or additional or alternative outputs 106B compared to the outputs of the base DNN 104A. For example, where the base DNN 104A is trained to compute confidence values for the vehicle class and the bicyclist class, the PNN 104B can be trained to compute confidence values for the vehicle class, the bicyclist class, and an additional class of the PNN 104B, such as the e-scooter class. Thus, where the fusion mechanism 108 indicates that the outputs 106B of the PNN 104B are to be used for a given iteration or time step, the outputs 106B can include the outputs of the base DNN 104A and the outputs of the PNN 104B. In such examples, the additional, modified, or alternative outputs of the PNN 104B should be relied upon, but in instances where the fusion mechanism 108 indicates a reliance on an erroneous output for a given iteration or time step, by including instances of the outputs of the base DNN 104A in the outputs 106B of the PNN 104B, the fused outputs 114 can still be accurate (e.g., if the fusion mechanism 108 correctly selected the base DNN 104A for a given iteration, the fused outputs 114 can still reflect the outputs 106A of the base DNN 104A). Thus, the PNN 104B can be trained to perform as a better (failure mode compensated) version of the base DNN 104A that can only be implemented for failure modes of the base DNN 104A due to testing and validation requirements of regulatory agencies and / or OEMs until an updated base DNN 104A undergoes a full revalidation process.

[0031] However, in some embodiments, the PNN 104B can be trained to compute unique outputs 106B relative to the outputs 106A of the base DNN 104A. Further, in embodiments such as those described herein with respect to Figure 2B and 3A In embodiments such as those described herein with respect to

[0032] Although Figure 1B , 2AThe illustrations of FIGS. 2B and 3A-3B include layers 126B of the PNN 104B corresponding to each layer 126A of the base DNN 104A, but this is not intended to be limiting. For example, each layer 126A of the base DNN 104A can not have a corresponding layer 126B in the PNN 104B. Thus, one or more initial layers 126A of the base DNN 104A can not include a corresponding layer 126B of the PNN 104B, and the PNN layers 126B can begin at some point along the sequence of layers 126A of the base DNN 104A. As a non-limiting example, it can be determined that a feature extractor layer 126A of the base DNN 104A (e.g., a layer 126A of the base DNN 104A that computes a feature map) does not need a corresponding layer 126B of the PNN 104B to accurately compute the output 106B of the PNN 104B. Thus, a layer 126B of the PNN 104B can not be included until after the feature extractor layer 126A of the base DNN 104A. Once the PNN layer is introduced, each subsequent layer of the combined base DNN / PNN network can include both a PNN layer 126B and a base DNN layer 126A.

[0033] Referring to Figure 1C , Figure 1C Various layer implementations of the base DNN 104A and the PNN 104B are shown. Figure 1C Each illustration in FIGS. 1-3 corresponds to a single layer, which can be an input layer, an output layer, or a layer between an input layer and an output layer. For example, the base DNN implementation 120 shows an implementation of a single layer 126A of the base DNN 104A (e.g., having weights W) that receives an input (e.g., a vector or tensor) X (124A) (e.g., an input corresponding to the input data 102 to an input layer 126A of the base DNN 104A or an input from a previous layer 126A of the base DNN 104A) and computes an output (e.g., a vector or tensor) Y (128A). The weights W (and / or other parameters) of this layer 126A can have been previously trained before the base DNN 104A is deployed in the vehicle 500.

[0034] DNN implementation 122A (e.g., combined base DNN / PNN implementation) illustrates an implementation of a single layer 126A of base DNN 104A, e.g., with weights W, that receives input X (124A) and computes output Y (128A), and a single layer 126B of PNN 104B, e.g., with weights W’, that receives input X (124A) and input X’ (124B) and computes output Y’ (128B). Thus, two separate vectors or tensors can be executed through a matrix multiplication operation. In some examples, such as where layer 126B of PNN 104B corresponds to a first or input layer of base DNN 104A, the X’ input can include additional input data 102 in addition to that provided as input to base DNN 104A. For example, input data 102 of base DNN 104A can include an image, and input data 102 of PNN 104B can include the image and / or another input type, such as another image, a signal from a different sensor (e.g., a speed sensor, a position sensor, etc.), and / or another input data type. In other examples, such as where layer 126B of PNN 104B corresponds to a layer other than the input or first layer of base DNN 104A, the X’ input can correspond to the Y’ output of a previous layer 126B of PNN 104B. For example, once a first PNN layer 126B is introduced, the first PNN layer 126B can output a different output Y’ than base DNN layer 126A, and thus a subsequent PNN layer 126B can receive the Y’ output as the X’ input. Thus, in addition to input X’, PNN layer 126B can also receive input X that base DNN layer 126A receives.

[0035] DNN implementation 122A (e.g., combined base DNN / PNN implementation) includes adding respective additional layers 126B to existing layers 126A. PNN 104B using separate layers similar to the separate layers of implementation 122A can be relatively small and can receive inputs of X and X’ in series as well as output Y’. During a training process, only patch layers 126B can be trained.

[0036] DNN implementation 122B illustrates an example implementation of a single combined layer 126C (e.g., with weights W, W’ and zeros 132 corresponding to connections between outputs of nodes or values of PNN 104B and inputs to nodes or values of base DNN 104A) that includes an expanded layer that considers both layers 126A of base DNN 104A and 126B of PNN 104B. Thus, combined layer 126 can receive concatenated inputs (e.g., vectors or tensors) 124A and 124B representing X and X’ and can output concatenated outputs (e.g., vectors or tensors) 128A and 128B representing Y and Y’. Zeros 132 can increase the dimensionality of original layer 126A of base DNN 104A to match the dimensionality of the concatenated input of X and X’ and can represent weights for connections between the additional input X’ and the original output Y. Thus, a single vector or tensor matrix multiplication operation can be performed, but the result can be the same as using DNN implementation 122A.

[0037] During training, only a subset of weights W’ corresponding to PNN 104B can be trained. To keep the original output Y unchanged, all connections between the additional input X’ and the original output Y are removed (e.g., the weights on those connections are set and kept to zero).

[0038] Implementations 122A and 122B can be equivalent in terms of the resulting DNN functionality. Furthermore, because W’ can be the same in both implementations, a simple translation between the two versions can be implemented. For example, first implementation 122A can be used to train weights W’ and second implementation 122B can be used to deploy DNN(s) 104. An advantage of implementation 122A is that X inputs for all layers can be pre-computed using the original base DNN 104A and only PNN 104B can be considered during training - e.g., because layers 126B are separate from layers 126A of base DNN 104A. This can increase the training process of PNN 104B, but can require additional storage and bandwidth. Furthermore, because the layers are separate, optimization of the layers can be less effective, resulting in potentially slower inference than when implementation 122B is employed. Advantages of second implementation 122B include compatibility with optimization tools (e.g., NVIDIA’s TensorRT optimization tool). For example, because no new or additional layers are added - e.g., only existing layers are expanded - there are fewer optimization issues with model inference. A disadvantage of implementation 122B is the requirement to store zero-valued weights (e.g., a minimal increase in model size) and the entire DNN including combined PNN nodes and base DNN nodes needs to be used to train PNN 104B (which can be overcome by training weights W’ using implementation 122A and translating them to implementation 122B).

[0039] In any example, once the PNN 104B is trained, one or more pruning operations can be performed to remove layers or nodes of the PNN 104B that are not needed in computing the accurate output 106B. For example, low-level feature extractor layers can not need to be patched, and thus a PNN layer 126B corresponding to the low-level feature extractor layers 126A of the base DNN 104A can be pruned - or nodes thereof can be pruned to reduce the size of the layer 126B. Thus, during training, outputs before and after various pruning operations can be compared to determine a tradeoff of size and accuracy of the PNN 104B.

[0040] In some examples, two or more PNNs 104B can be trained to patch the base DNN 104A. For example, after a first PNN 104B is deployed, additional failure modes can arise, and another or alternative PNN 104B can be trained for the additional and / or previous failure modes. In some embodiments, the second PNN 104B can include the patch of the first PNN 104B in addition to a patch for the new failure mode - to avoid a stack of PNNs 104B. For example, the second PNN 104B can be trained to patch the failure mode of the existing PNN 104B deployed in the vehicle 500 as well as another failure mode, such that the existing PNN 104B can be removed and the new or updated PNN 104B can replace the existing PNN 104B to address both failure modes. Although in embodiments, two or more PNNs 104B can be deployed to patch a single base DNN 104A. In some embodiments, once a new or updated PNN 104B is deployed, the fusion mechanism 108 can need to be updated. For example, a new or updated gating NN 110 can be trained to account for the new or updated PNN 104B.

[0041] Referring again to Figure 1AThe fusion mechanism 108 can use the outputs 106 (e.g., the outputs 106A from the base DNN 104A and the outputs 106B from the PNN 104B) to determine the fused output 114. For example, the fusion mechanism 108 can use values from the outputs 106A and 106B (e.g., confidence values corresponding to object types in the case where the DNN 104 is an object classification DNN), outputs from one or more gating NNs 110, and / or existing signals 112 (e.g., corresponding to geographic, weather, lighting, or other information) to determine which of the outputs 106A or 106B to rely on for a given iteration. The fusion mechanism 108 can be a rule-based (e.g., unlearned) decision mechanism, a learned decision mechanism, or a combination thereof. The selection of the fusion mechanism (e.g., confidence from the outputs of the base DNN 104A and the PNN 104B, existing signals 112, or gating NNs 110) can be based on the type of failure mode for which the base DNN 104A the PNN 104B is trained. In the case where gating NNs 110 are used, the gating NNs 110 can be trained to detect failure modes or scenarios. The gating NNs 110 can have access to the input data 102 for the base DNN 104A and / or the PNN 104B, and in some embodiments, the internal state (not shown) of the DNN 104. For example, the gating NNs 110 can be trained as a classifier with data from a new failure mode scenario as well as the original data to distinguish between the two data types. Due to the simplicity of the gating NNs 110 (e.g., trained only to detect a particular data type), the gating NNs 110 can be implemented as small networks that can be trained quickly with high performance on only a small amount of training data.

[0042] For example, where PNN 104B is trained for location-based faults (e.g., inability to handle a particular intersection, exit ramp, road, etc.), existing signals 112 can be used. For example, GNSS data can be used to indicate when vehicle 500 is approaching or located at a location for which PNN 104B is trained to patch. As another example, a vehicle detector can fail to detect a new model or prototype vehicle due to its unique or uncommon shape. In this type of example, fusion mechanism 108 can use the confidence of the outputs from base DNN 104A and PNN 104B and / or can use a gating NN 110 that analyzes input data 102 (e.g., in embodiments, the same input data 102 as base DNN 104A and / or PNN 104B) and outputs a binary output indicating which output to use. For example, where PNN 104B has a high confidence for the vehicle type and base DNN 104A has a low confidence for each of its classes, the output of PNN 104B can be relied upon. As another example, gating NN 110 can be trained to output a value of “1” when a future vehicle is detected, such that the output of PNN 104B can be relied upon as the fusion output 114 for a given iteration.

[0043] Thus, different fault types can require different patching strategies - including the type of PNN 104B and the fusion mechanism 108 used with it. Some non-limiting example use cases of PNN 104B relative to autonomous or semi-autonomous driving can include adding a new feature, patching a particular road segment, or improving an existing feature. For example, to add a new feature, base DNN 104A can be deployed before e-scooters become popular. E-scooter drivers can be considered vulnerable road users (VRUs), and it can be determined that base DNN 104A, trained to recognize or detect VRUs, fails to detect e-scooter riders as VRUs. In this example, PNN 104B can be trained as a specialized e-scooter detector, and fusion mechanism 108 can be a concatenation with other VRU detectors (e.g., pedestrians, cyclists, etc.) of base DNN 104A.

[0044] With respect to patching a particular road segment, the base DNN 104A deployed to help with lane keeping or path planning through roads and / or intersections can develop a failure mode at a particular road segment or road or intersection - e.g., due to poor road markings, unique intersection design, etc. - where the vehicle 500 can not be able to properly keep its lane while traversing the travel surface. In this example, the PNN 104B can be trained and validated for lane keeping in the particular road segment where the base DNN 104A struggles. In such an example, the fusion mechanism 108 can include GNSS signals, localization to a high definition (HD) map (e.g., using sensor data from sensors of the vehicle 500), and / or a specialized landmark detector trained for the particular road segment or intersection. Thus, when a signal is received indicating that the vehicle 500 is in the road segment corresponding to the PNN 104B, the output 106B of the PNN 104B can be used.

[0045] In the case where an existing feature is to be improved, such as a vehicle detector, the base DNN 104A can be inaccurate in predicting a particular type of vehicle (e.g., a new model or design). In such an example, training a specialized PNN 104B for new car detection can not work, as the appearance of the new vehicle model can be too close to similar models, and forcing the PNN 104B to differentiate can be challenging. Also, simply concatenating the outputs as in the example of adding a new feature can not be feasible, as the PNN 104B’s positive false rate can not be validated if the base DNN 104A is not fully revalidated. As a result, both the output 106A of the base DNN 104A and the output 106B of the PNN 104B can be used to make a decision, as neither the PNN 104B’s positive false rate nor the confidence output can be individually sufficient to reach a required safety level. However, the combination of the two outputs 106 can reach a suitable safety level - e.g., a positive false in the final output signal can only occur if the fusion mechanism 108 fails and the PNN 104B has a positive false.

[0046] Referring to Figure 2B , it is shown Figure 1B and Figure 2Aalternative architecture for the underlying DNN / PNN combination. In such examples, the nodes of the PNN 104B can be added to the inputs of the existing nodes of the underlying DNN 104A. The PNN 104B can thus not need to generate its own output, as the PNN 104B can learn to correct the existing DNN output for the failure mode. When the PNN 104B is turned off, the underlying DNN 104A can behave just as it did before the patch. However, because both the underlying DNN output 106A and the PNN output 106B are not computed at each iteration, in cases where both outputs are needed, the inference run can need to be run twice to retrieve both outputs for analysis—this increases computation and increases latency.

[0047] Referring to Figures 3A-3B , Figures 3A-3B An example of a DNN and PNN architecture with selective activation of the PNN is depicted. For example, relative to Figure 3A , the fusion mechanism 108 can determine whether to turn on or activate the nodes of the PNN 104B based on the existing signals 112 and / or the gated NN 110. For example, when the nodes of the PNN 104B are turned off or deactivated, the values of each parameter (e.g., weights and biases) of the nodes of the PNN 104B can be clamped to zero. This guarantees that the underlying DNN 104A operates with the same precision as before the PNN 104B was added—bit-precise. Turning on or activating the nodes of the DNN 104B allows the trained parameters of the PNN 104B to operate normally. A benefit of this architecture can be that the PNN 104B, when activated, can influence the decisions of the underlying DNN 104A during the failure mode. Moreover, because the PNN 104B does not need to compute each output of the underlying DNN 104A in addition to the new or alternative output, the PNN 104B can be smaller. However, in a false positive scenario (e.g., where the fusion mechanism 108 incorrectly activates the patch), the result is to use the output of the PNN 104B, which does not include another instance of the original output of the underlying DNN 104A. This can result in less accurate results during the false positive scenario as compared to embodiments that compute separate outputs 106 (e.g., outputs 106A and 106B), such as those in Figure 1B and Figure 3B Although depicted as a single output 106, in embodiments such as those described herein, the underlying DNN / PNN combination can include separate output heads.

[0048] Further, in some embodiments, a soft on / off switch can be used for the PNN 104B. For example, instead of turning on or off the PNN 104B, a gradual transition from no PNN 104B to using the PNN 104B can be applied. This can be achieved by multiplying the output of the patch node with a factor from, for example, 0.0 (no PNN 104B applied) to 1.0 (full PNN 104B applied).

[0049] As another example, and with respect to Figure 3B , the PNN 104B can be separate from the base DNN 104A such that the information processing of the base DNN 104A is invariant from its original state when the PNN 104B is not activated. For example, with respect to Figure 1B , the addition of the PNN 104B affects the information processing of the base DNN 104A. Thus, Figure 3B architecture is similar to that of Figure 1B , but allows for selective activation of the PNN 104B based on the determination of the fusion mechanism 108. As a result, the positive false recognition scenario can still include the redundant output of the base DNN 104A, and the false negative output will result in an output similar to that of the base DNN 104A before the patch. Thus, in the case where the PNN 104B is turned off, the computation can be reduced.

[0050] In some embodiments, PNN 104B and the fusion mechanism 108 can be tested and validated using real-world test data and / or simulated test data - e.g., in a simulated environment. For example, PNN 104B and / or the fusion mechanism 108 can be tested in a re-simulator, NVIDIA’s DriveSIM, and / or in the real world. In some embodiments, once tested and validated outside of a consumer fleet, PNN 104 and / or the fusion mechanism 108 (e.g., the gating NN 110) can be pushed to consumer vehicles over-the-air (OTA) to execute in a passive (non-active) (aka “shadow”) mode. Passive mode can allow the underlying code to execute but not allow the output 106 to actuate on it. Thus, while the consumer fleet continues to run, large-scale testing can be performed in a short amount of time. The occurrences of the fusion mechanism 108 deciding to switch to PNN 104B and / or the occurrences of the outputs of the underlying DNN 104A and PNN 104B not being consistent can be logged and analyzed. The switch to PNN 104B can be used to verify that the fusion mechanism is working correctly and that PNN 104B is correctly fixing the failure modes of the underlying DNN 104A. The inconsistency logging can be used to verify that PNN 104B is running correctly under normal conditions - e.g., in the event that PNN 104B can be selected incorrectly, the output 106B of PNN 104B should still accurately reflect those of the output 106A of the underlying DNN 104A.

[0051] In addition to implementing the underlying DNN 104A, to also implement PNN 104B and the fusion mechanism 108, the required computation of PNN 104B and the fusion mechanism 108 can be pre-allocated - e.g., upon initial deployment of the underlying DNN 104A, sufficient buffer space can be left unused in the vehicle 500 to support PNN 104B and the fusion mechanism 108. With respect to PNN 104B, this can mean that the maximum number of weights and nodes that can be used for a combined PNN 104B can be pre-determined. Thus, this pre-allocated amount can be factored into the design decisions of PNN 104B. For the pre-allocated computation of the fusion mechanism 108, an estimate of the maximum CPU, GPU, DPU, accelerator, and / or other on-chip resources required can be determined. Thus, both the PNN(s) 104B and the fusion mechanism(s) 108 can be added to the computation graph as “dummies” or placeholders to avoid changing the scheduler, as changing can require additional validation work.

[0052] In some embodiments, a patch version control system can be implemented to track the deployed PNN 104B, who requested the PNN 104B, who trained the PNN 104B and when, who validated the PNN 104B and when, who deployed the PNN 104B, when, and to which vehicles, among other examples. Further, at least partially simultaneous with and / or after the training and deployment of the PNN 104B, an updated base DNN 104A can be trained, tested, and validated for pushing to vehicles 500, for example, during the next major DNN release. Thus, the PNN 104B and the fusion mechanism 108 can act as a temporary fix during the training, testing, and validation of the updated base DNN 104A, for example, 6 months to a year in some instances.

[0053] Referring now to Figure 4 Each block of the method 400 described herein comprises a computational process that can be performed using any combination of hardware, firmware, and / or software. For instance, various functions can be carried out by a processor executing instructions stored in memory. The method 400 can also be embodied as computer-usable instructions stored on computer storage media. The method 400 can be provided by a standalone application, a service, or a hosted service (standalone or in combination with other hosted services), or a plug-in to another product, just to name a few. Further, the method 400 is described in the context of the process 100 of Figure 1A the vehicle 500 of Figures 5A-5D However, the method 400 can additionally or alternatively be performed by any one system or any combination of systems, including but not limited to those described herein.

[0054] Figure 4 is a flowchart illustrating a method 400 for performing a PNN 104B in deployment, in accordance with some embodiments of the present application. At block B402, the method 400 includes applying first data to a deep neural network (DNN) and a patch neural network (PNN). For example, the input data 102 can be applied to the base DNN 104A and the PNN 104B.

[0055] At block B404, the method 400 includes processing the first data to compute second data, the processing including: (1) DNN processing the first output of one or more nodes of the DNN; and (2) PNN processing the second output of one or more nodes of the PNN and at least one of the one or more first outputs of the one or more nodes of the DNN. For example, a node of a layer 126A of the base DNN 104A can process outputs of other nodes of the layer 126A of the base DNN 104A, and the PNN 104B can process both the outputs of the nodes of the layer 126A of the base DNN 104A and the outputs of the nodes of the layer 126B of the PNN 104B. Ultimately, the base DNN 104A can compute the output 106A, and the PNN 104B can compute the output 106B. However, in embodiments, the output can be a single combined output that depends on the activation or deactivation of the PNN 104B, as described herein at least with reference to Figure 3A In this way, the base DNN 104A can behave similarly to before the patch, and the PNN 104B can address the failure scenario of the base DNN 104A.

[0056] At block B406, the method 400 includes performing one or more operations based at least in part on the second data. For example, the output 106 can be used to perform one or more operations by the vehicle 500, such as object detection, classification, and / or tracking, path planning, control decisions, obstacle avoidance, etc.

[0057] As a result, the PNN 104B can be implemented with a fast turnaround time to address the failure scenario of the base DNN 104A without requiring full revalidation of the base DNN 104A. This can allow the vehicle 500 or other underlying system to continue running while the updated base DNN 104A is being trained and validated to account for the failure mode. Moreover, because the functionality of the base DNN 104A can remain unchanged when used with the PNN 104B, the risk in safety critical applications, such as autonomous or semi-autonomous driving, can be minimized because the validated base DNN 104A can still be relied upon in all instances that do not correspond to the failure mode.

[0058] Example autonomous vehicle

[0059] Figure 5AA diagram of an example autonomous vehicle 500 in accordance with some embodiments of the present disclosure. Autonomous vehicle 500 (alternatively referred to herein as “vehicle 500”) can include, but is not limited to, a passenger vehicle, such as a car, truck, bus, first responder vehicle, shuttle, electric or motorized bicycle, motorcycle, fire truck, police car, ambulance, boat, construction vehicle, underwater vehicle, drone, vehicle connected to a trailer, and / or another type of vehicle (e.g., unmanned and / or accommodating one or more passengers). Autonomous vehicles are often described in terms of levels of automation defined by a department of the United States Department of Transportation, the National Highway Traffic Safety Administration (NHTSA), and the Society of Automotive Engineers (SAE) in “Taxonomy and Definitions for Terms Related to Driving Automation Systems for On-Road Motor Vehicles” (Standard No. J3016-201806 published June 15, 2018, Standard No. J3016-201609 published September 30, 2016, and previous and future versions of this standard). Vehicle 500 can be capable of implementing functionality consistent with one or more of Levels 3-5 of autonomous driving. For example, depending on the embodiment, vehicle 500 can be capable of conditional automation (Level 3), high automation (Level 4), and / or full automation (Level 5).

[0060] Vehicle 500 can include components such as a chassis, a body, wheels (e.g., 2, 4, 6, 8, 18, etc.), tires, axles, and other components of a vehicle. Vehicle 500 can include a propulsion system 550, such as an internal combustion engine, a hybrid electric power plant, an all-electric motor, and / or another type of propulsion system. Propulsion system 550 can be connected to a drivetrain of vehicle 500, which can include a transmission, in order to effect propulsion of vehicle 500. Propulsion system 550 can be controlled in response to receiving a signal from a throttle / accelerator 552.

[0061] A steering system 554, which can include a steering wheel, can be used to steer vehicle 500 (e.g., along a desired path or route) while propulsion system 550 is operating (e.g., while the vehicle is in motion). Steering system 554 can receive a signal from a steering actuator 556. For full automation (Level 5) functionality, a steering wheel can be optional.

[0062] A braking sensor system 546 can be used to operate vehicle brakes in response to receiving a signal from a brake actuator 548 and / or a brake sensor.

[0063] A vehicle 500 can include one or more system-on-chips (SoCs) 504 Figure 5COne or more controllers 536, including and / or one or more GPUs, may provide signals (e.g., signals representing commands) to one or more components and / or systems of vehicle 500. For example, one or more controllers may send signals to operate vehicle brakes via one or more brake actuators 548, to operate steering system 554 via one or more steering actuators 556, and to operate propulsion system 550 via one or more throttles / accelerators 552. One or more controllers 536 may include one or more onboard (e.g., integrated) computing devices (e.g., supercomputers) that process sensor signals and output operating commands (e.g., signals representing commands) to enable autonomous driving and / or assisted human driving of vehicle 500. One or more controllers 536 may include a first controller 536 for autonomous driving functions, a second controller 536 for functional safety functions, a third controller 536 for artificial intelligence functions (e.g., computer vision), a fourth controller 536 for infotainment functions, a fifth controller 536 for redundancy in emergency situations, and / or other controllers. In some examples, a single controller 536 can handle two or more of the functions described above, and two or more controllers 536 can handle a single function, and / or any combination thereof.

[0064] One or more controllers 536 may provide signals for controlling one or more components and / or systems of vehicle 500 in response to sensor data (e.g., sensor inputs) received from one or more sensors. Sensor data may be received from, for example, but not limited to, a global navigation satellite system sensor 558 (e.g., a Global Positioning System sensor), a RADAR sensor 560, an ultrasonic sensor 562, a LIDAR sensor 564, an inertial measurement unit (IMU) sensor 566 (e.g., an accelerometer, gyroscope, magnetic compass, magnetometer, etc.), a microphone 596, a stereo camera 568, a wide-angle camera 570 (e.g., a fisheye camera), an infrared camera 572, a surround camera 574 (e.g., a 360-degree camera), a long-range and / or medium-range camera 598, a speed sensor 544 (e.g., for measuring the rate of vehicle 500), a vibration sensor 542, a steering sensor 540, a braking sensor (e.g., as part of a braking sensor system 546), and / or other sensor types.

[0065] One or more of the controllers 536 may receive inputs (e.g., represented by input data) from the instrument cluster 532 of the vehicle 500 and provide outputs (e.g., represented by output data, display data, etc.) via a human-machine interface (HMI) display 534, an auditory signaling device, a speaker, and / or via other components of the vehicle 500. These outputs may include information such as vehicle speed, rate, time, map data (e.g., [missing information]). Figure 5Cinformation such as information about objects and object states as perceived by the controller 536, and so on. For example, the HMI display 534 can display information about the presence of one or more objects (e.g., a street sign, a warning sign, a traffic light change, and so on) and / or information about driving maneuvers that the vehicle has made, is making, or will make (e.g., change lanes now, exit 34B in two miles, and so on).

[0066] The vehicle 500 also includes a network interface 524 that can communicate over one or more networks using one or more wireless antennas 526 and / or modems. For example, the network interface 524 can be capable of communicating over LTE, WCDMA, UMTS, GSM, CDMA2000, and so on. The one or more wireless antennas 526 can also enable communication between objects (e.g., vehicles, mobile devices, and so on) in an implementation environment such as one or more local area networks such as Bluetooth, Bluetooth LE, Z-Wave, ZigBee, and so on and / or one or more low power wide area networks (LPWANs) such as LoRaWAN, SigFox, and so on.

[0067] Figure 5B Examples of camera positions and fields of view of an example autonomous vehicle 500 in accordance with some embodiments of the present disclosure. Figure 5A Examples of camera positions and fields of view of an example autonomous vehicle 500 in accordance with some embodiments of the present disclosure.

[0068] Camera types for the cameras can include, but are not limited to, digital cameras that can be suitable for use with components and / or systems of the vehicle 500. The cameras can operate at Automotive Safety Integrity Level (ASIL) B and / or at another ASIL. The camera types can have any image capture rate, such as 60 frames per second (fps), 120 fps, 240 fps, and so on, depending on the embodiment. The cameras can be capable of using a rolling shutter, a global shutter, another type of shutter, or a combination thereof. In some examples, a color filter array can include a red- white-white-white (RCCC) color filter array, a red-white-white-blue (RCCB) color filter array, a red-blue-green-white (RBGC) color filter array, a Foveon X3 color filter array, a Bayer sensor (RGGB) color filter array, a monochrome sensor color filter array, and / or another type of color filter array. In some embodiments, clear pixel cameras such as cameras with a

[0069] In some examples, one or more of the cameras can be used to perform advanced driver assistance system (ADAS) functions (e.g., as part of a redundant or fail-safe design). For example, a multi-function monocular camera can be installed to provide functions including lane departure warning, traffic sign assist, and intelligent headlamp control. One or more of the cameras (e.g., all of the cameras) can simultaneously record and provide image data (e.g., video).

[0070] One or more of the cameras can be mounted in mounting assemblies such as custom designed (3-D printed) assemblies to cut off stray light and reflections from within the car that can interfere with the image data capture capabilities of the cameras (e.g., reflections from the dashboard reflected in the windshield mirror). With regard to wing mirror mounting assemblies, the wing mirror assemblies can be custom 3-D printed such that the camera mounting plates match the shape of the wing mirrors. In some examples, one or more cameras can be integrated into the wing mirrors. For side view cameras, one or more cameras can also be integrated into the four pillars at each corner of the cab.

[0071] Cameras with fields of view that include portions of the environment in front of the vehicle 500 (e.g., front-facing cameras) can be used for surround view to help identify the forward path and obstacles, and to assist in providing information that is critical to generating an occupancy grid and / or determining a preferred vehicle path with the help of one or more controllers 536 and / or control SoCs. Front-facing cameras can be used to perform many of the same ADAS functions as LIDAR, including emergency braking, pedestrian detection, and collision avoidance. Front-facing cameras can also be used for ADAS functions and systems including lane departure warning ("LDW"), adaptive cruise control ("ACC"), and / or other functions such as traffic sign recognition.

[0072] A wide variety of cameras can be used in the front-facing configuration, including, for example, monocular camera platforms including CMOS (complementary metal-oxide semiconductor) color imagers. Another example can be a wide-angle camera 570, which can be used to perceive objects (e.g., pedestrians, intersection traffic, or bicycles) entering the field of view from the periphery. Although Figure 5B Although only one wide-angle camera is illustrated in FIG. 6, there can be any number of wide-angle cameras 570 on the vehicle 500. In addition, long-range cameras 598 (e.g., long-view stereo camera pairs) can be used for depth-based object detection, especially for objects for which a neural network has not been trained. Long-range cameras 598 can also be used for object detection and classification and basic object tracking.

[0073] One or more stereo cameras 568 may also be included in a front-mounted configuration. The stereo camera 568 may include an integrated control unit comprising a scalable processing unit that can provide a multi-core microprocessor and programmable logic (FPGA) with an integrated CAN or Ethernet interface on a single chip. Such a unit can be used to generate a 3D map of the vehicle environment, including distance estimates for all points in the image. Alternative stereo cameras 568 may include a compact stereo vision sensor that may include two camera lenses (one on each side) and an image processing chip capable of measuring the distance from the vehicle to a target object and using the generated information (e.g., metadata) to activate autonomous emergency braking and lane departure warning functions. Other types of stereo cameras 568 may be used in addition to those described herein, or alternatively.

[0074] Cameras with a field of view that includes portions of the environment on the sides of vehicle 500 (e.g., side-view cameras) can be used for surround view, providing information for creating and updating occupancy grids and generating side-impact collision warnings. For example, surround camera 574 (e.g., ...) Figure 5B The four surround cameras 574 shown can be mounted on the vehicle 500. The surround cameras 574 can include a wide-angle camera 570, a fisheye camera, a 360-degree camera, and / or the like. Four examples are provided; the four fisheye cameras can be positioned at the front, rear, and sides of the vehicle. In an alternative arrangement, the vehicle can use three surround cameras 574 (e.g., left, right, and rear) and can utilize one or more other cameras (e.g., a forward-facing camera) as a fourth surround-view camera.

[0075] A camera with a field of view that includes the environment behind the vehicle 500 (e.g., a rear-view camera) can be used for parking assistance, surround view, rear collision warning, and creating and updating occupancy grids. A wide variety of cameras can be used, including but not limited to those also suitable as front-facing cameras as described herein (e.g., long-range and / or mid-range camera 598, stereo camera 568, infrared camera 572, etc.).

[0076] Figure 5C For use in accordance with some embodiments of this disclosure Figure 5AFIG. 1 is a block diagram of an example system architecture of an example autonomous vehicle 500. It should be understood that this arrangement and other arrangements described herein are set forth merely as examples. Other arrangements and elements (e.g., machines, interfaces, functions, orders, groupings of functions, etc.) can be used in addition to or instead of those shown, and some elements can be wholly omitted. Further, many of the elements described herein are functional entities that can be implemented as discrete or distributed components or in conjunction with other components, and in any suitable combinations and locations. Various functions described herein as being performed by an entity can be implemented in hardware, firmware, and / or software. For instance, various functions can be implemented by a processor executing instructions stored in a memory.

[0077] Figure 5C Each of the components, features, and systems of vehicle 500 are illustrated as being connected via a bus 502. Bus 502 can include a controller area network (CAN) data interface (alternatively referred to herein as a "CAN bus"). The CAN can be a network within vehicle 500 that is used to assist in controlling various features and functions of vehicle 500, such as the actuation of brakes, acceleration, braking, steering, windshield wipers, etc. The CAN bus can be configured to have tens or even hundreds of nodes, each with its own unique identifier (e.g., CAN ID). The CAN bus can be read to find steering wheel angle, ground speed, revolutions per minute (RPM) of the engine, button positions, and / or other vehicle status indicators. The CAN bus can be ASIL B compliant.

[0078] Although bus 502 is described herein as a CAN bus, this is not intended to be limiting. For example, FlexRay and / or Ethernet can be used in addition to or instead of a CAN bus. Further, although bus 502 is represented with a single line, this is not intended to be limiting. For example, there can be any number of buses 502, which can include one or more CAN buses, one or more FlexRay buses, one or more Ethernet buses, and / or one or more other types of buses that use different protocols. In some examples, two or more buses 502 can be used to perform different functions, and / or can be used for redundancy. For example, a first bus 502 can be used for collision avoidance functions, and a second bus 502 can be used for drive control. In any example, each bus 502 can communicate with any component of vehicle 500, and two or more buses 502 can communicate with the same components. In some examples, each SoC 504, each controller 536, and / or each computer within the vehicle can have access to the same input data (e.g., inputs from sensors of vehicle 500), and can be connected to a common bus, such as a CAN bus.

[0079] Vehicle 500 may include one or more controllers 536, such as those described herein. Figure 5A The controllers described herein. Controller 536 can be used for a wide variety of functions. Controller 536 can be coupled to any other different components and systems of vehicle 500 and can be used for the control of vehicle 500, artificial intelligence of vehicle 500, infotainment and / or the like for vehicle 500.

[0080] Vehicle 500 may include one or more System-on-Chip (SoC) 504. SoC 504 may include CPU 506, GPU 508, processor 510, cache 512, accelerator 514, data storage area 516, and / or other components and features not shown. SoC 504 can be used to control vehicle 500 across a wide variety of platforms and systems. For example, one or more SoCs 504 may be combined with an HD map 522 in a system (e.g., the system of vehicle 500), the HD map being transmitted via a network interface 524 from one or more servers (e.g., [server name missing]). Figure 5D One or more servers (578) receive map refresh and / or updates.

[0081] CPU 506 may include CPU clusters or CPU complexes (or, alternatively, referred to herein as "CCPLEX"). CPU 506 may include multiple cores and / or L2 cache. For example, in some embodiments, CPU 506 may include eight cores in a coherent multiprocessor configuration. In some embodiments, CPU 506 may include four dual-core clusters, each with a dedicated L2 cache (e.g., 2MB L2 cache). CPU 506 (e.g., CCPLEX) may be configured to support simultaneous cluster operation, such that any combination of clusters of CPU 506 can be active at any given time.

[0082] CPU 506 can implement power management capabilities including one or more of the following features: automatic clock gating of hardware blocks when idle to save dynamic power; clock gating of each core when the core is not actively executing instructions due to the execution of WFI / WFE instructions; independent power gating of each core; independent clock gating of each core cluster when all cores are clock-gated or power-gated; and / or independent power gating of each core cluster when all cores are power-gated. CPU 506 can further implement enhanced algorithms for managing power states, wherein allowed power states and desired wake-up times are specified, and the hardware / microcode determines the optimal power state to enter for the core, cluster, and CCPLEX. The processing core can support simplified power state entry sequences in software, with this work offloaded to the microcode.

[0083] GPU 508 can include an integrated GPU (alternatively referred to herein as an “iGPU”). GPU 508 can be programmable and efficient for parallel workloads. In some examples, GPU 508 can use an enhanced tensor instruction set. GPU 508 can include one or more streaming microprocessors, where each streaming microprocessor can include an LI cache (e.g., an LI cache having at least 96 KB of storage capacity), and two or more of the streaming microprocessors can share an L2 cache (e.g., an L2 cache having 512 KB of storage capacity). In some embodiments, GPU 508 can include at least eight streaming microprocessors. GPU 508 can use a compute application programming interface (API). In addition, GPU 508 can use one or more parallel computing platforms and / or programming models (e.g., NVIDIA’s CUDA).

[0084] In the case of automotive and embedded uses, GPU 508 can be power-optimized for best performance. For example, GPU 508 can be fabricated on a fin field-effect transistor (FinFET). However, this is not intended to be limiting, and GPU 508 can be fabricated using other semiconductor fabrication processes. Each streaming microprocessor can incorporate several mixed-precision processing cores divided into multiple blocks. For example, and without limitation, 64 PF32 cores and 32 PF64 cores can be divided into four processing blocks. In such an example, each processing block can be allocated 16 FP32 cores, 8 FP64 cores, 16 INT32 cores, two mixed-precision NVIDIA Tensor cores for deep learning matrix arithmetic, an L0 instruction cache, a thread warp scheduler, a dispatch unit, and / or a 64 KB register file. In addition, the streaming microprocessor can include independent parallel integer and floating point data paths to exploit the mix of computation and addressing computation to provide efficient execution of workloads. The streaming microprocessor can include independent thread scheduling capabilities to allow for more fine-grained synchronization and cooperation between parallel threads. The streaming microprocessor can include a combined LI data cache and shared memory unit to facilitate both simplified programming and improved performance.

[0085] GPU 508 can include a high-bandwidth memory (HBM) and / or a 16 GB HBM2 memory subsystem that provides approximately 900 GB / s of peak memory bandwidth in some examples. In some examples, in addition to or alternatively from HBM memory, a synchronous graphics random access memory (SGRAM) can be used, such as a fifth generation graphics double data rate synchronous random access memory (GDDR5).

[0086] GPU 508 can include a unified memory technology that includes access counters to allow memory pages to be migrated more precisely to the processors that access them most frequently, improving efficiency of memory ranges shared between processors. In some examples, address translation services (ATS) support can be used to allow GPU 508 to directly access CPU 506 page tables. In such examples, when a GPU 508 memory management unit (MMU) experiences a miss, an address translation request can be transmitted to CPU 506. In response, CPU 506 can look up a virtual-to-physical mapping for the address in its page tables and transmit the translation back to GPU 508. In this way, the unified memory technology can allow a single unified virtual address space for memory of both CPU 506 and GPU 508, simplifying GPU 508 programming and porting applications to GPU 508.

[0087] Further, GPU 508 can include access counters that can track how frequently GPU 508 accesses other processors' memory. The access counters can help ensure that memory pages are migrated to the physical memory of the processor that accesses these pages most frequently.

[0088] SoC 504 can include any number of caches 512, including those described herein. For example, caches 512 can include an L3 cache available to both CPU 506 and GPU 508 (e.g., connected to both CPU 506 and GPU 508). Caches 512 can include a write-back cache that can track the state of a line, for example, by using a cache coherency protocol (e.g., MEI, MESI, MSI, etc.). Depending on the embodiment, the L3 cache can include 4 MB or more, although smaller cache sizes can also be used.

[0089] SoC 504 can include an arithmetic logic unit (ALU) that can be utilized to perform processing for any of the wide variety of tasks or operations described with respect to vehicle 500, such as processing a DNN. Further, SoC 504 can include a floating point unit (FPU) or other mathematical co-processor or digital co-processor type for performing mathematical operations within the system. For example, SoC 104 can include one or more FPUs integrated within CPU 506 and / or GPU 508 as execution units.

[0090] The SoC 504 can include one or more accelerators 514 (e.g., hardware accelerators, software accelerators, or a combination thereof). For example, the SoC 504 can include a hardware acceleration cluster that can include optimized hardware accelerators and / or a large on-chip memory. This large on-chip memory (e.g., 4MB SRAM) can enable the hardware acceleration cluster to accelerate neural networks and other computations. The hardware acceleration cluster can be used to supplement the GPU 508 and offload some of the tasks of the GPU 508 (e.g., freeing up more cycles of the GPU 508 for performing other tasks). As one example, the accelerators 514 can be used for targeted workloads (e.g., perception, convolutional neural networks (CNNs), etc.) that are stable enough to accelerate easily. As used herein, the term “CNN” can include all types of CNNs, including region-based or region convolutional neural networks (RCNNs) and fast RCNNs (e.g., for object detection).

[0091] The accelerators 514 (e.g., hardware acceleration cluster) can include a deep learning accelerator (DLA). The DLA can include one or more tensor processing units (TPUs) that can be configured to provide an additional 100 trillion operations per second for deep learning applications and inferencing. The TPU can be an accelerator that is configured to perform and optimized for performing image processing functions (e.g., for CNNs, RCNNs, etc.). The DLA can be further optimized for a specific set of neural network types and floating point operations and inferencing. The design of the DLA can provide higher performance per mm than general purpose GPUs and far exceeds the performance of CPUs. The TPU can perform several functions, including single instance convolution functions, support for INT8, INT16, and FP16 data types for both features and weights, for example, and post-processor functions.

[0092] The DLA can perform neural networks, especially CNNs, on processed or unprocessed data for any of a wide variety of functions, such as and not limited to: CNNs for object recognition and detection using data from a camera sensor; CNNs for distance estimation using data from a camera sensor; CNNs for emergency vehicle detection and identification and detection using data from a microphone; CNNs for face recognition and vehicle owner identification using data from a camera sensor; and / or CNNs for safety and / or safety related events.

[0093] The DLA can perform any of the functions of the GPU 508, and by using an inferencing accelerator, the designer can target the DLA or the GPU 508 for any function. For example, the designer can focus the processing and floating point operations of the CNNs on the DLA and leave other functions to the GPU 508 and / or other accelerators 514.

[0094] Accelerator 514 (e.g., hardware acceleration cluster) can include a programmable vision accelerator (PVA), which can be alternatively referred to herein as a computer vision accelerator. The PVA can be designed and configured to accelerate computer vision algorithms for advanced driver assistance systems (ADAS), autonomous driving, and / or augmented reality (AR) and / or virtual reality (VR) applications. The PVA can provide a balance between performance and flexibility. For example, each PVA can include, for example and without limitation, any number of reduced instruction set computer (RISC) cores, direct memory access (DMA), and / or any number of vector processors.

[0095] The RISC cores can interact with image sensors (e.g., image sensors of any of the cameras described herein), image signal processors, and / or the like. Each of the RISC cores can include any number of memories. Depending on the embodiment, the RISC cores can use any of several protocols. In some examples, the RISC cores can execute a real-time operating system (RTOS). The RISC cores can be implemented using one or more integrated circuit devices, application specific integrated circuits (ASICs), and / or memory devices. For example, the RISC cores can include instruction caches and / or tightly coupled RAM.

[0096] The DMA can enable components of the PVA to access system memory independently of the CPU 506. The DMA can support any number of features to provide optimizations to the PVA, including, but not limited to, supporting multi-dimensional addressing and / or circular addressing. In some examples, the DMA can support addressing up to six or more dimensions, which can include block width, block height, block depth, horizontal block stride, vertical block stride, and / or depth stride.

[0097] The vector processors can be programmable processors that can be designed to efficiently and flexibly execute programming for computer vision algorithms and provide signal processing capabilities. In some examples, the PVA can include a PVA core and two vector processing subsystem partitions. The PVA core can include a processor subsystem, one or more DMA engines (e.g., two DMA engines), and / or other peripherals. The vector processing subsystems can operate as the main processing engines of the PVA and can include vector processing units (VPUs), instruction caches, and / or vector memories (e.g., VMEM). The VPU cores can include digital signal processors, such as, for example, single instruction multiple data (SIMD), very long instruction word (VLIW) digital signal processors. The combination of SIMD and VLIW can enhance throughput and rate.

[0098] Each of the vector processors can include an instruction cache and can be coupled to a dedicated memory. As a result, in some examples, each of the vector processors can be configured to execute independently of the other vector processors. In other examples, the vector processors included in a particular PVA can be configured to employ data parallelization. For example, in some embodiments, multiple vector processors included in a single PVA can execute the same computer vision algorithm, but on different regions of an image. In other examples, the vector processors included in a particular PVA can execute different computer vision algorithms on the same image simultaneously, or even different algorithms on a sequence of images or portions of an image. Any number of PVAs can be included in the hardware acceleration cluster, and any number of vector processors can be included in each of the PVAs, among other things. Furthermore, the PVAs can include additional error-correcting code (ECC) memory to enhance overall system security.

[0099] The accelerator 514 (e.g., hardware acceleration cluster) can include an on-chip computer vision network and SRAM to provide high bandwidth, low latency SRAM for the accelerator 514. In some examples, the on-chip memory can include at least 4 MB of SRAM composed of, for example and without limitation, eight field-programmable memory blocks, which can be accessed by both the PVA and the DLA. Each pair of memory blocks can include an advanced peripheral bus (APB) interface, configuration circuitry, a controller, and a multiplexer. Any type of memory can be used. The PVA and the DLA can access the memory via a backbone that provides high-speed memory access to the PVA and the DLA. The backbone can include an on-chip computer vision network that interconnects the PVA and the DLA to the memory, for example using an APB.

[0100] The on-chip computer vision network can include an interface that determines that both the PVA and the DLA provide ready and valid signals before transmitting any control signals / addresses / data. Such an interface can provide separate phases and separate channels for transmitting control signals / addresses / data, as well as burst communications for continuous data transmission. This type of interface can comply with ISO 26262 or IEC 61508 standards, but other standards and protocols can also be used.

[0101] In some examples, the SoC 504 can include a real-time ray tracing hardware accelerator, such as described in U.S. Patent Application No. 16 / 101,232, filed August 10, 2018. The real-time ray tracing hardware accelerator can be used to quickly and efficiently determine locations and extents of objects (e.g., within a world model) in order to generate real-time visualizations simulations for RADAR signal interpretation, for sound propagation synthesis and / or analysis, for SONAR system simulation, for general wave propagation simulation, for comparison to LIDAR data for purposes of localization and / or other functionality, and / or for other uses. In some embodiments, one or more tree traversal units (TTUs) can be used to perform one or more ray tracing related operations.

[0102] The accelerator 514 (e.g., a hardware accelerator cluster) has a wide range of autonomous driving uses. The PVA can be a programmable vision accelerator that can be used for key processing stages in ADAS and autonomous vehicles. The capabilities of the PVA are a good match for algorithm domains that require predictable processing, low power, and low latency. In other words, the PVA performs well on semi-dense or dense regular computations, and even on small data sets that require predictable runtimes with low latency and low power. Thus, in the context of a platform for autonomous vehicles, the PVA is designed to run classical computer vision algorithms because they are effective at object detection and integer math operations.

[0103] For example, in accordance with one embodiment of the technology, the PVA is used to perform computer stereo vision. In some examples, a semi-global matching based algorithm can be used, although this is not intended to be limiting. Many applications for level 3-5 autonomous driving require instant motion estimation / stereo matching (e.g., structure from motion, pedestrian recognition, lane detection, etc.). The PVA can perform computer stereo vision functions on input from two monocular cameras.

[0104] In some examples, the PVA can be used to perform dense optical flow. Raw RADAR data is processed (e.g., using a 4D fast Fourier transform) to provide processed RADAR. In other examples, the PVA is used for time-of-flight depth processing, such as by processing raw time-of-flight data to provide processed time-of-flight data.

[0105] The DLA can be used to run any type of network to enhance control and driving safety, including, for example, a neural network that outputs a confidence metric for each object detection. Such a confidence value can be interpreted as a probability, or as providing a relative "weight" for each detection compared to other detections. The confidence value enables the system to make further decisions about which detections should be considered true positive detections and not false positive detections. For example, the system can set a threshold for confidence, and only consider detections that exceed the threshold as true positive detections. In an automatic emergency braking (AEB) system, false positive detections would cause the vehicle to automatically perform an emergency brake, which is obviously undesirable. Thus, only the most confident detections should be considered a trigger for AEB. The DLA can run a neural network for regression of a confidence value. The neural network can take as its input at least some subset of parameters, such as a bounding box dimension, a ground plane estimate obtained (e.g., from another subsystem), inertial measurement unit (IMU) sensor 566 outputs related to vehicle 500 orientation, distance, 3D position estimates of objects obtained from the neural network and / or other sensors (e.g., LIDAR sensor 564 or RADAR sensor 560), etc.

[0106] SoC 504 can include one or more data stores 516 (e.g., memory). Data stores 516 can be on-chip memory of SoC 504, which can store neural networks to be executed on the GPU and / or DLA. In some examples, for redundancy and safety, data stores 516 can be large enough in capacity to store multiple instances of a neural network. Data stores 512 can include L2 or L3 cache 512. References to data stores 516 can include references to memory associated with PVAs, DLAs, and / or other accelerators 514 as described herein.

[0107] SoC 504 can include one or more processors 510 (e.g., embedded processors). The processors 510 can include a boot and power management processor, which can be a specialized processor and subsystem for handling boot power and management functions, as well as security implementation. The boot and power management processor can be part of the SoC 504 boot sequence and can provide run-time power management services. The boot power and management processor can provide clock and voltage programming, auxiliary system low power state transitions, SoC 504 thermal and temperature sensor management, and / or SoC 504 power state management. Each temperature sensor can be implemented as a ring oscillator whose output frequency is proportional to temperature, and the SoC 504 can use the ring oscillator to detect the temperature of the CPU 506, GPU 508, and / or accelerator 514. If it is determined that the temperature exceeds a threshold, the boot and power management processor can enter a temperature fault routine and place the SoC 504 in a lower power state and / or place the vehicle 500 in a driver safe park mode (e.g., safely park the vehicle 500).

[0108] The processors 510 can also include a set of embedded processors that can be used as an audio processing engine. The audio processing engine can be an audio subsystem that allows for full hardware support for multi-channel audio over multiple interfaces, as well as a range of extensive and flexible audio I / O interfaces. In some examples, the audio processing engine is a specialized processor core with a digital signal processor with dedicated RAM.

[0109] The processors 510 can also include an always-on processor engine, which can provide the necessary hardware features to support low-power sensor management and wake-up use cases. The always-on processor engine can include a processor core, tightly coupled RAM, supporting peripherals (e.g., timers and interrupt controllers), various I / O controller peripherals, and routing logic.

[0110] The processors 510 can also include a security cluster engine, which includes a specialized processor subsystem that handles security management for automotive applications. The security cluster engine can include two or more processor cores, tightly coupled RAM, supporting peripherals (e.g., timers, interrupt controllers, etc.), and / or routing logic. In a secure mode, the two or more cores can operate in a lockstep mode and act as a single core with comparison logic that detects any differences between their operations.

[0111] The processors 510 can also include a real-time camera engine, which can include a specialized processor subsystem for handling real-time camera management.

[0112] The processor 510 can further include a high dynamic range signal processor, which can include an image signal processor, which is a hardware engine that is part of the camera processing pipeline.

[0113] The processor 510 can include a video image compositor, which can be a processing block (e.g., implemented on a microprocessor), that implements video post-processing functions needed by the video playback application to produce the final image for the player window. The video image compositor can perform lens distortion correction on the wide-angle camera 570, surround camera 574, and / or on the cab-in monitor camera sensors. The cab-in monitor camera sensors are preferably monitored by a neural network running on another instance of the advanced SoC, configured to recognize cab-in events and respond accordingly. The cab-in system can perform lip reading to activate mobile phone services and place a call, dictate an email, change the vehicle destination, activate or change the vehicle's infotainment system and settings, or provide voice-activated web surfing. Certain functions are only available to the driver when the vehicle is operating in autonomous mode, and are disabled otherwise.

[0114] The video image compositor can include enhanced temporal noise reduction for spatial and temporal noise reduction. For example, where motion is present in the video, the noise reduction appropriately weights the spatial information, reducing the weight of information provided by neighboring frames. Where the image or portions of the image do not include motion, the temporal noise reduction performed by the video image compositor can use information from previous images to reduce noise in the current image.

[0115] The video image compositor can also be configured to perform stereo correction on input stereo lens frames. The video image compositor can further be used for user interface composition when the operating system desktop is in use and the GPU 508 does not need to continuously render new surfaces. Even when the GPU 508 is powered on and active, doing 3D rendering, the video image compositor can be used to offload the GPU 508 to improve performance and responsiveness.

[0116] The SoC 504 can further include a Mobile Industry Processor Interface (MIPI) camera serial interface for receiving video and input from the cameras, a high-speed interface, and / or a video input block that can be used for camera and related pixel input functions. The SoC 504 can further include an input / output controller that can be controlled by software and can be used to receive I / O signals that are not committed to a particular role.

[0117] The SoC 504 can also include a wide range of peripheral device interfaces to enable communication with peripherals, audio codecs, power management, and / or other devices. The SoC 504 can be used to process data from cameras (connected over Gigabit Multimedia Serial Link and Ethernet), sensors (e.g., LIDAR sensor 564, RADAR sensor 560, etc. that can be connected over Ethernet), data from the bus 502 (e.g., speed of the vehicle 500, steering wheel position, etc.), data from GNSS sensor 558 (connected over Ethernet or CAN bus). The SoC 504 can also include a dedicated high-performance mass storage controller, which can include their own DMA engine, and which can be used to free the CPU 506 from routine data management tasks.

[0118] The SoC 504 can be an end-to-end platform with a flexible architecture that spans automation levels 3-5, providing an integrated functional safety architecture for a platform that leverages and efficiently uses computer vision and ADAS technology to achieve diversity and redundancy, along with deep learning tools. The SoC 504 can be faster, more reliable, and even more energy and space efficient than conventional systems. For example, the accelerator 514, when combined with the CPU 506, GPU 508, and data storage 516, can provide a fast and efficient platform for level 3-5 autonomous vehicles.

[0119] The technology thus provides capabilities and functionality that cannot be achieved by conventional systems. For example, computer vision algorithms can be executed on CPUs that can be configured using high-level programming languages such as the C programming language to perform a wide variety of processing algorithms across a wide variety of visual data. However, CPUs often cannot meet the performance requirements of many computer vision applications, such as those related to, for example, execution time and power consumption. In particular, many CPUs cannot execute complex object detection algorithms in real time, which is a requirement for on-board ADAS applications and a requirement for practical level 3-5 autonomous vehicles.

[0120] In contrast to conventional systems, by providing a CPU complex, a GPU complex, and a hardware acceleration cluster, the technology described herein allows multiple neural networks to be executed simultaneously and / or sequentially, and the results to be combined together to achieve level 3-5 autonomous driving functionality. For example, a CNN executed on a DLA or dGPU (e.g., GPU 520) can include text and word recognition, allowing a supercomputer to read and understand traffic signs, including signs for which a neural network has not been specifically trained. The DLA can further include a neural network that is able to recognize, interpret, and provide a semantic understanding of the sign, and pass that semantic understanding to a path planning module running on the CPU complex.

[0121] As another example, multiple neural networks can be run simultaneously as required for level 3, 4, or 5 driving. For example, a warning sign consisting of the words "Caution: flashing lights indicate icy conditions" along with electric lights can be interpreted by several neural networks independently or collectively. The sign itself can be recognized by a first deployed neural network (e.g., a trained neural network) as a traffic sign, the text "flashing lights indicate icy conditions" can be interpreted by a second deployed neural network that informs the vehicle's path planning software (preferably executing on the CPU complex) that icy conditions exist when flashing lights are detected. The flashing lights can be recognized by operating a third deployed neural network over multiple frames that informs the vehicle's path planning software of the presence (or absence) of flashing lights. All three neural networks can be run simultaneously, for example, within the DLA and / or on the GPU 508.

[0122] In some examples, a CNN for face recognition and owner recognition can use data from the camera sensors to recognize the presence of an authorized driver and / or owner of the vehicle 500. A processing engine always on the sensors can be used to unlock the vehicle and turn on the lights when the owner approaches the driver's door, and in a safe mode, disable the vehicle when the owner leaves the vehicle. In this way, the SoC 504 provides security against theft and / or carjacking.

[0123] In another example, a CNN for emergency vehicle detection and recognition can use data from the microphones 596 to detect and recognize emergency vehicle sirens. In contrast to conventional systems that detect sirens using a general classifier and manually extract features, the SoC 504 uses a CNN to classify ambient and urban sounds as well as to classify visual data. In a preferred embodiment, a CNN running on the DLA is trained to recognize the relative closing speed of an emergency vehicle (e.g., by using the Doppler effect). The CNN can also be trained to recognize emergency vehicles specific to the local area in which the vehicle is operating as recognized by the GNSS sensor 558. Thus, for example, when operating in Europe, the CNN will seek to detect European sirens, and when in the United States, the CNN will seek to recognize sirens that are only North American. Once an emergency vehicle is detected, a control program can be used to execute an emergency vehicle safety routine, slow the vehicle down, pull over to the side of the road, stop the vehicle, and / or idle the vehicle until the emergency vehicle passes, with the assistance of the ultrasonic sensors 562.

[0124] The vehicle can include a CPU 518 (e.g., a discrete CPU or dCPU) that can be coupled to the SoC 504 via a high-speed interconnect (e.g., PCIe). The CPU 518 can include, for example, an X86 processor. The CPU 518 can be used to perform any of a wide variety of functions, including, for example, arbitrating potentially inconsistent results between ADAS sensors and the SoC 504, and / or monitoring the status and health of the controller 536 and / or infotainment SoC 530.

[0125] The vehicle 500 can include a GPU 520 (e.g., a discrete GPU or dGPU) that can be coupled to the SoC 504 via a high-speed interconnect (e.g., NVIDIA’s NVLINK). The GPU 520 can provide additional artificial intelligence functionality, for example, by executing redundant and / or different neural networks, and can be used to train and / or update neural networks based at least in part on input (e.g., sensor data) from sensors of the vehicle 500.

[0126] The vehicle 500 can also include a network interface 524 that can include one or more wireless antennas 526 (e.g., one or more wireless antennas for different communication protocols, such as cellular antennas, Bluetooth antennas, etc.). The network interface 524 can be used to enable wireless connections over the Internet with a cloud (e.g., with the server 578 and / or other network devices), with other vehicles, and / or with computing devices (e.g., client devices of passengers). For communication with other vehicles, a direct link can be established between the two vehicles, and / or an indirect link can be established (e.g., across a network and through the Internet). The direct link can be provided using a car-to-car communication link. The car-to-car communication link can provide the vehicle 500 with information about vehicles that are approaching the vehicle 500 (e.g., vehicles in front of, to the side of, and / or behind the vehicle 500). This functionality can be part of a cooperative adaptive cruise control functionality of the vehicle 500.

[0127] The network interface 524 can include a SoC that provides modulation and demodulation functionality and enables the controller 536 to communicate over a wireless network. The network interface 524 can include a radio frequency front end for up-conversion from baseband to radio frequency and down-conversion from radio frequency to baseband. The frequency conversion can be performed through well-known processes and / or can be performed using a super-heterodyne process. In some examples, the radio frequency front end functionality can be provided by a separate chip. The network interface can include wireless functionality for communication over LTE, WCDMA, UMTS, GSM, CDMA2000, Bluetooth, Bluetooth LE, Wi-Fi, Z-Wave, ZigBee, LoRaWAN, and / or other wireless protocols.

[0128] The vehicle 500 can also include a data store 528 that can include off-chip (e.g., off-SoC 504) storage. The data store 528 can include one or more storage elements, including RAM, SRAM, DRAM, VRAM, flash memory, hard disks, and / or other components and / or devices that can store data for at least one bit.

[0129] The vehicle 500 can also include a GNSS sensor 558. The GNSS sensor 558 (e.g., GPS, assisted GPS sensor, differential GPS (DGPS) sensor, etc.) is used to assist in mapping, perception, occupancy grid generation, and / or path planning functions. Any number of GNSS sensors 558 can be used, including, for example and without limitation, a GPS using a USB connector with an Ethernet-to-serial (RS-232) bridge.

[0130] The vehicle 500 can also include a RADAR sensor 560. The RADAR sensor 560 can be used by the vehicle 500 for long-range vehicle detection, even in darkness and / or adverse weather conditions. The RADAR functional safety level can be ASIL B. The RADAR sensor 560 can use the CAN and / or bus 502 (e.g., to transmit data generated by the RADAR sensor 560) for control as well as access to object tracking data, in some examples, Ethernet for access to raw data. A wide variety of RADAR sensor types can be used. For example and without limitation, the RADAR sensor 560 can be suitable for front, rear, and side RADAR use. In some examples, a pulsed Doppler RADAR sensor is used.

[0131] The RADAR sensor 560 can include different configurations, such as long-range with a narrow field of view, short-range with a wide field of view, short-range side coverage, and so on. In some examples, long-range RADAR can be used for adaptive cruise control functionality. Long-range RADAR systems can provide a wide field of view (e.g., 250 m range) implemented through two or more independent scans. The RADAR sensor 560 can help distinguish between static and moving objects, and can be used by the ADAS system for emergency brake assist and forward collision warning. The long-range RADAR sensor can include a single-station multi-mode RADAR with multiple (e.g., six or more) fixed RADAR antennas, as well as high-speed CAN and FlexRay interfaces. In examples with six antennas, the central four antennas can create focused beam patterns designed to record the surroundings of the vehicle 500 at higher speed with minimal traffic interference from adjacent lanes. The other two antennas can extend the field of view, making it possible to quickly detect vehicles entering or leaving the lane of the vehicle 500.

[0132] As one example, a mid-range RADAR system can include a range of up to 560 m (front) or 80 m (rear) and a field of view of up to 42 degrees (front) or 550 degrees (rear). A short-range RADAR system can include, but is not limited to, RADAR sensors designed to be mounted at both ends of the rear bumper. When mounted at both ends of the rear bumper, such a RADAR sensor system can create two beams that continuously monitor the rear and the blind spot next to the vehicle.

[0133] A short-range RADAR system can be used in an ADAS system for blind spot detection and / or lane change assist.

[0134] The vehicle 500 can also include ultrasonic sensors 562. The ultrasonic sensors 562, which can be placed on the front, rear, and / or sides of the vehicle 500, can be used for parking assist and / or to create and update an occupancy grid. A wide variety of ultrasonic sensors 562 can be used, and different ultrasonic sensors 562 can be used for different detection ranges (e.g., 2.5 m, 4 m). The ultrasonic sensors 562 can operate at an ASIL B functional safety level.

[0135] The vehicle 500 can include LIDAR sensors 564. The LIDAR sensors 564 can be used for object and pedestrian detection, emergency braking, collision avoidance, and / or other functions. The LIDAR sensors 564 can be at an ASIL B functional safety level. In some examples, the vehicle 500 can include multiple LIDAR sensors 564 (e.g., two, four, six, etc.) that can use Ethernet (e.g., to provide data to a Gigabit Ethernet switch).

[0136] In some examples, the LIDAR sensors 564 can be capable of providing a list of objects and their distances for a 360-degree field of view. A commercially available LIDAR sensor 564 can have, for example, an advertised range of approximately 500 m, a precision of 2 cm - 3 cm, and support for a 500 Mbps Ethernet connection. In some examples, one or more flush-mounted LIDAR sensors 564 can be used. In such examples, the LIDAR sensors 564 can be implemented as small devices that can be embedded into the front, rear, sides, and / or corners of the vehicle 500. In such examples, the LIDAR sensors 564 can provide a field of view of up to 120 degrees horizontal and 35 degrees vertical, with a range of 200 m, even for low reflectivity objects. Front-mounted LIDAR sensors 564 can be configured for a horizontal field of view between 45 degrees and 135 degrees.

[0137] In some examples, LIDAR technology such as 3D Flash LIDAR can also be used. 3D Flash LIDAR uses a flash of laser light as a source of emission to illuminate the vehicle’s surroundings up to about 200 m. The flash LIDAR unit includes a receptor that records the laser pulse transmission time and reflected light on each pixel, which in turn corresponds to the range from the vehicle to the object. Flash LIDAR can allow for the generation of highly accurate and distortion-free images of the surroundings with each laser flash. In some examples, four flash LIDAR sensors can be deployed, one on each side of the vehicle 500. Available 3D flash LIDAR systems include solid-state 3D staring array LIDAR cameras (e.g., non-scanning LIDAR devices) that have no moving parts other than fans. The flash LIDAR device can use 5 nanosecond Class I (eye-safe) laser pulses per frame and can capture the reflected laser light in the form of 3D range point clouds and co-registered intensity data. By using flash LIDAR, and because flash LIDAR is a solid-state device with no moving parts, the LIDAR sensor 564 can be less susceptible to motion blur, vibration, and / or jostling.

[0138] The vehicle can also include an IMU sensor 566. In some examples, the IMU sensor 566 can be located at the center of the rear axle of the vehicle 500. The IMU sensor 566 can include, for example and without limitation, an accelerometer, a magnetometer, a gyroscope, a magnetic compass, and / or other sensor types. In some examples, such as in six-axis applications, the IMU sensor 566 can include an accelerometer and a gyroscope, while in nine-axis applications, the IMU sensor 566 can include an accelerometer, a gyroscope, and a magnetometer.

[0139] In some embodiments, the IMU sensor 566 can be implemented as a microelectromechanical systems (MEMS) inertial navigation system (INS) that combines a microelectromechanical systems (MEMS) inertial sensor, a high-sensitivity GPS receiver, and an advanced Kalman filter algorithm to provide estimates of position, velocity, and attitude. As such, in some examples, the IMU sensor 566 can enable the vehicle 500 to estimate heading without input from a magnetic sensor by directly observing the change in velocity from GPS to the IMU sensor 566 and correlating it. In some examples, the IMU sensor 566 and the GNSS sensor 558 can be combined into a single integrated unit.

[0140] The vehicle can include a microphone 596 placed in and / or around the vehicle 500. The microphone 596 can be used for emergency vehicle detection and identification, among other things.

[0141] The vehicle can also include any number of camera types, including stereo cameras 568, wide-view cameras 570, infrared cameras 572, surround-view cameras 574, long and / or mid-range cameras 598, and / or other camera types. These cameras can be used to capture image data around the entire periphery of the vehicle 500. The types of cameras used depend on the embodiment and requirements of the vehicle 500, and any combination of camera types can be used to provide the necessary coverage around the vehicle 500. Further, the number of cameras can vary depending on the embodiment. For example, the vehicle can include six cameras, seven cameras, ten cameras, twelve cameras, and / or another number of cameras. As one example and without limitation, the cameras can support Gigabit Multimedia Serial Link (GMSL) and / or Gigabit Ethernet. Each of the cameras is described in more detail herein with respect to Figure 5A and Figure 5B are described in more detail.

[0142] The vehicle 500 can also include vibration sensors 542. The vibration sensors 542 can measure vibrations of components of the vehicle, such as axles. For example, changes in vibration can indicate changes in the road surface. In another example, when two or more vibration sensors 542 are used, differences between the vibrations can be used to determine the friction or slip of the road surface (e.g., when there is a difference in vibration between a power driven axle and a free spinning axle).

[0143] The vehicle 500 can include an ADAS system 538. In some examples, the ADAS system 538 can include a SoC. The ADAS system 538 can include adaptive / automatic / autonomous cruise control (ACC), cooperative adaptive cruise control (CACC), forward collision warning (FCW), automatic emergency braking (AEB), lane departure warning (LDW), lane keep assist (LKA), blind spot warning (BSW), rear cross-traffic warning (RCTW), collision warning system (CWS), lane centering (LC), and / or other features and functionality.

[0144] The ACC system can use RADAR sensors 560, LIDAR sensors 564, and / or cameras. The ACC system can include longitudinal ACC and / or lateral ACC. Longitudinal ACC monitors and controls the distance to the vehicle immediately ahead of the vehicle 500 and automatically adjusts the vehicle speed to maintain a safe distance from the vehicle ahead. Lateral ACC performs distance keeping and, if necessary, suggests a lane change for the vehicle 500. Lateral ACC is related to other ADAS applications such as LCA and CWS.

[0145] CACC uses information from other vehicles, which can be received from other vehicles via a wireless link via the network interface 524 and / or wireless antenna 526 or indirectly through a network connection, such as through the Internet. Direct links can be provided by vehicle-to-vehicle (V2V) communication links, while indirect links can be infrastructure-to-vehicle (I2V) communication links. Generally, V2V communication concepts provide information about the immediately preceding vehicles, such as vehicles immediately ahead of and in the same lane as the vehicle 500, while I2V communication concepts provide information about traffic further ahead. A CACC system can include either or both of I2V and V2V information sources. Given information about vehicles ahead of the vehicle 500, CACC can be more reliable, and it has the potential to improve traffic flow and reduce road congestion.

[0146] FCW systems are designed to alert the driver to a hazard so that the driver can take corrective action. FCW systems use a front-facing camera and / or RADAR sensor 560 coupled to a dedicated processor, DSP, FPGA, and / or ASIC that is electrically coupled to driver feedback such as a display, speaker, and / or vibrating component. FCW systems can provide warnings in the form of, for example, sound, visual warnings, vibrations, and / or quick brake pulses.

[0147] AEB systems detect an impending forward collision with another vehicle or other object and can automatically apply the brakes if the driver does not take corrective action within specified time or distance parameters. AEB systems can use a front-facing camera and / or RADAR sensor 560 coupled to a dedicated processor, DSP, FPGA, and / or ASIC. When an AEB system detects a hazard, it typically first alerts the driver to take corrective action to avoid a collision, and if the driver does not take corrective action, the AEB system can automatically apply the brakes in an effort to prevent or at least mitigate the effects of a predicted collision. AEB systems can include technologies such as dynamic brake support and / or crash imminent braking.

[0148] LDW systems provide visual, audible, and / or tactile warnings, such as steering wheel or seat vibrations, to alert the driver when the vehicle 500 is crossing lane markers. The LDW system is not activated when the driver indicates an intentional lane departure by activating a turn signal. LDW systems can use a front-side facing camera coupled to a dedicated processor, DSP, FPGA, and / or ASIC that is electrically coupled to driver feedback such as a display, speaker, and / or vibrating component.

[0149] An LKA system is a variation of the LDW system. If the vehicle 500 begins to leave the lane, the LKA system provides a steering input or brake to correct the vehicle 500.

[0150] A BSW system detects and warns the driver of vehicles in the car's blind spot. The BSW system can provide visual, audible, and / or tactile alerts to indicate that merging or changing lanes is unsafe. The system can provide additional warnings when the driver uses a turn signal. The BSW system can use rear-side facing cameras and / or RADAR sensors 560 coupled to a dedicated processor, DSP, FPGA, and / or ASIC that is electrically coupled to driver feedback such as a display, speaker, and / or vibrating component.

[0151] A RCTW system can provide visual, audible, and / or tactile notifications when objects are detected outside the range of the rear-facing camera while the vehicle 500 is backing up. Some RCTW systems include AEB to ensure that vehicle brakes are applied to avoid a collision. The RCTW system can use one or more rear-facing RADAR sensors 560 coupled to a dedicated processor, DSP, FPGA, and / or ASIC that is electrically coupled to driver feedback such as a display, speaker, and / or vibrating component.

[0152] Conventional ADAS systems can be prone to false positive results, which can annoy and distract the driver, but typically are not catastrophic because the ADAS system alerts the driver and allows the driver to decide whether the safety condition is truly present and act accordingly. However, in an autonomous vehicle 500, in the case of conflicting results, the vehicle 500 itself must decide whether to heed the results from the primary computer or the secondary computer (e.g., the first controller 536 or the second controller 536). For example, in some embodiments, the ADAS system 538 can be a secondary and / or auxiliary computer for providing perception information to a backup computer plausibility module. The backup computer plausibility monitor can run redundant diverse software on hardware components to detect faults in perception and dynamic driving tasks. The output from the ADAS system 538 can be provided to a supervisory MCU. If the outputs from the primary computer and the secondary computer conflict, the supervisory MCU must determine how to reconcile the conflict to ensure safe operation.

[0153] In some examples, the host computer can be configured to provide a confidence score to the supervisory MCU indicating the host computer's confidence in the selected result. If the confidence score exceeds a threshold, then the supervisory MCU can follow the host computer's direction, regardless of whether the secondary computer provides conflicting or inconsistent results. In the event that the confidence score does not satisfy the threshold and in the event that the host computer and the secondary computer indicate different results (e.g., a conflict), the supervisory MCU can arbitrate between the computers to determine the appropriate result.

[0154] The supervisory MCU can be configured to run a neural network that is trained and configured to determine conditions under which the secondary computer provides false alarms based at least in part on the output from the host computer and the secondary computer. Thus, the neural network in the supervisory MCU can learn when the output of the secondary computer can be trusted and when it cannot. For example, when the secondary computer is a RADAR-based FCW system, the neural network in the supervisory MCU can learn when the FCW system is identifying metal objects that are not in fact dangerous, such as drain grates or manhole covers that trigger false alarms. Similarly, when the secondary computer is a camera-based LDW system, the neural network in the supervisory MCU can learn to disregard the LDW when a cyclist or pedestrian is present and lane departure is in fact the safest strategy. In embodiments that include a neural network running on the supervisory MCU, the supervisory MCU can include at least one of a DLA or a GPU suitable for running a neural network with associated memory. In preferred embodiments, the supervisory MCU can include and / or be included as a component of the SoC 504.

[0155] In other examples, the ADAS system 538 can include a secondary computer that performs ADAS functions using traditional computer vision rules. As such, the secondary computer can use classic computer vision rules (if-then) and the presence of a neural network in the supervisory MCU can improve reliability, safety, and performance. For example, the diverse implementation and intentional non-identity make the overall system more fault-tolerant, especially with respect to faults caused by software (or software-hardware interface) functions. For example, if there is a software bug or error in the software running on the host computer and the non-identical software code running on the secondary computer provides the same overall result, then the supervisory MCU can be more confident that the overall result is correct and that the bug in the software or hardware on the host computer did not cause a substantial error.

[0156] In some examples, the output of the ADAS system 538 can be fed to a perception block of the host computer and / or a dynamic driving task block of the host computer. For example, if the ADAS system 538 indicates a forward collision warning due to an object immediately ahead, the perception block can use this information in identifying the object. In other examples, the secondary computer can have its own neural network that is trained and thus reduces the risk of false positives as described herein.

[0157] The vehicle 500 can also include an infotainment SoC 530 (e.g., an in-vehicle infotainment system (IVI)). Although illustrated and described as a SoC, the infotainment system can not be a SoC and can include two or more discrete components. The infotainment SoC 530 can include a combination of hardware and software that can be used to provide audio (e.g., music, a personal digital assistant, navigation instructions, news, radio, etc.), video (e.g., TV, movies, streaming media, etc.), telephony (e.g., hands-free calling), network connectivity (e.g., LTE, WiFi, etc.), and / or information services (e.g., a navigation system, a park assist, a telematics device, a radio data system, vehicle-related information such as fuel level, total distance covered, brake fluid level, oil level, doors open / closed, air filter information, etc.) to the vehicle 500. For example, the infotainment SoC 530 can include a radio, a disc player, a navigation system, a video player, USB and Bluetooth connectivity, an in-car computer, in-car entertainment, WiFi, steering wheel audio controls, hands-free voice controls, a heads-up display (HUD), the HMI display 534, a telematics device, a control panel (e.g., for controlling and / or interacting with various components, features, and / or systems), and / or other components. The infotainment SoC 530 can further be used to provide information (e.g., visual and / or audible) to a user of the vehicle, such as information from the ADAS system 538, autonomous driving information such as planned vehicle maneuvers, trajectories, surrounding environment information (e.g., intersection information, vehicle information, road information, etc.), and / or other information.

[0158] The infotainment SoC 530 can include GPU functionality. The infotainment SoC 530 can communicate with other devices, systems, and / or components of the vehicle 500 over the bus 502 (e.g., a CAN bus, Ethernet, etc.). In some examples, the infotainment SoC 530 can be coupled to a supervisory MCU such that, in the event of a failure of the host controller 536 (e.g., a primary and / or backup computer of the vehicle 500), the GPU of the infotainment system can perform some autonomous driving functions. In such examples, the infotainment SoC 530 can place the vehicle 500 in a driver safe park mode as described herein.

[0159] Vehicle 500 may also include instrument cluster 532 (e.g., digital instrument panel, electronic instrument cluster, digital instrument panel, etc.). Instrument cluster 532 may include a controller and / or supercomputer (e.g., a discrete controller or supercomputer). Instrument cluster 532 may include a set of instruments such as speedometer, fuel level, oil pressure, tachometer, odometer, turn indicator, shift position indicator, seatbelt warning light, parking brake warning light, engine malfunction indicator, airbag (SRS) system information, lighting controls, safety system controls, navigation information, etc. In some examples, information may be displayed and / or shared between infotainment SoC 530 and instrument cluster 532. In other words, instrument cluster 532 may be included as part of infotainment SoC 530, or vice versa.

[0160] Figure 5D For cloud-based servers and according to some embodiments of this disclosure Figure 5A This is a system diagram illustrating communication between example autonomous vehicles 500. System 576 may include server 578, network 590, and vehicles including vehicle 500. Server 578 may include multiple GPUs 584(A)-584(H) (collectively referred to herein as GPU 584), PCIe switches 582(A)-582(H) (collectively referred to herein as PCIe switch 582), and / or CPUs 580(A)-580(B) (collectively referred to herein as CPU 580). GPUs 584, CPUs 580, and PCIe switches may be interconnected with high-speed interconnects and / or PCIe connections 586, such as, but not limited to, NVLink interfaces 588 developed by NVIDIA. In some examples, GPUs 584 are connected via NVLink and / or NVSwitch SoCs, and GPUs 584 and PCIe switches 582 are connected via PCIe interconnects. Although eight GPUs 584, two CPUs 580, and two PCIe switches are shown in the diagram, this is not intended to be limiting. Depending on the embodiment, each of the servers 578 may include any number of GPUs 584, CPUs 580, and / or PCIe switches. For example, each of the servers 578 may include eight, sixteen, thirty-two, and / or more GPUs 584.

[0161] The server 578 can receive image data from vehicles over the network 590 and from vehicles representing images showing unexpected or changing road conditions such as a road work that recently started. The server 578 can transmit neural networks 592, updated neural networks 592, and / or map information 594, including information about traffic and road conditions, to vehicles over the network 590. Updates to the map information 594 can include updates to the HD map 522, such as information about construction sites, potholes, curves, flooding, or other obstacles. In some examples, the neural networks 592, updated neural networks 592, and / or map information 594 can have been generated from experience using training performed at a data center (e.g., using the server 578 and / or other servers) and / or from data received from any number of vehicles in the environment.

[0162] The server 578 can be used to train machine learning models (e.g., neural networks) based on training data. The training data can be generated by vehicles and / or can be generated in simulations (e.g., using game engines). In some examples, the training data is labeled (e.g., in cases where the neural network benefits from supervised learning) and / or undergoes other pre-processing, while in other examples, the training data is not labeled and / or pre-processed (e.g., in cases where the neural network does not require supervised learning). The training can be performed in accordance with any one or more categories of machine learning techniques, including but not limited to categories such as: supervised training, semi-supervised training, unsupervised training, self-learning, reinforcement learning, federated learning, transfer learning, feature learning (including principal component and cluster analysis), multilinear subspace learning, manifold learning, representation learning (including spare dictionary learning), rule-based machine learning, anomaly detection, and any variants or combinations thereof. Once the machine learning models are trained, the machine learning models can be used by vehicles (e.g., transmitted to vehicles over the network 590) and / or the machine learning models can be used by the server 578 to remotely monitor vehicles.

[0163] In some examples, the server 578 can receive data from vehicles and apply the data to the latest real-time neural networks for real-time intelligent inference. The server 578 can include deep learning supercomputers and / or specialized AI computers powered by GPUs 584, such as the DGX and DGX Station machines developed by NVIDIA. However, in some examples, the server 578 can include deep learning infrastructure of a data center that is powered using CPUs only.

[0164] The deep learning infrastructure of the server 578 can be capable of fast real-time inference, and can use this capability to assess and validate the health of the processors, software, and / or associated hardware in the vehicle 500. For example, the deep learning infrastructure can receive periodic updates from the vehicle 500, such as a sequence of images and / or objects located in the sequence of images that the vehicle 500 has located (e.g., via computer vision and / or other machine learning object classification techniques). The deep learning infrastructure can run its own neural network to identify the objects and compare them to the objects identified by the vehicle 500, and if the results do not match and the infrastructure concludes that the AI in the vehicle 500 is malfunctioning, the server 578 can transmit a signal to the vehicle 500 instructing the fail-safe computer of the vehicle 500 to take control, notify the passengers, and complete a safe parking operation.

[0165] For inference, the server 578 can include GPUs 584 and one or more programmable inference accelerators (such as NVIDIA’s TensorRT 3). The combination of GPU-powered servers and inference-accelerated can make real-time response possible. In other examples, such as where performance is less important, CPU-, FPGA-, and other processor-powered servers can be used for inference.

[0166] Example Computing Device

[0167] Figure 6 A block diagram of an example computing device 600 suitable for implementing some embodiments of the present disclosure is shown. The computing device 600 can include an interconnection system 602 that directly or indirectly couples the following devices: memory 604, one or more central processing units (CPUs) 606, one or more graphics processing units (GPUs) 608, a communication interface 610, input / output (I / O) ports 612, I / O components 614, a power supply 616, one or more presentation components 618 (e.g., a display), and one or more logic units 620. In at least one embodiment, the computing device 600 can include one or more virtual machines (VMs), and / or any of its components can include virtual components (e.g., virtual hardware components). For non-limiting examples, one or more of the GPUs 608 can include one or more vGPUs, one or more of the CPUs 606 can include one or more vCPUs, and / or one or more of the logic units 620 can include one or more virtual logic units. As such, the computing device 600 can include discrete components (e.g., a complete GPU dedicated to the computing device 600), virtual components (e.g., a portion of a GPU dedicated to the computing device 600), or a combination thereof.

[0168] Although Figure 6The various blocks are shown connected via an interconnect system 602 with wiring, but this is not intended to be limiting and is merely for clarity. For example, in some embodiments, a presentation component 618, such as a display device, may be considered an I / O component 614 (e.g., if the display is a touchscreen). As another example, CPU 606 and / or GPU 608 may include memory (e.g., memory 604 may represent a storage device other than the memory of GPU 608, CPU 606, and / or other components). In other words, Figure 6 The computing devices mentioned are merely illustrative. No distinction is made between categories such as "workstation," "server," "laptop," "desktop," "tablet," "client device," "mobile device," "handheld device," "game console," "electronic control unit (ECU)," "virtual reality system," and / or other device or system types, as all of these are considered within the same category. Figure 6 Within the scope of computing devices.

[0169] Interconnect system 602 may represent one or more links or buses, such as address buses, data buses, control buses, or combinations thereof. Interconnect system 602 may include one or more bus or link types, such as Industry Standard Architecture (ISA) bus, Extended Industry Standard Architecture (EISA) bus, Video Electronics Standards Association (VESA) bus, Peripheral Component Interconnect (PCI) bus, Peripheral Component Interconnect Fast (PCIe) bus, and / or another type of bus or link. In some embodiments, there is a direct connection between components. For example, CPU 606 may be directly connected to memory 604. Further, CPU 606 may be directly connected to GPU 608. In cases where there is a direct or point-to-point connection between components, interconnect system 602 may include a PCIe link implementing that connection. In these examples, the PCI bus need not be included in computing device 600.

[0170] The memory 604 may include any medium of a wide variety of computer-readable media. A computer-readable medium can be any available medium that can be accessed by the computing device 600. Computer-readable media may include volatile and non-volatile media, as well as removable and non-removable media. For example and without limitation, computer-readable media may include computer storage media and communication media.

[0171] Computer storage media can include volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules, and / or other data types. For example, memory 604 can store computer readable instructions such as those representing programs and / or program elements, e.g., an operating system. Computer storage media can include, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by computing device 600. Computer storage media, as used herein, does not include signals per se.

[0172] Computer storage media can include computer readable instructions, data structures, program modules, and / or other data types in a modulated data signal, such as a carrier wave or other transport mechanism, and includes any information delivery media. The term "modulated data signal" can refer to a signal that has one or more of its characteristics set or changed in such a manner as to encode information in the signal. By way of example, and not limitation, computer storage media can include wired media such as a wired network or direct-wired connection, and wireless media such as acoustic, RF, infrared, and other wireless media. Combinations of the any of the above should also be included within the scope of computer readable media.

[0173] CPUs 606 can be configured to execute at least some of the computer readable instructions in order to control one or more components of computing device 600 to perform one or more of the methods and / or processes described herein. Each of CPUs 606 can include one or more cores (e.g., one, two, four, eight, twenty-eight, seventy-two, etc.) capable of processing a large number of software threads simultaneously. CPUs 606 can include any type of processors and can include different types of processors, depending on the type of computing device 600 being implemented (e.g., processors with fewer cores for mobile devices and processors with more cores for servers). For example, depending on the type of computing device 600, the processors can be Advanced RISC Machines (ARM) processors implemented using reduced instruction set computing (RISC) or x86 processors implemented using complex instruction set computing (CISC). Computing device 600 can include one or more CPUs 606 in addition to one or more microprocessors or supplemental co-processors such as math co-processors.

[0174] In addition to or alternatively from the CPU 606, the GPU 608 can be configured to execute at least some of the computer-readable instructions in order to control one or more components of the computing device 600 to perform one or more of the methods and / or processes described herein. One or more of the GPU 608 can be an integrated GPU (e.g., with one or more of the CPU 606) and / or one or more of the GPU 608 can be a discrete GPU. In embodiments, one or more of the GPU 608 can be a co-processor of one or more of the CPU 606. The GPU 608 can be used by the computing device 600 to render graphics (e.g., 3D graphics) or to perform general purpose computing. For example, the GPU 608 can be used for general purpose computing on GPUs (GPGPU). The GPU 608 can include hundreds or thousands of cores capable of processing hundreds or thousands of software threads concurrently. The GPU 608 can generate pixel data for an output image in response to rendering commands (e.g., rendering commands from the CPU 606 received via a host interface). The GPU 608 can include graphics memory, such as display memory, for storing pixel data or any other appropriate data, such as GPGPU data. The display memory can be included as part of the memory 604. The GPU 608 can include two or more GPUs operating in parallel (e.g., via a link). The link can connect the GPUs directly (e.g., using NVLINK) or can connect the GPUs through a switch (e.g., using an NVSwitch). When combined together, each GPU 608 can generate pixel data or GPGPU data for a different portion of an output or for a different output (e.g., a first GPU for a first image and a second GPU for a second image). Each GPU can include its own memory or can share memory with other GPUs.

[0175] In addition to or instead of CPU 606 and / or GPU 608, logic units 620 can be configured to execute at least some of the computer-readable instructions in order to control one or more components of computing device 600 to perform one or more of the methods and / or processes described herein. In embodiments, CPU 606, GPU 608, and / or logic units 620 can perform any combination of the methods, processes, and / or portions thereof, discretely or jointly. One or more of logic units 620 can be part of and / or integrated in one or more of CPU 606 and / or GPU 608, and / or one or more of logic units 620 can be discrete components or otherwise external to CPU 606 and / or GPU 608. In embodiments, one or more of logic units 620 can be a co-processor of one or more of CPU 606 and / or one or more of GPU 608.

[0176] Examples of logic units 620 include one or more processing cores and / or components thereof, such as tensor cores (TCs), tensor processing units (TPUs), pixel visual cores (PVCs), vector processing units (VPUs), graphics processing clusters (GPCs), texture processing clusters (TPCs), streaming multi-processors (SMs), tree traversal units (TTUs), artificial intelligence accelerators (AIAs), deep learning accelerators (DLAs), arithmetic logic units (ALUs), application specific integrated circuits (ASICs), floating point units (FPUs), input / output (I / O) elements, data processing units (DPUs), peripheral component interconnects (PCIs), or peripheral component interconnect express (PCIe) elements, and / or the like.

[0177] Communication interface 610 can include one or more receivers, transmitters, and / or transceivers that enable computing device 600 to communicate with other computing devices via electronic communication networks, including wired and / or wireless communication. Communication interface 610 can include components and functionality to enable communication over any of a number of different networks, such as wireless networks (e.g., Wi-Fi, Z-Wave, Bluetooth, Bluetooth LE, ZigBee, etc.), wired networks (e.g., communication over Ethernet or InfiniBand), low power wide area networks (e.g., LoRaWAN, SigFox, etc.), and / or the Internet.

[0178] I / O ports 612 can enable the computing device 600 to logically couple to other devices including I / O components 614, presentation components 618, and / or other components, some of which can be built in to (e.g., integrated in) the computing device 600. Illustrative I / O components 614 include a microphone, mouse, keyboard, joystick, game pad, game controller, satellite dish, scanner, printer, wireless device, etc. The I / O components 614 can provide a natural user interface (NUI) that processes air gestures, voice, or other physiological inputs generated by a user. In some examples, inputs can be transmitted to an appropriate network element for further processing. A NUI can implement any combination of speech recognition, handwriting recognition, facial recognition, biometric recognition, gesture recognition both on screen and adjacent to the screen, air gestures, head and eye tracking, and touch recognition (as described in more detail below) associated with a display of the computing device 600. The computing device 600 can include depth cameras, infrared cameras, RGB cameras, touch screen technology, and combinations of these, for gesture detection and recognition. Additionally, the computing device 600 can include accelerometers or gyroscopes (e.g., as part of an inertial measurement unit, IMU) that enable detection of motion. In some examples, the output of the accelerometers or gyroscopes can be used by the computing device 600 to render immersive augmented reality or virtual reality.

[0179] The power supply 616 can include a hard-wired power supply, a battery power supply, or a combination thereof. The power supply 616 can supply power to the computing device 600 to enable the components of the computing device 600 to operate.

[0180] The presentation components 618 can include a display (e.g., a monitor, a touch screen, a television, a heads-up display (HUD), other display types, or combinations thereof), speakers, and / or other presentation components. The presentation components 618 can receive data from other components (e.g., the GPU 608, the CPU 606, etc.) and output the data (e.g., as a

[0181] Example data center

[0182] Figure 7 An example data center 700 that can be used in at least one embodiment of the present disclosure is shown. The data center 700 can include a data center infrastructure layer 710, a framework layer 720, a software layer 730, and / or an application layer 740.

[0183] As Figure 7As shown, the data center infrastructure layer 710 can include a resource orchestrator 712, grouped computing resources 714, and node computing resources (“node C.R.”) 716(1)-716(N), where “N” represents any whole, positive integer. In at least one embodiment, the node C.R.s 716(1)-716(N) can include, but are not limited to, any number of central processing units (“CPUs” or “processors”) including accelerators, field programmable gate arrays (FPGAs), graphics processing units (GPUs) or other processors, memory devices such as dynamic read only memory, storage devices such as solid state or disk drives, network input / output (“NW I / O”) devices, network switches, virtual machines (“VMs”), power modules, and / or cooling modules, etc. In some embodiments, one or more of the node C.R.s 716(1)-716(N) can correspond to a server having one or more of the above-described computing resources. Moreover, in some embodiments, one or more of the node C.R.s 716(1)-716(N) can include one or more virtual components such as a vGPU, a vCPU, etc., and / or one or more of the node C.R.s 716(1)-716(N) can correspond to a virtual machine (VM).

[0184] In at least one embodiment, the grouped computing resources 714 can include separate groupings of node C.R.s 716 housed within one or more racks (not shown), or housed within a number of racks (also not shown) within various geographic locations of a data center. The separate groupings of node C.R.s within the grouped computing resources 714 can include groupings of computing, network, memory, or storage resources that can be configured or allocated to support one or more workloads. In at least one embodiment, several node C.R.s 716 including CPUs, GPUs, and / or other processors can be grouped within one or more racks to provide computing resources to support one or more workloads. The one or more racks can also include any number and combination of power modules, cooling modules, and / or network switches.

[0185] The resource orchestrator 722 can configure or otherwise control the one or more node C.R.s 716(1)-716(N) and / or the grouped computing resources 714. In at least one embodiment, the resource orchestrator 722 can include a software design infrastructure (“SDI”) management entity for the data center 700. The resource orchestrator 722 can comprise hardware, software, or some combination thereof.

[0186] In at least one embodiment, as Figure 7As shown, the framework layer 720 can include a job scheduler 732, a configuration manager 734, a resource manager 736, and / or a distributed file system 738. The framework layer 720 can include a framework that supports the software 732 of the software layer 730 and / or one or more applications 742 of the application layer 740. The software 732 or the applications 742 can include web-based service software or applications, respectively, such as the services or applications provided by Amazon Web Services, Google Cloud, and Microsoft Azure. The framework layer 720 can be, but is not limited to, a type of free and open-source software web application framework such as Apache Spark™ (hereinafter “Spark”) that can utilize the distributed file system 738 for large-scale data processing (e.g., “big data”). In at least one embodiment, the job scheduler 732 can include a Spark driver to facilitate scheduling of workloads supported by various layers of the data center 700. The configuration manager 734 can be capable of configuring different layers, such as the software layer 730 and the framework layer 720 including Spark and the distributed file system 738 for supporting large-scale data processing. The resource manager 736 can be capable of managing clustered or grouped computing resources mapped to or allocated for supporting the distributed file system 738 and the job scheduler 732. In at least one embodiment, the clustered or grouped computing resources can include the grouped computing resources 714 on the data center infrastructure layer 710. The resource manager 736 can coordinate with the resource orchestrator 712 to manage these mapped or allocated computing resources.

[0187] In at least one embodiment, the software 732 included in the software layer 730 can include software used by at least portions of the node C.R.s 716(1)-716(N), the grouped computing resources 714, and / or the distributed file system 738 of the framework layer 720. One or more types of software can include, but are not limited to, Internet web page search software, email virus scanning software, database software, and streaming video content software.

[0188] In at least one embodiment, the one or more applications 742 included in the application layer 740 can include one or more types of applications used by at least portions of the node C.R.s 716(1)-716(N), the grouped computing resources 714, and / or the distributed file system 738 of the framework layer 720. One or more types of applications can include, but are not limited to, any number of genomics applications, cognitive computing and machine learning applications, including training or inferencing software, machine learning framework software (e.g., PyTorch, TensorFlow, Caffe, etc.), and / or other machine learning applications used in conjunction with one or more embodiments.

[0189] In at least one embodiment, any of the configuration manager 734, resource manager 736, and resource coordinator 712 can perform any number and type of self-modification actions based on any amount and type of data acquired in any technically feasible manner. Self-modification actions can mitigate potentially poor configuration decisions by data center operators of data center 700 and can prevent underutilization and / or poor performance of the data center.

[0190] Data center 700 may include tools, services, software, or other resources to train one or more machine learning models or to use one or more machine learning models to predict or infer information, in accordance with one or more embodiments described herein. For example, a machine learning model can be trained by calculating weight parameters according to a neural network architecture using the software and / or computing resources described above with respect to data center 700. In at least one embodiment, information can be inferred or predicted using trained or deployed machine learning models corresponding to one or more neural networks, using the resources described above with respect to data center 700, by using weight parameters calculated through one or more training techniques such as, but not limited to, those described herein.

[0191] In at least one embodiment, the data center 700 may use a CPU, application-specific integrated circuit (ASIC), GPU, DPU, FPGA, and / or other hardware (or corresponding virtual computing resources) to perform training and / or inference. Furthermore, one or more of the aforementioned software and / or hardware resources may be configured as a service to allow a user to train or perform information inference, such as image recognition, speech recognition, or other artificial intelligence services.

[0192] Example network environment

[0193] A network environment suitable for implementing embodiments of this disclosure may include one or more client devices, servers, network-attached storage (NAS), other backend devices, and / or other device types. Client devices, servers, and / or other device types (e.g., each device) may be... Figure 6 This is implemented on one or more instances of computing devices 600—for example, each device may include similar components, features, and / or functions of one or more computing devices 600. Furthermore, in the case of implementing backend devices (e.g., servers, NAS, etc.), the backend devices may be included as part of a data center 700, examples of which are described in this document. Figure 7 To describe in more detail.

[0194] Components of a network environment can communicate with each other via one or more networks, which can be wired, wireless, or both. A network can include multiple networks or a network of multiple networks. For example, a network can include one or more wide area networks (WANs), one or more local area networks (LANs), one or more public networks, such as the Internet and / or the public switched telephone network (PSTN), and / or one or more private networks. In the case where a network includes a wireless telecommunications network, components such as base stations, communication towers, or even access points (among other components) can provide wireless connectivity.

[0195] A compatible network environment can include one or more peer-to-peer network environments (in which case servers can not be included in the network environment) and one or more client-server network environments (in which case one or more servers can be included in the network environment). In a peer-to-peer network environment, functionality described herein with respect to servers can be implemented on any number of client devices.

[0196] In at least one embodiment, a network environment can include one or more cloud-based network environments, distributed computing environments, combinations thereof, and the like. A cloud-based network environment can include a framework layer, a work scheduler, a resource manager, and a distributed file system implemented on one or more servers, which can include one or more core network servers and / or edge servers. The framework layer can include a framework that supports a software layer and / or one or more applications of an application layer. The software or applications can include web-based service software or applications, respectively. In embodiments, one or more client devices can use the web-based service software or applications (e.g., by accessing the service software and / or applications via one or more application programming interfaces (APIs)). The framework layer can be, without limitation, a type of free and open-source software web application framework, such as can be used for large-scale data processing (e.g., “big data”) using the distributed file system.

[0197] A cloud-based network environment can provide cloud computing and / or cloud storage that performs any combination of the computing and / or data storage functionality described herein (or one or more portions thereof). Any of these different functionalities can be distributed across multiple locations from central or core servers (e.g., one or more data centers that can be distributed across states, regions, countries, globally, and the like). If a connection with a user (e.g., a client device) is relatively close to an edge server, a core server can designate at least a portion of functionality to the edge server. A cloud-based network environment can be private (e.g., limited to a single organization), public (e.g., available to many organizations), and / or a combination thereof (e.g., a hybrid cloud environment).

[0198] One or more client devices can include at least some of the components, features, and functionality of the one or more example computing devices 600 described herein with respect to Figure 6 As examples and not by way of limitation, a client device can be embodied as a personal computer (PC), a laptop computer, a mobile device, a smartphone, a tablet computer, a smartwatch, a wearable computer, a personal digital assistant (PDA), an MP3 player, a virtual reality headset, a global positioning system (GPS) or device, a video player, a camera, a surveillance device or system, a vehicle, a ship, a spacecraft, a virtual machine, a drone, a robot, a hand-held communication device, a hospital device, a gaming device or system, an entertainment system, a vehicle computer system, an embedded system controller, a remote control, an appliance, a consumer electronic device, a workstation, an edge device, any combination of these depicted devices, or any other suitable device.

[0199] The present disclosure can be described in the general context of machine-usable instructions or computer code, including computer-executable instructions such as program modules, being executed by a computer or other machine, such as a personal data assistant or other handheld device. Generally, program modules include routines, programs, objects, components, data structures, etc., that perform particular tasks or implement particular abstract data types. The present disclosure can be practiced in a variety of system configurations, including hand-held devices, consumer electronics, general- purpose computers, more specialty computing devices, etc. The present disclosure can also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network.

[0200] As used herein, the term “and / or,” with respect to two or more elements, means that only one of the elements need be present. For example, “element A and / or element B” can include only element A, only element B, or both element A and element B. Further, “at least one of element A or element B” can include at least one of element A, at least one of element B, or at least one of element A and at least one of element B. Further still, “at least one of element A and element B” can include at least one of element A, at least one of element B, or at least one of element A and at least one of element B.

[0201] The subject matter of the present disclosure is described with specificity herein to meet statutory requirements. However, the description itself is not intended to limit the scope of this disclosure. Rather, the inventors have contemplated that the claimed subject matter might also be embodied in other ways, to include different steps or combinations of steps similar to the ones described in this document, in conjunction with other present or future technologies. Moreover, although the terms "step" and / or "block" might be used herein to connote different elements of methods employed, the terms should not be interpreted as implying any particular order among or between various steps herein disclosed unless and except when the order of individual steps is explicitly described.

Claims

1. A method comprising: applying first data from one or more sensors to a deep neural network (DNN) and a patch neural network (PNN), wherein the PNN is trained to compensate only for one or more failure modes of the DNN; processing the first data to compute second data, the processing comprising: computing a first output using a first subset of nodes of the DNN and based at least in part on the first data; processing the first output using a second subset of the nodes of the DNN; computing a second output using a first subset of nodes of the PNN and based at least in part on the first data; processing the first output and the second output using a second subset of the nodes of the PNN; and performing one or more operations based at least in part on the second data to control an autonomous vehicle.

2. The method of claim 1, wherein a PNN layer of the PNN comprising the nodes of the PNN is separate from a DNN layer of the DNN comprising the nodes of the DNN.

3. The method of claim 1, wherein one or more layers of a larger DNN comprise the nodes of the PNN and the nodes of the DNN.

4. The method of claim 1, wherein the second data represents a final output of the DNN and a final output of the PNN.

5. The method of claim 4, wherein the final output of the PNN comprises at least one output type represented by the final output of the DNN and at least one output type not represented by the final output of the DNN.

6. The method of claim 4, further comprising: determining an output selection based at least in part on analyzing the final output of the DNN and the final output of the PNN, wherein performing the one or more operations is based at least in part on the output selection.

7. The method of claim 6, wherein determining the output selection is performed using a gating neural network (GNN) that outputs a binary decision indicating whether to use the final output of the DNN or the final output of the PNN as the output selection.

8. The method of claim 6, wherein: the analyzing comprises analyzing a first confidence value associated with the final output of the DNN and a second confidence value associated with the final output of the PNN; and determining the output selection comprises selecting the output selection based at least in part on analyzing the first confidence value and the second confidence value.

9. The method of claim 4, further comprising: determining, based at least in part on one or more received signals, whether to use the final output of the DNN or the final output of the PNN.

10. The method of claim 9, wherein the one or more received signals correspond to a location, a weather condition, a lighting condition, or a time of day.

11. The method of claim 1, wherein the method is performed by at least one of: A control system for an autonomous or semi-autonomous machine; A perception system for an autonomous or semi-autonomous machine; A system for performing simulation operations; A system for performing deep learning operations; A system implemented using edge devices; A system implemented using robots; A system incorporating one or more virtual machines (VMs); A system implemented at least partially in a data center; or A system implemented at least partially using cloud computing resources.

12. The method of claim 1, wherein first parameters of the nodes of the PNN are trained while second parameters of the nodes of the DNN are fixed.

13. The method of claim 1, wherein weights associated with connections between the second output and one or more of the nodes of the DNN are fixed to zero.

14. A system comprising: a system on chip (SoC) to generate an output for controlling an autonomous vehicle, the SoC comprising: a processor to execute a neural network, the neural network comprising: a first layer comprising a first set of raw nodes to process first sensor data to compute a first output and a first set of patch nodes to process the first sensor data to compute a second output; and a second layer after the first layer, the second layer comprising a second set of raw nodes to process the first output to compute a third output and a second set of patch nodes to process the first output and the second output to compute a fourth output; wherein the first and second sets of patch nodes are trained to compensate for one or more failure modes of at least one of the first and second sets of raw nodes.

15. The system of claim 14, wherein parameters associated with the first and second sets of raw nodes are fixed during training of the first and second sets of patch nodes.

16. The system of claim 14, wherein one or more zeros are added to a matrix corresponding to the second set of raw nodes to match dimensions of a matrix corresponding to the second set of patch nodes, the one or more zeros corresponding to weights between connections of the second output of the first set of patch nodes and the second set of raw nodes.

17. The system of claim 14, wherein: the neural network is trained with the first set of raw nodes as a first discrete layer and the first set of patch nodes as a second discrete layer; and after training, the first layer is generated by connecting weights associated with the first set of patch nodes and weights associated with the first set of raw nodes.

18. The system of claim 14, wherein during training, the neural network undergoes a pruning operation to remove one or more sets of patch nodes corresponding to one or more layers of the neural network.

19. A processor comprising: one or more circuits to: applying first data from one or more sensors to a deep neural network DNN and a patch neural network PNN, wherein the PNN is trained to compensate only for one or more failure modes of the DNN; processing the first data to compute second data, the processing including: computing a first output using a first subset of nodes of the DNN and based at least in part on the first data; processing the first output using a second subset of the nodes of the DNN; computing a second output using a first subset of nodes of the PNN and based at least in part on the first data; processing the first output and the second output using a second subset of the nodes of the PNN; and performing one or more operations based at least in part on the second data to control an autonomous vehicle.

20. The processor of claim 19, wherein the nodes of the PNN correspond to one or more layers of the PNN that are separate from one or more layers of the DNN.

21. The processor of claim 19, wherein the nodes of the PNN are included in addition to the nodes of the DNN to generate a combined layer.

22. The processor of claim 19, wherein the processor is included in at least one of: a control system for an autonomous or semi-autonomous machine; a perception system for an autonomous or semi-autonomous machine; a system to perform simulation operations; a system to perform deep learning operations; a system implemented using edge devices; a system implemented using robots; a system incorporating one or more virtual machines VMs; a system implemented at least in part in a data center; or a system implemented at least in part using cloud computing resources.

23. The processor of claim 19, wherein first parameters of the nodes of the PNN are trained while second parameters of the nodes of the DNN are fixed.

24. The processor of claim 19, wherein weights associated with connections between the second output of the nodes of the PNN and the nodes of the DNN are fixed to zero.

25. The processor of claim 19, wherein the PNN is validated at least in part by performing the PNN in shadow mode.

Citation Information

Patent Citations

  • Method for programmable timeouts of tree traversal mechanisms in hardware

    US10885698B2

  • Real time object behavior prediction

    US20200175691A1

  • Object classification using extra-regional context

    US20200202145A1

  • Path perception diversity and redundancy in autonomous machine applications

    US20200249684A1

  • Depth concatenation using a matrix computation unit

    US9691019B1