PWM signal generating circuit, method and power conversion system

Abstract

The present invention proposes a PWM signal generating circuit, method and power conversion system, which relate to the field of power supply. A duty cycle adjustment module is added to the PWM signal generating circuit to receive a pulse signal reflecting the output voltage status, and when the duration of the first voltage of a pulse in the pulse signal is greater than the pulse window time, a trigger adjustment signal is output, so that a timer unit shortens a variable minimum off-time period signal or lengthens a variable on-time period signal, so as to increase the switching frequency or increase the duty cycle, and quickly adjust the output voltage. The PWM signal generating circuit has a small size, low cost, fast response speed and high precision.

Description

Technical Field

[0001] The present invention relates to the field of power supply, and in particular to a PWM signal generating circuit, method and power conversion system. Background Art

[0002] With the continuous advancement of technology, power conversion systems are developing towards miniaturization, high precision and fast response speed.

[0003] See also Figure 1 The schematic diagram of the power conversion system of the prior art shown includes a power converter 10, which usually includes at least one switch tube. The PWM signal generating circuit 20 generates a PWM signal to the control end of the switch tube according to the output voltage Vout of the power converter 10 to control the operation of the power converter 10 and convert the input voltage Vin into the output voltage Vout to supply power to the load. The power conversion system usually adopts a fixed on-time control method or a fixed minimum off-time control method. The fixed on-time control method is that the on-time of the PWM signal is fixed, and the output voltage is adjusted by adjusting the off-time of the PWM signal; the fixed minimum off-time control method is that the minimum off-time of the PWM signal is fixed, and the output voltage is adjusted by adjusting the on-time of the PWM signal.

[0004] In actual applications, during the operation of the power conversion system, the output voltage Vout may drop instantaneously due to various reasons, such as when a fixed high current load or a severe transient current load is applied to the output end of the power converter 10, or when operating in a harsh environment. The power conversion system needs to quickly detect the instantaneous drop in the output voltage Vout and adjust the output voltage Vout back to the expected value.

[0005] Please refer to Figure 1 In the prior art, a comparator 32 is added outside the PWM signal generating circuit 20, the first input terminal of the comparator 32 receives the output voltage sampling signal (Vout') output by the output voltage sampling unit 31, and the second input terminal of the comparator 32 receives a reference voltage VR, and the change of the output voltage Vout is monitored by comparing the output voltage sampling signal (Vout') with the reference voltage VR. This detection method is simple, but in order to accurately detect the change of the output voltage Vout, a sensitive comparator is required, and the comparator should have high precision and even high bandwidth to avoid consuming a lot of power consumption and layout area. In addition, for this control method, the designer must define a suitable reference voltage VR. If the selected reference voltage VR is a bit too high, a medium current load or a large voltage ripple may immediately trigger the comparator 32; on the contrary, if the selected reference voltage VR is a bit too low, even if a large current load is applied, the comparator 32 may not be triggered, resulting in a large design difficulty and it is difficult to ensure control accuracy and response speed.

[0006] Therefore, the current power conversion system cannot meet the market demand for miniaturization, high precision and fast response speed. Summary of the invention

[0007] The present invention proposes a PWM signal generating circuit, comprising: a pulse signal generating circuit, used to generate a pulse signal according to the output voltage of a power converter, the pulse signal comprising a plurality of pulses formed by a first voltage and a second voltage located after the first voltage, wherein the pulse signal generating circuit is configured to: when the output voltage is less than a reference voltage, the pulse formed is the first voltage, when the output voltage is greater than the reference voltage, the pulse formed is the second voltage, or, when the output voltage is greater than a reference voltage, the pulse formed is the first voltage, when the output voltage is less than the reference voltage, the pulse formed is the second voltage; a duty cycle adjusting module, configured to receive the pulse signal, and output a trigger adjustment signal when the duration of the first voltage of the formed pulse is greater than the pulse window time; a timer unit, used to output a fixed conduction period signal and a variable minimum An off period signal, or outputting a fixed minimum off period signal and a variable on period signal, is configured so that when the trigger adjustment signal is received, the timer unit executes: shortening the variable minimum off period signal from a first minimum off period signal to a second minimum off period signal, or lengthening the variable on period signal from a first on period signal to a second on period signal; a PWM controller, connected to the pulse signal generating circuit and the timer unit, is configured so that when the pulse signal is received, a PWM signal is generated, so that the PWM signal first maintains the on time length corresponding to the fixed on period signal, and then maintains the off time length corresponding to the second minimum off period signal, or the PWM signal first maintains the on time length corresponding to the second on period signal, and then maintains the off time length corresponding to the fixed minimum off period signal.

[0008] The present invention also proposes a power conversion system, comprising: a power converter, comprising at least one switching tube, the input end of the power converter being used to receive an input voltage, and the output end of the power converter being used to output an output voltage; the above-mentioned PWM signal generating circuit receiving the output voltage, outputting the PWM signal to the control end of the at least one switching tube according to the output voltage, so as to control the power converter to convert the input voltage into the output voltage.

[0009] The present invention also proposes a PWM signal generating method, comprising: S1: generating a PWM signal using a current fixed on-time period signal and a variable minimum off-time period signal, or a current fixed minimum off-time period signal and a variable on-time period signal, a power converter receiving the PWM signal to output an output voltage, and entering step S2; S2: monitoring whether the duration of a first voltage of a pulse of a pulse signal is greater than a pulse window time, if yes, executing step S3, if not, executing step S1, wherein the pulse signal includes a plurality of pulses formed by a first voltage and a second voltage located after the first voltage, when the output voltage is less than a reference voltage, the pulse formed is the first voltage, and when the output voltage is greater than the reference voltage When the output voltage is greater than a reference voltage, the pulse formed is the second voltage, or, when the output voltage is less than the reference voltage, the pulse formed is the second voltage; S3: execute to lengthen the variable on-time period signal or shorten the variable minimum off-time period signal, and enter step S4; S4: generate a PWM signal with the current fixed on-time period signal and the variable minimum off-time period signal, or, the fixed minimum off-time period signal and the variable on-time period signal, and enter step S5; S5: determine whether the current pulse is switched from the first voltage to the second voltage, if yes, execute step S6; S6: execute to lengthen the variable minimum off-time period signal, or shorten the variable on-time period signal, and enter step S1. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 Schematic diagram of a power conversion system in the prior art.

[0011] Figure 2 FIG. 4 is a schematic diagram of a PWM signal generating circuit according to an embodiment of the present invention.

[0012] Figure 3A FIG. 1 is a schematic diagram of operating waveforms of the PWM signal generating circuit according to the first embodiment of the present invention.

[0013] Figure 3B FIG. 1 is a schematic diagram of operating waveforms of a PWM signal generating circuit according to a second embodiment of the present invention.

[0014] Figure 4 FIG. 4 is a detailed block diagram of a duty cycle adjustment module according to an embodiment of the present invention.

[0015] Figure 5 FIG. 4 is a detailed block diagram of a duty cycle adjustment module according to another embodiment of the present invention.

[0016] Figure 6 FIG. 4 is a detailed schematic diagram of a pulse signal generating circuit according to an embodiment of the present invention.

[0017] Figure 7 FIG. 4 is a schematic diagram of a power conversion system according to an embodiment of the present invention.

[0018] Figure 8 FIG. 4 is a flow chart of a PWM signal generating method according to an embodiment of the present invention.

[0019] Fig. 9 FIG. 4 is a flow chart of a PWM signal generating method according to another embodiment of the present invention. DETAILED DESCRIPTION

[0020] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0021] In one embodiment of the present invention, a PWM signal generating circuit is provided for generating a PWM signal. The PWM signal is used to control at least one switch tube in a power converter to convert an input voltage into an output voltage. For details, please refer to Figure 2 3 is a schematic diagram of a PWM signal generating circuit according to an embodiment of the present invention. Please refer to FIG. 4 for a schematic diagram of a working waveform of a PWM signal generating circuit according to an embodiment of the present invention.

[0022] A PWM signal generating circuit 100 according to an embodiment of the present invention comprises: a pulse signal generating circuit 110, for generating a pulse signal d1 according to an output voltage Vout of a power converter, wherein the pulse signal d1 comprises a plurality of pulses formed by a first voltage V1 and a second voltage V2 located after the first voltage V1 (as shown in FIG3 ), wherein the pulse signal generating circuit 110 is configured as follows: when the output voltage Vout is less than a reference voltage VR, the pulse formed is the first voltage V1, when the output voltage Vout is greater than the reference voltage VR, the pulse formed is the second voltage V2, or, when the output voltage Vout is greater than a reference voltage Vout, the pulse formed is the first voltage V1, when the output voltage Vout is less than the reference voltage VR, the pulse formed is the second voltage V2; a duty cycle adjusting module 130, configured to receive the pulse signal d1, and output a trigger adjusting signal d2 when the duration of the first voltage V1 of the formed pulse is greater than the pulse window time;

[0023] In a first embodiment, the timer unit 140 is used to output a fixed on-period signal and a variable minimum off-period signal, and is configured to, when receiving the trigger adjustment signal d2, the timer unit 140 executes: shortening the variable minimum off-period signal from a first minimum off-period signal to a second minimum off-period signal. The PWM controller 120, connected to the pulse signal generating circuit 110 and the timer unit 140, is configured to: when receiving the pulse signal d1, generate a PWM signal, so that the PWM signal first maintains the on-period time length corresponding to the fixed on-period signal, and then maintains the off-period time length corresponding to the second minimum off-period signal at least.

[0024] In a second embodiment, the timer unit 140 is used to output a fixed minimum off-period signal and a variable on-period signal, and is configured to, when receiving the trigger adjustment signal d2, the timer unit 140 executes: lengthening the variable on-period signal from a first on-period signal to a second on-period signal. The PWM controller 120, connected to the pulse signal generating circuit 110 and the timer unit 140, is configured to, when receiving the pulse signal d1, generate a PWM signal, so that the PWM signal first maintains the on-period length corresponding to the second on-period signal, and then maintains at least the off-period length corresponding to the fixed minimum off-period signal.

[0025] Specifically, Figure 3A The control method of the first embodiment with a fixed on-time is used as an example to explain the principle. When the output voltage Vout is less than a reference voltage VR, the pulse formed is a first voltage V1, and when the output voltage Vout is greater than the reference voltage VR, the pulse formed is a second voltage V2. Figure 3A In the period from t0 to t1 shown in FIG. 1 , the variable minimum off-period signal is the first minimum off-period signal toff1 (for example: Figure 3A The PWM signal generated by the PWM controller 120 is first maintained on (for example: Figure 3A The high voltage of the PWM signal shown) the time length corresponding to the fixed on-period signal, and then at least maintain the off state (for example: Figure 3A The time length corresponding to the first minimum off period signal toff1 (such as the low voltage of the PWM signal shown in FIG. Figure 3A The duration of the low voltage of the PWM signal shown is greater than the duration corresponding to the first minimum off-period signal toff1).

[0026] At time t1, when the output voltage Vout is less than the reference voltage VR, the pulse d1 formed is the first voltage V1, and the output voltage Vout is continuously less than the reference voltage VR, then the pulse d1 maintains the first voltage V1, and when the duration of the first voltage V1 is greater than the pulse window time tpw, at time t2, the duty cycle adjustment module 130 outputs the trigger adjustment signal d2, and the timer unit 140 executes to shorten the variable minimum off-period signal from the first minimum off-period signal toff1 to the second minimum off-period signal toff2, then the PWM signal generated by the PWM controller 120 makes the PWM signal first maintain the time length corresponding to the fixed on-period signal, and then maintain the time length corresponding to the second minimum off-period signal toff2. In this way, when the output voltage Vout is continuously less than the reference voltage VR for a time greater than the pulse window time tpw, the minimum off-time of the PWM signal can be immediately reduced, and the switching frequency of the power converter can be increased to quickly call back the output voltage Vout. In the period from t2 to t3 as shown in FIG. 3, the power converter operates in the first operation range.

[0027] Similarly, Figure 3B The control method of the second embodiment with a fixed minimum off time is used as an example to explain the principle. Similarly, when the output voltage Vout is less than a reference voltage VR, the pulse formed is a first voltage V1, and when the output voltage Vout is greater than the reference voltage VR, the pulse formed is a second voltage V2. Figure 3B In the period from t0 to t1 shown in FIG. 1 , the variable conduction period signal is the first conduction period signal ton1 (for example: Figure 3B The PWM signal generated by the PWM controller 120 is first kept on (for example: Figure 3A The high voltage of the PWM signal shown) the time length corresponding to the first on-period signal ton1, and then at least maintain the off state (for example: Figure 3A The low voltage of the PWM signal shown in FIG. 4A ) fixes the time length corresponding to the minimum off-period signal toff1.

[0028] At time t1, when the output voltage Vout is less than the reference voltage VR, the pulse d1 formed is the first voltage V1, and the output voltage Vout continues to be less than the reference voltage VR, then the pulse d1 maintains the first voltage V1, and when the duration of the first voltage V1 is greater than the pulse window time tpw, at time t2, the duty cycle adjustment module 130 outputs the trigger adjustment signal d2, and the timer unit 140 executes to extend the on-time period signal from the first on-time period signal ton1 to the second on-time period signal ton2, then the PWM signal generated by the PWM controller 120 makes the PWM signal first maintain the on-time length corresponding to the second on-time period signal ton2, and then at least maintain the off-time length corresponding to the fixed minimum off-time period signal toff1. In this way, when the output voltage Vout continues to be less than the reference voltage VR for a time greater than the pulse window time tpw, the duty cycle of the PWM signal can be immediately increased, and the output voltage Vout can be quickly called back. In the period from t2 to t3 as shown in Figure 3, the power converter is running in the first operating range.

[0029] As described above, once it is detected that the output voltage Vout is continuously less than the reference voltage VR for a period greater than the pulse window time tpw, the timer unit 140 shortens the variable minimum off-period signal or lengthens the on-period signal, and enables the PWM controller 120 to generate a PWM signal with the adjusted variable minimum off-period signal or on-period signal, thereby quickly responding to the decrease in the output voltage Vout and quickly adjusting it back to the expected value. Figure 2 The pulse signal generating circuit 110, the timer unit 140 and the PWM controller 120 are inherent modules in the PWM signal generating circuit 100. The present application only needs to add a duty cycle adjustment module 130 to monitor whether the duration of the first voltage V1 of the pulse is greater than the pulse window time. There is no need for a high-performance comparator in the prior art. Therefore, the PWM signal generating circuit provided by the present application has a small size, low cost, and fast response speed, and does not have the problem of difficulty in selecting the reference voltage VR in the prior art, so it has high accuracy.

[0030] In practical applications, when the load of the power converter is stable and the power consumption does not increase instantly, that is, the duration of the first voltage V1 is less than the pulse window time tpw, and the output voltage Vout is not continuously less than the reference voltage VR, as shown in FIG3 before time t1, the pulse signal generating circuit 110 generates a pulse at intervals, and the duration of the first voltage V1 of the pulse is less than the pulse window time tpw, and the duty cycle adjustment module 130 detects that the duration of the first voltage V1 of the pulse is less than the pulse window time tpw, and does not output the trigger adjustment signal d2. At this time, the timing The device unit 140 is configured to output a fixed on-period signal and a first minimum off-period signal, or output a fixed minimum off-period signal and a first on-period signal; the PWM controller 120 is configured to: when receiving the pulse signal d1, generate a PWM signal, so that the PWM signal first maintains the time length corresponding to the fixed on-period signal, and then at least maintains the time length corresponding to the first minimum off-period signal, or, so that the PWM signal first maintains the time length corresponding to the first on-period signal, and then at least maintains the time length corresponding to the fixed minimum off-period signal. That is, the power converter operates in the second operating range shown in Figure 3, and the power converter operates stably at this time. The above-mentioned "no output" means that the duty cycle adjustment module 130 does not output any signal, or the signal it outputs is different from the trigger adjustment signal d2 generated when the duration of the first voltage V1 of the pulse is greater than the pulse window time.

[0031] If a fixed high current load or a severe transient current load is applied to the output end of the power converter during operation, or if the power converter operates in a harsh environment, the power converter switches from the second operating range to the first operating range to adjust the output voltage Vout back.

[0032] When the power converter is running in the first operation interval shown in FIG. 3 , that is, when the timer unit 140 receives the trigger adjustment signal d2, the output voltage is quickly adjusted back. Furthermore, when the output voltage Vout is adjusted back to be greater than the reference voltage VR, the pulse formed is switched from the first voltage V1 to the second voltage V2. For example, at time t3, the duty cycle adjustment module 130 stops outputting the trigger adjustment signal d2, and the timer unit 140 at least executes one of shortening the second on-time period signal and lengthening the second minimum off-time period signal, that is, the power converter is running in the following manner: Figure 3A and Figure 3B Within the third operation interval (between time t3 and time t4) shown.

[0033] In practical applications, the timer unit 140 at least performs one of shortening the second on-period signal and lengthening the second minimum off-period signal, including: the timer unit 140 lengthens the second minimum off-period signal to a third minimum off-period signal, or shortens the second on-period signal to a third on-period signal, thereby reducing the switching frequency of the power converter or reducing the duty cycle of the PWM signal, and restoring the power converter to a stable operation mode.

[0034] Preferably, the third minimum off-period signal is equal to the first minimum off-period signal, and the third on-period signal is equal to the first on-period signal. Then, as shown in FIG3 , after the output voltage Vout is adjusted back, the power converter returns to the operation mode of the second operation range.

[0035] Of course, the third minimum off period signal may not be equal to the first minimum off period signal, and the third on period signal may not be equal to the first on period signal. The power converter determines its on period signal or minimum off period signal in the stable operation mode according to its actual operating parameters.

[0036] In one embodiment of the present invention, the time length corresponding to the second on-period signal and the second minimum off-period signal is the limit value of the on-time and off-time of the PWM signal, so as to maximize the duty cycle of the PWM signal or increase the switching frequency of the power converter, thereby allowing the output voltage to be adjusted back most quickly.

[0037] In one embodiment of the present invention, please refer to Figure 4 The detailed block diagram of the duty cycle adjustment module of an embodiment of the present invention is shown in FIG. 1 , the duty cycle adjustment module 130 further includes a pulse width monitoring module 131 and a duty cycle adjustment trigger module 132. The pulse width monitoring module 131 is configured to receive a pulse signal d1 to monitor whether the duration of the first voltage V1 of the formed pulse is greater than the pulse window time. When the duration of the first voltage V1 of the formed pulse is greater than the pulse window time, the duty cycle adjustment trigger signal d41 output by the pulse width monitoring module 131 causes the duty cycle adjustment trigger module 132 to output a trigger adjustment signal d2. When the duration of the first voltage V1 of the formed pulse is less than the pulse window time, the duty cycle adjustment trigger signal d41 output by the pulse width monitoring module 131 causes the duty cycle adjustment trigger module 132 not to output the trigger adjustment signal d2. In response to the change in the output voltage.

[0038] Furthermore, in one embodiment of the present invention, please refer to Figure 5The detailed block diagram of the duty cycle adjustment module of another embodiment of the present invention is shown, the duty cycle adjustment module 130 also includes a duty cycle recovery module 133, which is configured to receive a pulse signal d1 to output a duty cycle recovery trigger signal d42 according to the pulse signal d1. In the process where the duration of the first voltage V1 of the formed pulse is greater than the pulse window time, if the formed pulse switches from the first voltage V1 to the second voltage V2, the duty cycle recovery module 133 outputs a duty cycle recovery trigger signal d42. The duty cycle recovery trigger signal d42 causes the duty cycle adjustment trigger module 132 to stop outputting the trigger adjustment signal d2, so that when the output voltage is callback, it returns to a stable working state.

[0039] In one embodiment of the present invention, please refer to Figure 6 The detailed schematic diagram of the pulse signal generating circuit of an embodiment of the present invention is shown in FIG. The pulse signal generating circuit 110 includes: an output voltage sampling unit 111, which is used to sample the output voltage Vout to form an output voltage sampling signal Vout'; an operational amplifier 112, wherein the first input terminal of the operational amplifier 112 receives the voltage sampling signal Vout', and the second input terminal of the operational amplifier 112 receives the reference voltage VR, and is used to output a first signal d11 at the output terminal of the operational amplifier 112 according to the voltage sampling signal Vout' and the reference voltage VR; a comparator 113, wherein the first input terminal of the comparator 113 receives the first signal d11, and the second input terminal of the comparator 113 receives the sawtooth wave signal Vp, and is used to compare the first signal d11 with the sawtooth wave signal Vp, and output a pulse signal d1 at the output terminal of the comparator 113. Figure 6 The first input terminal of the operational amplifier 112 is a negative input terminal, and the second input terminal of the operational amplifier 112 is a positive input terminal. When the output voltage Vout is less than the reference voltage VR, the pulse formed is the first voltage V1, and when the output voltage Vout is greater than the reference voltage VR, the pulse formed is the second voltage V2. The first input terminal of the comparator 113 is a positive input terminal, and the second input terminal of the comparator 113 is a negative input terminal, so that the pulse signal generating circuit can work normally. Figure 6 In the embodiment, if the first input terminal of the operational amplifier 112 is a positive input terminal and the second input terminal of the operational amplifier 112 is a negative input terminal, it can be realized that when the output voltage Vout is greater than the reference voltage VR, the pulse formed is the first voltage V1, and when the output voltage Vout is less than the reference voltage VR, the pulse formed is the second voltage V2, and the first input terminal of the comparator 113 is a negative input terminal and the second input terminal of the comparator 113 is a positive input terminal, so that the pulse signal generating circuit can work normally. In practical applications, the present invention does not limit the specific structure of the pulse signal generating circuit 110, such as Figure 6 This is just one embodiment.

[0040] See also Figure 3A , Figure 3B and Figure 6 As shown, the operational amplifier 112 has a minimum error value Ve, which is the difference between the output voltage Vout and the reference voltage VR, so the minimum error value Ve affects the setting of the reference voltage VR. For an operational amplifier of poor quality, the minimum error value Ve may be above 5mv to 10mv. For an operational amplifier of better quality, the minimum error value Ve may be within 1mv to 2mv. For example, when Ve is equal to 5mv and Vout is equal to 5v, a pulse signal is triggered when Vout drops to 4.995V (VR), and the pulse signal is switched to the first voltage V1. When Vout rises to 4.995V (VR) again, a pulse signal is triggered, and the pulse signal is switched to the second voltage V2. When Ve is equal to 5mv and Vout is equal to 1v, a pulse signal is triggered when Vout drops to 0.995V (VR), and the pulse signal switches to the first voltage V1. When Vout rises to 0.995V (VR) again, a pulse signal is triggered, and the pulse signal switches to the second voltage V2.

[0041] In an embodiment of the present invention, the output voltage sampling unit 111 may be any circuit capable of sampling the output voltage Vout, such as a resistor voltage-dividing sampling circuit. The present invention does not limit the specific structure of the output voltage sampling unit 111.

[0042] In one embodiment of the present invention, a power conversion system is provided. For details, please refer to Figure 7 The power conversion system of an embodiment of the present invention is shown in FIG. 1 , wherein the power conversion system comprises: a power converter 200, comprising at least one switch tube, wherein the input end of the power converter 200 is used to receive an input voltage Vin, and the output end of the power converter 200 is used to output an output voltage Vout; Figure 2 The PWM signal generating circuit 100 receives the output voltage Vout, and outputs a PWM signal to the control end of at least one switch tube in the power converter 200 according to the output voltage Vout, so as to control the power converter (200) to convert the input voltage Vin into the output voltage Vout.

[0043] The power converter 200 may be any switching power converter, such as a non-isolated converter such as a buck converter, or an isolated converter such as a full-bridge converter.

[0044] The principle and effect thereof are the same as those of the above-mentioned PWM signal generating circuit 100 , and will not be described in detail herein.

[0045] In one embodiment of the present invention, a PWM signal generating method is also provided. For details, please refer to Figure 8 FIG. 1 is a flow chart of a PWM signal generating method according to an embodiment of the present invention. Figure 2 3, a PWM signal generating method, comprising: S1: generating a PWM signal with a current fixed on-time period signal and a variable minimum off-time period signal, or a current fixed minimum off-time period signal and a variable on-time period signal, a power converter receives the PWM signal to output an output voltage, and enters step S2; S2: monitoring whether the duration of a first voltage of a pulse of a pulse signal d1 is greater than a pulse window time, if yes, executing step S3, if not, executing step S1, wherein the pulse signal d1 includes a plurality of pulses formed by a first voltage V1 and a second voltage V2 located after the first voltage V1, when the output voltage Vout is less than a reference voltage VR, the formed pulse is the first voltage V1, when the output voltage Vout is greater than the reference voltage VR When the output voltage Vout is greater than a reference voltage Vout, the pulse formed is the first voltage V1; when the output voltage Vout is less than the reference voltage VR, the pulse formed is the second voltage V2; S3: execute to lengthen the variable on-time period signal or shorten the variable minimum off-time period signal, and enter step S4; S4: generate a PWM signal with the current fixed on-time period signal and the variable minimum off-time period signal, or the fixed minimum off-time period signal and the variable on-time period signal, and enter step S5; S5: determine whether the current pulse is switched from the first voltage V1 to the second voltage V2, if yes, execute step S6; S6: execute to lengthen the variable minimum off-time period signal, or shorten the variable on-time period signal, and enter step S1.

[0046] In practical applications, if the current variable minimum off-period signal in step S1 is the first minimum off-period signal, or the current variable on-period signal is the first on-period signal, then the PWM signal in step S1 first maintains the on-period corresponding to the time length of a fixed on-period signal, and then at least maintains the off-period corresponding to the first minimum off-period signal, or the PWM signal first maintains the on-period corresponding to the time length of the first on-period signal, and then at least maintains the off-period corresponding to the fixed minimum off-period signal. Thereafter, the execution of lengthening the variable on-period signal or shortening the variable minimum off-period signal in step S3 is: lengthening the variable on-period signal from the first on-period signal to the second on-period signal or shortening the variable minimum off-period signal from the first minimum off-period signal to the second minimum off-period signal. Then the PWM signal in step S4 first maintains the time length corresponding to a fixed on-period signal, and then maintains the off time length corresponding to the second minimum off-period signal, or the PWM signal first maintains the time length corresponding to the second on-period signal, and then maintains the off time length corresponding to a fixed minimum off-period signal. Then the variable minimum off-period signal is lengthened or the variable on-period signal is shortened in step S6, which is to lengthen the second minimum off-period signal to a third minimum off-period signal, or shorten the second on-period signal to a third on-period signal.

[0047] Preferably, the third minimum off-period signal is equal to the first minimum off-period signal, and the third on-period signal is equal to the first on-period signal. Referring to FIG. 3 , when the output voltage is adjusted back, the working mode of the second operating range is restored.

[0048] If the third minimum off-period signal is not equal to the first minimum off-period signal, and the third on-period signal is not equal to the first on-period signal, then after executing a voltage callback, the current variable minimum off-period signal in step S1 is the third minimum off-period signal, or the current variable on-period signal is the third on-period signal, then the PWM signal in step S1 first maintains the on-period corresponding to the time length of a fixed on-period signal, and then at least maintains the off-period corresponding to the time length of the third minimum off-period signal, or the PWM signal first maintains the on-period corresponding to the time length of the third on-period signal, and then at least maintains the off-period corresponding to the time length of a fixed minimum off-period signal. Thereafter, the execution of lengthening the variable on-period signal or shortening the variable minimum off-period signal in step S3 is: lengthening the variable on-period signal from the third on-period signal to the second on-period signal or shortening the variable minimum off-period signal from the third minimum off-period signal to the second minimum off-period signal.

[0049] Similarly, in one embodiment of the present invention, the time length corresponding to the second on-period signal and the second minimum off-period signal is the limit value of the on-time and off-time of the PWM signal. In this way, the duty cycle of the PWM signal can be increased to the maximum extent or the switching frequency of the power converter can be increased, so that the output voltage can be adjusted back as quickly as possible.

[0050] Please refer to Figure 8 , step S5 further includes: if no, executing step S4. That is, if the output voltage has not yet adjusted back to the expected value, then continue to generate a PWM signal according to a smaller minimum off-period signal or a longer on-period signal to adjust the output voltage of the power converter, and continue until the output voltage of the power converter is adjusted back to the expected value.

[0051] See also Fig. 9 In the flowchart of the PWM signal generating method of another embodiment of the present invention shown in FIG. 1 , step S5 further includes: if no, then executing step S3. That is, if the output voltage has not yet adjusted back to the expected value, then further lengthen the variable on-period signal or shorten the variable minimum off-period signal, and then generate a PWM signal according to the longer on-period signal or the smaller minimum off-period signal to speed up the speed of adjusting back the output voltage of the power converter, and continue until the output voltage of the power converter is adjusted back to the expected value.

[0052] In one embodiment of the present invention, in step S1, when the duration of the first pulse voltage V1 is greater than the pulse window tpw time, a trigger adjustment signal d2 is output, and the trigger adjustment signal d2 causes the timer unit 140 to execute step S3. Figure 2 .

[0053] In one embodiment of the present invention, in step S5, if the pulse formed is switched from the first voltage V1 to the second voltage V2, the output of the trigger adjustment signal d2 is stopped, and then step S6 is executed. Figure 2 .

[0054] The above-mentioned embodiment of adjusting the minimum off-period signal is applicable to the control mode of fixing the on-time. The above-mentioned embodiment of adjusting the on-period signal is applicable to the control mode of fixing the minimum off-time.

[0055] In one embodiment of the present invention, the duty cycle adjustment module 130 is implemented by an analog circuit. Preferably, it is implemented by a digital circuit to further reduce the size and cost of the PWM signal generating circuit and improve its response speed and accuracy.

[0056] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A PWM signal generating circuit, characterized in that: include: A pulse signal generating circuit, for generating a pulse signal according to an output voltage of a power converter, wherein the pulse signal comprises a plurality of pulses formed by a first voltage and a second voltage located after the first voltage, wherein the pulse signal generating circuit is configured such that: when the output voltage is less than a reference voltage, the pulse formed is the first voltage, and when the output voltage is greater than the reference voltage, the pulse formed is the second voltage, or, when the output voltage is greater than a reference voltage, the pulse formed is the first voltage, and when the output voltage is less than the reference voltage, the pulse formed is the second voltage; A duty cycle adjustment module is configured to receive the pulse signal and output a trigger adjustment signal when the duration of the first voltage of the formed pulse is greater than the pulse window time; A timer unit, used to output a fixed on-period signal and a variable minimum off-period signal, or output a fixed minimum off-period signal and a variable on-period signal, and configured to, when receiving the trigger adjustment signal, shorten the variable minimum off-period signal from a first minimum off-period signal to a second minimum off-period signal, or lengthen the variable on-period signal from a first on-period signal to a second on-period signal; A PWM controller is connected to the pulse signal generating circuit and the timer unit, and is configured to: when receiving the pulse signal, generate a PWM signal, so that the PWM signal first maintains the on time length corresponding to the fixed on-time period signal, and then maintains the off time length corresponding to the second minimum off-time period signal at least, or, so that the PWM signal first maintains the on time length corresponding to the second on-time period signal, and then maintains the off time length corresponding to the fixed minimum off-time period signal at least.

2. The PWM signal generating circuit according to claim 1, characterized in that: During the process of the timer unit receiving the trigger adjustment signal, if the formed pulse switches from the first voltage to the second voltage, the duty cycle adjustment module stops outputting the trigger adjustment signal, and the timer unit at least executes one of shortening the second on-time period signal and lengthening the second minimum off-time period signal.

3. The PWM signal generating circuit according to claim 2, characterized in that: The timer unit at least performs one of shortening the second on-time period signal and lengthening the second minimum off-time period signal, including: the timer unit lengthens the second minimum off-time period signal to a third minimum off-time period signal, or shortens the second on-time period signal to a third on-time period signal.

4. The PWM signal generating circuit according to claim 3, characterized in that: The third minimum off-period signal is equal to the first minimum off-period signal, and the third on-period signal is equal to the first on-period signal.

5. The PWM signal generating circuit according to claim 1, characterized in that: The time lengths corresponding to the second on-period signal and the second minimum off-period signal are the limit values ​​of the on-time and the off-time of the PWM signal.

6. The PWM signal generating circuit according to claim 1, characterized in that: in: When the duration of the first voltage of the formed pulse is less than the pulse window time; The duty cycle adjustment module is configured not to output the trigger adjustment signal; The timer unit is configured to output the fixed on-period signal and the first minimum off-period signal, or to output the fixed minimum off-period signal and the first on-period signal; The PWM controller is configured to: when receiving the pulse signal, generate a PWM signal, so that the PWM signal first maintains the time length corresponding to the fixed on-time period signal, and then maintains the off time length corresponding to the first minimum off-time period signal, or, so that the PWM signal first maintains the time length corresponding to the first on-time period signal, and then maintains the off time length corresponding to the fixed minimum off-time period signal.

7. The PWM signal generating circuit according to claim 1, characterized in that: The duty cycle adjustment module also includes a pulse width monitoring module and a duty cycle adjustment trigger module. The pulse width monitoring module is configured to receive the pulse signal to monitor whether the duration of the first voltage of the formed pulse is greater than the pulse window time. When the duration of the first voltage of the formed pulse is greater than the pulse window time, the duty cycle adjustment trigger signal output by the pulse width monitoring module causes the duty cycle adjustment trigger module to output the trigger adjustment signal. When the duration of the first voltage of the formed pulse is less than the pulse window time, the duty cycle adjustment trigger signal output by the pulse width monitoring module causes the duty cycle adjustment trigger module not to output the trigger adjustment signal.

8. The PWM signal generating circuit according to claim 7, characterized in that: The duty cycle adjustment module also includes a duty cycle recovery module, which is configured to receive the pulse signal to output a duty cycle recovery trigger signal according to the pulse signal. In the process where the duration of the first voltage of the formed pulse is greater than the pulse window time, if the formed pulse switches from the first voltage to the second voltage, the duty cycle recovery module outputs the duty cycle recovery trigger signal, and the duty cycle recovery trigger signal causes the duty cycle adjustment trigger module to stop outputting the trigger adjustment signal.

9. The PWM signal generating circuit according to claim 1, characterized in that: The pulse signal generating circuit comprises: An output voltage sampling unit, used for sampling the output voltage to form an output voltage sampling signal; an operational amplifier, wherein a first input terminal of the operational amplifier receives the voltage sampling signal, a second input terminal of the operational amplifier receives the reference voltage, and is configured to output a first signal at an output terminal of the operational amplifier according to the voltage sampling signal and the reference voltage; A comparator, wherein a first input terminal of the comparator receives the first signal, and a second input terminal of the comparator receives a sawtooth wave signal, for comparing the first signal with the sawtooth wave signal, and outputting the pulse signal at an output terminal of the comparator.

10. A power conversion system, characterized in that: include: A power converter, comprising at least one switch tube, wherein an input end of the power converter is used to receive an input voltage, and an output end of the power converter is used to output an output voltage; The PWM signal generating circuit of claim 1 receives the output voltage, and outputs the PWM signal to the control end of the at least one switch tube according to the output voltage, so as to control the operation of the power converter to convert the input voltage into the output voltage.

11. A PWM signal generating method, characterized in that: include: S1: Generate a PWM signal using a current fixed on-time signal and a variable minimum off-time signal, or a current fixed minimum off-time signal and a variable on-time signal. A power converter receives the PWM signal to output an output voltage, and then enters step S2; S2: monitor whether the duration of the first voltage of a pulse of a pulse signal is greater than a pulse window time, if yes, execute step S3, if not, execute step S1, wherein the pulse signal includes a plurality of pulses formed by a first voltage and a second voltage located after the first voltage, when the output voltage is less than a reference voltage, the formed pulse is the first voltage, when the output voltage is greater than the reference voltage, the formed pulse is the second voltage, or, when the output voltage is greater than a reference voltage, the formed pulse is the first voltage, when the output voltage is less than the reference voltage, the formed pulse is the second voltage; S3: Execute the lengthening of the variable on-period signal or the shortening of the variable minimum off-period signal, and proceed to step S4; S4: Generate a PWM signal using the current fixed on-period signal and the variable minimum off-period signal, or the fixed minimum off-period signal and the variable on-period signal, and proceed to step S5; S5: Determine whether the current pulse is switched from the first voltage to the second voltage, if yes, execute step S6; S6: Execute to lengthen the variable minimum off-period signal, or shorten the variable on-period signal, and enter step S1.

12. The PWM signal generating method according to claim 11, characterized in that: Step S5 also includes: if no, executing step S4.

13. The PWM signal generating method according to claim 11, characterized in that: Step S5 also includes: if no, executing step S3.

14. The PWM signal generating method according to claim 11, characterized in that: Step S5 also includes: if no, executing step S3.

15. The PWM signal generating method according to claim 11, characterized in that: In step S1, when the duration of the first voltage of the formed pulse is greater than the pulse window time, a trigger adjustment signal is output, and the trigger adjustment signal enables the timer unit to execute step S3.

16. The PWM signal generating method according to claim 15, characterized in that: In step S5, if the formed pulse is switched from the first voltage to the second voltage, the output of the trigger adjustment signal is stopped, and then step S6 is executed.

Images