Method and apparatus for controlling a power factor correction circuit
By controlling the start-up mode and frequency of the switching devices in the totem-pole PFC circuit, the problem of poor reliability of soft start under DC input conditions is solved, zero-current turn-on is achieved, reliability is improved and cost is reduced.
Patent Information
- Application Number
- CN202110139002.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-02-01
- Publication Date
- 2025-11-18
- Estimated Expiration
- 2041-05-20
AI Technical Summary
When using a switching transistor with a large reverse recovery current under DC input conditions, the soft-start reliability of the totem-pole PFC circuit is poor, which can easily lead to damage to the switching device.
By obtaining the difference between the bus voltage and the input voltage, the control switching device enters the start-up mode when the difference is less than the preset value, and operates at a frequency within the preset frequency range, so that the inductor current is reduced to the preset current range, avoiding excessive reverse recovery current and realizing zero-current turn-on.
This improves the soft-start reliability of switching devices with large reverse recovery current under DC conditions, avoids damage to the switching devices, and reduces hardware costs.
Smart Images

Figure CN114844341B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of power supply technology, and more specifically, to a control method and apparatus for a power factor correction circuit. Background Technology
[0002] Totem-pole PFC (power factor correction) circuits are used to improve the power factor in power supply circuits and are widely used in communication power supplies and automotive power supplies. The high-frequency switching devices in totem-pole PFC circuits can use wide-bandgap semiconductor devices (e.g., GaN, SiC semiconductor devices) with low reverse recovery current, allowing the totem-pole PFC circuit to operate in CCM (Continuous Conduction Mode). To reduce power supply costs, related technologies use traditional semiconductor devices with higher reverse recovery current instead of wide-bandgap semiconductor devices as high-frequency switching devices, enabling normal operation of the totem-pole PFC by allowing the high-frequency switching devices to operate in a zero-current turn-on state. However, when the input of the totem-pole PFC is DC, because there is no voltage difference between the bus voltage and the input voltage, the current of the high-frequency switching devices cannot drop to zero when turned off. This can easily lead to simultaneous conduction of switching devices on the same bridge arm, causing a short circuit. Furthermore, the losses caused by the large reverse recovery current can lead to excessive thermal stress on the switching devices, resulting in damage.
[0003] There is currently no effective solution to the technical problem of poor soft-start reliability under DC input conditions when using a switching transistor with a large reverse recovery current in the totem pole PFC circuit mentioned above. Summary of the Invention
[0004] This invention provides a control method and apparatus for a power factor correction circuit, which at least solves the technical problem of low soft-start reliability under DC input conditions when using a switching transistor with a large reverse recovery current in a totem pole power factor correction circuit.
[0005] According to one aspect of the present invention, a control method for a power factor correction circuit is provided. The power factor correction circuit includes: a voltage input terminal, a first inductor, a switching circuit, and a voltage output terminal. The switching circuit includes a first bridge arm composed of a first switching device and a second switching device connected together, and a second bridge arm composed of a third switching device and a fourth switching device connected together. A first end of the voltage input terminal is connected between the first switching device and the second switching device through the first inductor, and a second end of the voltage input terminal is connected between the third switching device and the fourth switching device. The control method for the power factor correction circuit includes: acquiring the bus voltage of the voltage output terminal and determining whether the difference between the bus voltage and the input voltage reaches a preset value, wherein the input voltage is the voltage of the DC current input through the voltage input terminal; if the difference is less than the preset value, controlling the first switching device and the second switching device to enter a startup mode, wherein in the startup mode, the first switching device and the second switching device operate at a frequency within a preset frequency range, so that the inductance current of the first inductor drops to a preset current range before the first switching device and the second switching device are turned on; if the difference is greater than or equal to the preset value, controlling the first switching device and the second switching device to enter a frequency conversion operating mode.
[0006] Furthermore, the inductance current of the first inductor is reduced to a preset current range, including: the inductance current of the first inductor is zero or a negative current, so that the first switching device and the second switching device operate in a zero-current turn-on mode.
[0007] Furthermore, the above method also includes: a first control signal for the first switching device and a second control signal for the second switching device being complementary; wherein the first control signal is used to control the first switching device to be turned on or off, and the second control signal is used to control the second switching device to be turned on or off.
[0008] Furthermore, the above method also includes: after the first switching device and the second switching device enter the start-up mode, controlling the duty cycle of the first control signal to increase from small to large, and controlling the duty cycle of the second control signal to decrease from large to small, so as to increase the bus voltage.
[0009] Furthermore, the power factor correction circuit also includes: a second inductor and a third bridge arm composed of a fifth switching device and a sixth switching device connected together. The first end of the voltage input terminal is also connected between the fifth switching device and the sixth switching device through the second inductor. The method also includes: when the difference is less than a preset value, controlling the fifth switching device and the sixth switching device to operate at a frequency within a preset frequency range, so that the inductance current of the second inductor drops to a preset current range before the fifth switching device and the sixth switching device are turned on.
[0010] Furthermore, the first switching device, the second switching device, the third switching device, and the fourth switching device are at least one of the following: MOSFET, IGBT, diode, and thyristor.
[0011] Furthermore, when the difference is less than a preset value, the first switching device and the second switching device are controlled to enter the start-up mode, including at least one of the following: the first switching device and the second switching device operate at a constant preset frequency; and the first switching device and the second switching device operate at a jitter frequency within a preset frequency range.
[0012] According to another aspect of the present invention, a control device for a power factor correction circuit is also provided. The power factor correction circuit includes: a voltage input terminal, a first inductor, a switching circuit, and a voltage output terminal. The switching circuit includes a first bridge arm composed of a first switching device and a second switching device connected together, and a second bridge arm composed of a third switching device and a fourth switching device connected together. A first terminal of the voltage input terminal is connected between the first and second switching devices through the first inductor, and a second terminal of the voltage input terminal is connected between the third and fourth switching devices. The control device includes: an acquisition module for acquiring the bus voltage of the voltage output terminal and determining whether the bus voltage is related to the input voltage. Whether the voltage difference reaches a preset value, wherein the input voltage is the DC voltage input through the voltage input terminal; the control module is used to control the first switching device and the second switching device to enter the start-up mode when the difference is less than the preset value, wherein in the start-up mode, the first switching device and the second switching device operate at a frequency within a preset frequency range, so that the inductance current of the first inductor is within a preset current range after the first switching device is turned off and before the second switching device is turned on, and after the second switching device is turned off and before the first switching device is turned on; when the difference is greater than or equal to the preset value, the first switching device and the second switching device are controlled to enter the frequency conversion working mode.
[0013] According to another aspect of the present invention, a storage medium is also provided, the storage medium including a stored program, wherein, when the program is running, the device where the storage medium is located is controlled to execute the control method of the power factor correction circuit described above.
[0014] According to another aspect of the present invention, a processor is also provided, comprising: the processor being configured to run a program, wherein the program executes the control method of the power factor correction circuit described above during runtime.
[0015] In this embodiment of the invention, when the difference between the bus voltage and the DC input voltage is less than a preset value, the first and second switching devices are controlled to enter the startup mode. In the startup mode, the first and second switching devices operate at a frequency within a preset frequency range, so that the inductance current of the first inductor drops to a preset current range before the first and second switching devices are turned on. This avoids the generation of a large reverse recovery current after the first and second switching devices are turned off, thereby enabling the first and second switching devices to be turned off and the reverse recovery current of the second switching devices to be recovered in time when the bus voltage is low. This improves the soft-start reliability of the totem pole PFC circuit using a low-cost switching device with a large reverse recovery current under DC conditions, and solves the technical problem of low soft-start reliability under DC input conditions in the prior art of totem pole power factor correction circuits using switching transistors with large reverse recovery current. Attached Figure Description
[0016] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this application, illustrate exemplary embodiments of the invention and, together with their description, serve to explain the invention and do not constitute an undue limitation thereof. In the drawings:
[0017] Figure 1 This is a flowchart of a control method for a power factor correction circuit according to an embodiment of the present invention;
[0018] Figure 2 This is a schematic diagram of a power factor correction circuit according to an embodiment of the present invention;
[0019] Figure 3 This is a schematic diagram of the first control signal, the second signal waveform, and the corresponding bus voltage according to an embodiment of the present invention;
[0020] Figure 4 This is a schematic diagram of the inductor current waveform of the first inductor within a preset frequency range according to an embodiment of the present invention;
[0021] Figure 5 This is a schematic diagram of an optional power factor correction circuit according to an embodiment of the present invention;
[0022] Figure 6 This is a schematic diagram of a control device for a power factor correction circuit according to an embodiment of the present invention. Detailed Implementation
[0023] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.
[0024] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0025] Example 1
[0026] According to an embodiment of the present invention, an embodiment of a control method for a power factor correction circuit is provided. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.
[0027] The power factor correction circuit includes a voltage input terminal, a first inductor, a switching circuit, and a voltage output terminal. The switching circuit includes a first bridge arm composed of a first switching device and a second switching device connected together, and a second bridge arm composed of a third switching device and a fourth switching device connected together. The first end of the voltage input terminal is connected between the first switching device and the second switching device through the first inductor, and the second end of the voltage input terminal is connected between the third switching device and the fourth switching device.
[0028] Figure 2 This is a schematic diagram of an optional power factor correction circuit according to an embodiment of the present invention, such as... Figure 2As shown, this power factor correction circuit is a totem pole power factor correction circuit. The first switching device S1 and the second switching device S2 are high-frequency switching devices, forming the first bridge arm. The third switching device S3 and the fourth switching device S4 are low-frequency switching devices, forming the second bridge arm. The voltage input terminal AB is used to provide the input voltage Vin, and the voltage output terminal is used to output the output voltage Vout after power factor correction by the power factor correction circuit. As an optional embodiment, such as... Figure 2 As shown, the voltage output terminal is connected to the PFC bus capacitor C, and the voltage across the PFC bus capacitor C is the output voltage Vout.
[0029] Figure 1 This is a flowchart of a control method for a power factor correction circuit according to an embodiment of the present invention, such as... Figure 1 As shown, the method includes the following steps:
[0030] Step S101: Obtain the bus voltage at the voltage output terminal and determine whether the difference between the bus voltage and the input voltage reaches a preset value, wherein the input voltage is the voltage of the DC power input through the voltage input terminal.
[0031] The bus voltage at the voltage output terminal is the output voltage of the voltage output terminal, and the input voltage is a DC voltage. In an optional embodiment, sampling circuits can be connected to the voltage input terminal and the voltage output terminal respectively to sample the input voltage and the bus voltage and input them to the controller. The controller calculates the difference between the bus voltage and the input voltage Vin through software.
[0032] The above preset value can be determined based on the reverse current recovery time of the first and second switching devices. For different types of switching devices, the preset value can have different values. The longer the reverse current recovery time of the switching device, the larger the corresponding preset value.
[0033] like Figure 2 As shown, the input voltage is a DC voltage. When the first terminal of the voltage input is positive and the second terminal is negative, the second switching device S2 is the main control switching device, and the first switching device S1 is the freewheeling switching device. After the power factor correction circuit is powered on, the initial value of the bus voltage is equal to the input voltage and begins to rise, generating a voltage difference that can be used for the reverse current recovery of the first switching device S1 and the second switching device S2. Figure 3As shown, the power factor correction circuit is powered on at time T0, with the output voltage Vout equal to the input voltage Vin. The output voltage Vout begins to rise along the time axis, and the difference Vgap between the output voltage Vout and the input voltage Vin increases from zero, reaching a preset value at time T1. When the difference between the bus voltage and the input voltage Vin is small, when the second switching device S2 is turned off, there is still a forward current superimposed on the first switching device S1 in inductor L1. This causes the first switching device S1 to generate a large reverse current when it is turned off. However, the voltage difference for reverse current recovery is small and insufficient to complete the reverse current recovery when the second switching device S2 is turned on, resulting in a shoot-through between S1 and S2. When the difference between the bus voltage and the input voltage Vin reaches the preset value, the voltage difference of the first switching device S1 can meet the reverse current recovery requirement, thereby enabling the second switching device S2 to achieve zero-current turn-on.
[0034] Step S102: If the difference is less than a preset value, control the first switching device and the second switching device to enter the start-up mode. In the start-up mode, the first switching device and the second switching device operate at a frequency within a preset frequency range so that the inductance current of the first inductor drops to a preset current range before the first switching device and the second switching device are turned on.
[0035] The startup mode is as follows: after the power factor correction circuit is powered on, the bus voltage is in the process of rising from the initial value. Since the voltage difference between the bus voltage and the input voltage is small, the reverse current of the first and second switching devices cannot be recovered in time. It needs to operate at a frequency within the preset frequency range to keep the reverse recovery current of the first and second switching devices within an acceptable range, avoid shoot-through of the first and second switching devices or excessive thermal stress, and improve the reliability of soft start of the power factor correction circuit under DC conditions.
[0036] The aforementioned preset current range includes: an inductor current value of zero, an inductor current that is negative, and an inductor current that is positive but less than the set value. When the inductor current of the first inductor drops to within the preset current range, it can be understood as the inductor current value of the first inductor decreasing from a large value to within the preset current range. Within the preset current range, the inductor current may increase or decrease, but its value remains within the preset current range.
[0037] When the inductor current is zero or negative, the current in both the first and second switching devices is zero when they are turned on, allowing them to operate in ZCS (Zero Current Switch) mode. It should be noted that when the inductor current is negative, its direction is opposite to the reverse current of either the first or second switching device; therefore, it does not affect the reverse current of either device. When the inductor current is positive but less than the set value, the first or second switching device is not strictly turned on with zero current. Although a short-term reverse current may occur when the inductor current is positive but less than the preset value, the heat accumulation of the first and second switching devices is kept within acceptable limits due to their operation within the preset frequency range, preventing damage to the devices.
[0038] The preset frequency range can be determined based on the inductance parameters of the first inductor, so that when the first switching device and the second switching device operate at frequencies within the preset frequency range, the current of the first inductor is less than the set value of the inductor current before the first switching device and the second switching device are turned on.
[0039] In one optional embodiment, in the above-described startup mode, the frequency within the preset frequency range may include a constant frequency, that is, the first switching device and the second switching device operate at a constant frequency within the preset frequency range in the startup mode. Figure 4 The figure shows the current waveform of the first inductor when the first and second switching devices operate at a constant frequency. Figure 4As shown, f is a schematic diagram of the inductor current change within one switching cycle. When the main control switch is turned on, the inductor current first increases to the current peak and then drops to zero. Then, there is a period of negative current before it rises again. The turn-on time of the main control switch can be determined according to the period corresponding to when the inductor current is zero, and the turn-off time of the main control switch can be determined according to the period when the inductor current returns to zero through the negative current. The frequency determined according to the turn-on and turn-off times of the main control switch is a frequency within the preset frequency range, so that the current of the first inductor is zero after the main control switch is turned off and before the freewheeling switch is turned on, so as to achieve zero-current turn-on of the main control switch and the freewheeling switch. Alternatively, the turn-on time of the main control switch can be determined based on the period corresponding to the negative inductor current, and the turn-off time of the main control switch can be determined based on the period when the inductor current returns to zero. The frequency determined based on the turn-on and turn-off times of the main control switch is within the preset frequency range, so that after the main control switch and the freewheeling switch are turned off, the current of the first inductor drops to a negative current. When the current of the first inductor is negative, it will not affect the reverse current when the freewheeling diode is turned off, and zero-current turn-on of the main control switch and the freewheeling switch can still be achieved.
[0040] It should be noted that there is a brief period of time between the first switching device being turned off and the second switching device being turned on.
[0041] Step S103: If the difference is greater than or equal to a preset value, control the first switching device and the second switching device to enter the frequency conversion working mode.
[0042] In the variable frequency operating mode, when the difference between the bus voltage and the input voltage reaches a preset value, the control signal frequency of the first and second switching devices changes in real time with the changes in input voltage, output voltage and output power, so that the power factor correction circuit operates in DCM mode (Discontinuous Conduction Mode) or TCM mode (Triangle Conduction Mode).
[0043] like Figure 2As shown, the input voltage is DC voltage. When the first terminal of the voltage input is positive and the second terminal is negative, the second switching device S2 is the main control switching device, and the first switching device S1 is the freewheeling switching device. After the power factor correction circuit is powered on, when the difference between the bus voltage and the input voltage Vin reaches the preset value, the voltage difference across the first switching device S1 can meet the reverse current recovery requirement, thereby enabling the second switching device S2 to achieve zero current turn-on. At this time, the first switching device S1 and the second switching device S2 operate at the frequency required for power factor correction, and the frequency of the control signals of the first switching device S1 and the second switching device S2 should no longer be limited to the preset frequency range.
[0044] In this embodiment, the bus voltage at the voltage output terminal is obtained, and it is determined whether the difference between the bus voltage and the DC input voltage reaches a preset value. If the difference is less than the preset value, the first and second switching devices are controlled to enter the startup mode. In the startup mode, the first and second switching devices operate at a frequency within a preset frequency range, so that the inductance current of the first inductor is within a preset current range before the first and second switching devices are turned on. This avoids the generation of a large reverse recovery current when the first and second switching devices are turned off, so that the reverse recovery current of the first and second switching devices can be recovered in time when the bus voltage is low. This avoids the reverse recovery current causing the switching devices in the same bridge arm to shoot through or generating large thermal stress that could damage the switching devices during the soft start process of the totem-pole PFC circuit. This improves the soft start reliability of the totem-pole PFC circuit using a low-cost switching device with a large reverse recovery current under DC conditions, and solves the technical problem of poor soft start reliability under DC input conditions when using a switching transistor with a large reverse recovery current in the totem-pole PFC circuit in the prior art.
[0045] As an optional embodiment, the inductance current of the first inductor is reduced to a preset current range, including: the inductance current of the first inductor is zero or a negative current, so that the first switching device and the second switching device operate in a zero-current turn-on mode.
[0046] To ensure that the first and second switching devices operate in ZCS mode, the inductor current of the first inductor should be zero so that the inductor current of the first inductor does not increase the reverse current of the first and second switching devices before they are turned on. Figure 2As shown, the input voltage is a DC voltage. When the first terminal of the voltage input is positive and the second terminal is negative, the second switching device S2 is the main control switching device, and the first switching device S1 is the freewheeling switching device. After the power factor correction circuit is powered on, when the difference between the bus voltage and the input voltage Vin is less than the preset value, after the second switching device S2 is turned off, the inductance current of the first inductor can return to zero, making the reverse recovery current of the first switching device S1 smaller. This allows the reverse current of the first switching device S1 to return to zero before it is turned on, thus enabling the first switching device S1 to be turned on at zero current.
[0047] It should be noted that there is a brief period of time between the second switch being turned off and the first switch being turned on. During this time, both the first and second switches are in the off state, and the inductance current of the first inductor can return to zero. This means that the inductance current of the first inductor may not be zero when the second switch S2 is turned off, but it can decrease to zero before the first switch S1 is turned on, so that the current when the first switch S1 is turned on is zero.
[0048] The current in the first inductor may not be zero for a short period of time. That is, before the first and second switching devices are turned on, the first inductor still has a small forward inductance current, which will increase the reverse recovery current of the switching device. However, by setting the first and second switching devices to operate at frequencies within a preset frequency range, the heat accumulation of the first and second switching devices is kept within an acceptable range and will not cause device damage.
[0049] As an optional embodiment, the above method further includes: a first control signal for the first switching device and a second control signal for the second switching device being complementary; wherein the first control signal is used to control the first switching device to be turned on or off, and the second control signal is used to control the second switching device to be turned on or off.
[0050] The first and second control signals can be provided by the control chip of the power factor correction circuit. The control chip outputs the first and second control signals through its control signal output port. The first control signal of the first switching device and the second control signal of the second switching device are complementary. This can be understood as the second control signal being low when the first control signal is high, or vice versa. It should be noted that there can be a time difference between the high / low level switching of the first control signal and the corresponding high / low level switching of the second control signal. That is, the first and second control signals can be low simultaneously for a short period of time to avoid the switching devices on the same bridge arm being turned on at the same time. The time difference is determined by the reverse current recovery time of the switching device. For example, when the second switching device is turned off, it does not immediately control the first switching device to turn on. Instead, the first control signal switches to high after a certain delay. However, the first and second control signals are complementary signals in their logical control of the operating states of the first and second switching devices, so that the first and second switching devices are turned on and off alternately.
[0051] The complementarity of the first and second control signals means that the first and second control signals are complementary control signals in both the start-up mode and the frequency conversion operating mode. The first switching device S1 and the second switching device S2 are switching devices of the same bridge arm. The first and second control signals need to ensure that the control signals are complementary in any operating mode to avoid simultaneous conduction and resulting in a short circuit in the bridge arm.
[0052] In one optional embodiment, the preset frequency range is a constant frequency range. Figure 3 This is a schematic diagram of the first control signal for the first switching device S1 and the second control signal for the second switching device S2, as shown below. Figure 3As shown, the power factor correction circuit is powered on at time T0. The first switching device S1 and the second switching device S2 enter the startup mode and operate at a preset constant frequency. Between T0 and T1, the first control signal of the first switching device S1 and the second control signal of the second switching device S2 are complementary. At time T1, the difference Vgap between the bus voltage Vout and the input voltage Vin reaches a preset value. At time T2, the circuit enters the frequency conversion mode. The frequencies of the control signals of the first switching device S1 and the second switching device S2 change in real time according to the changes in the input voltage Vin, the bus voltage Vout, and the output power, thereby regulating the output voltage. After T2 until the power factor correction circuit is powered off, although the frequencies of the first control signal of the first switching device S1 and the second control signal of the second switching device S2 are constantly changing, their high or low level signals are complementary. It should be noted that when the difference between the bus voltage Vout and the input voltage Vin reaches the preset value at time T1, the control chip will switch the start-up mode to the frequency conversion working mode. Since the control chip has a necessary switching time, the mode switch is not completed at time T1, but rather at the relatively delayed time T2.
[0053] As an optional embodiment, the above method further includes: after the first switching device and the second switching device enter the start-up mode, controlling the duty cycle of the first control signal to increase from small to large, and controlling the duty cycle of the second control signal to decrease from large to small, so as to increase the bus voltage.
[0054] It should be noted that in this embodiment, the first switching device is the main control switching device of the totem-pole power factor correction circuit, and the second switching device is a freewheeling switch. The duty cycle of the first control signal of the main control switching device gradually increases, allowing the bus voltage to rise from its initial value, thus achieving a bus voltage increase. Correspondingly, the second control signal is complementary to the first control signal; therefore, the duty cycle of the second control signal decreases accordingly, mirroring the change in the first control signal. The initial and maximum values of the duty cycle of the first control signal are determined based on the difference between the bus voltage and the input voltage, as well as a preset soft-start time.
[0055] The determination of the main control switch and the freewheeling switch is based on the polarity of the voltage input terminal. For different voltage input terminal wiring, both the first switch and the second switch may serve as the main control switch.
[0056] In one alternative embodiment, such as Figure 2As shown, when the first terminal A of the voltage input is positive and the second terminal B is negative, switching device S2 is the main control switching device, and switching device S1 is the freewheeling switching device. Switching device S3 is in the off state, and switching device S4 is in the on state. Switching device S2 is the aforementioned first switching device, and the control signal of switching device S2 is the first control signal, which gradually increases from small to large in the start-up mode until the duty cycle increases to the preset maximum duty cycle, and then continues to work at the maximum duty cycle. When the difference between the bus voltage and the input voltage equals the preset value, the first control signal is converted into the control signal for the frequency conversion working mode. Correspondingly, switching device S1 is the aforementioned second switching device, and the duty cycle of the second control signal is complementary to that of the first control signal and changes from large to small.
[0057] In another alternative embodiment, such as Figure 2 As shown, when the first terminal A of the voltage input is negative and the second terminal B is positive, switching device S1 is the main control switching device, switching device S2 is the freewheeling switching device, switching device S4 is in the off state, and switching device S3 is in the on state. Switching device S1 is the first switching device mentioned above, and the control signal for switching device S1 is the first control signal. The control signal for switching device S1 gradually increases from small to large in the start-up mode until the duty cycle increases to the preset maximum duty cycle, and then continues to work at the maximum duty cycle. Correspondingly, switching device S2 is the second switching device mentioned above, and the duty cycle of the second control signal is complementary to that of the first control signal and changes from large to small.
[0058] As an optional embodiment, Figure 5 This is a schematic diagram of an optional power factor correction circuit according to an embodiment of the present invention, as shown below. Figure 5 As shown, the power factor correction circuit further includes: a second inductor L2 and a third bridge arm composed of a fifth switching device S5 and a sixth switching device S6 connected together. The first terminal A of the voltage input terminal Vin is also connected between the fifth switching device S5 and the sixth switching device S6 through the second inductor L2. The method further includes: when the above difference is less than a preset value, controlling the fifth switching device S5 and the sixth switching device S6 to operate at a frequency within a preset frequency range, so that the inductance current of the second inductor L2 is within a preset current range before the fifth switching device S5 and the sixth switching device S6 are turned on.
[0059] The third bridge arm is connected in parallel with the first bridge arm. The fifth switch device S5 and the sixth switch device S6 have the same working state as the first switch device S1 and the second switch device S2 in the start-up mode. That is, the first switch device S1, the second switch device S2, the fifth switch device S5 and the sixth switch device S6 all operate at the same preset frequency range. The inductance current of the first inductor L1 and the second inductor L2 is the same.
[0060] It should be noted that the duty cycle of the control signal for the switching devices in a two-stage parallel high-frequency bridge arm is half that of the control signal for the switching devices in a single-stage high-frequency bridge arm. Figure 2 and Figure 5 For example, Figure 2 It includes a single-stage high-frequency bridge arm (i.e., a high-frequency bridge arm composed of S1 and S2). Figure 5 It includes two parallel high-frequency bridge arms (i.e., the first bridge arm composed of S1 and S2, and the third bridge arm composed of S5 and S6). Figure 5 In the example, the duty cycles of control signals S1 and S5 are both Figure 2 In the example, the duty cycle of the S1 control signal is 1 / 2; Figure 5 In the example, the duty cycles of control signals S2 and S6 are both Figure 2 In the example, the duty cycle of the S2 control signal is 1 / 2.
[0061] In an optional embodiment, multiple high-frequency bridge arms and corresponding inductors can be added in parallel with the first bridge arm. Each high-frequency bridge arm includes two high-frequency switching devices. The wiring method of the two high-frequency switching devices and the corresponding inductors is the same as that of the third bridge arm and the second inductor. The duty cycle of the control signal of the high-frequency switching devices is related to the number of high-frequency bridge arms connected in parallel in the power factor correction circuit. The power factor correction circuit has N high-frequency bridge arms connected in parallel. In an implementation with only one high-frequency bridge arm, the duty cycle of the control signal of the high-frequency switching devices is D. In an embodiment with N high-frequency bridge arms connected in parallel, the duty cycle of the control signal of the high-frequency switching devices is D / N.
[0062] In this embodiment, by adding a second inductor connected in parallel with the first inductor and a third bridge arm connected in parallel with the first bridge arm, the ripple current output by the power factor correction circuit can be reduced, thereby further improving the output performance.
[0063] As an optional embodiment, the first switching device, the second switching device, the third switching device, and the fourth switching device are at least one of the following: MOSFET, IGBT, diode, and thyristor.
[0064] The first, second, third, and fourth switching devices can be the same type of switching device, for example, such as... Figure 2 As shown, the first switching device S1, the second switching device S2, the third switching device S3, and the fourth switching device S4 are all MOSFETs (field-effect transistors). The first switching device, the second switching device, the third switching device, and the fourth switching device can also be a combination of different types of switching devices. For example, the first switching device and the second switching device are MOSFETs, and the third switching device and the fourth switching device are diodes.
[0065] It should be noted that in this embodiment, by setting the first and second switching devices to operate in the startup mode, they can operate in ZCS mode, thereby allowing the use of switching devices with larger reverse recovery currents in the totem-pole power factor correction circuit. Since switching devices with larger reverse recovery currents are less expensive, this achieves the goal of reducing the hardware cost of the totem-pole power factor correction circuit.
[0066] As an optional embodiment, when the difference is less than a preset value, controlling the first switching device and the second switching device to enter the start-up mode includes at least one of the following: the first switching device and the second switching device operate at a constant preset frequency; and the first switching device and the second switching device operate at a jitter frequency within a preset frequency range.
[0067] The preset frequency range can be determined based on the inductance parameters of the first inductor, such that when the first and second switching devices operate within the preset frequency range, the inductor current is less than the set value of the inductor current before the first and second switching devices are turned on. In an optional embodiment, the frequency within the preset frequency range can be a constant frequency, that is, the first and second switching devices operate at a constant frequency in the startup mode.
[0068] Within a preset frequency range, the first and second switching devices, in startup mode, can fluctuate within a certain range, centered on the aforementioned constant frequency. The range of frequency fluctuation is determined by the inductance parameters of the first inductor. When the first and second switching devices operate at the preset frequency range, before the first and second switching devices are turned on, the inductor current fluctuates around zero. There are brief periods when the current in the first inductor is positive, leading to an increase in the reverse recovery current of the first and second switching devices. However, the range of frequency fluctuation is small, and the heat accumulation of the first and second switching devices is within an acceptable range, preventing device damage.
[0069] Example 2
[0070] According to an embodiment of the present invention, an embodiment of a control device for a power factor correction circuit is provided. Figure 6This is a schematic diagram of a control device for a power factor correction circuit according to an embodiment of the present invention. The power factor correction circuit includes: a voltage input terminal, a first inductor, a switching circuit, and a voltage output terminal. The switching circuit includes a first bridge arm composed of a first switching device and a second switching device connected together, and a second bridge arm composed of a third switching device and a fourth switching device connected together. The first end of the voltage input terminal is connected between the first and second switching devices through the first inductor, and the second end of the voltage input terminal is connected between the third and fourth switching devices. Figure 6 As shown, the control device includes: an acquisition module 61, used to acquire the bus voltage at the voltage output terminal and determine whether the difference between the bus voltage and the input voltage reaches a preset value, wherein the input voltage is the voltage of the DC power input through the voltage input terminal; and a control module 62, used to control the first switching device and the second switching device to enter the start-up mode when the difference is less than the preset value, wherein in the start-up mode, the first switching device and the second switching device operate at a frequency within a preset frequency range so that the inductance current of the first inductor drops to a preset current range before the first switching device and the second switching device are turned on; and to control the first switching device and the second switching device to enter the frequency conversion operation mode when the difference is greater than or equal to the preset value.
[0071] In this embodiment of the invention, when the difference between the bus voltage and the DC input voltage is less than a preset value, the first and second switching devices are controlled to enter the startup mode, so that the first and second switching devices operate at frequencies within a preset frequency range. This avoids the generation of large reverse recovery currents after the first and second switching devices are turned off, ensuring that the reverse recovery currents of the first and second switching devices can be recovered in time when the bus voltage is low. This prevents the reverse recovery current from causing shoot-through of the switching devices in the same bridge arm or generating large thermal stress that could damage the switching devices during the soft-start process of the totem-pole PFC circuit. This improves the soft-start reliability of the totem-pole PFC circuit using low-cost switching devices with large reverse recovery currents under DC conditions, and solves the technical problem of poor soft-start reliability of totem-pole PFC circuits using switching transistors with large reverse recovery currents under DC input conditions.
[0072] As an optional embodiment, the inductance current of the first inductor is reduced to a preset current range, including: the inductance current of the first inductor is zero or a negative current, so that the first switching device and the second switching device operate in a zero-current turn-on mode.
[0073] As an optional embodiment, the first control signal of the first switching device and the second control signal of the second switching device are complementary; wherein, the first control signal is used to control the first switching device to be turned on or off, and the second control signal is used to control the second switching device to be turned on or off.
[0074] As an optional embodiment, the above-mentioned device further includes: a duty cycle control module, used to control the duty cycle of the first control signal to increase from small to large and the duty cycle of the second control signal to decrease from large to small after the first switching device and the second switching device enter the start-up mode, so as to increase the bus voltage.
[0075] As an optional embodiment, the power factor correction circuit further includes: a second inductor and a third bridge arm composed of a fifth switching device and a sixth switching device connected together. The first end of the voltage input terminal is also connected between the fifth switching device and the sixth switching device through the second inductor. The control module is also used to control the fifth switching device and the sixth switching device to operate at a frequency within a preset frequency range when the difference is less than a preset value, so that the inductance current of the second inductor drops to a preset current range before the fifth switching device and the sixth switching device are turned on.
[0076] As an optional embodiment, the first switching device, the second switching device, the third switching device, and the fourth switching device are at least one of the following: MOSFET, IGBT, diode, and thyristor.
[0077] As an optional embodiment, the control module includes at least one of the following: a constant frequency control submodule for controlling the first switching device and the second switching device to operate at a constant preset frequency; and a dithering control submodule for controlling the first switching device and the second switching device to operate at a dithering frequency within a preset frequency range.
[0078] Example 3
[0079] According to another aspect of the present invention, a storage medium is also provided, the storage medium including a stored program, wherein, when the program is running, the device where the storage medium is located is controlled to execute the control method of the power factor correction circuit described above.
[0080] According to another aspect of the present invention, a processor is also provided, comprising: the processor being configured to run a program, wherein the program executes the control method of the power factor correction circuit described above during runtime.
[0081] The processor is used to run programs and can call information and application programs stored in the memory through the transmission device to perform the following steps: acquiring the bus voltage at the voltage output terminal and determining whether the difference between the bus voltage and the input voltage reaches a preset value, wherein the input voltage is the voltage of the DC current input through the voltage input terminal; if the difference is less than the preset value, controlling the first switching device and the second switching device to enter the start-up mode, wherein in the start-up mode, the first switching device and the second switching device operate at a frequency within a preset frequency range, so that the inductance current of the first inductor drops to a preset current range before the first switching device and the second switching device are turned on; if the difference is greater than or equal to the preset value, controlling the first switching device and the second switching device to enter the frequency conversion working mode.
[0082] The sequence numbers of the above embodiments of the present invention are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.
[0083] In the above embodiments of the present invention, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.
[0084] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. The device embodiments described above are merely illustrative; for example, the division of units can be a logical functional division, and in actual implementation, there may be other division methods. For instance, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual coupling, direct coupling, or communication connection may be through some interfaces; the indirect coupling or communication connection between units or modules may be electrical or other forms.
[0085] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0086] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.
[0087] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.
[0088] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.
Claims
1. A control method for a power factor correction circuit, characterized in that, The power factor correction circuit includes: a voltage input terminal, a first inductor, a switching circuit, and a voltage output terminal. The switching circuit includes a first bridge arm composed of a first switching device and a second switching device connected together, and a second bridge arm composed of a third switching device and a fourth switching device connected together. The first end of the voltage input terminal is connected between the first switching device and the second switching device through the first inductor, and the second end of the voltage input terminal is connected between the third switching device and the fourth switching device. The control method of the power factor correction circuit includes: Obtain the bus voltage at the voltage output terminal and determine whether the difference between the bus voltage and the input voltage reaches a preset value, wherein the input voltage is the voltage of the DC power input through the voltage input terminal; When the difference is less than the preset value, the first switching device and the second switching device are controlled to enter the start-up mode. In the start-up mode, the first switching device and the second switching device operate at a frequency within a preset frequency range so that the inductance current of the first inductor drops to a preset current range before the first switching device and the second switching device are turned on. If the difference is greater than or equal to the preset value, the first switching device and the second switching device are controlled to enter the frequency conversion working mode.
2. The control method according to claim 1, characterized in that, The inductor current of the first inductor drops to a preset current range, including: The inductance current of the first inductor is zero or negative, so that the first and second switching devices operate in a zero-current turn-on mode.
3. The control method according to claim 2, characterized in that, The method further includes: The first control signal of the first switching device and the second control signal of the second switching device are complementary, wherein the first control signal is used to control the first switching device to be turned on or off, and the second control signal is used to control the second switching device to be turned on or off.
4. The control method according to claim 3, characterized in that, The method further includes: After the first switching device and the second switching device enter the startup mode, the duty cycle of the first control signal is controlled to increase from small to large, and the duty cycle of the second control signal is controlled to decrease from large to small, so as to increase the bus voltage.
5. The control method according to claim 1, characterized in that, The power factor correction circuit further includes: a second inductor and a third bridge arm composed of a fifth switching device and a sixth switching device connected together; the first terminal of the voltage input terminal is also connected between the fifth switching device and the sixth switching device through the second inductor; the method further includes: If the difference is less than the preset value, the fifth and sixth switching devices are controlled to operate at frequencies within the preset frequency range, so that the inductance current of the second inductor drops to the preset current range before the fifth and sixth switching devices are turned on.
6. The control method according to claim 1, characterized in that, The first switching device, the second switching device, the third switching device, and the fourth switching device are at least one of the following: MOSFET, IGBT, diode, and thyristor.
7. The control method according to claim 1, characterized in that, When the difference is less than the preset value, the first switching device and the second switching device are controlled to enter the start-up mode, including at least one of the following: The first switching device and the second switching device operate at a constant preset frequency; and the first switching device and the second switching device operate at a jitter frequency within a preset frequency range.
8. A control device for a power factor correction circuit, characterized in that, The power factor correction circuit includes: a voltage input terminal, a first inductor, a switching circuit, and a voltage output terminal. The switching circuit includes a first bridge arm composed of a first switching device and a second switching device connected together, and a second bridge arm composed of a third switching device and a fourth switching device connected together. The first end of the voltage input terminal is connected between the first switching device and the second switching device through the first inductor, and the second end of the voltage input terminal is connected between the third switching device and the fourth switching device. The control device includes: The acquisition module is used to acquire the bus voltage at the voltage output terminal and determine whether the difference between the bus voltage and the input voltage reaches a preset value, wherein the input voltage is the voltage of the DC power input through the voltage input terminal; The control module is configured to control the first switching device and the second switching device to enter a startup mode when the difference is less than the preset value, wherein, in the startup mode, the first switching device and the second switching device operate at a frequency within a preset frequency range, so that the inductance current of the first inductor drops to a preset current range before the first switching device and the second switching device are turned on; and to control the first switching device and the second switching device to enter a frequency conversion operating mode when the difference is greater than or equal to the preset value.
9. A storage medium, characterized in that, The storage medium includes a stored program, wherein, when the program is executed, it controls the device containing the storage medium to perform the control method of the power factor correction circuit according to any one of claims 1 to 7.
10. A processor, characterized in that, The processor is used to run a program, wherein the program executes the control method of the power factor correction circuit according to any one of claims 1 to 7.
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