Touch panel and touch display device

Abstract

The present invention discloses a touch panel and a touch display device. In a specific embodiment, the touch panel includes a substrate and at least one routing area arranged on the substrate: the routing area includes: first virtual signal areas and first signal areas arranged alternately, and the first virtual signal areas and the first signal areas extend along a first direction; wherein, the first virtual signal area includes: patterned first virtual signal lines arranged in an array on the substrate, two adjacent first virtual signal lines correspond to the same boundary vertex, and adjacent first virtual signal lines are disconnected from each other at the boundary vertex. The technical solution described in the present invention changes the conduction direction of static electricity, improves the overall performance of the touch panel, and has broad application prospects.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and more particularly to a touch panel and a touch display device. Background Art

[0002] OLED displays are rapidly gaining popularity in small and medium-sized devices, such as mobile phones, due to their high contrast, wide color gamut, and foldability. At the same time, their application is also shifting towards larger displays, such as in-car displays and notebook computers. This trend in OLED displays also places higher demands on touch sensing. Existing displays using touch sensing technology are prone to electrostatic breakdown. Summary of the Invention

[0003] An object of the present invention is to provide a touch panel and a touch display device to solve at least one of the problems existing in the prior art.

[0004] In order to achieve the above object, the present invention adopts the following technical solutions:

[0005] A first aspect of the present invention provides a touch panel, comprising a substrate and at least one wiring area provided on the substrate:

[0006] The routing area includes:

[0007] First dummy signal areas and first signal areas are alternately arranged, and the first dummy signal areas and the first signal areas extend along a first direction;

[0008] Wherein, the first virtual signal area includes:

[0009] Patterned first virtual signal lines are arranged in an array on the substrate, two adjacent first virtual signal lines correspond to the same boundary vertex, and adjacent first virtual signal lines are disconnected from each other at the boundary vertex.

[0010] Furthermore, it also includes:

[0011] A first insulating layer is provided on a surface of the first dummy signal region on a side away from the substrate;

[0012] Second dummy signal areas and second signal areas are alternately arranged on the first insulating layer, the second dummy signal areas and the second signal areas extend along a second direction, and the second direction is perpendicular to the first direction.

[0013] The second virtual signal area includes:

[0014] Patterned second virtual signal lines are arranged in an array on the substrate, two adjacent second virtual signal lines correspond to the same boundary vertex, and adjacent second virtual signal lines are disconnected from each other at the boundary vertex.

[0015] Furthermore, a first overlapping area exists between a projection of the first signal area on the substrate and a projection of the second virtual signal area on the substrate;

[0016] The first signal area includes:

[0017] patterned first signal lines arranged in an array and provided on the same layer as the first dummy signal lines;

[0018] In the first overlapping area, the projection of the second virtual signal line is disconnected at the projection position of the first signal line.

[0019] Furthermore, the second signal area includes:

[0020] patterned second signal lines arranged in an array and provided on the same layer as the second dummy signal lines;

[0021] A second overlapping area exists between a projection of the second signal area on the substrate and a projection of the first virtual signal area on the substrate;

[0022] In the second overlapping area, the projection of the first dummy signal line is disconnected at a projection position of the second signal line.

[0023] Furthermore, the same touch chip is connected to at least one of the wiring areas;

[0024] The touch panel further includes a third virtual signal area extending along the second direction and arranged between wiring areas connected to adjacent touch chips, and used to disconnect the first signal line or the second signal line of the adjacent wiring areas.

[0025] Furthermore, the third virtual signal area includes patterned third virtual signal lines arranged in an array, the third virtual signal lines are provided in the same layer as the first signal lines, and boundary vertices of adjacent third virtual signal lines are disconnected from each other;

[0026] The third virtual signal area further includes patterned fourth virtual signal lines arranged in an array. The fourth virtual signal lines are provided in the same layer as the second signal lines, and boundary vertices of adjacent fourth virtual signal lines are disconnected from each other.

[0027] Furthermore, in the second direction, the side length of the projection of the first virtual signal area on the substrate is smaller than the side length of the projection of the first signal area on the substrate;

[0028] In the first direction, the side length of the projection of the second virtual signal area on the substrate is smaller than the side length of the projection of the second signal area on the substrate;

[0029] or

[0030] The projection of the second virtual signal area on the substrate covers the projection of the third virtual signal area on the substrate;

[0031] or

[0032] In the first direction, the side length of the projection of the first signal area on the substrate is greater than the side length of the projection of the second signal area on the substrate;

[0033] In the second direction, a side length of a projection of the first signal area on the substrate is smaller than a side length of the second signal area on the substrate.

[0034] Further, one or more of the first signal line, the second signal line, the first virtual signal line, the second virtual signal line, the third virtual signal line and the fourth virtual signal line is a diamond shape;

[0035] The first signal line, the second signal line, the first dummy signal line, the second dummy signal line, the third dummy signal line, and the fourth dummy signal line have the same projected area on the substrate.

[0036] A second aspect of the present invention provides a touch display device, comprising the touch panel provided by the first aspect of the present invention.

[0037] Furthermore, it also includes at least one touch chip connected to the touch panel.

[0038] The beneficial effects of the present invention are as follows:

[0039] The technical solution described in the present invention changes the conduction direction of static electricity by disconnecting the boundary vertices corresponding to two adjacent first virtual signal lines, so that static electricity from the middle first signal area will not accumulate in the first virtual signal areas on both sides, reducing the load of the first virtual signal areas on both sides of the first signal area, thereby avoiding the problem of static electricity release caused by static electricity accumulation in the first virtual signal area, improving the overall performance of the touch panel, and having broad application prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The specific embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.

[0041] Figure 1 A schematic diagram showing a defective metal grid solution of a touch panel in the related art that suffers from electrostatic breakdown;

[0042] Figure 2A schematic diagram showing the arrangement of the first signal area and the first virtual signal area of ​​a touch panel in the related art is shown;

[0043] Figure 3 A schematic diagram showing the arrangement of the second signal area and the second virtual signal area of ​​a touch panel in the related art is shown;

[0044] Figure 4 shows a schematic projection diagram of each signal area of ​​the touch panel;

[0045] Figure 5 A schematic diagram of a specific pattern of a first signal line, a first dummy signal line, a second signal line, and a second dummy signal line is shown;

[0046] Figure 6 Show Figures 2 to 5 A schematic diagram of the electrostatic current flow at the connection between the first signal line and the first virtual signal line under the arrangement of ;

[0047] Figure 7 A schematic diagram illustrating the arrangement of the first signal area and the first virtual signal area according to an embodiment of the present invention is shown;

[0048] Figure 8 Show Figure 7 Schematic diagram of electrostatic current of the wiring arrangement shown;

[0049] Figure 9 A schematic diagram showing the layer structure of a touch panel according to an embodiment of the present invention;

[0050] Figure 10 A schematic diagram illustrating the arrangement of the second signal area and the second virtual signal area according to an embodiment of the present invention is shown;

[0051] Figure 11 Show Figures 2 to 5 A schematic diagram of the electrostatic current flow at the connection between the second signal line and the second virtual signal line under the arrangement of ;

[0052] Figure 12 Show Figure 10 Schematic diagram of electrostatic current flow in the wiring arrangement shown;

[0053] Figure 13 A schematic diagram showing a wiring design for a first overlapping area according to an embodiment of the present invention is shown;

[0054] Figure 14 A schematic diagram showing a wiring design of a second overlapping area according to an embodiment of the present invention is shown;

[0055] Figure 15 A schematic diagram of a large-scale, multi-chip cascade solution in related technology is shown;

[0056] Figure 16 Shown Figure 4Schematic diagram of current flow in the routing area connected to the single-touch chip shown;

[0057] Figure 17 Shown Figure 15 A schematic diagram of current flow in the wiring area connected to the multi-touch chip shown;

[0058] Figure 18 A schematic diagram showing the arrangement structure of each signal area of ​​a multi-touch chip according to an embodiment of the present invention is shown;

[0059] Figure 19 A schematic diagram showing the arrangement of the third virtual signal lines in the third virtual signal area according to an embodiment of the present invention is shown;

[0060] Figure 20 A schematic diagram showing the arrangement of the fourth virtual signal lines in the third virtual signal area of ​​an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0061] In order to more clearly illustrate the present invention, the present invention will be further described below in conjunction with the embodiments and drawings. Similar components in the drawings are represented by the same reference numerals. It should be understood by those skilled in the art that the following specific description is illustrative rather than restrictive and should not be used to limit the scope of protection of the present invention.

[0062] like Figure 1 As shown, the existing metal-mesh solution of the touch panel is very prone to electrostatic discharge (ESD) causing electrostatic breakdown of the touch panel.

[0063] Regarding this issue, the inventors have conducted experiments and research and found that the main reasons for the above problems of touch panels are as follows:

[0064] Figures 2 to 5 The pattern design of the metal mesh solution of the touch panel of the related art is shown. Figure 4 As shown, the touch panel is formed by multiple wiring areas 1. Figure 2 Shown Figure 4 The first signal area 10 formed by the first signal line 11 and the first virtual signal area 20 formed by the first virtual signal line 21 are as shown in FIG. Figure 2 As shown, the first dummy signal area 20 and the first signal area 10 extend along a first direction, ie, the X direction, and the first dummy signal area 20 and the first signal area 10 are alternately arranged. Figure 3 Shown Figure 5 The second signal area 30 formed by the second signal line 31 and the second virtual signal area 40 formed by the second virtual signal line 41 are as shown in FIG. Figure 3As shown, the second dummy signal area 40 and the second signal area 30 extend along the second direction, ie, the Y direction, and the second dummy signal area 40 and the second signal area 30 are alternately arranged.

[0065] The first signal area 10 and the second signal area 30 are formed on different planes, and similarly, the first dummy signal area 20 and the second dummy signal area 40 are formed on different planes. Figure 4 The first signal area 10, the first virtual signal area 20, the second signal area 30, and the second virtual signal area 40 are shown in FIG. The inventors found that the damaged area of ​​the display panel caused by the electrostatic discharge of the grid Figure 4 The second virtual signal area shown extends along the second direction Y.

[0066] The inventors further studied the problem of electrostatic breakdown generated at this location and proposed the following:

[0067] like Figure 4 As shown, the breakdown location includes the second dummy signal region and the first signal region, as well as an overlapping region between the second dummy signal region and the first dummy signal region.

[0068] like Figure 5 As shown, Figure 5 Schematic diagram of a specific pattern of the first signal line 11, the first virtual signal line 21, the second signal line 31, and the second virtual signal line 41 in the routing area 1 is shown. The thinner lines are the first signal line 11 and the first virtual signal line 21 connected to the first signal line 11, and the thicker lines are the second signal line 31 and the second virtual signal line 41 connected to the first signal line 11. Figure 4 The breakdown region shown corresponds to Figure 5 The breakdown region is shown.

[0069] like Figure 5 As shown, a dummy signal line is provided in the breakdown region. Taking the first dummy signal region as an example, the patterned first signal line 11 provided on the same layer as the first dummy signal line 21 is continuous and has a high density. The first dummy signal line 21 is provided with a break to block the first signal at this location. The patterned first dummy signal line 21 in the breakdown region has a low density. Therefore, the resistance of the first signal line is less than the resistance of the first dummy signal line. In other words, there is a potential difference between the first signal line 11 and the first dummy signal line 21 on the same layer, which will generate static electricity accumulation. The static electricity accumulated in the first dummy signal region will be released. Similarly, static electricity will also accumulate in the second dummy signal region.

[0070] like Figure 6 As shown, Figure 6 Show Figure 5 Arrange the electrostatic current flow at the connection between the first signal line 11 and the first virtual signal line 21, as shown in FIG. Figure 6 As shown, static electricity will be conducted from the first signal line 11 to the first dummy signal lines 21 on both sides and will continue to accumulate, causing a breakdown problem on the touch panel.

[0071] In view of this, the present invention provides a touch panel and a touch display device. The first embodiment of the present invention provides a touch panel, such as Figure 4 、 Figure 7 as well as Figure 9 As shown, the touch panel includes a substrate 51 and at least one wiring area 1 provided on the substrate 51:

[0072] The routing area 1 includes:

[0073] The first dummy signal areas 20 and the first signal areas 10 are alternately arranged, and the first dummy signal areas 20 and the first signal areas 10 extend along a first direction;

[0074] Among them, Figure 7 As shown, the first virtual signal area 20 includes:

[0075] The patterned first virtual signal lines 21 arranged in an array on the substrate are arranged, and two adjacent first virtual signal lines 21 correspond to the same boundary vertex, and the adjacent first virtual signal lines 21 are disconnected from each other at the boundary vertex.

[0076] In this embodiment, by disconnecting the boundary vertices corresponding to the two adjacent first virtual signal lines 21, the conduction direction of static electricity is changed, so that static electricity from the middle first signal area 10 will not accumulate in the first virtual signal areas 20 on both sides, reducing the load of the first virtual signal areas 20 on both sides of the first signal area 10, thereby avoiding the problem of static electricity release caused by static electricity accumulation in the first virtual signal areas 20, and improving the overall performance of the touch panel.

[0077] In an optional embodiment, if Figure 7 As shown, the first signal line 11 and the first dummy signal line 21 are designed in a diamond shape. In this embodiment, the first direction is the X direction, and the second direction is the Y direction. The first signal line 11 is an X signal line, and the first dummy signal line 21 is an Xdummy signal line. The Xdummy signal line is provided with a break to block the signal transmitted by the first signal line 11.

[0078] like Figure 7As shown, in a specific example, the same boundary vertex corresponds to two adjacent first virtual signal lines in the X direction, namely the first virtual signal line 21A and the other first virtual signal line 21B. The first virtual signal line 21A and the first virtual signal line 21B are disconnected at the same boundary vertex, and two parallel vertical boundaries are formed at the position of the boundary vertex, so that the direction of the static electricity originally flowing to the same boundary vertex of the two first virtual signal lines 21 is changed, so that the electrostatic current is dispersed to other first signal areas 10, which can effectively improve the static electricity accumulation at the original position and prevent the problem of electrostatic breakdown.

[0079] In another specific example, Figure 7 As shown, the same boundary vertex of the patterned first virtual signal line 21B and another adjacent first virtual signal line 21C is also designed to be disconnected. The disconnection design forms a parallel horizontal boundary at the boundary vertex, so that the two first virtual signal lines 21 are disconnected, as shown in FIG. Figure 8 As shown, under this design, the static electricity originally accumulated at the boundary vertex of the first virtual signal line 21 also changes its direction under the conduction of the new boundary, and the static electricity is dispersed to other first signal areas 10, which can also effectively improve the static electricity accumulation at the original position, thereby changing the direction of static electricity and dispersing the static electricity in the first virtual signal area 20, thereby preventing the problem of electrostatic breakdown.

[0080] Therefore, those skilled in the art can select the design structure of the corresponding first virtual signal area 20 according to the actual application, and use the design principle of disconnecting the adjacent first virtual signal lines 21 at the same boundary vertex to change the direction of static electricity and disperse static electricity accumulation.

[0081] In an optional embodiment, the touch panel further comprises a first insulating layer 51 disposed on the surface of the first virtual signal area 20 away from the substrate 51, and second virtual signal areas and second signal areas alternately disposed on the first insulating layer. Figure 9 As shown, the first signal area 10 and the second signal area are arranged on different layers, and the first signal area 10 and the second signal area are separated by an insulating layer to achieve signal isolation. Figure 9 As shown, in the stacking direction, first signal lines 11 forming a first signal area 10 and first dummy signal lines 21 forming a first dummy signal area 20 are provided on the substrate. The first dummy signal lines 21 and the first signal lines 11 are alternately provided. A first insulating layer 51 is provided on the first signal lines 11 and the first dummy signal lines 21. Second signal lines 31 and second dummy signal lines 41 are alternately provided on the first insulating layer 51. Exemplarily, a second insulating layer 53 is provided on the second signal lines 31 and the second dummy signal lines 41.

[0082] In the top-down direction, Figure 4 As shown, the second virtual signal area 40 and the second signal area 30 extend along a second direction (Y direction), which is perpendicular to the first direction (X direction). The signal lines and virtual signal lines located in different layers form different overlapping areas. For example, the first signal area 10 and the second signal area 30 form an overlapping area, the first virtual signal area 20 and the second signal area 30 form an overlapping area, the first signal area 10 and the second virtual signal area 40 form an overlapping area, and the second virtual signal area 40 and the first signal area 10 form an overlapping area.

[0083] The second dummy signal region 40 includes patterned second dummy signal lines 41 arranged in an array on the first insulating layer 52 .

[0084] like Figure 9 As shown, two adjacent second virtual signal lines 41 correspond to the same boundary vertex, and the adjacent second virtual signal lines 41 are disconnected from each other at the boundary vertex.

[0085] In this embodiment, the second signal line 31 and the second dummy signal line 41 are diamond-shaped structures.

[0086] like Figure 5 As shown, electrostatic breakdown also occurs in the second virtual signal area 40 located in the middle. The patterned second signal line 31 arranged on the same layer as the second virtual signal line 41 is in a continuous state, and the density of the patterned second signal line 31 is large. The second virtual signal line 41 is provided with a break to block the second signal at this position, and the density of the patterned second virtual signal line 41 in the breakdown area is small. Therefore, the resistance of the second signal line is less than the resistance of the second virtual signal line 41. That is to say, there is a potential difference between the second signal line 31 and the second virtual signal line 41 on the same layer, which will generate static electricity accumulation. The static electricity in the second virtual signal area 40 will be released after accumulation.

[0087] like Figure 11 As shown, Figure 11 Show Figure 5 Arrange the electrostatic current flow direction at the connection between the second signal line 31 and the second virtual signal line 41, as shown in FIG. Figure 11 As shown, static electricity is conducted from the second signal lines 31 on both sides to the second dummy signal line 41 in the middle. The static electricity current accumulates continuously, causing the second dummy signal area 40 of the touch panel to break down.

[0088] In this embodiment, the structure of the second virtual signal line 41 of the second virtual signal area 40 is designed to disconnect the boundary vertices of two adjacent second virtual signal lines 41, thereby changing the direction of the electrostatic current originally accumulated at the intersection, so that the electrostatic current is dispersed to other areas.

[0089] like Figure 10 As shown, in the X direction, two adjacent second virtual signal lines 41 correspond to the same boundary vertex, that is, the second virtual signal line 41B and the second virtual signal line 41C correspond to a boundary vertex, and the second virtual signal line 41B on the left side of the boundary vertex and the second virtual signal line 41C on the right side of the boundary vertex are disconnected at the position of the boundary vertex. After the boundary vertex is disconnected, the boundary vertices of the corresponding second virtual signal line 41 on the left and the second virtual signal line 41 on the right form two parallel vertical boundaries.

[0090] In another specific example, Figure 10 As shown, in the Y direction, two adjacent second virtual signal lines 41A and second virtual signal lines 41B correspond to a boundary vertex, and the second virtual signal line 41A above the boundary vertex and the second virtual signal line 41B below the boundary vertex are disconnected at the position of the boundary vertex. After the boundary vertex is disconnected, the boundary vertices of the corresponding second virtual signal line 41A located above and the second virtual signal line 41B located below form two parallel horizontal boundaries.

[0091] In another specific example, in the Y direction, two adjacent second virtual signal lines 41B and second virtual signal lines 41D correspond to a boundary vertex, and the second virtual signal line 41B above the boundary vertex and the second virtual signal line 41D below the boundary vertex are disconnected at the position of the boundary vertex. After the boundary vertex is disconnected, the boundary vertices of the corresponding second virtual signal line 41B located above and the second virtual signal line 41D located below form two parallel vertical boundaries.

[0092] by Figure 10 Taking the disconnection design of the same boundary vertex corresponding to the second virtual signal line 41B and the second virtual signal line 41D as an example, Figure 12 The direction of electrostatic current under the disconnection design is shown in Figure 2. Figure 12As shown, the direction of the electrostatic current originally accumulated from both sides to the middle second virtual signal area 40 flows from one boundary of the same second virtual signal line 41B to one boundary of the second virtual signal line 41D after passing through the disconnected boundary vertex, instead of directly accumulating at the boundary vertex where the two boundaries intersect, so that static electricity will not accumulate in the middle area, reducing the load of the middle area, and at the same time changing the conduction direction of static electricity, so that the electrostatic load of the middle second virtual signal area 40 is reduced, thereby solving the problem of electrostatic breakdown.

[0093] In an optional embodiment, the patterned first signal line 11 , second signal line 31 , first dummy signal line 21 and second dummy signal line 41 of this embodiment are diamond-shaped. Exemplarily, the projection areas of the above signal lines on the substrate are the same.

[0094] In an optional embodiment, if Figure 2 As shown, in the second direction (Y), the side length of the projection of the first dummy signal area 20 on the substrate is smaller than the side length of the projection of the first signal area 10 on the substrate. In other words, the projected area of ​​the first signal area 10 formed by the first signal lines 11 in this embodiment is larger than the projected area of ​​the first dummy signal area 20 formed by the first dummy signal lines 21. In other words, although the first signal lines 11 and the first dummy signal lines 21 are alternately arranged in the Y direction, the distribution area of ​​the first signal lines 11 for transmitting signals is larger than the distribution area of ​​the first dummy signal lines 21 for disconnecting signals.

[0095] like Figure 3 As shown, in the first direction (X), the side length of the projection of the second dummy signal area 40 on the substrate is smaller than the side length of the projection of the second signal area 30 on the substrate. In other words, the projected area of ​​the second signal area 30 formed by the second signal lines 31 of this embodiment is larger than the projected area of ​​the second dummy signal area 40 formed by the second dummy signal lines 41. In other words, although the second signal lines 31 and the second dummy signal lines 41 are alternately arranged in the Y direction, the distribution area of ​​the second signal lines used for transmitting signals is larger than the distribution area of ​​the second dummy signal lines 41 used for disconnecting signals.

[0096] In an optional embodiment, if Figure 4 As shown, in the first direction (X direction), the side length of the projection of the first signal area 10 on the substrate is greater than the side length of the projection of the second signal area 30 on the substrate. That is, the first signal line 11 of the first signal area 10 of this embodiment is a connected design extending along the first direction, while the second signal area 30 is designed to alternate with the second virtual signal area 40 in the first direction. In the first direction, one first signal area 10 corresponds to multiple second signal areas 30.

[0097] In the second direction (Y direction), the side length of the projection of the first signal area 10 on the substrate is smaller than the side length of the second signal area 30 on the substrate. In other words, the second signal lines 31 of the second signal area 30 in this embodiment are connected along the second direction. In the second direction (Y direction), the first signal areas 10 and the first virtual signal areas 20 are alternately arranged. In the second direction, one second signal area 30 corresponds to multiple first signal areas 10. This arrangement creates distinct overlapping regions between the two signal areas in the projection direction.

[0098] like Figure 4 As shown, considering the electrostatic breakdown area, it not only includes the first virtual signal area 20 and the second virtual signal area 40, but also includes the area where the second virtual signal area 40 and the first signal area 10 overlap, and the area where the first virtual signal area 20 and the second signal area 30 overlap. The above areas are all the main problem areas where breakdown occurs.

[0099] The above embodiment of the present invention changes the direction of electrostatic conduction and disperses static electricity by designing the first virtual signal line 21 on the same layer as the first signal line 11 and the second virtual signal line 41 on the same layer as the second signal line 31, thereby improving the problem of electrostatic breakdown in the first virtual signal area 20 and the second virtual signal area 40.

[0100] Furthermore, the embodiment of the present invention designs the routing of the overlapping area to further improve the electrostatic breakdown problem in the overlapping area.

[0101] like Figure 13 As shown, in an optional embodiment, a projection of the first signal area 10 on the substrate and a projection of the second virtual signal area 40 on the substrate have a first overlapping area;

[0102] The first signal area 10 includes:

[0103] The patterned first signal lines 11 are arranged in an array and provided in the same layer as the first dummy signal lines 21;

[0104] In the first overlapping area, the projection of the second dummy signal line 41 is disconnected at the projection position of the first signal line 11 .

[0105] like Figure 1 and Figure 5 As shown, ①② is the inflection point of electrostatic damage, and the electrostatic damage at the inflection point is more serious. This position is the first overlapping area formed by the projection of the first signal line 11 and the second virtual signal line 41 on the substrate. Figure 5As shown, the patterned first signal line 11 is continuous and has a large grid density. The patterned second virtual signal line 41 has a break for blocking the signal. The grid density of the second virtual signal line 41 is small. Therefore, the resistance of the first signal line 11 is smaller than that of the second virtual signal line 41. Figure 9 As shown in the schematic diagram of the layer structure, the resistance of the first signal line 11 located in the lower layer is less than the resistance of the second virtual signal line 41 located in the upper layer, resulting in a potential difference between the signal lines of different layers. As static electricity continues to accumulate, the potential difference between the upper and lower layers gradually increases, resulting in static electricity release between the upper and lower layers, that is, static electricity release occurs in the first overlapping area of ​​the first signal line 11 and the second virtual signal line 41, causing the touch panel to be damaged at this position.

[0106] Therefore, the problem of electrostatic breakdown occurs in the first overlapping area between the first signal area 10 and the second dummy signal area 40 of a different layer.

[0107] In this embodiment, the signal lines in the first overlapping region are designed so that in the first overlapping region, the projection of the second virtual signal line 41 is disconnected at the projection position of the first signal line 11. That is, although the second virtual signal line 41 and the first signal line 11 are located in different layers, at the projection position of the first signal line 11, the projection of the second virtual signal line 41 avoids the projection of the first signal line 11. For example, the projection diagram is shown as follows: Figure 13 As shown, at the projection of the first signal line 11, the second virtual signal line 41 that should be connected is designed to be disconnected, avoiding the electrostatic discharge problem caused by the potential difference between different layers at this position, and further effectively preventing the touch panel from having electrostatic breakdown problems.

[0108] Considering that the second signal area 30 and the first virtual signal area 20 also have a potential difference in the overlapping area, that is, Figure 5 As shown, the patterned second signal line 31 is continuous and has a large grid density. The patterned first virtual signal line 21 has a break for blocking the signal. The grid density of the first virtual signal line 21 is small. Therefore, the resistance of the second signal line 31 is smaller than that of the first virtual signal line 21. Figure 9 As shown in the schematic diagram of the layer structure, the resistance of the second signal line 31 located in the upper layer is less than the resistance of the first virtual signal line 21 located in the lower layer, resulting in a potential difference between the signal lines of different layers. As static electricity continues to accumulate, the potential difference between the upper and lower layers gradually increases, resulting in static electricity release between the upper and lower layers, that is, static electricity release occurs in the second overlapping area of ​​the second signal line 31 and the first virtual signal line 21, causing the touch panel to be damaged at this position.

[0109] To solve the above problem, in an optional embodiment, the second signal area 30 includes: patterned second signal lines 31 arranged in an array and provided on the same layer as the second virtual signal lines 41; a projection of the second signal area 30 on the substrate and a projection of the first virtual signal area 20 on the substrate have a second overlapping area;

[0110] In the second overlapping area, the projection of the first dummy signal line 21 is disconnected at the projection position of the second signal line 31 .

[0111] In this embodiment, the signal lines in the second overlapping region are designed so that in the second overlapping region, the projection of the first virtual signal line 21 is disconnected at the projection position of the second signal line 31. That is, although the first virtual signal line 21 and the second signal line 31 are located in different layers, at the projection position of the second signal line 31, the projection of the first virtual signal line 21 avoids the projection of the second signal line 31. For example, the projection diagram is shown as follows: Figure 14 As shown, at the projection of the second signal line 31, the first virtual signal line 21 that should be connected is designed to be disconnected, avoiding the electrostatic discharge problem caused by the potential difference between different layers at this position, and further effectively preventing the touch panel from having electrostatic breakdown problems.

[0112] Based on the above embodiment, the present invention effectively prevents electrostatic breakdown in touch panels by designing signal lines for the first signal area 10 and the first dummy signal area 20 arranged on the same layer, the second signal area 30 and the second dummy signal area 40 arranged on the same layer, the first signal area 10 and the second dummy signal area 40 arranged on different layers, and the second signal area 30 and the first dummy signal area 20 arranged on different layers. The above solution is applicable not only to widely used small-sized touch panels (less than 14 inches), but also to large-sized touch panels (greater than 14 inches).

[0113] Currently, touch sensing technologies that meet the requirements of large-size (>14 inches) and active pen specifications generally rely on metal mesh technology, specifically a design with patterned signal lines. Small touch panels often use a single touch chip to connect these signal lines. However, large touch panels are too large to accommodate a single touch IC (TIC), requiring a cascade solution. The synchronized patterned signals also need to meet cascade design requirements.

[0114] Figure 15 A schematic diagram of a large-scale, multi-chip cascade solution of related technology is shown in FIG. Figure 15As shown, the touch chip 1 is connected to the first signal line 11, the second signal line 31, the first virtual signal line 21 and the second virtual signal line 41 of a part of the routing area, and the touch chip 2 is connected to the signal lines of another part of the routing area. However, this large-scale, multi-chip cascade solution is still prone to electrostatic breakdown problems.

[0115] The inventors have studied and found that, in addition to the potential difference between the signal lines of the first signal area 10 and the first dummy signal area 20 arranged on the same layer, the second signal area 30 and the second dummy signal area 40 arranged on the same layer, the first signal area 10 and the second dummy signal area 40 arranged on different layers, and the second signal area 30 and the first dummy signal area 20 arranged on different layers, the following other reasons may lead to electrostatic breakdown in large-scale, multi-chip cascade solutions:

[0116] In the related art, when the routing area corresponds to a touch chip, the second signal line 31 of the second signal area 30 extending along the second direction Y is designed to be connected, that is, in the second direction Y, the second signal line 31 is connected. In the first direction X, the first signal line 11 is also designed to be connected. The current flow under this solution is as follows Figure 16 As shown, static electricity can be conducted to the edge wiring of the touch panel through the connected second signal line 31 to achieve static electricity release.

[0117] When the routing area corresponds to multiple touch chips, in order to achieve left and right partition control, the middle area of ​​the touch panel is designed to be disconnected, that is, the routing area of ​​the connecting part of the first touch chip 61, the second signal line 31 connected to the first touch chip 61 is designed to be connected, the second touch chip 62 is connected to the routing area of ​​another part, the second signal line 31 connected to the second touch chip 62 is designed to be connected, the second signal line 31 in the middle area of ​​the two touch chips is designed to be disconnected, but the first signal line 11 extending in the first direction X connected to the two touch chips is designed to be extended, that is, the first signal line 11 of the routing area connected to the first touch chip 61 and the second touch chip 62 is connected, which allows static electricity to be conducted to the disconnected area in the middle for accumulation, and the current direction is as follows: Figure 17 As shown, long-term static electricity accumulation causes the touch panel to be damaged in the disconnected area between the two touch chips.

[0118] To solve the above problem, in an optional embodiment, the routing of the cascade solution is designed so that the same touch chip is connected to at least one of the routing areas;

[0119] The touch panel further includes a third virtual signal area extending along the second direction and arranged between wiring areas connected to adjacent touch chips, for disconnecting the first signal line 11 or the second signal line 31 of the adjacent wiring areas.

[0120] like Figure 18 As shown, in this embodiment, a third virtual signal area 70 is set between the routing areas connected to adjacent touch chips. The third virtual signal area 70 disconnects the first signal line 11 and the second signal line 31 of the adjacent routing areas. The first touch chip 61 can be connected to multiple routing areas 1 according to the type, and the second touch chip 62 can also be connected to multiple routing areas 1. In this way, the right edge area of ​​the routing area connected to the first touch chip 61 is adjacent to the left edge area of ​​the routing area connected to the second touch chip 62. In this embodiment, a third virtual signal area 70 is set between the right edge area of ​​the routing area and the left edge area of ​​another routing area. The third virtual signal area 70 makes the first signal line 11 extending from one routing area to the routing area connected to another touch chip along the first direction disconnected in the third virtual signal area 70, and makes the second signal line 31 of the routing area connected to one touch chip and the routing area connected to another touch chip disconnected in the third virtual signal area, as shown in FIG. Figure 18 As shown, a third virtual signal area 70 is provided between the first signal area 10 connected to the first touch chip 61 and the first signal area 10 connected to the second touch chip 62. The first signal area extending in the X direction is disconnected by the third virtual signal area 70, thereby changing the direction of static electricity accumulation, so that the wiring area connected to each touch chip forms a complete Figure 16 The electrostatic circuit shown disperses the static electricity in the wiring area connected to the touch chip to other areas, thereby improving the electrostatic breakdown caused by the cascade solution of multiple touch chips.

[0121] In an optional embodiment, the third dummy signal area 70 includes patterned third dummy signal lines 71 arranged in an array, and the third dummy signal lines are provided on the same layer as the first signal lines 11 or the first dummy signal lines 21;

[0122] In another optional embodiment, boundary vertices of adjacent third virtual signal lines are disconnected from each other.

[0123] In this embodiment, Figure 19As shown, the left area is the routing area connected to the first touch chip 61, and the right area is the routing area connected to the second touch chip 62. The third virtual signal area 70 blocks the signals of the routing areas of different touch chips on both sides. For the first signal line 11, this embodiment blocks it by setting a third virtual signal line 71 extending along the Y direction. To simplify the process flow, the third virtual signal line 71 of this embodiment can be set on the same layer as the first signal line 11. That is, the first signal line 11, the first virtual signal line 21, and the third virtual signal line 71 are formed in the same process and in the same step. The first signal line 11 is designed to be connected, forming the first signal area 10 extending along the first direction. The first virtual signal line 21 is designed to be disconnected. For example, the first virtual signal lines 21 at the same boundary vertex are disconnected from each other, and the third virtual signal line is also disconnected. In an optional embodiment, the third virtual signal line 71 can also adopt a solution where the third virtual signal lines 71 at the same boundary vertex are disconnected from each other to further change the current flow direction.

[0124] like Figure 19 As shown, the adjacent third virtual signal line 71A and the third virtual signal line 71B correspond to the same boundary vertex, at which the third virtual signal line 71A located above and the third virtual signal line 71B located below are disconnected from each other, and at the same boundary vertex, the third virtual signal line 71A and the third virtual signal line 71B form two parallel vertical boundaries at the position of the boundary vertex. In another embodiment, the adjacent third virtual signal line 71B and the third virtual signal line 71C correspond to the same boundary vertex, at which the third virtual signal line 71B located above and the third virtual signal line 71C located below are disconnected from each other, and at the same boundary vertex, the third virtual signal line 71B and the third virtual signal line 71C form two parallel horizontal edges at the position of the boundary vertex. The above design allows the static electricity originally accumulated at the boundary vertex to be dispersed to other areas through the disconnected third virtual signal line, thereby improving the problem of electrostatic breakdown.

[0125] It is worth noting that the third virtual signal area of ​​this embodiment is set between the wiring areas connected to adjacent touch chips. Figure 18 As shown, one touch chip can be connected to multiple routing areas. At this time, the third virtual signal area is not set between the routing areas connected to the same touch chip, that is, the first signal lines 11 between the routing areas connected to the same touch chip are designed to be connected. The third virtual signal area of ​​this embodiment is set between the routing areas connected to different touch chips to improve the electrostatic breakdown problem of the connection between multiple touch chips.

[0126] Furthermore, in another optional embodiment, as Figure 20As shown, the third dummy signal area 70 further includes patterned fourth dummy signal lines 72 arranged in an array, and the fourth dummy signal lines 72 are provided in the same layer as the second signal lines 31. In another optional embodiment, the boundary vertices of adjacent fourth dummy signal lines 72 are disconnected from each other.

[0127] The fourth virtual signal line of this embodiment is designed to extend along the Y direction and is used to disconnect the second signal lines 31 of the routing areas connected to different touch chips. Figure 20 As shown, the adjacent fourth virtual signal line 72A and fourth virtual signal line 72B correspond to the same boundary vertex, at which the fourth virtual signal line 72A located above and the fourth virtual signal line 72B located below are disconnected from each other, and the fourth virtual signal line 72A and the fourth virtual signal line 72B form two parallel vertical boundaries at the position of the boundary vertex.

[0128] In another embodiment, adjacent fourth virtual signal lines 72B and 72C correspond to the same boundary vertex. At this boundary vertex, the upper fourth virtual signal line 72B and the lower fourth virtual signal line 72C are disconnected from each other. At the same boundary vertex, the fourth virtual signal line 72B and the fourth virtual signal line 72C form two parallel vertical boundaries at the location of the boundary vertex. This design allows static electricity originally accumulated at the boundary vertex to be dispersed to other areas through the disconnected fourth virtual signal line, further solving the problem of static electricity breakdown caused by static electricity accumulation.

[0129] Similar to the distribution design of the third virtual signal line, the fourth virtual signal line of this embodiment is arranged between the routing areas connected to different touch chips, that is, the fourth virtual signal line is not arranged between the routing areas connected to the same touch chip, that is, the density extending along the second direction is greater than the density of the third virtual signal area extending along the second direction.

[0130] The third dummy signal line and the fourth dummy signal line form a third dummy signal area, so that the static electricity originally accumulated between adjacent touch chips is dispersed to other areas through the disconnected third dummy signal area, thereby improving the problem of electrostatic breakdown.

[0131] In an optional embodiment, if Figure 19 and Figure 20As shown, in the third dummy signal area 70, the projection of the fourth dummy signal line 72 on the substrate overlaps the projection of the third dummy signal line 71 on the substrate, that is, the distribution width of the fourth dummy signal line 72 arranged on the same layer as the second dummy signal line 41 is greater than or equal to the distribution width of the third dummy signal line 71 arranged on the same layer as the first dummy signal line 21. Exemplarily, the fourth dummy signal line 72 of the third dummy signal area 70 can be arranged on the same layer as the second dummy signal line 41 of the second dummy signal area 40, thereby saving the process flow of the third dummy signal area 70.

[0132] Furthermore, in an optional embodiment, as Figure 19 As shown, part of the first signal line 11 of the first signal area 10 near the third virtual signal area 70 extends to the third virtual signal area 70 and is connected to the third virtual signal line 71; part of the first virtual signal line 21 of the first virtual signal area 20 near the third virtual signal area 70 extends to the third virtual signal area 70 and is connected to the third virtual signal line 71. In this embodiment, the width of the third virtual signal line 71 used to block the first signal line can be smaller than the width of the fourth virtual signal line 72, but there is no requirement for the width of the third virtual signal line. That is, when the width of the third virtual signal line 71 is smaller than the fourth virtual signal line 72, part of the first signal line 11 and part of the first virtual signal line 71 will extend to the third virtual signal area 70. However, under the blocking of the third virtual signal line 71, the first signal lines 11 corresponding to different touch chips are still designed to be disconnected.

[0133] Furthermore, the projection of the fourth virtual signal line 72 on the substrate and the projection of part of the first signal line 11 on the substrate form a third overlapping area. In the third overlapping area, the projection of the fourth virtual signal line 72 is disconnected at the projection position of the first signal line 11, thereby avoiding static electricity accumulation between the fourth virtual signal line 72 and the first signal line 11 of different layers, and further improving the problem of electrostatic breakdown.

[0134] Through the above-mentioned setting, the embodiment of the present invention designs the routing of the first virtual signal area 20 on the same layer as the first signal area 10, and designs the routing of the second virtual signal area 40 on the same layer as the second signal area 30, so as to disperse the static electricity accumulation between the routings on the same layer. The embodiment of the present invention also designs the overlapping area formed by the first signal area 10 and the second virtual signal area 40, and designs the overlapping area formed by the second signal area 30 and the first virtual signal area 20, so as to disperse the static electricity accumulation between the routings of different layers. This embodiment also designs the routing area between adjacent touch chips, so as to disperse the static electricity accumulation between different touch chips, and effectively prevent the occurrence of electrostatic breakdown.

[0135] Those skilled in the art may apply the above designs simultaneously, or may select multiple of them for combined design, which will not be described in detail here.

[0136] Another embodiment of the present invention provides a touch display device including the touch panel according to the above embodiment of the present invention.

[0137] The display device of the embodiment of the present invention can be any product or component that requires a touch panel, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, navigation system, car central control gear lever, and ink screen, and the embodiment of the present invention is not limited to this.

[0138] In an optional embodiment, the touch device further includes at least one touch chip connected to the touch panel, which not only solves the electrostatic breakdown problem of small-sized touch display devices, but also solves the electrostatic breakdown problem of large-sized touch display devices.

[0139] It should also be noted that, in the description of the present invention, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or device comprising the element.

[0140] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not limitations on the implementation methods of the present invention. For ordinary technicians in this field, other different forms of changes or modifications can be made based on the above description. It is impossible to list all the implementation methods here. All obvious changes or modifications derived from the technical solution of the present invention are still within the scope of protection of the present invention.

Claims

1. A touch panel, characterized in that: It includes a substrate and at least one wiring area provided on the substrate, wherein the same touch chip is connected to at least one of the wiring areas: The routing area includes: First dummy signal areas and first signal areas are alternately arranged, and the first dummy signal areas and the first signal areas extend along a first direction; Wherein, the first virtual signal area includes: patterned first virtual signal lines arranged in an array on the substrate, wherein two adjacent first virtual signal lines correspond to the same boundary vertex, and adjacent first virtual signal lines are disconnected from each other at the boundary vertex; The touch panel also includes: a third virtual signal area extending along the second direction between the routing areas connected to adjacent touch chips, for disconnecting the first signal lines of the adjacent routing areas, wherein the third virtual signal area includes patterned third virtual signal lines arranged in an array, the third virtual signal lines are arranged in the same layer as the first signal lines, and the boundary vertices of adjacent third virtual signal lines are disconnected from each other.

2. The touch panel according to claim 1, wherein: Also includes: A first insulating layer is provided on a surface of the first dummy signal region on a side away from the substrate; Second dummy signal areas and second signal areas are alternately arranged on the first insulating layer, the second dummy signal areas and the second signal areas extend along a second direction, and the second direction is perpendicular to the first direction. The second virtual signal area includes: Patterned second virtual signal lines are arranged in an array on the substrate, two adjacent second virtual signal lines correspond to the same boundary vertex, and adjacent second virtual signal lines are disconnected from each other at the boundary vertex.

3. The touch panel according to claim 2, wherein: There is a first overlapping area between the projection of the first signal area on the substrate and the projection of the second virtual signal area on the substrate; The first signal area includes: patterned first signal lines arranged in an array and provided on the same layer as the first dummy signal lines; In the first overlapping area, the projection of the second virtual signal line is disconnected at the projection position of the first signal line.

4. The touch panel according to claim 2, wherein: The second signal area includes: patterned second signal lines arranged in an array and provided on the same layer as the second dummy signal lines; A second overlapping area exists between a projection of the second signal area on the substrate and a projection of the first virtual signal area on the substrate; In the second overlapping area, the projection of the first dummy signal line is disconnected at a projection position of the second signal line.

5. The touch panel according to any one of claims 2 to 4, wherein: The third virtual signal area is further used to disconnect the second signal line of the adjacent routing area.

6. The touch panel according to claim 5, wherein: The third virtual signal area further includes patterned fourth virtual signal lines arranged in an array. The fourth virtual signal lines are provided in the same layer as the second signal lines, and boundary vertices of adjacent fourth virtual signal lines are disconnected from each other.

7. The touch panel according to claim 6, wherein: In the second direction, the side length of the projection of the first virtual signal area on the substrate is smaller than the side length of the projection of the first signal area on the substrate; In the first direction, a side length of a projection of the second virtual signal area on the substrate is smaller than a side length of a projection of the second signal area on the substrate; or The projection of the second virtual signal area on the substrate covers the projection of the third virtual signal area on the substrate; or In the first direction, the side length of the projection of the first signal area on the substrate is greater than the side length of the projection of the second signal area on the substrate; In the second direction, a side length of a projection of the first signal area on the substrate is smaller than a side length of the second signal area on the substrate.

8. The touch panel according to claim 6, wherein: One or more of the first signal line, the second signal line, the first dummy signal line, the second dummy signal line, the third dummy signal line, and the fourth dummy signal line is diamond-shaped; The first signal line, the second signal line, the first dummy signal line, the second dummy signal line, the third dummy signal line, and the fourth dummy signal line have the same projected area on the substrate.

9. A touch display device, characterized in that: The invention comprises a touch panel as claimed in any one of claims 1 to 8.

10. The touch display device according to claim 9, wherein: It also includes at least one touch chip connected to the touch panel.

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