Computational graph optimization method and device, electronic device, and computer-readable storage medium

Abstract

The present disclosure provides a computation graph optimization method and apparatus, an electronic device, and a computer-readable medium. The method comprises: traversing a first computation graph to be processed to determine a first subgraph of the first computation graph; matching the first subgraph with a template graph in a graph template library to determine whether a target subgraph matching the first subgraph exists in the template graph; and, if a target subgraph matching the first subgraph exists, optimizing the first computation graph based on the target subgraph to obtain an optimization result for the first computation graph. Embodiments of the present disclosure can improve computation graph optimization efficiency.

Description

Technical Field

[0001] The present disclosure relates to the field of computer technology, and in particular to a computational graph optimization method and device, an electronic device, and a computer-readable storage medium. Background Art

[0002] With the continuous development of artificial intelligence (AI), more and more neural networks are being applied in production. These neural networks are often described using computational graphs during programming, deployment, and execution. Computational graphs, also known as IRs (Intermediate Representation), are also used in other fields such as high-performance computing. Consequently, computational graph optimization (such as compilation and execution optimization) has received increasing attention. Summary of the Invention

[0003] The present disclosure provides a computational graph optimization method and device based on a many-core system, a processing core, an electronic device, and a computer-readable storage medium.

[0004] In a first aspect, the present disclosure provides a computational graph optimization method, which includes: traversing a first computational graph to be processed to determine a first subgraph of the first computational graph; matching the first subgraph with a template graph in a graph template library to determine whether there is a target subgraph in the template graph that matches the first subgraph; in the case that there is a target subgraph that matches the first subgraph, optimizing the first computational graph according to the target subgraph to obtain an optimization result of the first computational graph.

[0005] In the second aspect, the present disclosure provides a computational graph optimization device, which includes: a traversal module for traversing a first computational graph to be processed and determining a first subgraph of the first computational graph; a matching module for matching the first subgraph with a template graph in a graph template library and determining whether there is a target subgraph in the template graph that matches the first subgraph; and an optimization module for optimizing the first computational graph according to the target subgraph when there is a target subgraph that matches the first subgraph, so as to obtain an optimization result of the first computational graph.

[0006] In a third aspect, the present disclosure provides an electronic device comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores one or more computer programs executable by the at least one processor, and one or more of the computer programs are executed by the at least one processor to enable the at least one processor to execute the above-mentioned computational graph optimization method.

[0007] In a fourth aspect, the present disclosure provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program implements the above-mentioned computational graph optimization method when executed by a processor / processing core.

[0008] The embodiments provided in the present disclosure use the template matching method used in the traditional one-dimensional text-based compilation system to optimize the computational graph, thereby improving the optimization efficiency of the computational graph and improving the compilation efficiency of the computational graph through a series of processes.

[0009] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present disclosure, nor are they intended to limit the scope of the present disclosure. Other features of the present disclosure will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The accompanying drawings are used to provide a further understanding of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the present disclosure and do not constitute a limitation of the present disclosure. The above and other features and advantages will become more apparent to those skilled in the art by describing detailed example embodiments with reference to the accompanying drawings. In the accompanying drawings:

[0011] Figure 1 A schematic diagram of the process of optimizing a computational graph in related technologies;

[0012] Figure 2 A flowchart of a computation graph optimization method provided in an embodiment of the present disclosure;

[0013] Figure 3 A flowchart of some steps of a computation graph optimization method provided in an embodiment of the present disclosure;

[0014] Figure 4 A schematic diagram of a computation graph optimization method provided in an embodiment of the present disclosure;

[0015] Figure 5 A flowchart of some steps of a computation graph optimization method provided in an embodiment of the present disclosure;

[0016] Figure 6 A flowchart of some steps of a computation graph optimization method provided in an embodiment of the present disclosure;

[0017] Figure 7 A flowchart of some steps of a computation graph optimization method provided in an embodiment of the present disclosure;

[0018] Figure 8 A schematic diagram of a computation graph optimization method provided in an embodiment of the present disclosure;

[0019] Figure 9A schematic diagram of a computation graph optimization method provided in an embodiment of the present disclosure;

[0020] Figure 10 A block diagram of a computation graph optimization device provided in an embodiment of the present disclosure;

[0021] Figure 11 A block diagram of an electronic device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0022] To enable those skilled in the art to better understand the technical solutions of the present disclosure, exemplary embodiments of the present disclosure are described below in conjunction with the accompanying drawings, including various details of the embodiments of the present disclosure to facilitate understanding. These details should be considered merely exemplary. Therefore, those skilled in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Similarly, for the sake of clarity and conciseness, descriptions of well-known functions and structures are omitted in the following description.

[0023] In the absence of conflict, the various embodiments of the present disclosure and the various features therein may be combined with each other.

[0024] As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0025] The terms used herein are only used to describe specific embodiments and are not intended to limit the present disclosure. As used herein, the singular forms "a" and "the" are also intended to include the plural forms, unless the context clearly indicates otherwise. It will also be understood that when the terms "comprising" and / or "made of" are used in this specification, the presence of the features, wholes, steps, operations, elements and / or components is specified, but the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups thereof is not excluded. Similar words such as "connected" or "connected" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect.

[0026] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted as having an idealized or overly formal meaning unless expressly defined as such herein.

[0027] In some related technologies, a series of optimized compilation processes are written for specific structures. These optimized compilation processes are generally called passes. Pass is used to complete the conversion, analysis or optimization of compilation objects (such as computational graphs). Figure 1 The execution of pass is the process of the compiler converting, analyzing and optimizing the compiled object. By executing the pass corresponding to the computation graph (i.e., pass1, pass2, pass3, pass4 in the figure), the compilation result corresponding to the computation graph can be obtained.

[0028] The template matching method can be used to match certain patterns on compilation objects, and different compilation processes and optimization methods can be called for different patterns. However, this method is mostly used in traditional one-dimensional text-based compilation systems and has not been applied to the optimized compilation of computational graphs.

[0029] In the computational graph optimization method of the embodiment of the present disclosure, the template matching method used in the traditional one-dimensional text-based compilation system is used to optimize the computational graph, thereby improving the optimization efficiency of the computational graph and improving the compilation efficiency of the computational graph through a series of processes.

[0030] The computation graph optimization method according to the embodiment of the present disclosure can be executed by an electronic device such as a terminal device or a server. The terminal device can be an in-vehicle device, a user equipment (UE), a mobile device, a user terminal, a terminal, a cellular phone, a cordless phone, a personal digital assistant (PDA), a handheld device, a computing device, an in-vehicle device, a wearable device, etc. The method can be implemented by a processor calling computer-readable program instructions stored in a memory. Alternatively, the method can be executed by a server.

[0031] Figure 2 This is a flowchart of a computational graph optimization method provided by an embodiment of the present disclosure. Figure 2 , the method comprising:

[0032] In step S21, the first computation graph to be processed is traversed to determine the first subgraph of the first computation graph;

[0033] In step S22, the first subgraph is matched with a template graph in a graph template library to determine whether there is a target subgraph matching the first subgraph in the template graph;

[0034] In step S23, when there is a target subgraph that matches the first subgraph, the first computation graph is optimized according to the target subgraph to obtain an optimization result of the first computation graph.

[0035] For example, in step S21, the first computation graph may be traversed in parallel or serially to determine the first subgraph of the first computation graph.

[0036] The first computation graph may be an uncompiled and unoptimized computation graph; or it may be an uncompiled computation graph optimized by an optimization method in related technologies. The embodiment of the present disclosure does not limit the specific method for obtaining the first computation graph.

[0037] In some possible implementations, the first computational graph may be an intermediate representation of the neural network during programming, deployment, and execution. The neural network is used to perform processing tasks, including any of image processing, speech processing, text processing, and video processing tasks. The disclosed embodiments do not limit the types of tasks performed by the neural network.

[0038] In some possible implementations, a plurality of different graph traversers may be used to traverse the first computation graph to determine first subgraphs of different sizes and shapes in the first computation graph.

[0039] In step S22, each first subgraph is matched with a template graph in the graph template library. If the match is successful, the successfully matched template graph is the target subgraph corresponding to the first subgraph; if multiple first subgraphs are successfully matched with a template graph, the target subgraphs corresponding to these multiple first subgraphs are all the template graph.

[0040] Among them, each template graph in the graph template library corresponds to a specific structure, which can be a computational graph containing the specific structure, or a pre-defined rule, feature vector, etc. that represents the specific structure.

[0041] In some possible implementations, for each template graph, in step S21, a graph traverser of the same size and shape as the specific structure corresponding to the template graph can be used to traverse the first computational graph. After determining the first subgraph, in step S22, only the first subgraph can be used to match the template graph.

[0042] In some possible implementations, in step S23, optimizing the first computation graph according to the target subgraph may be performed by calling an optimization method corresponding to the target subgraph, optimizing the first subgraph to obtain a second subgraph, and replacing the first subgraph in the first computation graph with the second subgraph.

[0043] In some possible implementations, in step S23, the first computation graph is optimized according to the target subgraph, which may be to obtain an optimized compilation process corresponding to the target subgraph, determine the overall compilation process corresponding to the first computation graph according to the optimized compilation process, and execute the overall compilation process corresponding to the first computation graph.

[0044] In some possible implementations, multiple matching processes and optimization processes may occur simultaneously.

[0045] That is to say, the matching process can be performed in parallel. For example, when multiple first subgraphs are determined, the matching process of the multiple first subgraphs with the template graph can be performed in parallel.

[0046] The optimization process can also be performed in parallel. For example, when multiple first subgraphs are matched to the target subgraph, the process of optimizing the first computation graph according to the target subgraphs corresponding to these first subgraphs can be performed in parallel.

[0047] The matching process and the optimization process can also be carried out in parallel. For example, when the first subgraph A matches the target subgraph, the process of matching the first subgraph B with the template graph and the process of optimizing the first computation graph according to the target subgraph corresponding to the first subgraph A can be carried out in parallel.

[0048] These parallel processes can be run on the same computing unit or on different computing units. Through parallelization, the speed of computational graph optimization can be greatly accelerated.

[0049] In the computational graph optimization method of the embodiment of the present disclosure, the template matching method used in the traditional one-dimensional text-based compilation system is used to optimize the computational graph, thereby improving the optimization efficiency of the computational graph and improving the compilation efficiency of the computational graph through a series of processes.

[0050] The following describes the computational graph optimization method according to an embodiment of the present disclosure.

[0051] As described above, in step S23, according to the target subgraph, optimizing the first computation graph may be performed by calling the optimization method corresponding to the target subgraph, optimizing the first subgraph, obtaining the second subgraph, and replacing the first subgraph in the first computation graph with the second subgraph; or it may be performed by obtaining the optimized compilation process corresponding to the target subgraph, determining the overall compilation process corresponding to the first computation graph according to the optimized compilation process, and executing the overall compilation process corresponding to the first computation graph.

[0052] Figure 3 A flowchart of the steps of optimizing the first subgraph and the first computation graph by calling the optimization method corresponding to the target subgraph; Figure 3 , step S23 may include step S31, step S32, and step S33.

[0053] In step S31, according to the identifier of the target subgraph, the optimization method corresponding to the target subgraph is determined;

[0054] In step S32, the optimization method corresponding to the target subgraph is called to optimize the first subgraph to obtain the second subgraph;

[0055] In step S33, the second subgraph is used to replace the corresponding first subgraph in the first computation graph to obtain an optimized second computation graph; the optimization result of the first computation graph includes the second computation graph.

[0056] Among them, the identifier of the target subgraph can be the index of the specific structure corresponding to the target subgraph, and the optimizer or optimization method corresponding to the specific structure can be determined through the index. The optimizer is a device that executes the optimization method. The optimizer and the optimization method can both be used to optimize the target subgraph, and therefore, can also be used to optimize the first subgraph.

[0057] In step S32, an optimization method corresponding to the target subgraph may be called from the structure optimization library to optimize the first subgraph.

[0058] The structure optimization library may be composed of multiple optimizers, each of which may be used to execute an optimization method corresponding to a specific structure to optimize the specific structure. Therefore, calling an optimizer is equivalent to calling an optimization method.

[0059] The structure optimization library may also be composed of multiple optimization methods, each of which corresponds to a specific structure and is used to optimize the specific structure.

[0060] In step S33, a graph merger may be used to merge the structural optimization result, ie, the second subgraph, into the first computation graph to obtain a second computation graph.

[0061] In some possible implementations, when multiple first subgraphs are matched to the target subgraph, the structural optimization results are merged into the first computational graph based on the position of each first subgraph in the first computational graph and the predetermined priority corresponding to the first subgraph.

[0062] For example, when multiple first subgraphs are matched to the target subgraph, the first subgraphs are optimized using the corresponding optimization methods in descending order of priority to obtain the second subgraph, and the second subgraph is used to replace the first subgraph. When a certain first subgraph is run and it is found that it has "disappeared" from the optimized first computation graph during the optimization process corresponding to the first subgraph with a higher priority, the optimization of the first subgraph is abandoned, and the optimization of the first computation graph using the first subgraph is also abandoned. In other words, when two first subgraphs share a common structure or operator, the optimization of the first computation graph using the lower-priority first subgraph is abandoned to ensure that the first computation graph can be optimized using the higher-priority first subgraph, thereby ensuring that better optimization results can be obtained while avoiding conflicts.

[0063] Among them, the priority corresponding to the first subgraph can be the priority of the target subgraph that matches the first subgraph. When there are multiple first subgraphs and their corresponding target subgraphs are consistent, the priorities of these first subgraphs can be determined according to their positions in the first computation graph.

[0064] The graph merger can store the priority of the target subgraph, which is used to determine the priority of the first subgraph. Therefore, the second subgraph corresponding to the first subgraph can be merged into the first computational graph in sequence. After completing the processing of all first subgraphs that match the target subgraph, the second computational graph is obtained.

[0065] In some possible implementations, when the first subgraph matched to the target subgraph meets preset conditions, these first subgraphs are used to optimize the first computational graph, and after obtaining the optimization results, the optimization results are used as the first computational graph in another computational graph optimization process, and are optimized using a graph traverser. That is to say, the output of one computational graph optimization process (i.e., the second computational graph) can be used as the input of the next computational graph optimization process (i.e., the first computational graph).

[0066] The preset condition may be pre-set, and may be a fixed number or all first subgraphs obtained in the same traversal process.

[0067] As reference Figure 4 , use the graph traverser to traverse the first computation graph, determine the first subgraph in the first computation graph, and input the first subgraph into the template matcher to match it with the template graph in the graph template library to determine whether there is a target subgraph that matches the first subgraph in the template graph; in the case of a matching target subgraph, call the optimization method corresponding to the target subgraph from the structure optimization library, optimize the first subgraph, obtain the structural optimization result, that is, the second subgraph, and send the second subgraph to the graph merger, use the second subgraph to replace the first subgraph, and obtain the second computation graph.

[0068] The number of second subgraphs input to the graph merger can be multiple. The graph merger can determine the priority order and obtain the second computation graph. The obtained second computation graph can be used as the first computation graph of the next computation graph optimization process to continue optimization.

[0069] Figure 5 To obtain the optimized compilation process corresponding to the target subgraph, determine the overall compilation process corresponding to the first computation graph according to the optimized compilation process, and execute the overall compilation process corresponding to the first computation graph, and optimize the first computation graph; refer to Figure 5 , step S23 may include step S51, step S52, and step S53.

[0070] In step S51, according to the identifier of the target subgraph, a first compilation process corresponding to the target subgraph is determined;

[0071] In step S52, based on the first compilation process corresponding to the target subgraph, the overall compilation process corresponding to the first computation graph is determined;

[0072] In step S53, the entire compilation process corresponding to the first computation graph is executed to obtain the compilation result of the first computation graph.

[0073] The identifier of the target subgraph may be an index of a specific structure corresponding to the target subgraph, and the optimized compilation process corresponding to the specific structure may be determined through the index.

[0074] In step S51 , a first compilation process corresponding to a target subgraph may be called from a pass library.

[0075] Among them, the pass library stores some compiler compilation or optimization processes (i.e., passes). These processes include the compilation process of the normal structure, the compilation process of the specific structure (i.e., the first compilation process corresponding to the specific structure), and some general processes in the computational graph compilation process.

[0076] The first compilation process corresponding to the specific structure includes the optimized compilation process of the specific structure, the normal process that needs to be executed during the compilation process, and the execution order between these processes.

[0077] That is, the first compilation process corresponding to the specific structure stored in the pass library is a plurality of processes arranged in an execution order.

[0078] In step S52 , after the pass corresponding to the target subgraph is determined from the pass library, the pass scheduler arranges the overall compilation process, that is, determines the execution order of the passes.

[0079] In step S53, the passes are executed in the order determined by the pass scheduler to obtain the compilation result of the first computation graph.

[0080] Since the executed pass includes the optimized compilation process corresponding to the specific structure, the obtained compilation result is also the optimized compilation result. The specific structure in the calculation graph is obtained based on template matching, and the corresponding optimized compilation process is directly obtained from the specific structure of the calculation graph. The overall compilation process corresponding to the first calculation graph is determined based on the optimized compilation process. Through this entire process, the efficiency of calculation graph optimization and compilation is improved.

[0081] In some possible implementations, determining the overall compilation process corresponding to the first computation graph based on the first compilation process corresponding to the target subgraph may also include selecting a non-optimized compilation process corresponding to the first computation graph from a pass library based on the first computation graph (i.e., a general process in the computation graph compilation process, a compilation process with a normal structure, etc.).

[0082] Figure 6 To determine the overall compilation process corresponding to the first computational graph and the flow chart of the steps to be executed, refer to Figure 6 , step S52 may include step S61 and step S62, and step S53 may include step S63.

[0083] In step S61, the execution order of the first compilation process is determined according to the first subgraph corresponding to the target subgraph;

[0084] In step S62, based on the subgraphs in the first computation graph other than the first subgraph corresponding to the target subgraph, at least one second compilation flow corresponding to the first computation graph and an execution order of the second compilation flow are determined;

[0085] In step S63, the first compilation process and the second compilation process are executed in the determined execution order to obtain a first compilation result of the first computation graph.

[0086] For example, in step S61 , the execution order of the first compilation process corresponding to the target subgraph is determined according to the first subgraph that matches the target subgraph.

[0087] In the case that there are multiple first subgraphs matched to the target subgraph, each first subgraph corresponds to a first compilation flow, and the execution order of each first compilation flow needs to be determined.

[0088] In step S62, based on other structures of the first computation graph except the specific structure and other features of the first computation graph except the structure, the second compilation process corresponding to the first computation graph (i.e., the non-optimized compilation process corresponding to the first computation graph described above) is determined, and the execution order of these compilation processes is arranged.

[0089] The second compilation process corresponding to the first computation graph may include the a priori compilation process corresponding to the first computation graph, the compilation process corresponding to the normal structure in the first computation graph, etc., that is, the compilation process that cannot be optimized in the compilation process of the first computation graph.

[0090] Each second compilation process may include multiple sub-processes and an execution order between these sub-processes. That is, each second compilation process includes multiple sub-processes arranged in an execution order.

[0091] The first compilation process and the second compilation process together constitute the overall compilation process corresponding to the first computation graph. The execution order of the first compilation processes determined in step S61 refers to the execution order of each first compilation process in the overall compilation process corresponding to the first computation graph; the execution order of the second compilation processes determined in step S62 refers to the execution order of each second compilation process in the overall compilation process corresponding to the first computation graph.

[0092] Both step S61 and step S62 can be completed in the pass scheduler, that is, the pass scheduler selects the first compilation process and the second compilation process corresponding to the first computation graph in the pass library, and arranges the execution order of these compilation processes.

[0093] In step S63, the first compilation process and the second compilation process are executed in the order arranged by the pass scheduler to obtain the first compilation result of the first computation graph.

[0094] In some possible implementations, the pass scheduler determines the execution order of the first compilation process according to the priority of the first subgraph corresponding to the target subgraph. Figure 7 A flow chart showing the steps of determining the execution order of the first compilation process according to the priority of the target subgraph; Figure 7 , step S61 may include step S71.

[0095] In step S71 , when there are multiple first subgraphs corresponding to the target subgraph, the execution order of the first compilation flow is determined according to the preset priorities of the first subgraphs corresponding to the target subgraphs.

[0096] The fact that there are multiple first subgraphs corresponding to the target subgraph means that the total number of first subgraphs corresponding to all target subgraphs is multiple, that is, multiple first subgraphs are matched to the target subgraph.

[0097] The priority corresponding to the first subgraph may be the priority of the target subgraph that matches the first subgraph. When there are multiple first subgraphs that match the same target subgraphs, the priorities of these first subgraphs may be determined based on their positions in the first computation graph.

[0098] Since there are multiple first subgraphs corresponding to the target subgraph, these multiple first subgraphs naturally correspond to multiple first compilation processes. The execution order between these multiple first compilation processes is determined according to the calculation logic corresponding to the first calculation graph and the priority of the first subgraph corresponding to the pre-set target subgraph.

[0099] In some possible implementations, when there is an intersection between the first subgraphs corresponding to multiple target subgraphs, the priorities corresponding to these multiple first subgraphs are determined respectively; and based on the priority order of these multiple first subgraphs, the execution order of the first compilation processes corresponding to these multiple first subgraphs is determined.

[0100] For example, when multiple first subgraphs are matched to the target subgraph, the execution order of the first compilation process corresponding to the first subgraph (that is, the first compilation process of the target subgraph corresponding to the first subgraph) is determined according to the order of priority corresponding to these first subgraphs from high to low.

[0101] When running to a first subgraph, if its corresponding first compilation flow conflicts with the first compilation flow of a first subgraph with a higher priority, the first compilation flow corresponding to the first subgraph is abandoned. In other words, when two first subgraphs share a structure or operator, the first computation graph optimization using the lower-priority first subgraph is abandoned, allowing the higher-priority first subgraph to be used instead. This ensures better optimization results while avoiding conflicts.

[0102] The pass scheduler can have the function of determining the priority of the first subgraph. That is, when there is an intersection between a specific structure A and a specific structure B (the priority of a specific structure A is greater than the priority of a specific structure B), the pass scheduler can select only the pass corresponding to the specific structure A from the pass library and arrange their order according to the priorities corresponding to the specific structure A and the specific structure B.

[0103] As reference Figure 8 , use the graph traverser to traverse the first computation graph, determine the first subgraph in the first computation graph, and input the first subgraph into the template matcher to match it with the template graph in the graph template library to determine whether there is a target subgraph that matches the first subgraph in the template graph; in the case of a matching target subgraph, the template matcher instructs the pass scheduler to call the first compilation process corresponding to the target subgraph from the pass, and the pass scheduler can also obtain the second compilation process corresponding to the first computation graph from the pass library based on the first computation graph.

[0104] The pass scheduler arranges the order of the obtained first compilation process and the second compilation process, generates a pass list, executes the passes in the pass execution order in the pass list, and obtains the first compilation result of the first computation graph.

[0105] In some possible implementations, compilation optimization methods and compilation processes (compilation processes for normal structures, optimization processes for specific structures, general processes in computational graph compilation processes, etc.) can also be stored in optimization and process libraries. Calling passes, determining the execution order of passes, and executing passes can be performed by the compilation executor, see Figure 9 , the graph traverser can be used to traverse the first computation graph, determine the first subgraph in the first computation graph, and input the first subgraph into the template matcher to match it with the template graph in the graph template library to determine whether there is a target subgraph matching the first subgraph in the template graph; in the case of a matching target subgraph, the compilation executor calls the first compilation process corresponding to the target subgraph from the optimization and process library, and can also obtain the second compilation process corresponding to the first computation graph from the optimization and process library according to the first computation graph. The compilation executor arranges the first compilation process and the second compilation process obtained by the compilation executor in order to generate a pass list, and executes the pass in the order of pass execution in the pass list to generate the first compilation result of the first computation graph.

[0106] It is understood that the above-mentioned various method embodiments mentioned in this disclosure can be combined with each other to form combined embodiments without violating the principle logic. Due to space limitations, this disclosure will not go into details. It is understood by those skilled in the art that in the above-mentioned methods of specific implementation, the specific execution order of each step should be determined by its function and possible internal logic.

[0107] In addition, the present disclosure also provides a computational graph optimization device, an electronic device, and a computer-readable storage medium, all of which can be used to implement any computational graph optimization method provided by the present disclosure. The corresponding technical solutions and descriptions are referred to the corresponding records in the method section and will not be repeated here.

[0108] Figure 10 A block diagram of a computational graph optimization device provided in an embodiment of the present disclosure.

[0109] Reference Figure 10 , an embodiment of the present disclosure provides a computational graph optimization device, the computational graph optimization device comprising:

[0110] A traversal module, configured to traverse a first computation graph to be processed and determine a first subgraph of the first computation graph;

[0111] A matching module, configured to match the first subgraph with a template graph in a graph template library, and determine whether there is a target subgraph matching the first subgraph in the template graph;

[0112] The optimization module is used to optimize the first computation graph according to the target subgraph when there is a target subgraph matching the first subgraph, so as to obtain an optimization result of the first computation graph.

[0113] Figure 11 A block diagram of an electronic device provided in an embodiment of the present disclosure.

[0114] Reference Figure 11 An embodiment of the present disclosure provides an electronic device, which includes: at least one processor 1101; at least one memory 1102, and one or more I / O interfaces 1103, connected between the processor 1101 and the memory 1102; wherein the memory 1102 stores one or more computer programs that can be executed by the at least one processor 1101, and the one or more computer programs are executed by the at least one processor 1101 to enable the at least one processor 1101 to perform the above-mentioned computational graph optimization method.

[0115] The present disclosure also provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor / processing core, implements the aforementioned computational graph optimization method. The computer-readable storage medium may be a volatile or non-volatile computer-readable storage medium.

[0116] An embodiment of the present disclosure also provides a computer program product, including computer-readable code, or a non-volatile computer-readable storage medium carrying computer-readable code. When the computer-readable code runs in a processor of an electronic device, the processor in the electronic device executes the above-mentioned computational graph optimization method.

[0117] It will be understood by those skilled in the art that all or some of the steps, systems, and functional modules / units in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. In a hardware implementation, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or may be implemented as hardware, or may be implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable storage medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or temporary medium).

[0118] As is well known to those skilled in the art, the term computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information (such as computer-readable program instructions, data structures, program modules or other data). Computer storage media includes, but is not limited to, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), static random access memory (SRAM), flash memory or other memory technology, portable compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical disc storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by a computer. In addition, as is well known to those skilled in the art, communication media typically contains computer-readable program instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0119] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions to be stored in the computer-readable storage medium in each computing / processing device.

[0120] The computer program instructions for performing the operations of the present disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, and conventional procedural programming languages ​​such as "C" language or similar programming languages. Computer-readable program instructions may be executed entirely on a user's computer, partially on a user's computer, as an independent software package, partially on a user's computer, partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., utilizing an Internet service provider to connect via the Internet). In some embodiments, an electronic circuit, such as a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), may be personalized by utilizing the state information of the computer-readable program instructions. The electronic circuit may execute the computer-readable program instructions, thereby realizing various aspects of the present disclosure.

[0121] The computer program product described herein may be implemented in hardware, software, or a combination thereof. In one embodiment, the computer program product is implemented as a computer storage medium. In another embodiment, the computer program product is implemented as a software product, such as a software development kit (SDK).

[0122] Various aspects of the present disclosure are described herein with reference to flowcharts and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the present disclosure. It should be understood that each block of the flowcharts and / or block diagrams, and combinations of blocks in the flowcharts and / or block diagrams, can be implemented by computer-readable program instructions.

[0123] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, thereby producing a machine, so that when these instructions are executed by the processor of the computer or other programmable data processing device, a device is generated that implements the functions / actions specified in one or more blocks in the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium, where these instructions cause the computer, programmable data processing device, and / or other device to operate in a specific manner. Thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing various aspects of the functions / actions specified in one or more blocks in the flowchart and / or block diagram.

[0124] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device so that a series of operational steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to implement the functions / actions specified in one or more blocks in the flowchart and / or block diagram.

[0125] The flow charts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the systems, methods and computer program products according to multiple embodiments of the present disclosure. In this regard, each box in the flow chart or block diagram can represent a part of a module, program segment or instruction, and the part of the module, program segment or instruction contains one or more executable instructions for realizing the prescribed logical function. In some alternative implementations, the functions marked in the box can also occur in a sequence different from that marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flow chart, and the combination of the boxes in the block diagram and / or flow chart can be implemented by a dedicated hardware-based system that performs the prescribed function or action, or can be implemented by a combination of dedicated hardware and computer instructions.

[0126] Example embodiments have been disclosed herein, and although specific terms are employed, they are used and should be interpreted only in a general illustrative sense and not for purposes of limitation. In some instances, it will be apparent to those skilled in the art that, unless otherwise expressly indicated, features, characteristics, and / or elements described in conjunction with a particular embodiment may be used alone or in combination with features, characteristics, and / or elements described in conjunction with other embodiments. Therefore, it will be understood by those skilled in the art that various changes in form and detail may be made without departing from the scope of the present disclosure as set forth in the appended claims.

Claims

1. A computational graph optimization method, characterized in that: include: Traversing a first computation graph to be processed to determine a first subgraph of the first computation graph; Matching the first subgraph with a template graph in a graph template library to determine whether there is a target subgraph matching the first subgraph in the template graph; If there is a target subgraph matching the first subgraph and the first subgraph matching the target subgraph meets a preset condition, optimize the first computation graph according to the target subgraph to obtain an optimization result of the first computation graph, and after obtaining the optimization result, use the optimization result as the first computation graph in a next computation graph optimization process for optimization; When there is a target subgraph that matches the first subgraph and multiple first subgraphs are matched to the target subgraph, the first computation graph is optimized according to the priorities of the multiple first subgraphs and the target subgraph to obtain the optimization result of the first computation graph, wherein when at least two first subgraphs among the multiple first subgraphs share a common structure or operator and a conflict occurs during the optimization process of the first computation graph, the optimization of the low-priority first subgraph is abandoned, and the use of the low-priority first subgraph to optimize the first computation graph is abandoned, and the priority of the multiple first subgraphs is determined according to the priority of the target subgraph corresponding to the first subgraph and the position of the first subgraph in the first computation graph.

2. The method according to claim 1, characterized in that Optimizing the first computation graph according to the target subgraph to obtain an optimization result of the first computation graph includes: Determining an optimization method corresponding to the target subgraph according to the identifier of the target subgraph; Calling an optimization method corresponding to the target subgraph to optimize the first subgraph to obtain a second subgraph; Replacing the corresponding first subgraph in the first computation graph with the second subgraph to obtain an optimized second computation graph; The optimization result of the first computation graph includes the second computation graph.

3. The method according to claim 1, characterized in that Optimizing the first computation graph according to the target subgraph to obtain an optimization result of the first computation graph includes: Determining a first compilation process corresponding to the target subgraph according to the identifier of the target subgraph; Determining an overall compilation process corresponding to the first computation graph according to the first compilation process corresponding to the target subgraph; Execute the entire compilation process corresponding to the first computation graph to obtain a first compilation result of the first computation graph; The optimization result of the first computation graph includes the first compilation result.

4. The method according to claim 3, characterized in that The determining, based on the first compilation process corresponding to the target subgraph, an overall compilation process corresponding to the first computation graph includes: Determining an execution order of the first compilation process according to the first subgraph corresponding to the target subgraph; Determining, based on subgraphs other than the first subgraph corresponding to the target subgraph in the first computation graph, at least one second compilation flow corresponding to the first computation graph and an execution order of the second compilation flow; The overall compilation process corresponding to the first computation graph includes the first compilation process and the second compilation process; The executing the entire compilation process corresponding to the first computation graph to obtain a first compilation result of the first computation graph includes: Execute the first compilation process and the second compilation process in the determined execution order to obtain a first compilation result of the first computation graph.

5. The method according to claim 4, characterized in that The determining, according to the first subgraph corresponding to the target subgraph, an execution order of the first compilation process includes: In the case that there are multiple first subgraphs corresponding to the target subgraph, the execution order of the first compilation process is determined according to the preset priorities of the first subgraphs corresponding to the target subgraphs.

6. The method according to claim 5, characterized in that The step of determining the execution order of the first compilation process according to the preset priority of the first subgraph corresponding to the target subgraph includes: When there is an intersection between the first subgraphs corresponding to the plurality of target subgraphs, respectively determining the priorities corresponding to the plurality of first subgraphs; An execution order of the first compilation flows corresponding to the multiple first subgraphs is determined according to the priority order of the multiple first subgraphs.

7. The method according to any one of claims 1 to 6, characterized in that The first computational graph is an intermediate representation in the form of a graph constructed according to a neural network; The neural network is used to perform processing tasks, including any one of image processing tasks, speech processing tasks, text processing tasks, and video processing tasks.

8. A computational graph optimization device, characterized in that: include: A traversal module, configured to traverse a first computation graph to be processed and determine a first subgraph of the first computation graph; A matching module, configured to match the first subgraph with a template graph in a graph template library, and determine whether there is a target subgraph matching the first subgraph in the template graph; an optimization module configured to, if there is a target subgraph matching the first subgraph and the first subgraph matching the target subgraph satisfies a preset condition, optimize the first computation graph according to the target subgraph to obtain an optimization result of the first computation graph, and after obtaining the optimization result, use the optimization result as the first computation graph in a next computation graph optimization process for optimization; When there is a target subgraph that matches the first subgraph and multiple first subgraphs are matched to the target subgraph, the first computation graph is optimized according to the priorities of the multiple first subgraphs and the target subgraph to obtain the optimization result of the first computation graph, wherein when at least two first subgraphs among the multiple first subgraphs share a common structure or operator and a conflict occurs during the optimization process of the first computation graph, the optimization of the low-priority first subgraph is abandoned, and the use of the low-priority first subgraph to optimize the first computation graph is abandoned, and the priority of the multiple first subgraphs is determined according to the priority of the target subgraph corresponding to the first subgraph and the position of the first subgraph in the first computation graph.

9. An electronic device, characterized in that: include: at least one processor; as well as a memory communicatively connected to the at least one processor; wherein, The memory stores one or more computer programs that can be executed by the at least one processor, and the one or more computer programs are executed by the at least one processor to enable the at least one processor to perform the computational graph optimization method according to any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the computer program implements the computational graph optimization method according to any one of claims 1 to 7.

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