Fan-out packaging method and fan-out packaging device

By forming an adhesive part in the chip gap in the fan-out package and grinding it at the plastic sealing part, the problem of prone to cracks between adjacent chips is solved, and the bonding force and reliability of the packaging device are improved. It is suitable for polycrystalline High-level packaging of particles.

CN114864422BActive Publication Date: 2024-12-24NANTONG TONGFU MICROELECTRONICS CO LTD
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Patent Information

Application Number
CN202210307037.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-03-25
Publication Date
2024-12-24
Estimated Expiration
2042-03-25

AI Technical Summary

Technical Problem

In fan-out packages, cracks are prone to occur in the gaps between adjacent chips, affecting the overall structural reliability of the product.

Method used

By forming an adhesive portion in the chip gap, filling the gap with glue liquid, forming a protruding structure to enhance the bonding force between the chips, and grinding is performed at the plastic sealing portion to expose the copper column to ensure the stability of the packaging.

Benefits of technology

It effectively avoids cracks in the plastic sealing parts between adjacent chips, improves the binding force and reliability of packaging devices, and is suitable for multi-grain high-end packaging products.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application discloses a fan-out packaging method and a fan-out packaging device, the fan-out packaging method comprising: providing a carrier; arranging a plurality of chips on the carrier, with gaps between adjacent chips; forming an adhesive portion in at least part of the gaps; forming a plastic sealing portion on a side of the carrier where the chips are arranged; wherein the plastic sealing portion at least continuously covers the chips and a side of the adhesive portion away from the carrier. The fan-out packaging device comprises: a plurality of chips, with gaps between adjacent chips; an adhesive portion located in at least part of the gaps; and a plastic sealing portion at least continuously covers the chips and the same side of the adhesive portion. The fan-out packaging method and fan-out packaging device provided in the present application can avoid cracks in the plastic sealing portion at the gaps between adjacent chips.
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Description

Technical Field

[0001] The present application relates to the field of semiconductor packaging technology, and in particular to a fan-out packaging method and a fan-out packaging device. Background Art

[0002] The description in this section merely provides background information related to the disclosure of this specification and does not constitute prior art.

[0003] FO PoS (Fan Out Package on Substrate) is a packaging method that embeds different chips into epoxy molding compound (EMC) and allocates space. In order to achieve a variety of functional combinations, fan-out packaging usually includes multi-die.

[0004] When a fan-out packaged product includes multiple dies, there will be a small gap between the dies. Multiple dies are usually packaged with a plastic layer. However, after grinding the plastic layer, cracks are easily generated at the gaps, thereby destroying the overall structure of the product and affecting the subsequent reliability test.

[0005] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of this specification and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because they are described in the background technology section of this specification. Summary of the invention

[0006] The main technical problem solved by the present application is to provide a fan-out packaging method and a fan-out packaging device, which can avoid cracks in the plastic sealing part at the gap between adjacent chips.

[0007] In order to solve the above technical problems, a technical solution adopted in the present application is to provide a fan-out packaging method, comprising:

[0008] Provide carrier board;

[0009] A plurality of chips are arranged on the carrier board, and gaps are provided between adjacent chips;

[0010] forming an adhesive portion in at least a portion of the gap;

[0011] A plastic sealing portion is formed on one side of the carrier board where the chip is arranged; wherein the plastic sealing portion at least continuously covers the chip and the side of the adhesive portion away from the carrier board.

[0012] Furthermore, the step of forming an adhesive portion in at least a portion of the gap comprises:

[0013] Glue is dispensed at one end of the gap in the length direction, and the glue fills the gap along the length direction to form the adhesive portion; wherein the length direction is parallel to the side surface of the chip adjacent to the gap.

[0014] Furthermore, the adhesive portion includes a first surface away from the carrier, the first surface is recessed toward the carrier, and the minimum height between the first surface and the carrier is greater than or equal to 90% of the thickness of the chip.

[0015] Furthermore, the adhesive portion protrudes from both ends of the gap in the length direction, and the length of the protruding portion is greater than or equal to 10% of the width of the gap.

[0016] Furthermore, before the dispensing, the method further includes: preheating the carrier plate and the glue liquid;

[0017] After the dispensing, the method further includes: baking the glue liquid to solidify it.

[0018] Furthermore, the method of arranging a plurality of chips on the carrier and forming an adhesive portion in at least a portion of the gap further comprises:

[0019] Baking the side of the carrier board on which the chip is provided;

[0020] Plasma surface treatment is performed on the side of the carrier where the chip is arranged.

[0021] Furthermore, between providing a carrier board and arranging a chip on the carrier board, the method further includes:

[0022] Applying a temporary adhesive layer on the carrier to bond the chip and the carrier;

[0023] Between the step of arranging a plurality of chips on the carrier and the step of forming an adhesive portion in at least a portion of the gap, the method further comprises:

[0024] baking the temporary adhesive layer;

[0025] The temporary glue layer is subjected to plasma surface treatment.

[0026] Furthermore, the chip includes a functional surface and a non-functional surface arranged back to back, and in the step of arranging the chip on the carrier, the non-functional surface faces the carrier; the functional surface includes a pad, and a copper column electrically connected to the pad is provided on the functional surface.

[0027] Furthermore, the step of forming the plastic sealing portion includes:

[0028] The plastic sealing part is formed on one side of the carrier board provided with the chip, and the plastic sealing part covers the chip and the adhesive part;

[0029] The plastic sealing part is ground from a side of the plastic sealing part away from the carrier board, so that a side of the copper column away from the carrier board is exposed.

[0030] Furthermore, after the step of forming the plastic sealing portion, the method further comprises:

[0031] A rewiring layer is formed on a side of the plastic sealing portion facing away from the carrier board, wherein the rewiring layer is electrically connected to an end of the copper column facing away from the carrier board;

[0032] A conductor is arranged on a side of the rewiring layer away from the plastic sealing portion, and the conductor is electrically connected to the rewiring layer.

[0033] In order to solve the above technical problems, another technical solution adopted by the present application is: to provide a fan-out packaging device, comprising:

[0034] A plurality of chips, with gaps between adjacent chips;

[0035] an adhesive portion, located in at least a portion of the gap;

[0036] The plastic sealing part at least continuously covers the chip and the same side of the adhesive part.

[0037] Furthermore, the adhesive portion includes a first surface and a second surface relative to each other, the first surface is covered by the molding portion, the first surface is recessed toward the second surface, and the minimum height between the first surface and the second surface is greater than or equal to 90% of the thickness of the chip.

[0038] Furthermore, the adhesive portion fills the gap along the length direction, and the length direction is parallel to the side of the chip adjacent to the gap; the adhesive portion has a protrusion protruding from both ends of the gap in the length direction; the length of the protrusion in the length direction is greater than or equal to 10% of the width of the gap.

[0039] Furthermore, the chip comprises a functional surface and a non-functional surface arranged opposite to each other, and the second surface of the adhesive portion is flush with the non-functional surface; the functional surface comprises a pad, and a copper column electrically connected to the pad is provided on the functional surface.

[0040] Furthermore, the fan-out packaging device further includes:

[0041] A carrier plate, which is attached to the non-functional surface of the chip, and a surface of the carrier plate facing the chip is subjected to plasma surface treatment;

[0042] A temporary adhesive layer is located on a side of the carrier board facing the chip and is used to bond the chip and the carrier board.

[0043] Furthermore, one end of the copper column facing away from the chip is exposed from the plastic sealing part and is flush with the plastic sealing part; and the functional surface is located inside the plastic sealing part.

[0044] Furthermore, the fan-out packaging device further includes:

[0045] A rewiring layer is located on a surface of the plastic sealing portion facing away from the chip; the rewiring layer is electrically connected to an end of the copper column facing away from the chip;

[0046] The conductor is located at a side of the rewiring layer away from the plastic sealing portion, and the conductor is electrically connected to the rewiring layer.

[0047] Different from the prior art, the beneficial effects of the present application are as follows: the fan-out packaging method and fan-out packaging device provided in the embodiments of the present application include multiple chips, and there are gaps between adjacent chips. By forming an adhesive portion in at least part of the gap, the adhesive portion makes the two adjacent chips form a whole, which can effectively improve the bonding force of the packaging device, thereby avoiding cracks in the plastic sealing portion at the gap between adjacent chips. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. Among them:

[0049] Figure 1 A schematic diagram of a flow chart of a fan-out packaging method provided in this embodiment;

[0050] Figure 2 for Figure 1 A schematic diagram of a flow chart of an implementation method between step S200 and step S300;

[0051] Figure 3 for Figure 1 A schematic diagram of a flow chart of an implementation method corresponding to step S400;

[0052] Figure 4 for Figure 1 A schematic diagram of a flow chart of an implementation method after step S400;

[0053] Figure 5 yes Figure 1 A structural diagram of an implementation method corresponding to step S100;

[0054] Figure 6 yes Figure 1A structural diagram of an implementation method corresponding to step S200;

[0055] Figure 7 yes Figure 1 A structural diagram of an implementation method corresponding to step S300;

[0056] Figure 8 yes Figure 7 The top view in the middle and lower figure;

[0057] Fig. 9 yes Figure 3 A structural diagram of an implementation method corresponding to step S401;

[0058] Fig.10 yes Figure 3 A structural diagram of an implementation method corresponding to step S402;

[0059] Fig.11 yes Figure 4 A structural diagram of an implementation method corresponding to step S501 and step S502;

[0060] Fig.12 yes Figure 4 A structural diagram of an implementation method after step S502;

[0061] Fig.13 It is a schematic diagram of the structure of a fan-out packaging device provided in this embodiment.

[0062] Description of reference numerals:

[0063] 1. Carrier; 2. Temporary adhesive layer; 3. Chip; 31. Functional surface; 32. Non-functional surface; 4. Pad; 5. Copper pillar; 6. Gap; 7. Glue; 8. Glue dispensing head; 9. Adhesive part; 91. First surface; 92. Second surface; 10. Plastic sealing part; 11. Rewiring layer; 12. Conductor; 13. Cutting knife. DETAILED DESCRIPTION

[0064] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0065] It should be noted that when an element is referred to as being "disposed on" another element, it may be directly on the other element or there may be another element centered thereon. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be another element centered thereon at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only and do not represent the only implementation method.

[0066] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art to which the present application belongs. The terms used herein in the specification of the present application are only for the purpose of describing specific embodiments and are not intended to limit the present application. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0067] See also Figure 1 The present application provides a fan-out packaging method, comprising the following steps:

[0068] Step S100: providing a carrier board 1 .

[0069] For details, please refer to Figure 5 A temporary adhesive layer 2 may be coated on one side of the carrier 1 for subsequent bonding of the chip 3 and the carrier 1 .

[0070] In this embodiment, the carrier 1 may be a common carrier 1 with a certain support strength for supporting the packaged device, and the carrier 1 may be removed after the package is completed. In other embodiments, the carrier 1 may also be a wafer for placing a die, and the chip 3 (i.e., the die) is reorganized on the wafer according to needs or designs, and after the package is completed, it may be selected whether to remove the carrier 1 as needed. The temporary adhesive layer 2 may be a double-sided adhesive.

[0071] Step S200 : placing a plurality of chips 3 on the carrier 1 , with gaps 6 between adjacent chips 3 .

[0072] For details, please refer to Figure 6 The chip 3 may include a functional surface 31 and a non-functional surface 32 that are disposed opposite to each other. In this embodiment, the non-functional surface 32 may face the carrier 1, that is, the non-functional surface 32 and the temporary adhesive layer 2 are attached. The functional surface 31 may include a pad 4, and a copper column 5 electrically connected to the pad 4 is provided on the functional surface 31. The chip 3 may be arranged by a die bond machine (i.e., a chip bonding machine).

[0073] See also Figure 2 , after arranging a plurality of chips 3 on the carrier board 1, the method further comprises:

[0074] Step S201: baking a side of the carrier plate 1 provided with the chip 3;

[0075] Step S202: performing plasma surface treatment on the side of the carrier 1 where the chip 3 is disposed.

[0076] In step S201, the temporary adhesive layer 2 is baked, and the high temperature baking can increase the viscosity of the chip 3 and the temporary adhesive layer 2. In step S202, the temporary adhesive layer 2 is subjected to plasma surface treatment, which can enhance the fluidity of the adhesive portion 9 formed subsequently on the temporary adhesive layer 2, so that the adhesive portion 9 formed subsequently can better cover the gap 6.

[0077] Step S300 : forming an adhesive portion 9 in at least a portion of the gap 6 .

[0078] Specifically, Figure 7 As shown, the above step S300 specifically includes: dispensing glue at one end of the gap 6 in the length direction, and the glue 7 automatically flows along the length direction due to capillary phenomenon, thereby filling the gap 6 to form an adhesive portion 9. The length direction is parallel to the side surface of the chip 3 adjacent to the gap 6.

[0079] In this embodiment, the glue 7 can be selected from bottom filling glue. Before dispensing glue, a step of preheating the carrier board 1 and the glue 7 can be included, so that the viscosity of the glue 7 can be reduced and the fluidity of the glue 7 can be improved.

[0080] Specifically, glue can be dispensed by a glue dispenser, which can have multiple glue dispensing heads 8. The glue dispensing heads 8 are located at the edge of the carrier 1 and in the gap 6 between adjacent chips 3. Since the chip 3 is larger than the gap 6, if glue is dispensed at the edge of the chip 3, the glue 7 cannot penetrate into the gap 6.

[0081] After the dispensing, the method further includes the step of baking the glue liquid 7 to solidify it. Specifically, the glue liquid 7 can be baked under high pressure to solidify it into the adhesive portion 9.

[0082] See also Figure 7 , Figure 7 The following picture is Figure 1 A structural schematic diagram of an embodiment corresponding to step S300 in FIG. 1 . The adhesive portion 9 includes a first surface 91 away from the carrier 1. Preferably, the distance between the first surface 91 and the carrier 1 is less than the distance between the functional surface 31 of the chip 3 and the carrier 1, that is, the first surface 91 is lower than the functional surface 31 of the chip 3. Due to the capillary phenomenon, the first surface 91 is recessed in the direction close to the carrier 1. The minimum height d between the first surface 91 and the carrier 1 is greater than or equal to 90% of the thickness of the chip 3, thereby ensuring that the adhesive portion 9 can effectively connect two adjacent chips 3 and the temporary adhesive layer 2. The adhesive portion 9 also includes a second surface 92 opposite to the first surface 91, and the second surface 92 is flush with the non-functional surface 32 of the chip 3.

[0083] In another embodiment, the distance between the first surface 91 of the adhesive portion 9 and the carrier 1 is greater than the distance between the functional surface 31 of the chip 3 and the carrier 1, that is, the first surface 91 exceeds the functional surface 31 of the chip 3. Preferably, the first surface 91 is lower than the surface of the copper pillar 5 facing away from the carrier 1. Otherwise, if the adhesive portion 9 covers part of the copper pillar 5, a part of the copper pillar 5 needs to be ground off during subsequent grinding to expose the entire copper pillar 5, resulting in a waste of material and time.

[0084] Specifically, Figure 8 As shown, the adhesive portion 9 protrudes from both ends of the gap 6 in the length direction, that is, the adhesive portion 9 has protrusions protruding from both ends of the gap 6 in the length direction. The length s of the protrusions in the length direction is greater than or equal to 10% of the width of the gap 6. The width of the gap 6 is the distance between adjacent chips 3. Preferably, the two sides facing each other of the adjacent chips 3 are arranged in parallel, that is, in the length direction of the gap 6, the width of the gap 6 is equal at all locations.

[0085] Step S400: forming a plastic sealing portion 10 on the side of the carrier 1 where the chip 3 is provided, wherein the plastic sealing portion 10 at least continuously covers the chip 3 and the side of the adhesive portion 9 facing away from the carrier 1 .

[0086] In this embodiment, the material of the plastic sealing part 10 can be EMC (epoxy plastic sealing compound), which is essentially different from the material of the adhesive part 9. Figure 3 , Figure 3 yes Figure 1 The flowchart of an implementation method corresponding to step S400 in the embodiment of the present invention is shown in FIG. 1 , wherein step S400 specifically includes:

[0087] Step S401: forming a plastic sealing portion 10 on the side of the carrier 1 where the chip 3 is provided, and the plastic sealing portion 10 covers the chip 3 and the adhesive portion 9;

[0088] Step S402 : grinding the plastic encapsulation portion 10 from the side thereof facing away from the carrier board 1 , so that the side of the copper pillar 5 facing away from the carrier board 1 is exposed.

[0089] In step S401, Fig. 9 As shown, the distance between the plastic encapsulation part 10 and the carrier board 1 is greater than the distance between the side of the copper pillar 5 facing away from the carrier board 1 and the carrier board 1, and the side of the plastic encapsulation part 10 is located outside the side of the chip 3 and inside the side of the carrier board 1, ensuring that the plastic encapsulation part 10 completely covers the chip 3 and the adhesive part 9. The plastic encapsulation part 10 can be formed by compression molding. The material of the plastic encapsulation part 10 can be injected from the edge of the carrier board 1.

[0090] In step S402, a grinding wheel may be used to grind the surface of the plastic sealing portion 10 away from the carrier 1. The structure after grinding is as follows: Fig.10 shown.

[0091] See also Figure 4 , Figure 4 yes Figure 1 A flowchart of an implementation method corresponding to step S400 in the embodiment, after step S400, further comprising:

[0092] Step S501: forming a rewiring layer 11 on the side of the plastic sealing portion 10 facing away from the carrier 1, and the rewiring layer 11 is electrically connected to the end of the copper pillar 5 facing away from the carrier 1;

[0093] Step S502 : a conductor 12 is disposed on a side of the rewiring layer 11 away from the plastic packaging portion 10 , and the conductor 12 is electrically connected to the rewiring layer 11 .

[0094] See also Fig.11 , Fig.11 yes Figure 4 The conductor 12 may be a solder ball, and its material may be at least one metal material selected from copper, nickel, tin or silver.

[0095] This embodiment does not limit the number of chips 3. The carrier board 1 may be provided with a plurality of chips 3 for forming different chip modules. Fig.12 As shown, a dicing blade 13 can be used to cut between adjacent chip dies to separate different chip dies.

[0096] The fan-out packaging method provided in the embodiment of the present application is provided with a plurality of chips 3, and there is a gap 6 between adjacent chips 3. The size of the gap 6 is small. During the heating process of the product, since the thermal expansion coefficient of the plastic encapsulation material is larger than that of silicon, the shrinkage of the plastic encapsulation part 10 does not match the shrinkage of the chip 3, resulting in low bonding strength between the plastic encapsulation part 10 and the chip 3. The present application forms an adhesive part 9 in at least part of the gap 6, that is, the gap 6 is filled with glue 7 instead of the plastic encapsulation material. The adhesive part 9 makes two adjacent chips 3 form a whole, which can effectively solve the problem of low bonding strength between the plastic encapsulation material and the chip 3, improve the bonding strength of the packaged device, and thus avoid cracks in the plastic encapsulation part 10 at the gap 6 between adjacent chips 3.

[0097] In addition, the adhesive portion 9 can reduce the fragile strain caused by the thermal expansion difference between the chip 3 and the carrier 1, and effectively improve the reliability of the packaged device. Compared with the existing fan-out packaging technology, especially for Multi die, the fan-out packaging method provided in this embodiment can be widely used in high-end packaging products by improving the bonding force between the chips 3 and improving the overall reliability of the packaged device.

[0098] See also Fig.13The embodiment of the present application provides a fan-out packaging device, comprising an adhesive portion 9, a plastic sealing portion 10 and a plurality of chips 3. There is a gap 6 between adjacent chips 3. The adhesive portion 9 is located in at least part of the gap 6. The plastic sealing portion 10 at least continuously covers the same side of the chip 3 and the adhesive portion 9.

[0099] The fan-out packaging device provided in the embodiment of the present application is provided with a plurality of chips 3, and there is a gap 6 between adjacent chips 3. The size of the gap 6 is small. During the heating process of the product, since the thermal expansion coefficient of the plastic encapsulation material is larger than that of silicon, the shrinkage of the plastic encapsulation part 10 does not match the shrinkage of the chip 3, resulting in low bonding strength between the plastic encapsulation part 10 and the chip 3. The present application forms an adhesive part 9 in at least part of the gap 6, that is, the gap 6 is filled with glue 7 instead of the plastic encapsulation material. The adhesive part 9 makes two adjacent chips 3 form a whole, which can effectively solve the problem of low bonding strength between the plastic encapsulation material and the chip 3, improve the bonding strength of the packaged device, and thus avoid cracks in the plastic encapsulation part 10 at the gap 6 between adjacent chips 3.

[0100] In this embodiment, if Fig.13 As shown, the chip 3 may include a functional surface 31 and a non-functional surface 32 disposed opposite to each other. One end of the adhesive portion 9 is flush with the non-functional surface 32, and the other end of the adhesive portion 9 is covered by the plastic sealing portion 10. The functional surface 31 may include a pad 4, and a copper column 5 electrically connected to the pad 4 is provided on the functional surface 31.

[0101] like Fig.11 As shown, the fan-out package device may further include a carrier board 1, and the carrier board 1 is attached to the non-functional surface 32 of the chip 3. The chip 3 may be placed on the carrier board 1 by a die bond machine (ie, a chip bonding machine).

[0102] In this embodiment, the carrier 1 may be a common carrier 1 with a certain support strength for supporting the packaged device, and the carrier 1 may be removed after the package is completed. In other embodiments, the carrier 1 may also be a wafer for placing the die, and the chip 3 (i.e., the die) is reorganized on the wafer according to needs or designs, and after the package is completed, it may be selected whether to remove the carrier 1 according to needs.

[0103] Specifically, a temporary adhesive layer 2 may be provided on one side of the carrier 1 facing the chip 3, for bonding the chip 3 and the carrier 1, that is, the non-functional surface 32 is in contact with the temporary adhesive layer 2. The temporary adhesive layer 2 may be a double-sided adhesive.

[0104] The adhesive portion 9 in this embodiment can reduce the fragile strain caused by the thermal expansion difference between the chip 3 and the carrier 1, and effectively improve the reliability of the packaged device. Compared with the existing fan-out packaging technology, especially for Multi die, by improving the bonding force between the chips 3 and improving the overall reliability of the packaged device, the fan-out packaging device provided in this embodiment can be widely used in high-end packaging products.

[0105] This embodiment does not limit the number of chips 3. A plurality of chips 3 for forming different chip modules can be arranged on the carrier board 1. A cutting knife 13 can be used to cut between adjacent chip modules to separate different chip modules.

[0106] In this embodiment, the side of the carrier 1 provided with the chip 3 can be baked, that is, the temporary adhesive layer 2 can be baked, and the high-temperature baking can increase the viscosity of the chip 3 and the temporary adhesive layer 2. The side of the carrier 1 facing the chip 3 can be subjected to plasma surface treatment, that is, the temporary adhesive layer 2 is subjected to plasma surface treatment, which can enhance the fluidity of the subsequently formed adhesive portion 9 on the temporary adhesive layer 2, so that the subsequently formed adhesive portion 9 can better cover the gap 6.

[0107] In this embodiment, glue is applied at one end of the gap 6 in the length direction, and the glue 7 automatically flows along the length direction due to capillary phenomenon, thereby filling the gap 6 to form an adhesive portion 9. The length direction is parallel to the side surface of the chip 3 adjacent to the gap 6.

[0108] In this embodiment, the glue 7 can be selected from bottom filling glue. Before dispensing, the carrier board 1 and the glue 7 can also be preheated, so that the viscosity of the glue 7 can be reduced and the fluidity of the glue 7 can be improved.

[0109] Specifically, glue can be dispensed by a glue dispenser, which can have multiple glue dispensing heads 8. The glue dispensing heads 8 are located at the edge of the carrier 1 and in the gap 6 between adjacent chips 3. Since the chip 3 is larger than the gap 6, if glue is dispensed at the edge of the chip 3, the glue 7 cannot penetrate into the gap 6.

[0110] After the glue is dispensed, the glue liquid 7 can be baked to solidify. Specifically, the glue liquid 7 can be baked under high pressure to solidify it into the adhesive portion 9.

[0111] See also Fig.13 The adhesive portion 9 includes a first surface 91 and a second surface 92 opposite to each other. The first surface 91 is covered by the molding portion 10 , and the second surface 92 is flush with the non-functional surface 32 of the chip 3 .

[0112] Preferably, the distance between the first surface 91 and the second surface 92 is less than the distance between the functional surface 31 and the non-functional surface 32 of the chip 3, that is, the first surface 91 is lower than the functional surface 31 of the chip 3. Due to the capillary phenomenon, the first surface 91 is recessed toward the second surface 92. The minimum height between the first surface 91 and the second surface 92 is greater than or equal to 90% of the thickness of the chip 3, thereby ensuring that the adhesive portion 9 can effectively connect two adjacent chips 3, or effectively connect two adjacent chips 3 and the temporary adhesive layer 2.

[0113] In another embodiment, the distance between the first surface 91 and the second surface 92 is greater than the distance between the functional surface 31 and the non-functional surface 32 of the chip 3, that is, the first surface 91 exceeds the functional surface 31 of the chip 3. Preferably, the first surface 91 is lower than the surface of the copper pillar 5 facing away from the chip 3. Otherwise, if the adhesive portion 9 covers part of the copper pillar 5, a part of the copper pillar 5 needs to be ground off during subsequent grinding to expose the entire copper pillar 5, resulting in a waste of material and time.

[0114] like Figure 8 As shown, the adhesive portion 9 fills the gap 6 along the length direction. The adhesive portion 9 has protrusions protruding from both ends of the gap 6 in the length direction. The length s of the protrusions in the length direction is greater than or equal to 10% of the width of the gap 6. The width of the gap 6 is the distance between adjacent chips 3. Preferably, the two sides facing each other of the adjacent chips 3 are arranged in parallel, that is, in the length direction of the gap 6, the width of the gap 6 is equal everywhere.

[0115] In this embodiment, the material of the plastic sealing part 10 can be EMC (epoxy plastic sealing compound), which is essentially different from the material of the adhesive part 9. The end of the copper column 5 facing away from the chip 3 is exposed in the plastic sealing part 10 and is flush with the plastic sealing part 10. The functional surface 31 is located in the plastic sealing part 10, and the functional surface 31 is covered by the plastic sealing part 10. The side of the plastic sealing part 10 is located outside the side of the chip 3 and inside the side of the carrier 1, ensuring that the plastic sealing part 10 completely covers the chip 3 and the adhesive part 9.

[0116] The material of the plastic encapsulation part 10 can be injected from the edge of the carrier board 1, and the plastic encapsulation part 10 can be formed by compression molding. After compression molding, the distance between the plastic encapsulation part 10 and the non-functional surface 32 is greater than the distance between the side of the copper pillar 5 facing away from the chip 3 and the non-functional surface 32. Subsequently, a grinding wheel can be used to grind the surface of the plastic encapsulation part 10 facing away from the chip 3, so that the end of the copper pillar 5 facing away from the chip 3 is exposed.

[0117] In this embodiment, the fan-out package device may further include a rewiring layer 11. The rewiring layer 11 is located on the surface of the plastic encapsulation part 10 away from the chip 3. The rewiring layer 11 is electrically connected to the end of the copper pillar 5 facing away from the chip 3. A conductor 12 may be provided on the side of the rewiring layer 11 away from the plastic encapsulation part 10, and the conductor 12 is electrically connected to the rewiring layer 11. The conductor 12 may be a solder ball, and its material may be at least one metal material selected from copper, nickel, tin, or silver.

[0118] It should be noted that, in the description of this specification, the terms "first", "second", etc. are only used for descriptive purposes and to distinguish similar objects. There is no order of precedence between the two, and they cannot be understood as indicating or implying relative importance. In addition, in the description of this specification, unless otherwise specified, the meaning of "plurality" is two or more.

[0119] The use of the term "comprising" or "including" to describe the combination of elements, ingredients, parts or steps herein also contemplates an embodiment that is basically composed of these elements, ingredients, parts or steps. By using the term "may" here, it is intended to illustrate that any attribute described that "may" include is optional.

[0120] Multiple elements, ingredients, parts or steps can be provided by a single integrated element, ingredient, part or step. Alternatively, a single integrated element, ingredient, part or step can be divided into separate multiple elements, ingredients, parts or steps. The disclosure "one" or "an" used to describe an element, ingredient, part or step is not intended to exclude other elements, ingredients, parts or steps.

[0121] The above description is only an implementation method of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly used in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A fan-out packaging method, characterized in that: include: Provide carrier board; A plurality of chips are arranged on the carrier board, and gaps are provided between adjacent chips; forming an adhesive portion in at least a portion of the gap; A plastic sealing portion is formed on a side of the carrier board where the chip is provided; wherein the plastic sealing portion at least continuously covers the chip and a side of the adhesive portion away from the carrier board; The step of forming an adhesive portion in at least part of the gap comprises: dispensing glue at one end of the gap in the length direction, and the glue fills the gap along the length direction to form the adhesive portion; wherein the length direction is parallel to the side surface of the chip adjacent to the gap; The adhesive portion includes a first surface away from the carrier, the first surface is covered by the plastic sealing portion, the first surface is recessed in a direction close to the carrier, and the minimum height between the first surface and the carrier is greater than or equal to 90% of the thickness of the chip; the adhesive portion protrudes from both ends of the gap in the length direction, and the length of the protruding portion is greater than or equal to 10% of the width of the gap.

2. The fan-out packaging method according to claim 1, characterized in that: Before the dispensing, the method further includes: preheating the carrier plate and the glue solution; After the dispensing, the method further includes: baking the glue liquid to solidify it.

3. The fan-out packaging method according to claim 1, characterized in that: Between the step of arranging a plurality of chips on the carrier and the step of forming an adhesive portion in at least a portion of the gap, the method further comprises: Baking the side of the carrier board on which the chip is provided; Plasma surface treatment is performed on the side of the carrier where the chip is arranged.

4. The fan-out packaging method according to claim 1, characterized in that: Between providing a carrier board and arranging a chip on the carrier board, the method further includes: Applying a temporary adhesive layer on the carrier to bond the chip and the carrier; Between the step of arranging a plurality of chips on the carrier and the step of forming an adhesive portion in at least a portion of the gap, the method further comprises: baking the temporary adhesive layer; The temporary glue layer is subjected to plasma surface treatment.

5. The fan-out packaging method according to claim 1, characterized in that: The chip comprises a functional surface and a non-functional surface arranged opposite to each other. In the step of arranging the chip on the carrier, the non-functional surface faces the carrier. The functional surface comprises a pad, and a copper column electrically connected to the pad is arranged on the functional surface.

6. The fan-out packaging method according to claim 5, characterized in that: The step of forming the plastic sealing portion includes: The plastic sealing part is formed on one side of the carrier board provided with the chip, and the plastic sealing part covers the chip and the adhesive part; The plastic sealing part is ground from a side of the plastic sealing part away from the carrier board, so that a side of the copper column away from the carrier board is exposed.

7. The fan-out packaging method according to claim 5, characterized in that: After the step of forming the plastic sealing portion, the method further includes: A rewiring layer is formed on a side of the plastic sealing portion facing away from the carrier board, wherein the rewiring layer is electrically connected to an end of the copper column facing away from the carrier board; A conductor is arranged on a side of the rewiring layer away from the plastic sealing portion, and the conductor is electrically connected to the rewiring layer.

8. A fan-out packaging device, characterized in that: include: A plurality of chips, with gaps between adjacent chips; an adhesive portion, located in at least a portion of the gap; A plastic sealing portion, at least continuously covering the chip and the same side of the adhesive portion; The adhesive portion includes a first surface and a second surface opposite to each other, the first surface is covered by the plastic sealing portion, the first surface is recessed in a direction close to the second surface, and the minimum height between the first surface and the second surface is greater than or equal to 90% of the thickness of the chip; the adhesive portion fills the gap along the length direction, and the length direction is parallel to the side surface of the chip adjacent to the gap; the adhesive portion has protrusions protruding from both ends of the gap in the length direction; The length of the protrusion in the length direction is greater than or equal to 10% of the width of the gap.

9. The fan-out package device according to claim 8, characterized in that: The chip comprises a functional surface and a non-functional surface arranged opposite to each other, and the second surface of the adhesive portion is flush with the non-functional surface; the functional surface comprises a pad, and a copper column electrically connected to the pad is arranged on the functional surface.

10. The fan-out package device according to claim 9, characterized in that: The fan-out packaging device further comprises: A carrier plate, which is attached to the non-functional surface of the chip, and a surface of the carrier plate facing the chip is subjected to plasma surface treatment; A temporary adhesive layer is located on a side of the carrier board facing the chip and is used to bond the chip and the carrier board.

11. The fan-out package device according to claim 9, characterized in that: One end of the copper column facing away from the chip is exposed from the plastic sealing part and is flush with the plastic sealing part; the functional surface is located inside the plastic sealing part.

12. The fan-out package device according to claim 9, characterized in that: The fan-out packaging device further comprises: A rewiring layer is located on a surface of the plastic sealing portion facing away from the chip; the rewiring layer is electrically connected to an end of the copper column facing away from the chip; The conductor is located at a side of the rewiring layer away from the plastic sealing portion, and the conductor is electrically connected to the rewiring layer.