A method for preparing a metal-semiconductor photodiode array
By using evaporation and coating technology to prepare aluminum electrode layers and gold electrode layers in metal-semiconductor photodiode arrays, and making air hole arrays on the gold electrode layers, the noise and volume problems of traditional photodetectors are solved and quantum conversion is improved Efficiency and visible light selectivity enable miniaturization and efficient production.
Patent Information
- Application Number
- CN202210424931.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-04-21
- Publication Date
- 2024-12-20
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
Traditional photodetectors increase noise when the response wavelength range is large, resulting in performance degradation. The filter increases the system size and cost but has limited effect, which fails to effectively solve the problem of visible light interference.
The aluminum electrode layer and gold electrode layer are prepared by using evaporation and coating technology in metal-semiconductor photodiode arrays, and an air hole array is made on the gold electrode layer to stimulate the plasmon effect and improve the absorption rate and wavelength selection of visible light sex.
The quantum conversion efficiency of photodiodes and the selectivity of visible light wavelengths are improved, the device production cost is reduced, the miniaturization and multiplication are achieved, and the response speed and uniformity are improved.
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Figure CN114883350B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of optoelectronic technology, and in particular to a method for preparing a metal-semiconductor photodiode array. Background Art
[0002] Photodetectors are one of the important devices at the receiving end of visible light communication systems, and their performance directly affects the quality of the entire system. The traditional receiving end is composed of an optical part and an electrical part, where the optical part includes the receiving end optical antenna, filter, and photodetector; the optical antenna mainly realizes the beam shaping of the transmitted light, so that the light is accurately transmitted to the receiving system. The main function of the filter is to remove stray light and other bands of visible light without loaded signals; the detector (photodiode) is the main part of the receiving system, and its function is to convert optical signals into electrical signals. The visible light carrying the signal is monochromatic light, so other visible light becomes interference light. If the detector has a large response wavelength range, the noise of the detector will increase, and the performance of the detector will also be affected. Therefore, a filter is usually added in front of the detection chip. Although the filter can filter out most of the interference light and stray light, it does not selectively reflect and absorb the visible light band. Similarly, the performance of the detector is reduced by adding a filter. At the same time, a receiving antenna and a filter need to be added in front of the detector, which makes the system bulky and not easy to integrate. The working method of the photoelectric detector is not improved from the fundamental problem. Instead, the continuous addition of filters not only increases the production cost of the detection device but also fails to achieve the desired effect. Summary of the invention
[0003] In order to solve the above technical problems, the purpose of the present invention is to provide a method for preparing a metal-semiconductor photodiode array. The aluminum electrode layer prepared by evaporation treatment and the gold electrode layer prepared by coating treatment can improve the quantum conversion efficiency and selectivity of the photodiode to visible light wavelengths.
[0004] To achieve the above invention objectives, the technical solution of the present invention includes the following steps:
[0005] S1, selecting a silicon wafer and performing ultrasonic cleaning on the silicon wafer;
[0006] S2. Performing evaporation treatment on the silicon wafer under vacuum environment to generate an aluminum electrode layer;
[0007] S3, under vacuum environment, depositing a layer of silicon on the upper surface of the silicon wafer, and then forming a silicon epitaxial layer by ion implantation;
[0008] S4, cleaning and drying the silicon epitaxial layer and spin-coating a protective layer, and using a photolithography process and an etching process to make isolation grooves of the detection unit array;
[0009] S5. Filling the isolation groove under a vacuum environment and removing the protective layer;
[0010] S6, performing sputtering treatment on the isolation groove and the upper surface of the silicon epitaxial layer by a magnetron sputtering method to generate a silicon dioxide insulating layer;
[0011] S7, performing coating treatment on the surface of the silicon dioxide insulating layer to generate a gold electrode layer;
[0012] S8. Spin-coating a protective layer on the gold electrode layer, obtaining an air hole array by combining a photolithography process with an etching process, and preparing a metal-semiconductor photodiode array.
[0013] Further, the silicon wafer is n + Type silicon wafer, thickness is 0.1μm~10μm;
[0014] Furthermore, the step of performing evaporation treatment on the silicon wafer under a vacuum environment to generate an aluminum electrode layer specifically includes:
[0015] S21, use polishing liquid and alcohol ether mixture to wipe the surface of the silicon wafer, and send it into the pressure range of 10 -1 ~10 -4 Pa vacuum chamber;
[0016] S22, performing vapor deposition processing on the silicon wafer to generate an aluminum electrode layer.
[0017] Furthermore, the aluminum electrode layer is fixed on the silicon wafer substrate, the silicon wafer substrate has a thickness of 10 μm to 100 μm, and the aluminum electrode layer has a thickness of 10 nm to 500 nm.
[0018] Furthermore, the silicon layer includes n + type silicon substrate layer and n-type silicon absorber layer.
[0019] Furthermore, the silicon layer has n + The thickness of the n-type silicon substrate layer and the n-type silicon absorption layer is 1 μm to 10 μm, and the thickness of the silicon dioxide insulating layer is 2 nm to 10 nm.
[0020] Furthermore, the etching process includes dry etching, wet etching and a combination of dry etching and wet etching.
[0021] Furthermore, the filler in the isolation groove includes polyimide, silicon dioxide, polydimethylsiloxane, epoxy resin and polymethyl methacrylate, the depth of the isolation groove is equal to the thickness of the n-type silicon absorption layer, and the protective layer includes photoresist, polyimide, polydimethylsiloxane, epoxy resin and silicon dioxide.
[0022] Furthermore, the coating process includes evaporation process and magnetron sputtering process.
[0023] Furthermore, the thickness of the gold electrode layer is 5nm to 100nm.
[0024] The beneficial effects of the method of the present invention are as follows: the present invention stimulates the plasmon effect of incident visible light by making an air hole array on the gold electrode layer, thereby promoting the absorption rate and wavelength selectivity of the silicon layer to visible light. The method adopts a combination of micro-opto-electromechanical system (MOEMS) technology with multiplexity, miniaturization and mass production and coating technology. The detection chip is divided by the MOEMS technology, and the obtained detection units have good uniformity and consistency. The mass production of the MOEMS technology improves the work efficiency. Since the production process of the Schottky barrier is simple, the production cost of the device is reduced. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] Figure 1 It is a preparation flow chart of a metal-semiconductor photodiode array of the present invention;
[0026] Figure 2 It is a three-dimensional schematic diagram of a method for preparing a metal-semiconductor photodiode array of the present invention;
[0027] Figure 3 It is a longitudinal cross-sectional view of a method for preparing a metal-semiconductor photodiode array of the present invention;
[0028] Figure 4 It is a manufacturing flow chart of a metal-semiconductor photodiode array of the present invention.
[0029] Reference numerals: 1, substrate; 2, aluminum electrode layer; 3, n + 1. n-type silicon substrate layer; 2. n-type silicon absorption layer; 3. silicon dioxide insulation layer; 4. gold electrode layer; 5. isolation grooves and fillers; 6. air hole array. DETAILED DESCRIPTION
[0030] The present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. The step numbers in the following embodiments are only provided for the convenience of explanation and description, and the order between the steps is not limited in any way. The execution order of each step in the embodiment can be adaptively adjusted according to the understanding of those skilled in the art.
[0031] Reference Figure 1 The present invention provides a method for preparing a metal-semiconductor photodiode array, comprising the following steps:
[0032] S1, selecting a silicon wafer and performing ultrasonic cleaning on the silicon wafer;
[0033] Specifically, the silicon wafer is n+ Type silicon wafer, thickness is 0.1μm ~ 10μm.
[0034] S2, performing evaporation treatment on the silicon wafer under a vacuum environment to generate an aluminum electrode layer 2;
[0035] Specifically, the pair n + Before the silicon wafer is subjected to evaporation treatment, it is necessary to clean the silicon wafer. The cleaning method includes wiping it with a polishing liquid and an alcohol ether mixture. The pressure of the vacuum environment is specifically 10 -1 ~10 - 4 Pa, the aluminum electrode layer is fixed on the silicon wafer substrate, the silicon wafer substrate has a thickness of 10 μm to 100 μm, and the aluminum electrode layer 2 has a thickness of 10 nm to 500 nm.
[0036] S3, under vacuum environment, depositing a layer of silicon on the upper surface of the silicon wafer, and then forming a silicon epitaxial layer by ion implantation;
[0037] Specifically, the n + Type silicon wafer is n + The silicon epitaxial layer is an n-type silicon absorption layer 4. + The thickness of the n-type silicon substrate layer 3 and the n-type silicon absorption layer 4 is 1 μm to 10 μm.
[0038] S4, cleaning and drying the silicon epitaxial layer and spin-coating a protective layer, and using a photolithography process and an etching process to manufacture isolation grooves 7 of the detection unit array;
[0039] Specifically, the etching process includes dry etching and wet etching.
[0040] S5. Filling the isolation groove 7 under a vacuum environment and removing the protective layer;
[0041] Specifically, the filler in the isolation groove 7 includes polyimide, silicon dioxide, polydimethylsiloxane, epoxy resin and polymethyl methacrylate, and the depth of the isolation groove 7 is equal to that of the n-type silicon absorption layer 4 .
[0042] S6, coating the isolation groove 7 and the upper surface of the silicon epitaxial layer by a magnetron sputtering method to form a silicon dioxide insulating layer 5;
[0043] Specifically, the coating process includes evaporation and magnetron sputtering, and the thickness of the silicon dioxide insulating layer 5 is 2 nm to 10 nm.
[0044] S7, performing a coating process on the silicon dioxide insulating layer to generate a gold electrode layer 6;
[0045] Specifically, the thickness of the gold electrode layer 6 is 5 nm to 100 nm.
[0046] S8. The gold electrode layer 6 is subjected to spin coating of a protective layer and etching treatment in sequence to obtain an air hole array, thereby preparing a metal-semiconductor structure photodiode array.
[0047] Specifically, refer to Figure 2 , Figure 3 and Figure 4 The preparation method of the present invention is specifically as follows:
[0048] Select n + The silicon wafer is used as the substrate 1, and the substrate 1 is ultrasonically cleaned, and then evaporated in a vacuum environment to obtain a silicon wafer with an aluminum electrode layer 2 on the surface, and the aluminum electrode layer 2 is fixed on the silicon substrate to obtain n + The silicon substrate layer 3 is the upper surface and the silicon wafer base is the lower surface of the chip, and the chip is cleaned. + A silicon layer is deposited on the upper surface of the n-type silicon substrate layer 3, and an n-type silicon absorption layer 4 is formed by ion implantation. The chip is further cleaned, and a protective layer is spin-coated. The protective layer is subjected to a photolithography process, and then an isolation groove 7 is formed by an etching process. In a vacuum environment, fillers such as polyimide, silicon dioxide, polydimethylsiloxane, epoxy resin and polymethyl methacrylate are filled into the isolation groove 7. After filling, the protective layer is removed, and a thin silicon dioxide insulating layer 5 is sputtered on the chip surface by a magnetron sputtering method. A gold electrode layer 6 is obtained on the upper surface of the silicon dioxide insulating layer 5 by an evaporation process or magnetron sputtering, and a protective layer is spin-coated on the gold electrode layer 6. An air hole array is formed by a photolithography process and an etching process. The depth of the air hole array is 0.5 μm to 10 μm, the radius is 50 nm to 300 nm, and the period is 300 nm to 500 nm. Finally, the production of the metal-semiconductor photodiode array is completed.
[0049] The working principle of the present invention is specifically as follows:
[0050] A potential barrier is formed on the contact surface between the gold electrode layer 6 and the n-type silicon absorption layer 4. Since the electrons in the n-type silicon absorption layer 4 occupy a higher energy level than those in the gold electrode layer 6, the electrons pass from the high-concentration n-type silicon absorption layer 4 to the gold electrode layer 6. There are no holes in the gold electrode layer 6, and there is no diffusion movement of holes. As the electrons continue to diffuse, the Fermi levels of the two are leveled. At this time, the direction of the electric field is directed from the n-type silicon absorption layer 4 to the gold electrode layer 6. Due to the transfer of electrons, a space charge layer composed of ionized donors that have lost electrons and are neutralized appears on the surface of the silicon absorption layer, and a space charge layer formed by electron accumulation appears on the surface of the gold electrode layer 6. Electrical neutrality requires that the negative charge on the surface of the gold electrode layer 6 is equal to the positive charge on the surface of the silicon absorption layer 4, but has an opposite sign. Since there are a large number of free electrons in the metal, the space charge layer on the metal surface is very thin. The donor concentration in the silicon absorption layer 4 is several orders of magnitude lower than the electron concentration in the gold electrode layer 6, so the space charge layer of the silicon layer is relatively much thicker. The electric field of the space charge will prevent the electrons in the silicon absorption layer 4 from flowing into the gold electrode layer 6. When thermal equilibrium is reached, a certain space charge region width, a stable built-in electric field and a certain built-in potential difference are formed. When a reverse bias is applied, the barrier width increases. When light is incident on the surface of the gold electrode layer 6, the air hole array 8 of the gold electrode layer 6 excites the plasmon effect. Photons are absorbed in the silicon dioxide absorption layer to form electron-hole pairs. Under the action of the built-in electric field, the electrons are accelerated to n + The silicon substrate layer 3 drifts to form a current in the external circuit. Based on the photolithography process, the gold electrode layer with a protective layer is corroded by dry etching or wet etching to prepare an air hole array 8. After the air hole array 8 in the photodiode is irradiated with light, it can excite base film, guide film and cavity film modes. The mutual coupling between various types of modes changes the chip's reflection, transmission and absorption of visible light. At the same time, the air, silicon dioxide layer and aluminum electrode layer form a fiber-like structure, which continues to enhance silicon's absorption of blue light, thereby improving the quantum efficiency of the device. The photodiode array segmentation reduces the photosensitivity area of a single detection unit, thereby reducing the junction capacitance of the diode and improving the response speed of the device. The total photosensitivity area of the device is the sum of the photosensitivity surfaces of multiple detection units, so it will not reduce the photosensitivity surface of the detection device and improve the response speed of the device.
[0051] The contents of the above method embodiments are all applicable to the present system embodiments. The functions specifically implemented by the present system embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.
[0052] The above is a specific description of the preferred implementation of the present invention, but the invention is not limited to the embodiments. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present invention. These equivalent modifications or substitutions are all included in the scope defined by the claims of this application.
Claims
1. A method for preparing a metal-semiconductor photodiode array, characterized in that: The following steps are involved: S1, selecting a silicon wafer and performing ultrasonic cleaning on the silicon wafer; S2. Performing evaporation treatment on the silicon wafer under a vacuum environment to generate an aluminum electrode layer; and fixing the aluminum electrode layer on the silicon wafer substrate; S3, under vacuum environment, depositing a layer of silicon on the upper surface of the silicon wafer, and then forming a silicon epitaxial layer by ion implantation; S4, cleaning and drying the silicon epitaxial layer and spin-coating a protective layer, and using a photolithography process and an etching process to make isolation grooves of the detection unit array; S5. Filling the isolation groove under a vacuum environment and removing the protective layer; S6, performing sputtering treatment on the isolation groove and the upper surface of the silicon epitaxial layer by a magnetron sputtering method to generate a silicon dioxide insulating layer; S7, performing coating treatment on the surface of the silicon dioxide insulating layer to generate a gold electrode layer; S8. Spin-coating a protective layer on the gold electrode layer, obtaining an air hole array by combining a photolithography process with an etching process, and preparing a metal-semiconductor photodiode array.
2. The method for preparing a metal-semiconductor photodiode array according to claim 1, characterized in that: The silicon wafer is n + Type silicon wafer, thickness is 0.1μm ~ 10μm.
3. The method for preparing a metal-semiconductor photodiode array according to claim 1, characterized in that: The step of performing evaporation treatment on the silicon wafer under vacuum environment to generate the aluminum electrode layer specifically includes: S21, use polishing liquid and alcohol ether mixture to wipe the surface of the silicon wafer, and send it into the pressure range of 10 -1 ~10 - 4 Pa vacuum chamber; S22, performing vapor deposition processing on the silicon wafer to generate an aluminum electrode layer.
4. The method for preparing a metal-semiconductor photodiode array according to claim 1, characterized in that: The thickness of the silicon wafer substrate is 10 μm to 100 μm, and the thickness of the aluminum electrode layer is 10 nm to 500 nm.
5. The method for preparing a metal-semiconductor photodiode array according to claim 2, characterized in that: The + Type silicon wafer is n + The silicon epitaxial layer is an n-type silicon absorption layer.
6. The method for preparing a metal-semiconductor photodiode array according to claim 5, characterized in that: n + The thickness of the n-type silicon substrate layer and the n-type silicon absorption layer is 1 μm to 10 μm, and the thickness of the silicon dioxide insulating layer is 2 nm to 10 nm.
7. The method for preparing a metal-semiconductor photodiode array according to claim 1, characterized in that: The etching process includes dry etching, wet etching and a combination of dry etching and wet etching.
8. The method for preparing a metal-semiconductor photodiode array according to claim 1, characterized in that: The filler in the isolation groove includes polyimide, silicon dioxide, polydimethylsiloxane, epoxy resin and polymethyl methacrylate, the depth of the isolation groove is equal to the thickness of the n-type silicon absorption layer, and the protection layer includes photoresist, polyimide, polydimethylsiloxane, epoxy resin and silicon dioxide.
9. The method for preparing a metal-semiconductor photodiode array according to claim 1, characterized in that: The coating process includes evaporation process and magnetron sputtering process.
10. The method for preparing a metal-semiconductor photodiode array according to claim 1, characterized in that: The thickness of the gold electrode layer is 5nm-100nm.
Citation Information
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