Light emitting diode and method for manufacturing the same

Abstract

The present application discloses a light-emitting diode and a method for manufacturing the same. The light-emitting diode includes: a transparent substrate; a transparent bonding layer located on the transparent substrate; a transparent conductive layer located on the transparent bonding layer; an epitaxial layer located on the transparent conductive layer, wherein the epitaxial layer includes a second semiconductor layer, a light-emitting layer, and a first semiconductor layer stacked sequentially from bottom to top, the epitaxial layer covers a portion of the transparent conductive layer, exposing at least a portion of the surface of the transparent conductive layer; wherein the second semiconductor layer includes at least a second confinement layer and a second current spreading layer, the second current spreading layer is located between the second confinement layer and the transparent conductive layer, and the second current spreading layer is a superlattice structure. By adopting a flip-chip design of a transparent substrate, a second current spreading layer with a superlattice structure, and a transparent conductive layer capable of increasing transmittance and brightness, the lateral current spreading capability is greatly improved, the current is evenly distributed, the light extraction efficiency is greatly improved, and thus the light efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices, and more particularly to a light emitting diode and a method for manufacturing the same. Background Art

[0002] A light-emitting diode (LED) is a commonly used light-emitting device that emits light through the recombination of electrons and holes, releasing photons. LEDs can efficiently convert electrical energy into light energy and have a wide range of applications in modern society, such as lighting, flat-panel displays, and medical devices. Existing red LEDs are typically AlGaInP-based. Due to their lattice-matched gallium arsenide (GaAs) substrate, they exhibit an internal quantum efficiency of approximately 90%. However, due to the GaAs substrate, a high amount of light is absorbed, resulting in a very low external quantum efficiency.

[0003] In recent years, the addition of a Bragg reflector between the substrate and the light-emitting layer has been used to reduce substrate absorption, allowing near-normal incident light to escape effectively. However, most incident light away from the normal will still be absorbed by the substrate, making it difficult to significantly improve the external quantum efficiency using this method. Alternatively, by removing the gallium arsenide substrate and instead extracting light from the N-type semiconductor layer—that is, removing the gallium arsenide substrate and bonding the P-type semiconductor layer to a metal substrate with a metal reflector—this technology can effectively improve light extraction efficiency. However, the opaque ohmic contact layer on the light-emitting side still affects light extraction. Furthermore, total internal reflection occurs between the P-type semiconductor layer and the metal reflector, trapping light in the LED and affecting light extraction.

[0004] It is desirable to further improve light emitting diodes and methods of manufacturing the same to alleviate the above-mentioned problems. Summary of the Invention

[0005] The purpose of the present invention is to provide a light-emitting diode and a method for manufacturing the same. By adopting a flip-chip design of a transparent substrate, a second current spreading layer with a superlattice structure, and a transparent conductive layer, the lateral current spreading capability is greatly improved, the current is evenly distributed, the light extraction efficiency is greatly improved, and the luminous efficacy is thereby enhanced.

[0006] According to one aspect of the present invention, a light-emitting diode is provided, characterized in that it includes: a transparent substrate; a transparent bonding layer located on the transparent substrate; a transparent conductive layer located on the transparent bonding layer; an epitaxial layer located on the transparent conductive layer, the epitaxial layer including a second semiconductor layer, a light-emitting layer, and a first semiconductor layer stacked in sequence from bottom to top, the epitaxial layer covering a portion of the transparent conductive layer so that at least a portion of the surface of the transparent conductive layer is exposed; wherein the second semiconductor layer includes at least a second confinement layer and a second current spreading layer, the second current spreading layer being located between the second confinement layer and the transparent conductive layer, and the second current spreading layer being a superlattice structure.

[0007] Preferably, the second current spreading layer comprises alternately stacked gallium phosphide layers and aluminum phosphide layers, and along a direction perpendicular to the first semiconductor layer pointing toward the second semiconductor layer, the thickness of the gallium phosphide layer gradually increases, and the thickness of the aluminum phosphide layer gradually decreases.

[0008] Preferably, the period of the alternately stacked gallium phosphide layers and aluminum phosphide layers ranges from 10 to 20.

[0009] Preferably, the thickness of the second current spreading layer is in the range of 200 nm to 2 μm, wherein the thickness of the gallium phosphide layer is in the range of 10 nm to 50 nm, and the thickness of the aluminum phosphide layer is in the range of 10 nm to 50 nm.

[0010] Preferably, the first semiconductor layer includes a first confinement layer, a first current spreading layer and a first ohmic contact layer which are sequentially arranged from bottom to top.

[0011] Preferably, a transition layer is further provided between the second limiting layer and the second current spreading layer.

[0012] Preferably, the material of the transition layer is (Al a Ga 1-a ) b In 1-b P, wherein a ranges from 0 to 1, b ranges from 0.2 to 0.5, and the value of b gradually decreases in a direction perpendicular to the transparent substrate and from the first semiconductor layer to the second semiconductor layer.

[0013] Preferably, the transparent conductive layer is adjacent to the gallium phosphide layer at one end of the second current spreading layer, and the transition layer is adjacent to the aluminum phosphide layer at the other end of the second current spreading layer.

[0014] Preferably, the light-emitting layer includes a second space layer, an active layer and a first space layer arranged in sequence from bottom to top.

[0015] Preferably, the doping type of the first semiconductor layer is N-type, and the doping type of the second semiconductor layer is P-type.

[0016] Preferably, an insulating layer is further included, and the insulating layer covers the surface and sidewalls of the epitaxial layer and the surface of the transparent conductive layer.

[0017] Preferably, the insulating layer is a DBR reflector, and the DBR reflector includes alternately stacked silicon oxide layers and titanium oxide layers.

[0018] Preferably, the light-emitting diode also includes: a first conduction channel, located on the epitaxial layer, passing through the insulating layer and electrically connected to the first semiconductor layer; a first electrode, located on the insulating layer, electrically connected to the first conduction channel; a second conduction channel, located on the transparent conductive layer, passing through the insulating layer and electrically connected to the transparent conductive layer; and a second electrode, located on the insulating layer, electrically connected to the second conduction channel.

[0019] According to another aspect of the present invention, a method for manufacturing a light-emitting diode is provided, characterized in that it includes: performing epitaxial growth on a growth substrate to form an epitaxial layer, the epitaxial layer including a first semiconductor layer, a light-emitting layer, and a second semiconductor layer arranged in sequence from bottom to top; forming a transparent conductive layer on the epitaxial layer, and bonding the transparent conductive layer to a transparent substrate via a transparent bonding layer; removing the growth substrate and etching the epitaxial layer to expose at least a portion of the surface of the transparent conductive layer; wherein the second semiconductor layer includes at least a second confinement layer and a second current spreading layer, the second current spreading layer being located between the second confinement layer and the transparent conductive layer, and the second current spreading layer having a superlattice structure.

[0020] Preferably, forming the second current spreading layer includes: forming an aluminum phosphide layer and a gallium phosphide layer stacked alternately on the second limiting layer, and along a direction perpendicular to the first semiconductor layer pointing to the second semiconductor layer, the thickness of the aluminum phosphide layer gradually decreases, and the thickness of the gallium phosphide layer gradually increases.

[0021] Preferably, the period of the alternately stacked gallium phosphide layers and aluminum phosphide layers ranges from 10 to 20.

[0022] Preferably, the thickness of the second current spreading layer is in the range of 200 nm to 2 μm, wherein the thickness of the gallium phosphide layer is in the range of 10 nm to 50 nm, and the thickness of the aluminum phosphide layer is in the range of 10 nm to 50 nm.

[0023] Preferably, forming the first semiconductor layer includes: sequentially forming a first ohmic contact layer, a first current spreading layer, and a first confinement layer on the growth substrate.

[0024] Preferably, forming the second semiconductor layer includes forming a transition layer on the second confinement layer, and forming the second current spreading layer on the transition layer.

[0025] Preferably, the material of the transition layer is (Al a Ga 1-a ) b In 1-b P, wherein a ranges from 0 to 1, b ranges from 0.2 to 0.5, and the value of b gradually decreases in a direction perpendicular to the transparent substrate and from the first semiconductor layer to the second semiconductor layer.

[0026] Preferably, the transparent conductive layer is adjacent to the gallium phosphide layer at one end of the second current spreading layer, and the transition layer is adjacent to the aluminum phosphide layer at the other end of the second current spreading layer.

[0027] Preferably, forming the light emitting layer includes: sequentially forming a first space layer, an active layer, and a second space layer on the first semiconductor layer.

[0028] Preferably, the doping type of the first semiconductor layer is N-type, and the doping type of the second semiconductor layer is P-type.

[0029] Preferably, the manufacturing method further comprises: forming a first conducting channel on the epitaxial layer, and forming a second conducting channel on the transparent conductive layer.

[0030] Preferably, an upper surface of the second conducting channel is flush with an upper surface of the first conducting channel.

[0031] Preferably, the manufacturing method further comprises: forming an insulating layer, wherein the insulating layer covers the surface and sidewalls of the epitaxial layer and the surface of the transparent conductive layer, and exposes the surfaces of the first conductive channel and the second conductive channel.

[0032] Preferably, the insulating layer is a DBR reflector, and forming the DBR reflector includes: forming alternately stacked silicon dioxide layers and titanium dioxide layers.

[0033] Preferably, the manufacturing method also includes: forming a first electrode and a second electrode on the insulating layer, wherein the first electrode is electrically connected to the first semiconductor layer through a first conductive channel passing through the insulating layer, and the second electrode is electrically connected to the transparent conductive layer through a second conductive channel passing through the insulating layer.

[0034] The present invention provides a light-emitting diode and a method for manufacturing the same. The light-emitting diode utilizes a flip-chip design with a transparent substrate, effectively preventing light absorption by the substrate and significantly improving light extraction efficiency. The epitaxial layers of the light-emitting diode include a first semiconductor layer, a light-emitting layer, and a second semiconductor layer. The second semiconductor layer includes a second current-spreading layer having a superlattice structure. This superlattice structure is formed by alternating stacks of gallium phosphide and aluminum phosphide layers, and employs a single-layer thickness gradient design. This effectively mitigates the lattice mismatch between the AlGaInP-based epitaxial layer and the gallium phosphide layer in the second current-spreading layer, and enhances the epitaxial layer's lateral current-spreading capability.

[0035] Furthermore, a transparent conductive layer is provided between the epitaxial layer and the transparent bonding layer. The transparent conductive layer not only does not affect the light emission, but also serves as a current expansion layer, greatly improving the current expansion capability so that the current is evenly distributed, thereby achieving the effect of increasing transmittance and brightening.

[0036] The manufacturing method of the embodiment of the present invention is simple and reliable, easy to implement, and can be used for large-scale production. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings.

[0038] Figure 1 A schematic cross-sectional view of a light emitting diode according to an embodiment of the present invention is shown;

[0039] Figure 2 A flow chart showing a method for manufacturing a light emitting diode according to an embodiment of the present invention;

[0040] Figures 3a to 3g Schematic cross-sectional views of different stages of a manufacturing process of a light emitting diode provided by an embodiment of the present invention are shown. DETAILED DESCRIPTION

[0041] The present invention will be described in more detail below with reference to the accompanying drawings. Like elements are denoted by similar reference numerals throughout the various figures. For clarity, parts in the figures are not drawn to scale. Furthermore, certain well-known parts may not be shown. For simplicity, a semiconductor structure obtained after several steps may be depicted in a single figure.

[0042] It should be understood that when describing the structure of a device, when a layer or a region is referred to as being "on" or "over" another layer or region, it may mean that it is directly on the other layer or region, or that other layers or regions are included between it and the other layer or region. Furthermore, if the device is turned over, the layer or region will be "below" or "beneath" the other layer or region.

[0043] If the purpose is to describe the situation of being directly on another layer or another area, this article will use the expression "directly on..." or "above and adjacent to...".

[0044] Many specific details of the present invention are described below, such as the structure, materials, dimensions, processing techniques, and technologies of the LED chip, to provide a clearer understanding of the present invention. However, as will be appreciated by those skilled in the art, the present invention may be practiced without following these specific details.

[0045] Before describing the embodiments of the present invention, the following will be described.

[0046] When aluminum gallium indium phosphide "AlGaInP" is described below, it means that the chemical composition ratio of the sum of Al, Ga, and In to P is 1:1, where Al, Ga, and In are arbitrary compounds with a non-fixed ratio. Furthermore, when aluminum indium phosphide "AlInP" is described below, it means that the chemical composition ratio of the sum of Al and In to P is 1:1, where Al and In are arbitrary compounds with a non-fixed ratio. When gallium indium phosphide "GaInP" is described below, it means that the chemical composition ratio of the sum of Ga and In to P is 1:1, where Ga and In are arbitrary compounds with a non-fixed ratio.

[0047] The present invention may be embodied in various forms, some examples of which are described below.

[0048] Figure 1 FIG. 1 is a cross-sectional schematic diagram of a light emitting diode according to an embodiment of the present invention. Figure 1 As shown, the light-emitting diode includes: a transparent substrate 200, a transparent bonding layer 201, a transparent conductive layer 202, an epitaxial layer 203, an insulating layer 204, a first conductive channel 205, a second conductive channel 207, a first electrode 206 and a second electrode 208, wherein the epitaxial layer 203 covers a portion of the transparent conductive layer 202 so that at least a portion of the surface of the transparent conductive layer 202 is exposed; the insulating layer 204 covers the surface and sidewalls of the epitaxial layer 203, and the surface of the transparent conductive layer 202; the first conductive channel 205 is located on the epitaxial layer 203, the second conductive channel 207 is located on the transparent conductive layer 202, and the first electrode 206 and the second electrode 208 are both located on the insulating layer 204, the first electrode 206 is electrically connected to the epitaxial layer 203 through the first conductive channel 205, and the second electrode 208 is electrically connected to the transparent conductive layer 202 through the second conductive channel 207.

[0049] In this embodiment, the epitaxial layer 203 includes, from bottom to top, a second current spreading layer 20, a transition layer 19, a second confinement layer 18, a second spatial layer 17, an active layer 16, a first spatial layer 15, a first confinement layer 14, a first current spreading layer 13, and a first ohmic contact layer 12. The second spreading layer 20, the transition layer 19, and the second confinement layer 18 constitute the second semiconductor layer, the second spatial layer 17, the active layer 16, and the first spatial layer 15 constitute the light-emitting layer, and the first confinement layer 14, the first current spreading layer 13, and the first ohmic contact layer 12 constitute the first semiconductor layer. The first semiconductor layer and the second semiconductor layer have opposite doping types. Specifically, the first semiconductor layer is, for example, N-type doping, and the second semiconductor layer is, for example, P-type doping.

[0050] In this embodiment, the transparent substrate 200 may be, for example, a transparent material such as sapphire or glass, but is not limited thereto. The bonding layer 201 may be, for example, at least one transparent material such as silicon dioxide, titanium dioxide, aluminum oxide, or transparent adhesive, but is not limited thereto. The transparent conductive layer 202 may be a transparent conductive oxide layer, for example, at least one transparent material such as indium tin oxide or aluminum-doped zinc oxide, but is not limited thereto.

[0051] The second current spreading layer 20, for example, comprises a superlattice structure of alternating gallium phosphide and aluminum phosphide layers. The period of the superlattice structure ranges from 10 to 20, and the thickness of the second current spreading layer 20 ranges from 200 nm to 2 μm. Specifically, the transparent conductive layer 202 is adjacent to the lower outermost gallium phosphide layer of the second current spreading layer 20, and the transition layer 19 is adjacent to the upper outermost aluminum phosphide layer of the second current spreading layer 20. The second current spreading layer 20 also has a single-layer thickness gradient design. Along a direction perpendicular to the transparent substrate 200 and pointing from the first semiconductor layer to the second semiconductor layer (hereinafter referred to as the first direction), the thickness of the gallium phosphide layer in the second current spreading layer 20 gradually increases within a range of 10 nm to 50 nm, while the thickness of the aluminum phosphide layer gradually decreases within a range of 10 nm to 50 nm.

[0052] The material of the transition layer 19 is, for example, (Al a Ga 1-a ) b In 1-b P, wherein a ranges from 0 to 1, b ranges from 0.2 to 0.5, and the value of b gradually decreases along the first direction to alleviate lattice mismatch and improve crystal quality.

[0053] Specifically, gallium phosphide is a material with strong lateral current spreading capability in the AlGaInP system, so it is selected as one of the layers in the superlattice structure of the second current spreading layer 20. However, due to the lattice mismatch between gallium phosphide and the material of the transition layer 19 below the second current spreading layer 20, the thickness of the gallium phosphide layer is gradually increased in the second current spreading layer 20 to alleviate the lattice mismatch. Moreover, because the transition layer 19 contains aluminum components and the lattice constant of aluminum phosphide is closer to the growth substrate than that of gallium phosphide, but the current spreading capability of aluminum phosphide is inferior to that of gallium phosphide, the thickness of the aluminum phosphide layer in the second current spreading layer 20 is gradually reduced.

[0054] The second confinement layer 18 and the first confinement layer 14 may be made of, for example, AlInP, a material with a large bandgap and lattice matching with the growth substrate. The thickness of the first confinement layer 14 and the second confinement layer 18 may be, for example, 200 nm to 500 nm.

[0055] The second space layer 17 and the first space layer 15 are both made of, for example, undoped AlGaInP, which can effectively prevent dopant impurities from entering the active layer 16 . The thickness of the first space layer 15 and the second space layer 17 are both, for example, 10 nm to 1000 nm.

[0056] The active layer 16 is, for example, (Al x Ga 1-x ) y In 1-y P / (Al x Ga 1-x ) y In 1-y The superlattice structure of P, wherein the range of x is 0 to 1, and the range of y is 0.4 to 0.6.

[0057] The material of the first current spreading layer 13 is, for example, AlGaInP, and the thickness of the first current spreading layer 13 is, for example, 1000 nm to 5000 nm.

[0058] The first ohmic contact layer 12 may be made of, for example, gallium arsenide or AlGaInP. In this embodiment, the first ohmic contact layer 12 is made of, for example, gallium arsenide, and has a thickness of 50 nm to 500 nm.

[0059] The first conduction channel 205 is, for example, located on the first ohmic contact layer 12 of the epitaxial layer 203, and the second conduction channel 207 is located on the transparent conductive layer 202; specifically, the sum of the height of the first conduction channel 205 and the thickness of the epitaxial layer 203 is equal to the height of the second conduction channel 207, that is, the upper surface of the first conduction channel 205 is flush with the upper surface of the second conduction channel 207; the height of the first conduction channel 205 is, for example, 1 μm to 2 μm, and the height of the second conduction channel 207 is, for example, 4 μm to 10 μm.

[0060] The insulating layer 204 can be a DBR reflector, for example, a DBR reflective film system formed by alternating silicon dioxide layers and titanium dioxide layers. It is understood that other DBR reflective film materials can also be used for the insulating layer 204. The insulating layer 204 covers the surface and sidewalls of the epitaxial layer 203, as well as the surface of the transparent conductive layer 202, and exposes the surfaces of the first conductive channel 205 and the second conductive channel 207. Furthermore, the insulating layer 204 also fills the gap between the second conductive channel 207 and the epitaxial layer 203, and between the second conductive channel 207 and the first conductive channel 205, to better isolate the two and prevent electrical connection.

[0061] The first electrode 206 and the second electrode 208 are both located on the insulating layer 204 and electrically connected to the first conductive channel 205 and the second conductive channel 207, respectively. The thickness of the first electrode 206 and the second electrode 208 are, for example, 1 μm to 3 μm. The material of the first conductive channel 205, the first electrode 206, the second conductive channel 207, and the second electrode 208, for example, includes at least one metal or alloy. Optionally, a reflective layer 204 may be provided between the first electrode 206 and the second electrode 208 to provide a better insulation effect.

[0062] Figure 2 A flow chart showing a method for manufacturing a light emitting diode according to an embodiment of the present invention is shown. Figures 3a to 3g Shown according to Figure 2 The cross-sectional diagrams of the different stages of the manufacturing method are shown in FIG. The combination of the two can better illustrate the manufacturing process of the light-emitting diode, such as Figure 2 As shown, the method for manufacturing the light emitting diode includes the following steps:

[0063] In step S10, epitaxial growth is performed on the growth substrate to form an epitaxial layer; see Figure 3a An etch-stop layer 11 is first formed on the surface of a growth substrate 10, and then an epitaxial layer 203 is formed on the etch-stop layer 11. The material of the growth substrate 10 may be, for example, aluminum oxide, silicon carbide, silicon, or gallium arsenide. The epitaxial layer 203 may be prepared by at least one of metal organic chemical vapor deposition, molecular beam epitaxy, hydride vapor phase epitaxy, plasma-assisted chemical vapor deposition, and sputtering. In this embodiment, the material of the growth substrate 10 may be, for example, gallium arsenide. The material of the etch-stop layer 11 may be, for example, GaInP, and its thickness may be, for example, 100 nm to 1000 nm.

[0064] The epitaxial layer 203 includes, from bottom to top, a first ohmic contact layer 12 , a first current spreading layer 13 , a first confinement layer 14 , a first space layer 15 , an active layer 16 , a second space layer 17 , a second confinement layer 18 , a transition layer 19 and a second current spreading layer 20 .

[0065] The material of the first ohmic contact layer 12 is, for example, gallium arsenide, and its thickness is 50nm to 500nm; the material of the first current spreading layer 13 is, for example, AlGaInP, and its thickness is 1000nm to 5000nm; the material of the first confinement layer 14 is, for example, AlInP, and its thickness is 200nm to 500nm; the material of the first space layer 15 is, for example, undoped AlGaInP, and its thickness is 10nm to 1000nm; the active layer 16 is, for example, (Al x Ga 1-x ) y In 1-y P / (Al x Ga 1-x ) y In 1-y P superlattice structure, wherein the range of x is 0 to 1, and the range of y is 0.4 to 0.6; the second space layer 17 is also non-doped AlGaInP, and its thickness is 10nm to 1000nm; the material of the second confinement layer 18 is, for example, AlInP, and its thickness is 200nm to 500nm; the material of the transition layer 19 is, for example, (Al x Ga 1-x ) y In 1-y P, where x ranges from 0 to 1, y ranges from 0.2 to 0.5, and the value of y gradually decreases along a direction perpendicular to the transparent substrate 200 and directed from the first semiconductor layer to the second semiconductor layer (hereinafter referred to as the first direction). The second current spreading layer 20 is, for example, a superlattice structure comprising alternating aluminum phosphide layers and gallium phosphide layers, with a period of 10 to 100. The thickness of the second current spreading layer 20 ranges from 2 μm to 10 μm. The second current spreading layer 20 also has a single-layer thickness gradient design. Along the first direction, the thickness of the aluminum phosphide layer in the second current spreading layer 20 gradually increases within a range of 2 nm to 10 nm, while the thickness of the gallium phosphide layer gradually decreases within a range of 2 nm to 10 nm.

[0066] In step S20, a transparent conductive layer is formed on the epitaxial layer, and the transparent conductive layer is bonded to the transparent substrate via a transparent bonding layer; see Figure 3bFor example, a transparent conductive layer 202 is formed on the second current spreading layer 20 of the epitaxial layer 203 using an evaporation process. A bonding layer 201 is formed on the transparent conductive layer 202, and the transparent bonding layer 201 is bonded to the transparent substrate 200. In other embodiments, the transparent bonding layer 201 can also be formed on the transparent substrate 200 and then bonded to the transparent conductive layer 202. The transparent conductive layer 202 is made of, for example, but not limited to, at least one transparent conductive oxide material such as indium tin oxide or aluminum-doped zinc oxide. The transparent bonding layer 201 is made of, for example, but not limited to, a transparent material such as silicon dioxide, titanium dioxide, aluminum oxide, or transparent adhesive. The transparent substrate 200 is made of, for example, but not limited to, a transparent material such as sapphire or glass.

[0067] In step S30, the growth substrate is removed, and the epitaxial layer is etched to expose at least a portion of the surface of the transparent conductive layer; Figure 3c-3d The semiconductor structure obtained in step S20 is inverted, the growth substrate 10 and the etching stop layer 11 are removed, and the first ohmic contact layer 12 and the epitaxial layer 203 thereunder are retained. Then, photolithography and etching processes are used to etch around the epitaxial layer 203 from the first ohmic contact layer 12 to the second current spreading layer 20, so that at least a portion of the surface of the transparent conductive layer 202 is exposed.

[0068] In step S40, a first conducting channel is formed on the epitaxial layer, and a second conducting channel is formed on the transparent conductive layer; Figure 3e A first conductive channel 205 is formed on the first ohmic contact layer 12, and a second conductive channel 207 is formed on the transparent conductive layer 202. Specifically, for example, an evaporation process is used to form the first conductive channel 205 with a thickness of 1 μm to 2 μm on the first ohmic contact layer 12, and the second conductive channel 207 with a thickness of 4 μm to 10 μm on the transparent conductive layer 202. The sum of the thicknesses of the first conductive channel 205 and the epitaxial layer 203 is equal to the thickness of the second conductive channel 207. That is, the upper surfaces of the first conductive channel 205 and the second conductive channel 207 are flush and at similar heights. The first conductive channel 205 and the second conductive channel 207 are both made of, for example, metal or alloy.

[0069] In step S50, an insulating layer is formed on the epitaxial layer; see Figure 3f For example, an insulating layer 204 is formed on the epitaxial layer 203 using a physical vapor deposition process. The insulating layer 204 covers the surface and side surfaces of the epitaxial layer 203 and the surface of the transparent conductive layer 202. Subsequently, a portion of the insulating layer 204 is etched away using photolithography and etching processes to expose the first conductive channel 205 and the second conductive channel 207. The insulating layer 204 may include, for example, alternately stacked silicon dioxide layers and titanium dioxide layers to form a DBR reflector.

[0070] In step S60, a first electrode and a second electrode are formed; see Figure 3g A first electrode 206 and a second electrode 208 are formed on the insulating layer 204 by an evaporation process. The first electrode 206 is electrically connected to the first conductive channel 205, and the second electrode 208 is electrically connected to the second conductive channel 207. The first electrode 206 and the second electrode 207 are both metals or alloys, for example, and have a thickness of 1 μm to 3 μm.

[0071] The present invention provides a light-emitting diode and a method for manufacturing the same. The light-emitting diode utilizes a flip-chip design with a transparent substrate, effectively preventing light absorption by the substrate and significantly improving light extraction efficiency. The epitaxial layers of the light-emitting diode include a first semiconductor layer, a light-emitting layer, and a second semiconductor layer. The second semiconductor layer includes a second current-spreading layer having a superlattice structure. This superlattice structure is formed by alternating stacks of gallium phosphide and aluminum phosphide layers, and employs a single-layer thickness gradient design. This effectively mitigates the lattice mismatch between the AlGaInP-based epitaxial layer and the gallium phosphide layer in the second current-spreading layer, and enhances the epitaxial layer's lateral current-spreading capability.

[0072] Furthermore, a transparent conductive layer is provided between the epitaxial layer and the transparent bonding layer. The transparent conductive layer not only does not affect the light emission, but also serves as a current expansion layer, greatly improving the current expansion capability so that the current is evenly distributed, thereby achieving the effect of increasing transmittance and brightening.

[0073] The manufacturing method of the embodiment of the present invention is simple and reliable, easy to implement, and can be used for large-scale production.

[0074] In the above description, the technical details of patterning and etching of each layer are not described in detail. However, those skilled in the art will understand that various technical means can be used to form layers, regions, etc. of desired shapes. In addition, those skilled in the art may also design methods that are not identical to the methods described above to form the same structure. In addition, although each embodiment is described separately above, this does not mean that the measures in each embodiment cannot be used in combination to advantage.

[0075] In addition, it is understood that although the present invention has been disclosed above with reference to preferred embodiments, the above embodiments are not intended to limit the present invention. For any person skilled in the art, without departing from the scope of the technical solution of the present invention, the technical content disclosed above can be used to make many possible changes and modifications to the technical solution of the present invention, or to modify it into an equivalent embodiment with equivalent changes. Therefore, any simple modification, equivalent change, and modification made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention are still within the scope of protection of the technical solution of the present invention.

[0076] It should also be understood that the present invention is not limited to the specific methods, compounds, materials, manufacturing techniques, uses, and applications described herein, which may vary. It should also be understood that the terminology described herein is used only to describe specific embodiments and is not intended to limit the scope of the present invention. It should be noted that the singular forms "a," "an," and "the," as used herein and in the appended claims, include plural referents unless the context clearly indicates otherwise. Thus, for example, a reference to "a step" means a reference to one or more steps, and may include subsequent steps. All conjunctions used should be interpreted in their broadest sense. Thus, the word "or" should be understood to have the definition of a logical "or," not a logical "exclusive or," unless the context clearly indicates otherwise. Structures described herein are to be understood to also refer to functional equivalents of such structures. Language that could be interpreted as approximating should be so interpreted unless the context clearly indicates otherwise.

Claims

1. A light emitting diode, characterized in that: include: transparent substrate; a transparent bonding layer, located on the transparent substrate; a transparent conductive layer, located on the transparent bonding layer; an epitaxial layer located on the transparent conductive layer, the epitaxial layer comprising a second semiconductor layer, a light-emitting layer, and a first semiconductor layer stacked sequentially from bottom to top, the epitaxial layer covering a portion of the transparent conductive layer so that at least a portion of the surface of the transparent conductive layer is exposed; The second semiconductor layer at least includes a second confinement layer and a second current spreading layer, the second current spreading layer is located between the second confinement layer and the transparent conductive layer, and the second current spreading layer is a superlattice structure; a transition layer is further provided between the second confinement layer and the second current spreading layer; The light emitting diode further comprises: an insulating layer, wherein the insulating layer covers the surface and sidewalls of the epitaxial layer; a first conducting channel, located on the epitaxial layer, penetrating the insulating layer and electrically connected to the first semiconductor layer; a first electrode, located on the insulating layer and electrically connected to the first conducting channel; a second conducting channel, located on the transparent conductive layer, penetrating the insulating layer and electrically connected to the transparent conductive layer; a second electrode, located on the insulating layer and electrically connected to the second conducting channel; The second current spreading layer includes alternately stacked gallium phosphide layers and aluminum phosphide layers. Along a direction perpendicular to the first semiconductor layer and pointing toward the second semiconductor layer, the thickness of the gallium phosphide layer gradually increases, and the thickness of the aluminum phosphide layer gradually decreases.

2. The light emitting diode according to claim 1, characterized in that The period of the alternately stacked gallium phosphide layers and aluminum phosphide layers ranges from 10 to 20.

3. The light emitting diode according to claim 1, characterized in that The thickness of the second current spreading layer is in the range of 200 nm to 2 μm, wherein the thickness of the gallium phosphide layer is in the range of 10 nm to 50 nm, and the thickness of the aluminum phosphide layer is in the range of 10 nm to 50 nm.

4. The light emitting diode according to claim 1, characterized in that The first semiconductor layer includes a first confinement layer, a first current spreading layer and a first ohmic contact layer which are sequentially arranged from bottom to top.

5. The light emitting diode according to claim 1, characterized in that The material of the transition layer is (Al a Ga 1-a ) b In 1-b P, wherein a ranges from 0 to 1, b ranges from 0.2 to 0.5, and the value of b gradually decreases in a direction perpendicular to the transparent substrate and from the first semiconductor layer to the second semiconductor layer.

6. The light emitting diode according to claim 1, characterized in that The transparent conductive layer is adjacent to the gallium phosphide layer at one end of the second current spreading layer, and the transition layer is adjacent to the aluminum phosphide layer at the other end of the second current spreading layer.

7. The light emitting diode according to claim 1, characterized in that The light-emitting layer includes a second space layer, an active layer and a first space layer which are sequentially arranged from bottom to top.

8. The light emitting diode according to claim 1, characterized in that The doping type of the first semiconductor layer is N-type, and the doping type of the second semiconductor layer is P-type.

9. The light emitting diode according to claim 1, characterized in that The insulating layer is a DBR reflector, which includes alternately stacked silicon oxide layers and titanium oxide layers.

10. A method for manufacturing a light emitting diode, characterized in that: include: Performing epitaxial growth on a growth substrate to form an epitaxial layer, wherein the epitaxial layer includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer sequentially arranged from bottom to top; forming a transparent conductive layer on the epitaxial layer, and bonding the transparent conductive layer to the transparent substrate via a transparent bonding layer; removing the growth substrate, and etching the epitaxial layer to expose at least a portion of the surface of the transparent conductive layer; The second semiconductor layer at least includes a second confinement layer and a second current spreading layer, the second current spreading layer is located between the second confinement layer and the transparent conductive layer, and the second current spreading layer has a superlattice structure; Forming the second current spreading layer includes: Alternatingly stacked aluminum phosphide layers and gallium phosphide layers are formed on the second confinement layer. Along a direction perpendicular to the first semiconductor layer and pointing toward the second semiconductor layer, the thickness of the aluminum phosphide layer gradually decreases, and the thickness of the gallium phosphide layer gradually increases.

11. The manufacturing method according to claim 10, characterized in that: The period of the alternately stacked gallium phosphide layers and aluminum phosphide layers ranges from 10 to 20.

12. The manufacturing method according to claim 10, characterized in that: The thickness of the second current spreading layer is in the range of 200 nm to 2 μm, wherein the thickness of the gallium phosphide layer is in the range of 10 nm to 50 nm, and the thickness of the aluminum phosphide layer is in the range of 10 nm to 50 nm.

13. The manufacturing method according to claim 10, characterized in that Forming the first semiconductor layer includes: A first ohmic contact layer, a first current spreading layer and a first confinement layer are sequentially formed on the growth substrate.

14. The manufacturing method according to claim 10, characterized in that Forming the second semiconductor layer includes forming a transition layer on the second confinement layer, and forming the second current spreading layer on the transition layer.

15. The manufacturing method according to claim 14, characterized in that: The material of the transition layer is (Al a Ga 1-a ) b In 1-b P, wherein a ranges from 0 to 1, b ranges from 0.2 to 0.5, and the value of b gradually decreases in a direction perpendicular to the transparent substrate and from the first semiconductor layer to the second semiconductor layer.

16. The manufacturing method according to claim 14, characterized in that: The transparent conductive layer is adjacent to the gallium phosphide layer at one end of the second current spreading layer, and the transition layer is adjacent to the aluminum phosphide layer at the other end of the second current spreading layer.

17. The manufacturing method according to claim 10, characterized in that: Forming the light-emitting layer includes: A first space layer, an active layer and a second space layer are sequentially formed on the first semiconductor layer.

18. The manufacturing method according to claim 10, characterized in that: The doping type of the first semiconductor layer is N-type, and the doping type of the second semiconductor layer is P-type.

19. The manufacturing method according to claim 10, characterized in that: Also includes: A first conducting channel is formed on the epitaxial layer, and a second conducting channel is formed on the transparent conductive layer.

20. The manufacturing method according to claim 19, characterized in that An upper surface of the second conducting channel is flush with an upper surface of the first conducting channel.

21. The manufacturing method according to claim 19, characterized in that Also includes: An insulating layer is formed, where the insulating layer covers the surface and sidewall of the epitaxial layer and the surface of the transparent conductive layer, and exposes surfaces of the first conducting channel and the second conducting channel.

22. The manufacturing method according to claim 21, characterized in that The insulating layer is a DBR reflector, and forming the DBR reflector includes forming silicon dioxide layers and titanium dioxide layers that are alternately stacked.

23. The manufacturing method according to claim 21, characterized in that Also includes: A first electrode and a second electrode are formed on the insulating layer, wherein the first electrode is electrically connected to the first semiconductor layer through a first conductive channel penetrating the insulating layer, and the second electrode is electrically connected to the transparent conductive layer through a second conductive channel penetrating the insulating layer.

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