Method, apparatus, and processor for transmitting audio data using an SPI interface

Abstract

The present application relates to a method, device, processor, storage medium, and computer program product for transmitting audio data using an SPI interface. Applied to a processor, the processor is provided with a monitoring interface and an SPI interface, and the SPI interface is connected to the I2S interface of an external audio device. When the processor is powered on and starts up, the working mode of the monitoring interface is configured as the monitoring mode; according to preset configuration parameters, the SPI interface and the I2S interface are configured to be synchronized based on the clock signal provided by the I2S interface; the clock signal generated by the external audio device is monitored through the monitoring interface in the processor. When the clock signal is a preset level signal, the SPI interface in the processor reads and writes audio data, and the processor and the external audio device are synchronized in timing. Compared with the current method of reading audio data through analog signals, the situation of data misalignment is reduced, the accuracy of audio data is guaranteed, and the generation of noise is reduced.

Description

Technical Field

[0001] This application relates to the technical field of smart home, and particularly to a method, device, processor, storage medium, and program product for transmitting audio data using an SPI interface. Background Art

[0002] With the development of artificial intelligence technology, there are more and more scenarios for voice acquisition requirements. Therefore, requirements are put forward for the voice acquisition ability of the MCU (Microcontroller Unit). Usually, the requirements for audio acquisition are completed by the MCU with an audio interface. Many MCU manufacturers without an audio interface also hope to complete two-way communication with the audio interface by matching the characteristics of the audio interface, thereby expanding the application fields of their chips.

[0003] At present, chip manufacturers and industry developers without an audio interface have proposed some solutions, mainly designed based on the hardware resources of the processors of their own chips, applying the pulse counting function and multiple timer resources of their own chips, and there are also some methods that simulate the characteristics of the audio interface by using the peripheral devices of the chips. The audio signals obtained by these current methods have large deviations, resulting in distorted voices or more noise in the obtained voices. Summary of the Invention

[0004] Based on this, in view of the above technical problems, it is necessary to provide a method, device, processor, storage medium, and program product for transmitting audio data using an SPI interface that can improve the accuracy of audio data transmission.

[0005] In a first aspect, this application provides a method for transmitting audio data using an SPI interface applied to a processor. The processor is provided with a GPIO (General-purpose input / output) interface and an SPI (Serial Peripheral Interface) interface, and the SPI interface is connected to the I2S interface of an external audio device. The method includes:

[0006] Power on and start, and configure the working mode of the monitoring interface as the monitoring mode;

[0007] According to preset configuration parameters, configure the SPI interface and the I2S interface to be synchronized based on the clock signal provided by the I2S interface;

[0008] When the monitoring interface monitors the clock signal generated by the I2S interface, identify the clock signal;

[0009] If the clock signal is a preset start level signal, the SPI interface receives the audio data sent by the external audio device.

[0010] In one embodiment, the preset configuration parameter is the configuration parameter in the left alignment mode, the working mode of the processor is the Slave mode, and the working mode of the external audio device is the Master mode.

[0011] In one embodiment, the method further includes: if the clock signal is a preset ready level signal, setting the SPI interface to a ready working state.

[0012] In one embodiment, the preset start level signal is a low level.

[0013] In one embodiment, the processor is provided with an audio buffer; if the clock signal is a preset start level signal, the audio data sent by the external audio device received by the SPI interface includes: if the clock signal is a preset start level signal, the read queue of the SPI interface reads the audio data sent by the external audio device and writes the audio data into the audio buffer; it further includes: if the clock signal is a preset start level signal, the write queue of the SPI interface writes the audio output data in the audio buffer into the I2S interface.

[0014] In one embodiment, the processor is provided with a DMA controller, and the DMA controller is associated with the audio buffer and the SPI interface; if the clock signal is a preset start level signal, the read queue of the SPI interface reads the audio data sent by the external audio device and writes the audio data into the audio buffer includes: if the clock signal is a preset start level signal, controlling the DMA controller to trigger a read interrupt thread; executing the read interrupt thread to read the audio data sent by the external audio device and write the audio data into the audio buffer; if the clock signal is a preset start level signal, the write queue of the SPI interface writes the audio output data in the audio buffer into the I2S interface includes: if the clock signal is a preset start level signal, controlling the DMA controller to trigger a write interrupt thread; executing the write interrupt thread to read the audio output data in the audio buffer and write the audio output data into the I2S interface.

[0015] In a second aspect, the present application further provides a device for transmitting audio data using an SPI interface applied to a processor. The processor is provided with a monitoring interface and an SPI interface, and the SPI interface is connected to the I2S interface of the external audio device. The device includes:

[0016] A configuration module, configured to power on and start, and configure the working mode of the monitoring interface as the monitoring mode;

[0017] A synchronization module, configured to synchronize the SPI interface and the I2S interface based on the clock signal provided by the I2S interface according to the preset configuration parameter;

[0018] A monitoring module, configured to identify a clock signal when the monitoring interface detects a clock signal generated by an I2S interface;

[0019] A transmission module, configured to receive audio data sent by an external audio device through an SPI interface if the clock signal is a preset start level signal.

[0020] Thirdly, the present application further provides a processor, which is provided with a monitoring interface and an SPI interface, and the SPI interface is connected to the I2S interface of an external audio device. When the processor executes the computer program, the following steps are implemented:

[0021] Power on and start up, and configure the working mode of the monitoring interface as the monitoring mode;

[0022] According to preset configuration parameters, configure the SPI interface and the I2S interface to be synchronized based on the clock signal provided by the I2S interface;

[0023] When the monitoring interface detects a clock signal generated by the I2S interface, identify the clock signal;

[0024] If the clock signal is a preset start level signal, receive audio data sent by an external audio device through the SPI interface.

[0025] Fourthly, the present application further provides a computer-readable storage medium. On the computer-readable storage medium, a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

[0026] Power on and start up, and configure the working mode of the monitoring interface as the monitoring mode;

[0027] According to preset configuration parameters, configure the SPI interface and the I2S interface to be synchronized based on the clock signal provided by the I2S interface;

[0028] When the monitoring interface detects a clock signal generated by the I2S interface, identify the clock signal;

[0029] If the clock signal is a preset start level signal, receive audio data sent by an external audio device through the SPI interface.

[0030] Fifthly, the present application further provides a computer program product. The computer program product includes a computer program, and when the computer program is executed by a processor, the following steps are implemented:

[0031] Power on and start up, and configure the working mode of the monitoring interface as the monitoring mode;

[0032] According to preset configuration parameters, configure the SPI interface and the I2S interface to be synchronized based on the clock signal provided by the I2S interface;

[0033] When the monitoring interface monitors the clock signal generated by the I2S interface, identify the clock signal;

[0034] If the clock signal is a preset start level signal, the SPI interface receives the audio data sent by the external audio device.

[0035] The above method, device, processor, storage medium, and computer program product for transmitting audio data using the SPI interface are applied to a processor. The processor is provided with a monitoring interface and an SPI interface. The SPI interface is connected to the I2S interface of the external audio device. The processor is powered on and started, and the working mode of the monitoring interface is configured as the monitoring mode; according to the preset configuration parameters, the SPI interface and the I2S interface are configured to be synchronized based on the clock signal provided by the I2S interface; when the monitoring interface monitors the clock signal generated by the I2S interface, identify the clock signal; if the clock signal is a preset start level signal, the SPI interface receives the audio data sent by the external audio device. The entire solution monitors the clock signal generated by the external audio device through the monitoring interface in the processor. When the clock signal is a preset level signal, the SPI interface in the processor reads and writes the audio data. The processor and the external audio device are synchronized in timing. Compared with the current method of reading audio data through analog signals, the situation of data misalignment is reduced, the accuracy of the audio data is guaranteed, and the generation of noise is reduced. Description of the Drawings

[0036] Figure 1 It is an application environment diagram of the method for transmitting audio data using the SPI interface in an embodiment;

[0037] Figure 2 It is a flowchart of the method for transmitting audio data using the SPI interface in an embodiment;

[0038] Figure 3 It is a flowchart of the method for transmitting audio data using the SPI interface in another embodiment;

[0039] Figure 4 It is a flowchart of the method for transmitting audio data using the SPI interface in yet another embodiment;

[0040] Figure 5 It is a signal timing diagram of the SPI interface in an embodiment;

[0041] Figure 6 It is a structural block diagram of the device for transmitting audio data using the SPI interface in an embodiment;

[0042] Figure 7 It is an internal structure diagram of the processor in an embodiment. Detailed Embodiments

[0043] In order to make the objectives, technical solutions and advantages of the present application more clear and understandable, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0044] The method for transmitting audio data using the SPI interface provided by the embodiment of the present application can be applied to an application environment as Figure 1 shown. Among them, the processor 102 communicates with an external audio device 104 through a data line. The processor 102 is provided with a monitoring interface and an SPI (Serial Peripheral Interface) interface. The SPI interface is connected to the I2S (Inter-IC Sound) interface of the external audio device. The CS (Chip Select) / CLK (Clock) / MOSI (Master Output / Slave Input) / MISO (Master Input / Slave Output) pins of the SPI interface of the processor are respectively connected to the LRCK (Left and right channel clock) / BCLK (Bitclock) / ASDOUT (Serial Data OUT) / ASDIN (Serial Data IN) pins of the I2S interface of the external audio device. Among them, the processor 102 can be a processor that is provided with an SPI interface but does not have an I2S interface. For example, the processor can be an MCU (Microcontroller Unit), an SOC (System on Chip), etc. The present application does not make any limitations here.

[0045] In one embodiment, as Figure 2 shown, a method for transmitting audio data using the SPI interface applied to a processor is provided. Taking the method applied to the Figure 1 processor as an example, the method includes the following steps:

[0046] Step 202: Power on and start, and configure the working mode of the monitoring interface as the monitoring mode.

[0047] Among them, the monitoring interface is used to monitor the change of the LRCK level of the I2S interface. It can be a GPIO interface or other monitoring interfaces. The embodiments of the present application do not make any limitations here.

[0048] Specifically, after the processor is powered on and starts up, it begins to configure the working mode of the monitoring interface, and configures the working mode of the monitoring interface as the monitoring mode, that is, to monitor the clock signal of I2S.

[0049] Step 204: According to the preset configuration parameters, configure the SPI interface and the I2S interface to be synchronized based on the clock signal provided by the I2S interface.

[0050] Among them, the preset configuration parameters are the clock polarity and the phase polarity. For the SPI interface, its working mode is mode 0. For the I2S interface, it is the left-aligned mode. The configurations of both the SPI interface and the I2S interface are completed by the processor.

[0051] Specifically, the processor obtains the preset configuration parameters common to the SPI interface and the I2S interface, and configures the SPI interface according to the values of the clock polarity and the phase polarity in the preset configuration parameters. The I2S interface in the audio device is also configured based on the same clock polarity and phase polarity, so that the SPI interface and the I2S interface are synchronized based on the same clock signal and phase signal.

[0052] Step 206: When the monitoring interface monitors the clock signal generated by the I2S interface, identify the clock signal.

[0053] Specifically, when the monitoring interface of the processor monitors the clock signal generated by the LRCK pin of the I2S interface, identify the clock signal.

[0054] Step 208: If the clock signal is the preset start level signal, the SPI interface receives the audio data sent by the external audio device.

[0055] Among them, the preset start level signal can be set to a low level because the CS chip select pin of the SPI interface of the processor is effective at a low level and works at a low level. The preset start level signal can also be set to a high level, which is set according to specific requirements and is not limited in this embodiment.

[0056] Specifically, if the monitoring interface of the processor identifies that the clock signal generated by the LRCK pin of the I2S interface is the same as the preset start level signal, the SPI interface receives the audio data sent by the external audio device. The SPI interface has a bidirectional communication function and can also write the audio output data that the processor needs to send into the I2S interface of the external audio device.

[0057] The method for transmitting audio data using the SPI interface is applied to a processor. The processor is provided with a monitoring interface and an SPI interface. The SPI interface is connected to the I2S interface of an external audio device. The processor is powered on and started, and the working mode of the monitoring interface is configured as the monitoring mode; according to the preset configuration parameters, the SPI interface and the I2S interface are configured to be synchronized based on the clock signal provided by the I2S interface; when the monitoring interface monitors the clock signal generated by the I2S interface, the clock signal is identified; if the clock signal is a preset start level signal, the SPI interface receives the audio data sent by the external audio device. Through the monitoring interface in the processor, the entire solution monitors the clock signal generated by the external audio device. When the clock signal is a preset level signal, the SPI interface in the processor reads and writes the audio data. The processor and the external audio device are synchronized in timing. Compared with the current method of reading audio data through analog signals, the situation of data misalignment is reduced, the accuracy of audio data is guaranteed, and the generation of noise is reduced.

[0058] In an optional embodiment, the preset configuration parameters are the configuration parameters in the left-aligned mode. The working mode of the processor is the Slave mode, and the working mode of the external audio device is the Master mode.

[0059] Specifically, the working mode of the processor is the Slave mode, the working mode of the external audio device is the Master mode, and the preset configuration parameters are that both the clock polarity and the phase polarity are 0.

[0060] When two I2S devices communicate, the party responsible for providing the clock (i.e., the BCLK signal) and the left and right channel signals (i.e., the LRCK signal) is called the Master, and the party that receives the clock signal and the left and right channel signals is called the Slave. Here, the clock and the left and right channel signals of the Master are implemented by the internal logic circuit of the chip according to the I2S timing. Ordinary MCUs do not have an I2S interface. Therefore, if acting as the Master, it will consume a lot of MCU resources. The idea of this application is to utilize the I2S interface of the audio device itself and make the I2S interface work in the Master mode.

[0061] Since the SPI interface has multiple working modes according to the polarity and phase of the data with respect to the clock, when the clock polarity of the SPI interface is 0 and the phase is 0, the signal form required for it to act as a Slave device is exactly the signal form output by the I2S as the Master in the left-aligned mode. Therefore, the data output on the I2S can be accurately received by the SPI interface.

[0062] In this embodiment, the I2S interface of the external audio device is completely consistent with the SPI interface of the processor in timing. Therefore, there is no delay between the pin signals during data transmission, and the data will not shift, improving the accuracy of audio data transmission.

[0063] In an optional embodiment, the method further includes: if the clock signal is a preset ready level signal, setting the SPI interface to a ready working state.

[0064] Wherein, the preset ready level signal can be set to a high level because the CS chip select pin of the SPI interface of the processor does not work at a high level. The preset ready level signal is set according to specific requirements and is not limited in this embodiment.

[0065] Specifically, if the monitoring interface of the processor recognizes that the clock signal generated by the LRCK pin of the I2S interface is the same as the preset ready level signal, the working state of the SPI interface is set to the ready working state. When the monitoring interface of the processor recognizes that the clock signal generated by the LRCK pin of the I2S interface is the same as the preset start level signal, the reading and writing of audio data with the external audio device are directly performed.

[0066] In this embodiment, by setting the SPI interface to the ready working state under the preset ready level signal, and then when the clock signal generated by the I2S changes from the preset ready level signal to the preset start level signal, the audio data generated by the external audio device is read and written, and the received data will not be misaligned, ensuring the correctness of the voice data, otherwise there will be noise.

[0067] In an optional embodiment, the preset start level signal is a low level.

[0068] When the clock signal is the preset start level signal, the SPI interface can also transmit the data that the processor needs to send to the I2S interface to achieve two-way communication.

[0069] In an optional embodiment, the processor is provided with an audio buffer; if the clock signal is the preset start level signal, the audio data sent by the external audio device received by the SPI interface includes: if the clock signal is the preset start level signal, the read queue of the SPI interface reads the audio data sent by the external audio device and writes the audio data into the audio buffer; it also includes: if the clock signal is the preset start level signal, the write queue of the SPI interface writes the audio output data in the audio buffer into the I2S interface.

[0070] Specifically, such as Figure 3As shown, after the processor is powered on, it configures the working mode of the GPIO as the monitoring mode, configures the clock polarity and phase polarity of the SPI interface as 0, which is consistent with the left-aligned mode of I2S. The I2S of the external audio device (i.e., the voice codec chip) is set to the Master mode, and the SPI is set to the Slave mode. The audio buffer is initialized and configured, that is, the read and write queues of the SPI interface are associated with the audio buffer. If the monitoring interface monitors that the LRCK signal of the I2S interface is a preset ready level signal (set to high level in this embodiment), the SPI interface is set to the ready working state. When the monitoring interface monitors that the LRCK signal of the I2S interface is a preset start level signal (set to low level in this embodiment), when the SPI interface generates an interrupt, the data to be read and written is processed through the FIFO read and write queues. When reading audio data is required, the read queue of the SPI interface reads the audio data on the SPI input data line, and the processor writes the audio data from the read queue into the audio buffer. When the processor needs to write the audio output data into the I2S interface, the processor writes the audio output data into the audio buffer, the write queue reads the audio output data from the audio buffer, and the logic circuit of the SPI automatically sends the data in the write queue to the SPI output data line, realizing the bidirectional communication of the SPI interface.

[0071] In an alternative embodiment, the processor is provided with a DMA controller; if the clock signal is a preset start level signal, the read queue of the SPI interface reads the audio data sent by the external audio device, and writing the audio data into the audio buffer includes: if the clock signal is a preset start level signal, controlling the DMA controller to trigger a read interrupt thread; executing the read interrupt thread to read the audio data sent by the external audio device and write the audio data into the audio buffer; if the clock signal is a preset start level signal, writing the audio output data in the audio buffer into the I2S interface by the write queue of the SPI interface includes: if the clock signal is a preset start level signal, controlling the DMA controller to trigger a write interrupt thread; executing the write interrupt thread to read the audio output data in the audio buffer and write the audio output data into the I2S interface.

[0072] Among them, the audio buffer includes an audio read buffer and an audio write buffer, and the DMA controller is associated with the audio buffer and the SPI interface during initialization.

[0073] Specifically, as Figure 4As shown, the processor can be provided with a DMA controller. The DMA controller is a peripheral of the processor. During initialization, the DMA controller and the processor are set to the memory-peripheral association mode. The DMA working mode is configured as the LLI (Link List Item) mode. And in the LLI mode, the buffers for receiving data are set as ping_r and pong_r, and the buffers for receiving data are set as ping_w and pong_w.

[0074] After the processor is powered on, the working mode of the GPIO is configured as the monitoring mode. The clock polarity and phase polarity of the SPI interface are configured as 0, which is consistent with the left-aligned mode of the I2S. The data bit length of the SPI interface is 16 bits, and the data bit length of the I2S is set to 16 bits. The I2S of the external audio device (i.e., the voice codec chip) is set to the Master mode, and the SPI is set to the Slave mode. The audio read buffer and the audio write buffer are initialized and configured.

[0075] As Figure 5 shown, if the monitoring interface monitors that the LRCK signal (i.e., the clock signal) of the I2S interface is a preset ready level signal (set as the high level in this embodiment), the SPI interface is set to the ready working state. If the clock signal is a preset start level signal (low level), the DMA controller is controlled to trigger the read interrupt thread; the processor executes the read interrupt thread, reads the audio data sent by the external audio device from the ping_r and pong_r buffers of the DMA, and the processor writes the audio data from the ping_r and pong_r buffers of the DMA into the audio read buffer. If the processor writes data into the audio write buffer, the DMA controller triggers the write interrupt thread. The ping_w and pong_w buffers of the DMA read the data to be written from the audio write buffer and transmit the data to be written to the I2S interface.

[0076] In this embodiment, the LLI mode of the DMA can ensure uninterrupted data transmission and improve the integrity of audio data transmission. In addition, the working principle of the DMA is to use hardware for data transmission. Therefore, it can save the resources of the MCU, eliminate the data operation of the FIFO queue of the SPI interface by the MCU when an interrupt occurs, and greatly improve the transmission efficiency of audio data.

[0077] To facilitate understanding of the technical solution provided by the embodiments of the present application, the method for transmitting audio data using the SPI interface provided by the embodiments of the present application is briefly described with a complete audio data acquisition process:

[0078] (1) Power on and start, and configure the working mode of the monitoring interface as the monitoring mode.

[0079] (2) Configure the SPI interface and the I2S interface to be synchronized based on the clock signal provided by the I2S interface according to the preset configuration parameters, where the preset configuration parameters are the common configuration parameters of the SPI interface and the I2S interface. The preset configuration parameters are the configuration parameters in the left-aligned mode, the working mode of the processor is the Slave mode, and the working mode of the external audio device is the Master mode.

[0080] (3) Set the DMA controller and the processor to the memory-peripheral association mode, configure the DMA working mode as the LLI (Link List Item) mode, and set the cache for receiving data as ping_r and pong_r, and set the cache for receiving data as ping_w and pong_w in the LLI mode.

[0081] (4) When the monitoring interface monitors the clock signal generated by the I2S interface, identify the clock signal.

[0082] (5) If the clock signal is the preset ready level signal (high level), set the SPI interface to the ready working state.

[0083] (6) If the clock signal is the preset start level signal (low level), control the DMA controller to trigger the read interrupt thread; execute the read interrupt thread to read the audio data sent by the external audio device and write the audio data into the audio buffer;

[0084] If the clock signal is the preset start level signal, control the DMA controller to trigger the write interrupt thread; execute the write interrupt thread to read the audio output data from the audio buffer and write the audio output data into the I2S interface.

[0085] It should be understood that although the steps in the flowcharts involved in the above-described embodiments are sequentially shown according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless there is a clear description in this article, the execution of these steps has no strict order limit, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-described embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be executed alternately or alternately with at least a part of other steps or steps or stages in other steps.

[0086] Based on the same inventive concept, an embodiment of the present application further provides a device for transmitting audio data using an SPI interface for implementing the method for transmitting audio data using an SPI interface involved above. The implementation solutions provided by this device for solving problems are similar to the implementation solutions described in the above method. Therefore, the specific limitations in one or more embodiments of the device for transmitting audio data using an SPI interface provided below can refer to the limitations on the method for transmitting audio data using an SPI interface in the above text, and will not be elaborated here.

[0087] In one embodiment, as Figure 6 shown, a device for transmitting audio data using an SPI interface is provided, including: a configuration module 602, a synchronization module 604, a monitoring module 606, and a transmission module 608, where:

[0088] The configuration module 602 is used to power on and start, and configure the working mode of the monitoring interface as the monitoring mode;

[0089] The synchronization module 604 is used to configure the SPI interface and the I2S interface to be synchronized based on the clock signal provided by the I2S interface according to preset configuration parameters;

[0090] The monitoring module 606 is used to identify the clock signal when the monitoring interface monitors the clock signal generated by the I2S interface;

[0091] The transmission module 608 is used to receive the audio data sent by an external audio device through the SPI interface if the clock signal is a preset start level signal.

[0092] In an optional embodiment, the preset configuration parameters are the configuration parameters in the left alignment mode, the working mode of the processor is the Slave mode, and the working mode of the external audio device is the Master mode.

[0093] In an optional embodiment, the monitoring module 606 is further used to set the SPI interface to the ready working state if the clock signal is a preset ready level signal.

[0094] In an optional embodiment, the preset start level signal is a low level.

[0095] In an optional embodiment, the processor is provided with an audio buffer; the transmission module 608 is further used to read the audio data sent by the external audio device through the read queue of the SPI interface and write the audio data into the audio buffer if the clock signal is a preset start level signal; and write the audio output data in the audio buffer into the I2S interface through the write queue of the SPI interface if the clock signal is a preset start level signal.

[0096] In one embodiment, the processor is provided with a DMA controller; the transmission module 608 is further configured to, if the clock signal is a preset start level signal, control the DMA controller to trigger a read interrupt thread; execute the read interrupt thread to read the audio data sent by the external audio device and write the audio data into the audio buffer; and if the clock signal is a preset start level signal, control the DMA controller to trigger a write interrupt thread; execute the write interrupt thread to read the audio output data in the audio buffer and write the audio output data into the I2S interface.

[0097] Each module in the above device for transmitting audio data using the SPI interface can be implemented in whole or in part by software, hardware, and their combination. The above modules can be embedded in the processor of the computer device in hardware form or be independent of it, or be stored in the memory of the computer device in software form, so that the processor can call and execute the operations corresponding to the above respective modules.

[0098] In one embodiment, a processor is provided. The computer device can be a terminal, and its internal structure diagram can be as Figure 7 shown. The processor is provided with a monitoring interface and an SPI interface, and the SPI interface is connected to the I2S interface of the external audio device. The processor is used to provide computing and control capabilities. The memory of the processor includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The communication interface of the processor is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be implemented through WIFI, a mobile cellular network, NFC (Near Field Communication), or other technologies. When the computer program is executed by the processor, it implements a method for transmitting audio data using the SPI interface.

[0099] Those skilled in the art can understand that Figure 7 the structure shown in

[0100] is only a block diagram of some structures related to the solution of this application, and does not constitute a limitation on the computer device to which the solution of this application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine some components, or have a different component layout.

[0100] In one embodiment, a processor is provided. The processor is provided with a monitoring interface and an SPI interface, and the SPI interface is connected to the I2S interface of the external audio device. A computer program is stored in the memory. When the processor executes the computer program, the following steps are implemented:

[0101] Power on and start up, and configure the working mode of the monitoring interface as the monitoring mode;

[0102] Configure the SPI interface and the I2S interface to be synchronized based on the clock signal provided by the I2S interface according to preset configuration parameters;

[0103] When the monitoring interface detects the clock signal generated by the I2S interface, identify the clock signal;

[0104] If the clock signal is a preset start level signal, the SPI interface receives audio data sent by an external audio device.

[0105] In one embodiment, when the processor executes a computer program, the following steps are further implemented: the preset configuration parameters are the configuration parameters in the left-aligned mode, the working mode of the processor is the Slave mode, and the working mode of the external audio device is the Master mode.

[0106] In one embodiment, when the processor executes a computer program, the following steps are further implemented: if the clock signal is a preset ready level signal, set the SPI interface to the ready working state.

[0107] In one embodiment, when the processor executes a computer program, the following steps are further implemented: the preset start level signal is a low level.

[0108] In one embodiment, when the processor executes a computer program, the following steps are further implemented: the processor is provided with an audio buffer; if the clock signal is a preset start level signal, the audio data sent by the external audio device received by the SPI interface includes: if the clock signal is a preset start level signal, the read queue of the SPI interface reads the audio data sent by the external audio device and writes the audio data into the audio buffer; it also includes: if the clock signal is a preset start level signal, the write queue of the SPI interface writes the audio output data in the audio buffer into the I2S interface.

[0109] In one embodiment, when the processor executes a computer program, the following steps are further implemented: the processor is provided with a DMA controller; if the clock signal is a preset start level signal, the read queue of the SPI interface reads the audio data sent by the external audio device and writes the audio data into the audio buffer includes: if the clock signal is a preset start level signal, control the DMA controller to trigger a read interrupt thread; execute the read interrupt thread to read the audio data sent by the external audio device and write the audio data into the audio buffer; if the clock signal is a preset start level signal, the write queue of the SPI interface writes the audio output data in the audio buffer into the I2S interface includes: if the clock signal is a preset start level signal, control the DMA controller to trigger a write interrupt thread; execute the write interrupt thread to read the audio output data in the audio buffer and write the audio output data into the I2S interface.

[0110] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps in the above method embodiments are implemented.

[0111] In one embodiment, a computer program product is provided, including a computer program. When the computer program is executed by a processor, the steps in the above method embodiments are implemented.

[0112] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties.

[0113] Those of ordinary skill in the art can understand that all or part of the processes of implementing the above method embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the above method embodiments. Among them, any reference to a memory, database, or other medium used in the embodiments provided in this application can include at least one of non-volatile and volatile memories. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc. The databases involved in the embodiments provided in this application can include at least one of relational databases and non-relational databases. Non-relational databases can include distributed databases based on blockchain, etc., without limitation. The processors involved in the embodiments provided in this application can be general-purpose processors, central processors, graphics processors, digital signal processors, programmable logic devices, data processing logics based on quantum computing, etc., without limitation.

[0114] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this specification.

[0115] The above-described embodiments merely represent several implementation manners of the present application. The description thereof is relatively specific and detailed, but it should not be construed as a limitation to the patent scope of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the appended claims.

Claims

1. A method for transmitting audio data using an SPI interface in an application to a processor, characterized in that, The processor is provided with a monitoring interface and an SPI interface. The chip select, clock signal, host output slave input, and host input slave output pins of the SPI interface are respectively connected to the left and right channel clocks, bit clock, serial data output, and serial data input pins of the I2S interface of an external audio device. The audio data acquisition method includes: Power on and start, and configure the working mode of the monitoring interface as the monitoring mode. According to preset configuration parameters, configure the SPI interface to be synchronized with the I2S interface based on the clock signal provided by the I2S interface; the preset configuration parameters are the configuration parameters in the left alignment mode, the working mode of the processor is the Slave mode, and the working mode of the external audio device is the Master mode. When the monitoring interface monitors the clock signal generated by the I2S interface, identify the clock signal. If the clock signal is a preset start level signal, the SPI interface receives the audio data sent by the external audio device.

2. The method according to claim 1, wherein The method further includes: If the clock signal is a preset ready level signal, set the SPI interface to the ready working state.

3. The method according to claim 1, wherein The preset start level signal is a low level.

4. The method according to claim 1, characterized in that, The processor is provided with an audio buffer. The audio data sent by the external audio device received by the SPI interface when the clock signal is a preset start level signal includes: If the clock signal is a preset start level signal, the read queue of the SPI interface reads the audio data sent by the external audio device and writes the audio data into the audio buffer. It further includes: If the clock signal is a preset start level signal, the write queue of the SPI interface writes the audio output data in the audio buffer into the I2S interface.

5. The method according to claim 4, wherein The processor is provided with a DMA controller, and the DMA controller is associated with the audio buffer and the SPI interface. The step that if the clock signal is a preset start level signal, the read queue of the SPI interface reads the audio data sent by the external audio device and writes the audio data into the audio buffer includes: If the clock signal is a preset start level signal, control the DMA controller to trigger a read interrupt thread. Execute the read interrupt thread to read the audio data sent by the external audio device and write the audio data into the audio buffer. The step that if the clock signal is a preset start level signal, the write queue of the SPI interface writes the audio output data in the audio buffer into the I2S interface includes: If the clock signal is a preset start level signal, control the DMA controller to trigger a write interrupt thread. Execute the write interrupt thread to read the audio output data in the audio buffer and write the audio output data into the I2S interface.

6. An apparatus for transmitting audio data using an SPI interface and applied to a processor, characterized in that The processor is provided with a monitoring interface and an SPI interface. The chip select, clock signal, host output slave input, and host input slave output pins of the SPI interface are respectively connected to the left and right channel clocks, bit clock, serial data output, and serial data input pins of the I2S interface of an external audio device. The audio data acquisition device includes: a configuration module, configured to power on and start up, and configure the working mode of the monitoring interface as a monitoring mode; a synchronization module, configured to configure the SPI interface and the I2S interface to be synchronized based on the clock signal provided by the I2S interface according to preset configuration parameters; the preset configuration parameters are configuration parameters in a left-aligned mode, the working mode of the processor is a Slave mode, and the working mode of the external audio device is a Master mode; a monitoring module, configured to identify the clock signal when the monitoring interface monitors the clock signal generated by the I2S interface; a transmission module, configured to, if the clock signal is a preset start level signal, receive the audio data sent by the external audio device through the SPI interface.

7. The device according to claim 6, characterized in that, The processor is provided with an audio buffer; the transmission module is configured to: if the clock signal is a preset start level signal, read the audio data sent by the external audio device through the read queue of the SPI interface, and write the audio data into the audio buffer; The transmission module is further configured to: if the clock signal is a preset start level signal, write the audio output data in the audio buffer into the I2S interface through the write queue of the SPI interface.

8. A processor, characterized in that, The processor is provided with a monitoring interface and an SPI interface, and the SPI interface is connected to the I2S interface of an external audio device; when the processor executes a computer program, it implements the steps of the method according to any one of claims 1 to 5.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the method according to any one of claims 1 to 5.

10. A computer program product comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the steps of the method according to any one of claims 1 to 5.

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