Apparatus and method for encoding video data

Abstract

A method of decoding a bitstream by an electronic device is provided. An image frame of the bitstream is received, and a block unit having a block width and a block height is determined from the received image frame. The electronic device determines whether a geometric partitioning mode is disabled for the block unit based on a comparison between the block width and the block height. When the geometric partitioning mode is applied for the block unit, the block unit is divided to generate a plurality of sub-blocks predicted by different merge candidates of the block unit. When the geometric partitioning mode is disabled for the block unit, the block unit is predicted to generate a predicted block based on a prediction mode different from the geometric partitioning mode. The block unit is reconstructed based on the predicted block.

Description

[0001] Cross-reference to related applications

[0002] This disclosure claims the benefit and priority of provisional U.S. patent application No. 62 / 955228, filed on December 30, 2019, entitled “Adjustment of Partition Candidates for Geometric Partition Prediction” (hereinafter referred to as “'228 Provisional Case”). The disclosure of '228 Provisional Case is hereby incorporated herein by reference in its entirety. Technical Field

[0003] This disclosure relates generally to video coding, and more specifically to a technique for determining whether to predict block cells using a geometric segmentation pattern based on the ratio between the width and height of block cells in an image frame. Background Technology

[0004] Geometric segmentation mode is an encoding tool in video coding methods. In geometric segmentation mode, the encoder selects two of a plurality of merging candidates to predict block units in an image frame and provides the two merging indices to the bitstream for the decoder to identify the selected merging candidates.

[0005] When a geometric segmentation pattern is applied to a block unit, the encoder and decoder can segment the block unit in an image frame along the segmentation line to generate multiple sub-blocks. Some of the sub-blocks can be predicted based on only one of the two merging candidates, and others can be predicted based on both of the two merging candidates. Therefore, when the encoder attempts to include multiple prediction patterns that incorporate the geometric segmentation pattern for predicting the block unit, the encoder needs to select the predicted block unit from multiple candidate results that include the geometric results.

[0006] However, for the encoder, predicting block units in a geometric segmentation mode to generate a geometric result by selecting a segmentation line from multiple candidate lines and two merge candidates from multiple merge candidates is too complex. Therefore, to reduce the complexity of the encoding process, it may be important for the encoder to restrict the use of geometric segmentation modes for predicting block units. The decoder also needs to know how to determine when a geometric segmentation mode is disabled. Summary of the Invention

[0007] This disclosure relates to an apparatus and method for determining whether to apply the geometric segmentation pattern to a block cell based on a comparison between the width and height of the block cell.

[0008] In a first aspect of this disclosure, a method for decoding a bitstream and an electronic device for performing the method are provided. The method includes: receiving image frames of the bitstream; determining block units having block widths and block heights from the received image frames; determining, based on a comparison between the block widths and the block heights, whether a geometric segmentation mode is disabled for the block unit, wherein, when the geometric segmentation mode is applied to the block unit, the block unit is divided to generate multiple sub-blocks predicted by different merge candidates of the block unit; when the geometric segmentation mode is disabled for the block unit, generating a prediction block by predicting the block unit based on a prediction mode different from the geometric segmentation mode; and reconstructing the block unit based on the prediction block.

[0009] In a second aspect of this disclosure, a method for decoding a bitstream and an electronic device for performing the method are provided. The method includes: receiving an image frame of the bitstream; determining block units having a block width and a block height from the received image frame; determining a comparison between the block width and the block height; when the comparison indicates that the ratio between the block width and the block height is greater than or equal to a threshold, predicting the block units to generate prediction blocks based on a first prediction mode different from a geometric segmentation mode, wherein, when the geometric segmentation mode is applied to the block units, the block units are divided to generate multiple sub-blocks predicted by different merging candidates of the block units; and reconstructing the block units based on the prediction blocks. Attached Figure Description

[0010] The various aspects of this disclosure can be best understood from the following detailed disclosure and corresponding drawings. The different features are not drawn to scale, and for clarity of discussion, the sizes of the various features may be arbitrarily increased or decreased.

[0011] Figure 1 A block diagram of a system configured to encode and decode video data according to an exemplary embodiment of the present disclosure is shown.

[0012] Figure 2 Exemplary embodiments according to this disclosure are shown in Figure 1 The block diagram of the decoder module of the second electronic device is shown in the figure.

[0013] Figure 3 A flowchart is shown of a method for encoding and decoding video data via an electronic device according to an exemplary embodiment of the present disclosure.

[0014] Figures 4A to 4C This is a schematic diagram of block units with different block sizes according to an exemplary embodiment of the present disclosure.

[0015] Figure 5A and Figure 5B This is a schematic diagram of a block unit having different sub-blocks separated by a dividing line, according to an exemplary embodiment of the present disclosure.

[0016] Figure 6 Exemplary embodiments according to this disclosure are shown in Figure 1 The diagram shows a block diagram of the encoder module of the first electronic device. Detailed Implementation

[0017] The following disclosure includes specific information relating to exemplary embodiments in this disclosure. The accompanying drawings and corresponding detailed disclosure are directed to exemplary embodiments. However, this disclosure is not limited to these exemplary embodiments. Other variations and embodiments of this disclosure will occur to those skilled in the art.

[0018] Unless otherwise specified, the same or corresponding elements in the accompanying drawings may be indicated by the same or corresponding reference numerals. The drawings and descriptions are generally not drawn to scale and are not intended to correspond to actual relative dimensions.

[0019] For the purposes of consistency and ease of understanding, similar features are identified by reference numerals in the exemplary drawings (but are not shown in some examples). However, features in different embodiments may differ in other respects and should not be narrowly limited to what is shown in the drawings.

[0020] The phrases “in one embodiment” or “in some embodiments” as used in this disclosure may each refer to one or more of the same or different embodiments. The term “coupled” is defined as a connection, whether direct or indirect through intermediate components, and is not necessarily limited to a physical connection. The term “comprising” means “including but not limited to”; it specifically indicates open inclusion or membership in combinations, groups, series, and equivalents so described.

[0021] For purposes of explanation and non-restriction, specific details such as functional entities, technologies, protocols, and standards are described to provide an understanding of the disclosed technologies. In other examples, detailed disclosures of well-known methods, technologies, systems, and architectures are omitted to avoid making the disclosure unclear due to unnecessary details.

[0022] Those skilled in the art will readily recognize that any coded functionality or algorithm described in this disclosure can be implemented by hardware, software, or a combination of both. The described functionality may correspond to modules, which are software, hardware, firmware, or any combination thereof.

[0023] Software implementations may include programs having computer-executable instructions stored on a computer-readable medium such as memory or other types of storage devices. For example, one or more microprocessors or general-purpose computers with communication processing capabilities may be programmed using the executable instructions to perform the described functions or algorithms.

[0024] These microprocessors or general-purpose computers may be formed using application-specific integrated circuits (ASICs), programmable logic arrays, and / or one or more digital signal processors (DSPs). While some of the disclosed embodiments are directed to software installed and executed on computer hardware, alternative embodiments, implemented as firmware or hardware or a combination of hardware and software, are also fully within the scope of this disclosure. Computer-readable media include, but are not limited to, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory, compact disc read-only memory (CD-ROM), magnetic tape, magnetic tape, disk storage, or any other equivalent medium capable of storing computer-readable instructions.

[0025] Figure 1 A block diagram of a system configured to encode and decode video data according to an exemplary embodiment of the present disclosure is shown. System 100 includes a first electronic device 110, a second electronic device 120, and a communication medium 130.

[0026] The first electronic device 110 may be a source device, including any device configured to encode video data and transmit the encoded video data to the communication medium 130. The second electronic device 120 may be a destination device, including any device configured to receive and decode the encoded video data via the communication medium 130.

[0027] In at least one embodiment, the first electronic device 110 can communicate with the second electronic device 120 via a communication medium 130, either wired or wirelessly. The first electronic device 110 may include a source module 112, an encoder module 114, and a first interface 116. The second electronic device 120 may include a display module 122, a decoder module 124, and a second interface 126. The first electronic device 110 may be a video encoder, and the second electronic device 120 may be a video decoder.

[0028] In at least one embodiment, the first electronic device 110 and / or the second electronic device 120 may be a mobile phone, tablet computer, desktop computer, laptop or other electronic device. Figure 1 An example of a first electronic device 110 and a second electronic device 120 is shown. The first electronic device 110 and the second electronic device 120 may include more or fewer components than shown, or different configurations of the components shown in the various illustrations.

[0029] In at least one embodiment, source module 112 may include a video capture device for capturing new video, a video archive for storing previously captured video, and / or a video feed interface for receiving video from a video content provider. Source module 112 may generate computer graphics-based data as source video, or generate a combination of real-time video, archived video, and computer-generated video as source video. The video capture device may be a charge-coupled device (CCD) image sensor, a complementary metal-oxide-semiconductor (CMOS) image sensor, or a camera.

[0030] In at least one embodiment, encoder module 114 and decoder module 124 may each be implemented as any of a variety of suitable encoder / decoder circuits, such as one or more microprocessors, central processing units (CPUs), graphics processing units (GPUs), systems-on-chips (SoCs), digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware, or any combination thereof. When implemented in part in software, the device may store a program having instructions for software in a suitable non-transitory computer-readable medium and use one or more processors to execute the instructions in the hardware to perform the disclosed methods. In at least one embodiment, each of encoder module 114 and decoder module 124 may be included in one or more encoders or decoders, either of which may be integrated as part of a combined encoder / decoder (CODEC) in the device.

[0031] In at least one embodiment, the first interface 116 and the second interface 126 may utilize custom protocols or comply with existing or de facto standards, including but not limited to Ethernet, IEEE 802.11 or IEEE 802.15 series, wireless USB, or telecommunications standards, including but not limited to Global System for Mobile Communication (GSM), Code Division Multiple Access 2000 (CDMA), Time Division Synchronous Code Division Multiple Access (TD-SCDMA), Worldwide Interoperability for Microwave Access (WiMAX), Third Generation Partnership Project Long-Term Evolution (3GPP-LTE), or Time-Division LTE (TD-LTE). In at least one embodiment, the first interface 116 and the second interface 126 may each include any device configured to transmit and / or store compatible video bitstreams via communication medium 130 and receive compatible video bitstreams via communication medium 130.

[0032] In at least one embodiment, the first interface 116 and the second interface 126 may include a computer system interface that enables compatible video bitstreams to be stored on or received from a storage device.

[0033] For example, the first interface 116 and the second interface 126 may include chipsets that support Peripheral Component Interconnect (PCI) and Peripheral Component Interconnect Express (PCIe) bus protocols, proprietary bus protocols, Universal Serial Bus (USB) protocols, I2C, or any other logical and physical architecture that can be used to interconnect peer devices.

[0034] In at least one embodiment, the display module 122 may include a display using liquid crystal display (LCD), plasma display, organic light-emitting diode (OLED), or light-emitting polymer display (LPD) technology, as well as other display technologies used in other embodiments. The display module 122 may include a high-definition display or an ultra-high-definition display.

[0035] Figure 2 Exemplary embodiments according to this disclosure are shown in Figure 1 The block diagram shown is of the decoder module 124 of the second electronic device 120. The decoder module 124 includes an entropy decoder (e.g., entropy decoding unit 2241), a prediction processor (e.g., prediction processing unit 2242), an inverse quantization / inverse transform processor (e.g., inverse quantization / inverse transform unit 2243), a summer (e.g., summer 2244), a filter (e.g., filter unit 2245), and a decoded image buffer (e.g., decoded image buffer 2246). The prediction processing unit 2242 further includes an intra-frame prediction processor (e.g., intra-frame prediction unit 22421) and an inter-frame prediction processor (e.g., inter-frame prediction unit 22422). The decoder module 124 receives a bitstream and decodes the bitstream to output decoded video.

[0036] Entropy decoding unit 2241 can be derived from Figure 1 The second interface 126 receives a bitstream including multiple syntax elements and performs a parsing operation on the bitstream to extract the syntax elements. As part of the parsing operation, the entropy decoding unit 2241 can entropy decode the bitstream to generate quantized transform coefficients, quantization parameters, transform data, motion vectors, intra-frame modes, segmentation information, and other syntax information.

[0037] In at least one embodiment, the entropy decoding unit 2241 may perform Context Adaptive Variable Length Coding (CAVLC), Context Adaptive Vinary Arithmetic Coding (CABAC), Syntax-based Context-adaptive Binary Arithmetic Coding (SBAC), Probability Interval Partitioning Entropy (PIPE) coding, or another entropy coding technique to generate quantized transform coefficients. In at least one embodiment, the entropy decoding unit 2241 may provide the quantized transform coefficients, quantization parameters, and transform data to the inverse quantization / inverse transform unit 2243, and provide motion vectors, intra-frame modes, segmentation information, and other syntactic information to the prediction processing unit 2242.

[0038] In at least one embodiment, the prediction processing unit 2242 may receive syntax elements, such as motion vectors, intra-frame modes, segmentation information, and other syntax information, from the entropy decoding unit 2241. The prediction processing unit 2242 may receive syntax elements including segmentation information and segment image frames according to the segmentation information.

[0039] In at least one embodiment, each image frame can be divided into at least one image block based on segmentation information. This at least one image block may include a luminance block for reconstructing multiple luminance samples and at least one chrominance block for reconstructing multiple chrominance samples. The luminance block and at least one chrominance block may be further subdivided to generate macroblocks, coding tree units (CTUs), coding blocks (CBs), their sub-segments, and / or another equivalent coding unit.

[0040] In at least one embodiment, during the decoding process, the prediction processing unit 2242 may receive prediction data, which includes the intra-frame mode or motion vector of the current image block of a specific image frame. The current image block may be one of the luma blocks or chroma blocks in the specific image frame.

[0041] In at least one embodiment, the intra-prediction unit 22421 may perform intra-predictive coding of the current block unit relative to one or more neighboring blocks in the same frame as the current block unit, based on syntax elements associated with the intra-mode, to generate a prediction block. The intra-mode may specify the position of a reference sample selected from neighboring blocks within the current frame. In at least one embodiment, when chroma components are reconstructed by the prediction processing unit 2242, the intra-prediction unit 22421 may reconstruct multiple chroma components of the current block unit based on multiple luma components of the current block unit.

[0042] In at least one embodiment, when the luminance component of the current block is reconstructed by the prediction processing unit 2242, the intra-frame prediction unit 22421 may reconstruct multiple chrominance components of the current block unit based on multiple luminance components of the current block unit.

[0043] In at least one embodiment, the inter-frame prediction unit 22422 may perform inter-frame prediction coding of the current block unit on one or more blocks of one or more reference image blocks based on syntax elements associated with motion vectors in order to generate a prediction block.

[0044] In at least one implementation, the motion vector may indicate the displacement of a current block cell within a current image block relative to a reference block cell within a reference image block. The reference block cell is a block determined to closely match the current block cell.

[0045] In at least one embodiment, the inter-frame prediction unit 22422 may receive a reference image block stored in the decoded image buffer 2246 and reconstruct the current block unit based on the received reference image block.

[0046] In at least one embodiment, the inverse quantization / inverse transform unit 2243 may apply inverse quantization and inverse transform to reconstruct a residual block in the pixel domain. The inverse quantization / inverse transform unit 2243 may apply inverse quantization to the residual quantized transform coefficients to generate residual transform coefficients, and then apply inverse transform to the residual transform coefficients to generate a residual block in the pixel domain.

[0047] In at least one implementation, the inverse transform can be applied in reverse by a transform process (e.g., discrete cosine transform (DCT), discrete sine transform (DST), adaptive multiple transform (AMT), mode-dependent non-separable secondary transform (MDNSST), hypercube-givens transform (HyGT), signal-dependent transform, Karhunen-Loéve transform (KLT), wavelet transform, integer transform, subband transform, or conceptually similar transform).

[0048] In at least one embodiment, the inverse transform can convert residual information from the transform domain (e.g., the frequency domain) back to the pixel domain. In at least one embodiment, the degree of inverse quantization can be modified by adjusting the quantization parameters. The summer 2244 adds the residual block to the prediction block from the prediction processing unit 2242 to generate a reconstructed block.

[0049] In at least one embodiment, the summer 2244 adds the reconstructed residual block to the prediction block provided from the prediction processing unit 2242 to generate a reconstructed block.

[0050] In at least one embodiment, the filtering unit 2245 may include a deblocking filter, a sample adaptive offset (SAO) filter, a bilateral filter, and / or an adaptive loop filter (ALF) to remove block artifacts from the reconstructed block. In addition to the deblocking filter, SAO filter, bilateral filter, and ALF, additional filters (in-loop or post-loop) may be used. For simplicity, these filters are not explicitly described, but may filter the output of the summer 2244.

[0051] After the filtering unit 2245 performs filtering processing on the reconstructed blocks of a specific image frame, it can output the decoded video to the display module 122 or other video receiving units.

[0052] In at least one embodiment, the decoded image buffer 2246 may be a reference image memory that stores reference blocks for the prediction processing unit 2242 to decode the bitstream (in an inter-frame coding mode). The decoded image buffer 2246 may be formed of any of a variety of memory devices, such as dynamic random-access memory (DRAM), including synchronous DRAM (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices.

[0053] In at least one embodiment, the decoded image buffer 2246 may be on-chip along with other components of the decoder module 124, or off-chip relative to those components.

[0054] Figure 3 A flowchart of a method 300 for encoding and decoding video data via an electronic device according to an exemplary embodiment of the present disclosure is shown. Method 300 is merely an example, as various ways of performing this method exist.

[0055] Method 300 for decoding bitstreams and reconstructing block units can be used Figure 1 and Figure 2 The configuration execution is shown in the diagram, and reference is made to the individual elements of these diagrams regarding method 300. Figure 3 Each box shown can represent one or more processes, methods, or subroutines being executed.

[0056] Figure 3 The order of the boxes in this document is illustrative only and may be changed. Additional boxes may be added or fewer boxes may be used without departing from this disclosure.

[0057] In box 310, decoder module 124 receives image frames of video data. The video data may be a bitstream.

[0058] Reference Figure 1 and Figure 2 The second electronic device 120 can receive bitstreams from an encoder or other video provider, such as the first electronic device 110, via a second interface 126. The second interface 126 can provide bitstreams to the decoder module 124.

[0059] In at least one embodiment, the entropy decoding unit 2241 can decode the bitstream to determine multiple prediction indicators and multiple segmentation indicators of the image frame, and the decoder module 124 can further reconstruct the image frame based on the prediction indicators and segmentation indicators. The prediction indicators and segmentation indicators may include multiple flags and multiple indices.

[0060] In box 320, decoder module 124 determines block units with block width and block height from the received video data. Further reference... Figure 1 and Figure 2 The decoder module 124 can segment image frames to determine block units based on segmentation instructions included in the bitstream. For example, the decoder module 124 can segment image frames to generate multiple coding tree units, and can further segment one of the coding tree units to determine a block unit based on segmentation instructions (e.g., based on a video coding standard).

[0061] Figures 4A to 4C This is a schematic diagram of block units with different block sizes according to exemplary embodiments of the present disclosure. In at least one embodiment, the block size of a block unit may include a block height Hb and a block width Wb. For example, the block size of block unit 410 includes a block height H410 and a block width W410, the block size of block unit 430 includes a block height H430 and a block width W430, and the block size of block unit 450 includes a block height H450 and a block width W450. In embodiments, the block height H410 may be equal to the block width W410, the block width W430 may be equal to 8 × H430, and the block height H450 may be equal to 4 × W450.

[0062] In box 330, decoder module 124 determines the comparison between block width and block height. Further reference... Figure 1 and Figure 2 The decoder module 124 can determine the comparison between the block width and the block height based on inequalities.

[0063] For example, the ratio R between the block width Wb and the block height Hb can be greater than or equal to a threshold T (i.e., R ≥ T). In one embodiment, the ratio R between the width Wb and the block height Hb can be less than the threshold T (i.e., R < T). In another embodiment, the ratio R between the width Wb and the block height Hb can be greater than the threshold T (i.e., R > T). In still other embodiments, the ratio R between the width Wb and the block height Hb can be less than or equal to the threshold T (i.e., R ≤ T).

[0064] In at least one embodiment, the decoder module 124 can determine a ratio parameter RP calculated based on the block width Wb and the block height Hb. In at least one embodiment, the first ratio parameter RP1 can be calculated based on division. In one embodiment, when the block width Wb is greater than or equal to the block height Hb, the first ratio parameter RP1 can be calculated by dividing the block width Wb by the block height Hb (i.e., RP1 = Wb / Hb). When the block width Wb is less than the block height Hb, the first ratio parameter RP1 can be calculated by dividing the block height Hb by the block width Wb (i.e., RP1 = Hb / Wb). In other embodiments, when the block width Wb is greater than the block height Hb, the first ratio parameter RP1 can be calculated by dividing the block width Wb by the block height Hb. Therefore, when the block width Wb is less than or equal to the block height Hb, the first ratio parameter RP1 can be calculated by dividing the block height Hb by the block width Wb.

[0065] In at least one embodiment, the second ratio parameter RP2 can be calculated based on the block width Wb and the block height Hb using a logarithmic equation. In embodiments, one of the first ratio parameter RP1 and the second ratio parameter RP2, calculated using different formulas, can be set as the ratio parameter RP of the block unit. In at least one embodiment, the second ratio parameter RP2 can be equal to the absolute value of the difference generated by subtracting the base-2 logarithm of the block height from the base-2 logarithm of the block width (i.e., RP2 = abs(log2 Wb – log2 Hb)). In other words, the second ratio parameter RP2 can be equal to the absolute value of the base-2 logarithm of the quotient, and the quotient is generated by dividing the block width Wb by the block height Hb or vice versa (i.e., RP2 = abs(log2 Wb – log2 Hb) = abs(log2(Wb / Hb)) = abs(log2(Hb / Wb))). The first ratio parameter RP1 can be equal to 2 raised to the power of the second ratio parameter RP2.

[0066] In at least one embodiment, the decoder module 124 can compare the ratio parameter RP with the ratio threshold RT. When the ratio parameter RP is greater than the ratio threshold RT, the decoder module 124 can determine that the comparison indication ratio R is greater than the threshold T. When the ratio parameter RP is equal to the ratio threshold RT, the decoder module 124 can determine that the comparison indication ratio R is equal to the threshold T. When the ratio parameter RP is less than the ratio threshold RT, the decoder module 124 can determine that the comparison indication ratio R is less than the threshold T.

[0067] In at least one embodiment, when the first ratio parameter RP1 is set to the ratio parameter RP, the decoder module 124 can compare the ratio parameter RP with the first ratio threshold RT1. In one embodiment, when the first ratio parameter RP1 is greater than or equal to the first ratio threshold RT1, the decoder module 124 can determine that the comparison indication ratio R is greater than or equal to the threshold T. When the first ratio parameter RP1 is less than the first ratio threshold RT1, the decoder module 124 can determine that the comparison indication ratio R is less than the threshold T. In other embodiments, when the first ratio parameter RP1 is less than or equal to the first ratio threshold RT1, the decoder module 124 can determine that the comparison indication ratio R is less than or equal to the threshold T. In at least one embodiment, the first ratio threshold RT1 can be a positive integer.

[0068] In at least one embodiment, the first ratio threshold RT1 can be equal to 2 raised to the power of n, where n is a positive integer. The first ratio threshold RT1 can be preset to 1, 2, 4, or 8. For example, when the first ratio threshold RT1 is equal to 8, the first ratio parameter RP1 of block unit 410 is equal to 1, and the first ratio parameter RP1 = H450 / W450 of block unit 450 is equal to 4, which is less than the first ratio threshold RT1. When the first ratio threshold RT1 is equal to 8, the first ratio parameter RP1 = W430 / H430 of block unit 430 is equal to 8, which is not less than the first ratio threshold RT1.

[0069] In at least one embodiment, when the second ratio parameter RP2 is set to the ratio parameter RP, the decoder module 124 can compare the ratio parameter RP with the second ratio threshold RT2. When the second ratio parameter RP2 is greater than or equal to the second ratio threshold RT2, the decoder module 124 can determine that the comparison indication ratio R is greater than or equal to the threshold T. When the second ratio parameter RP2 is less than the second ratio threshold RT2, the decoder module 124 can determine that the comparison indication ratio R is less than the threshold T. In other embodiments, when the second ratio parameter RP2 is less than or equal to the second ratio threshold RT2, the decoder module 124 can determine that the comparison indication ratio R is less than or equal to the threshold T.

[0070] In at least one embodiment, the second ratio threshold RT2 can be a positive integer. The second ratio threshold RT2 can be preset to 1, 2, 3, or 4. For example, when the second ratio threshold RT2 equals 3, the second ratio parameter RP2 of block unit 410 equals 0, and the second ratio parameter RP2 of block unit 450 equals 2, which is less than the second ratio threshold RT2. When the second ratio threshold RT2 equals 3, the second ratio parameter RP2 of block unit 430 equals 3, which is not less than the second ratio threshold RT2.

[0071] In at least one embodiment, the first ratio threshold RT1 can be equal to 2 raised to the power of the second ratio threshold RT2, because the first ratio parameter RP1 is equal to 2 raised to the power of the second ratio parameter RP2. Therefore, when the decoder module 124 changes the comparison from the first inequality RP1 < RT1 to the second inequality RP2 < RT2, the comparison result may remain unchanged.

[0072] In at least one embodiment, when the decoder module 124 determines a comparison between the block width Wb and the block height Hb, the decoder module 124 may compare the block width Wb with a first magnified value N1 generated from the block height Hb and compare the block height Hb with a second magnified value N2 generated from the block width Wb. The first magnified value N1 can be calculated by multiplying the block height Hb by a threshold T, and the second magnified value N2 can be calculated by multiplying the block width Wb by a threshold T (i.e., N1 = T × Hb and N2 = T × Wb).

[0073] In at least one embodiment, when the block width Wb is less than the first magnification value N1 and the block height Hb is less than the second magnification value N2, the decoder module 124 can determine that the comparison indication ratio R is less than the threshold T. When the block width Wb is greater than or equal to the first magnification value N1, the decoder module 124 can determine that the comparison indication ratio R is greater than or equal to the threshold T. When the block height Hb is greater than or equal to the first magnification value N2, the decoder module 124 can determine that the comparison indication ratio R is greater than or equal to the threshold T.

[0074] In at least one embodiment, when the decoder module 124 determines a comparison based on a first amplification value N1 and a second amplification value N2, the threshold T can be equal to a first ratio threshold RT1. The decoder module 124 can determine this comparison based on a third inequality Wb < N1 = RT1 × Hb and a fourth inequality Hb < N2 = RT1 × Wb.

[0075] In at least one embodiment, the first ratio threshold RT1 can be preset to 1, 2, 4, or 8. Therefore, when the decoder module 124 determines the comparison based on the first amplification value N1 and the second amplification value N2, the threshold T can be preset to 1, 2, 4, or 8. In at least one embodiment, when the block width Wb is greater than the block height Hb, the first division value Hb / Wb can be less than 1. Therefore, the first division value Hb / Wb is also less than the threshold T, and when the block width Wb is greater than the block height Hb, the fourth inequality Hb < RT1 × Wb is true.

[0076] In other words, when the block width Wb is greater than the block height Hb, the comparison is only affected by the third inequality Wb < RT1 × Hb. Therefore, when the block width Wb is greater than the block height Hb, the comparison determined based on the first inequality RP1 = Wb / Hb < RT1 is the same as the comparison determined based on the third inequality Wb < N1 = RT1 × Hb and the fourth inequality Hb < N2 = RT1 × Wb.

[0077] In another embodiment, when the block width Wb is less than the block height Hb, the second division value Wb / Hb can be less than 1. Therefore, when the block width Wb is less than the block height Hb and the threshold T is preset to 1, 2, 4 or 8, the second division value Wb / Hb is also less than the threshold T and the third inequality Wb < RT1 × Hb is true.

[0078] In other words, when the block width Wb is less than the block height Hb, the comparison is only affected by the fourth inequality Hb < RT1 × Wb. Therefore, when the block width Wb is less than the block height Hb, the comparison determined based on the first inequality RP1 = Hb / Wb < RT1 is the same as the comparison determined based on the third inequality Wb < N1 = RT1 × Hb and the fourth inequality Hb < N2 = RT1 × Wb.

[0079] In other embodiments, when the block width Wb equals the block height Hb, the first division value and the second division value can be equal to 1. Therefore, when the block width Wb equals the block height Hb and the threshold T is preset to 2, 4, or 8, the first division value and the second division value are less than the threshold T, and the third and fourth inequalities are true. Therefore, when the block width Wb equals the block height Hb and the threshold T is preset to 2, 4, or 8, the comparison determined based on the first inequality RP1 = Hb / Wb < RT1 is the same as the comparison determined based on the third inequality Wb < N1 = RT1 × Hb and the fourth inequality Hb < N2 = RT1 × Wb.

[0080] In block 340, decoder module 124 determines, based on comparison, whether the geometric segmentation mode is disabled for block units. When decoder module 124 determines that the geometric segmentation mode is disabled for block units, method 300 may proceed to block 350. When decoder module 124 determines that the geometric segmentation mode is enabled for block units, the method may proceed to block 360.

[0081] Further reference Figure 1 and Figure 2 When the ratio R between the comparison indicator block width Wb and the block height Hb is greater than or equal to a threshold T, the decoder module 124 can determine that the geometric segmentation mode is disabled for the block unit. When the ratio R between the comparison indicator block width Wb and the block height Hb is less than the threshold T, the decoder module 124 can determine that the geometric segmentation mode is enabled for the block unit.

[0082] In at least one implementation, the decoder module 124 can determine a comparison between the block width and the block height to limit the use of geometric segmentation patterns. When a block cell is too narrow, the prediction results of different adjacent segmentation lines may be similar to each other. When a block cell is too narrow, the block cell can be further divided in the horizontal or vertical direction to generate two block cells to be predicted separately.

[0083] Therefore, the geometric segmentation mode can be disabled when the block unit is too narrow. For example, the geometric segmentation mode can be disabled when the block width is greater than or equal to T times the block height, or when the block height is greater than or equal to T times the block width. In at least one embodiment, the threshold T can be equal to 2, 4, or 8.

[0084] In at least one embodiment, when the decoder module 124 determines that the first ratio parameter RP1 is greater than or equal to the first ratio threshold RT1, the geometric segmentation mode can be disabled for the block unit. When the decoder module 124 determines that the first ratio parameter RP1 is less than the first ratio threshold RT1, the geometric segmentation mode can be enabled for the block unit.

[0085] For example, the first ratio threshold RT1 can be equal to 8. Therefore, when the first ratio parameter RP1 of the block cell is greater than or equal to 8, the geometric segmentation mode can be disabled for the block cell.

[0086] In a typical geometric partitioning pattern, the block width Wb and block height Hb are greater than or equal to 8. Therefore, when the first ratio threshold RT1 equals 8, the geometric partitioning pattern can be excluded from applying to block cells with block sizes of 64×8 or 8×64. When the first ratio threshold RT1 equals 4, the geometric partitioning pattern can be excluded from applying to block cells with block sizes of 64×8, 64×16, 32×8, 8×64, 16×64, or 8×32.

[0087] In at least one embodiment, when the decoder module 124 determines that the second ratio parameter RP2 is greater than or equal to the second ratio threshold RT2, the geometric segmentation mode can be disabled for the block unit. When the decoder module 124 determines that the second ratio parameter RP2 is less than the second ratio threshold RT2, the geometric segmentation mode can be enabled for the block unit.

[0088] For example, when the second ratio threshold RT2 equals 3, the geometric segmentation mode may not be applied to block cells with block sizes of 64×8 or 8×64. When the second ratio threshold RT2 equals 2, the geometric segmentation mode may not be applied to block cells with block sizes of 64×8, 64×16, 32×8, 8×64, 16×64, or 8×32.

[0089] In at least one embodiment, when the decoder module 124 determines that the block width Wb is greater than or equal to the first magnification value N1, the geometric segmentation mode can be disabled for the block unit. In another embodiment, when the decoder module 124 determines that the block height Hb is greater than or equal to the second magnification value N2, the geometric segmentation mode can be disabled for the block unit. When the decoder module 124 determines that the block width Wb is less than the first magnification value N1 and the block height Hb is less than the second magnification value N2, the geometric segmentation mode can be enabled for the block unit.

[0090] For example, when the threshold T equals 8, the geometric segmentation mode can be excluded from block units with a block size of 64×8 or 8×64. In other words, when the block width Wb is greater than or equal to the first magnification value 8×Hb or the block height Hb is greater than or equal to the second magnification value 8×Wb, the geometric segmentation mode can be excluded from block units with a block size of 64×8 or 8×64. When the block width Wb is greater than or equal to the first magnification value 4×Hb or the block height Hb is greater than or equal to the second magnification value 4×Wb, the geometric segmentation mode can be excluded from block units with a block size of 64×8, 64×16, 32×8, 8×64, 16×64, or 8×32.

[0091] In box 350, decoder module 124 generates a prediction block by predicting block units using a first prediction mode different from the geometric segmentation mode. Further reference... Figure 1 and Figure 2 The decoder module 124 can select a first prediction mode and predict block units based on the first prediction mode to generate a predicted block when the geometric segmentation mode is disabled for the block unit. When the ratio R between the block width Wb and the block height Hb is greater than or equal to a threshold T, the decoder module 124 can predict block units based on the first prediction mode to generate a predicted block.

[0092] In at least one implementation, the first prediction mode can be selected from a plurality of option modes. Each of the option modes is different from the geometric segmentation mode.

[0093] In at least one implementation, the option pattern for selecting the first prediction pattern can be determined by the first merge index. Therefore, the first prediction pattern can be one of the option patterns selected based on the first merge index.

[0094] In one implementation, the first merge index may indicate a first prediction pattern included in the merge candidate list. In at least one implementation, the option pattern may be a plurality of merge candidate patterns from a merge candidate list determined from a plurality of spatial motion prediction patterns of a plurality of adjacent blocks adjacent to a block cell, a plurality of temporal motion prediction patterns of a plurality of juxtaposed blocks, historical motion prediction patterns stored in a first-in-first-out (FIFO) table, a plurality of pairwise average motion prediction patterns, and a zero motion pattern.

[0095] In at least one embodiment, a first prediction mode may indicate first motion information having a first reference frame and a first reference vector V0. The first reference frame may be selected from a plurality of reference lists. In at least one embodiment, the first motion information may include a first list flag for determining one of the reference lists to select the first reference frame. In at least one embodiment, a plurality of block components in a block cell may be predicted based on the first reference vector V0 and the first reference frame.

[0096] In box 360, decoder module 124 predicts block units to generate a predicted block by using a second prediction mode selected from a plurality of candidate modes, including geometric segmentation modes. Further reference... Figure 1 and Figure 2 The decoder module 124 can select a second prediction mode and predict block units based on the second prediction mode to generate a predicted block when a geometric segmentation mode is enabled for the block unit. When the comparison indicator ratio R is less than a threshold T, the decoder module 124 can predict block units based on the second prediction mode to generate a predicted block.

[0097] In at least one implementation, the second prediction mode can be selected from candidate modes. In one implementation, the candidate mode may include a geometric segmentation mode. In another implementation, the candidate mode may include both an option mode and a geometric segmentation mode.

[0098] In at least one implementation, when a geometric segmentation pattern is applied to a block cell for predicting the block cell, the decoder module 124 can determine the segmentation index, the second merge index, and the third merge index of the block cell from the bitstream. Figure 5A and Figure 5B This is a schematic diagram of block units having different sub-blocks separated based on a segmentation line, according to an exemplary embodiment of the present disclosure. The decoder module 124 can divide the block unit 510 based on the segmentation line 511 determined from the segmentation index to generate a first sub-block 512, a second sub-block 514, and a third sub-block 516.

[0099] In at least one embodiment, the segmentation index may indicate the segmentation line 511 of the block unit 510. In at least one embodiment, the segmentation index may indicate a segmentation angle index and a segmentation distance index. The segmentation angle index may indicate the segmentation angle of the segmentation line, and the segmentation distance index may indicate the segmentation distance between the segmentation line and the center point of the block unit.

[0100] Therefore, decoder module 124 can determine the segmentation line based on the segmentation angle and the segmentation distance indicated by the segmentation index. The bitstream can directly include the segmentation angle index and the segmentation distance index.

[0101] In at least one embodiment, decoder module 124 can predict a plurality of sub-blocks 512, 514, and 516 based on second motion information and third motion information determined from merge candidate patterns by a second merge index and a third merge index. In at least one embodiment, the second motion information indicated by the second merge index can be one of the merge candidate patterns included in the merge candidate list, and the third motion information indicated by the third merge index can also be one of the merge candidate patterns included in the merge candidate list. In at least one embodiment, the second motion information can indicate a second reference frame and a second reference vector V1, and the third motion information can indicate a third reference frame and a third reference vector V2.

[0102] The second and third reference frames can be selected from multiple reference lists. In one embodiment, the second and third reference frames can be selected from the same reference list. In other embodiments, the second and third reference frames can be selected from different reference lists. In at least one embodiment, when the number of reference lists is equal to two, the reference lists can be set to L0 and L1.

[0103] In at least one embodiment, the second motion information may include a second list flag for selecting a second reference frame, and the third motion information may include a third list flag for selecting third motion information. In at least one embodiment, when the second list flag is equal to the third list flag, the second reference frame and the third reference frame can be selected from the same reference list. When the second list flag and the third list flag are different, the second reference frame and the third reference frame can be selected from different reference lists.

[0104] In at least one embodiment, multiple first sub-block components in the first sub-block 512 can be predicted based on a second reference vector V1 and a second reference frame. Multiple second sub-block components in the second sub-block 514 can be predicted based on a third reference vector V2 and a third reference frame. Additionally, multiple third sub-block components in the third sub-block 516 can be predicted based on the second reference vector V1, the third reference vector V2, the second reference frame, and the third reference frame. The third sub-block components in the third sub-block 516 can be predicted by deriving multiple first reference samples determined based on the second reference vector V1 and the second reference frame, and multiple second reference samples determined based on the third reference vector V2 and the third reference frame, and by merging the second and third reference samples based on multiple mixing weights. In at least one embodiment, the mixing weights can be derived based on multiple component distances between the dividing line 511 and the third sub-block components in the third prediction region 516.

[0105] In box 370, decoder module 124 reconstructs block units based on predicted blocks. Further reference... Figure 1 and Figure 2 Decoder module 124 can determine multiple residual components from the bitstream of a block unit and add the residual components to the prediction block to reconstruct the block unit. Decoder module 222 can reconstruct all other block units in the image frame to reconstruct the image frame and video.

[0106] Figure 6 Exemplary embodiments according to this disclosure are shown in Figure 1 The block diagram shown is of an encoder module 114 of a first electronic device. The encoder module 114 may include a prediction processor (e.g., prediction processing unit 6141), at least a first summer (e.g., first summer 6142) and a second summer (e.g., second summer 6145), a transform / quantization processor (e.g., transform / quantization unit 6143), an inverse quantization / inverse transform processor (e.g., inverse quantization / inverse transform unit 6144), a filter (e.g., filter unit 6146), a decoded image buffer (e.g., decoded image buffer 6147), and an entropy encoder (e.g., entropy coding unit 6148). The prediction processing unit 6141 of the encoder module 114 may further include a segmentation processor (e.g., segmentation unit 61411), an intra-frame prediction processor (e.g., intra-frame prediction unit 61412), and an inter-frame prediction processor (e.g., inter-frame prediction unit 61413).

[0107] Encoder module 114 can receive source video and encode the source video to output a bitstream. Encoder module 114 can receive source video comprising multiple image frames, and then divide the image frames according to the encoding structure. Each image frame can be divided into at least one image block.

[0108] At least one image block may include a luminance block having multiple luminance samples and at least one chrominance block having multiple chrominance samples. The luminance block and at least one chrominance block may be further subdivided to generate macroblocks, coding tree units (CTUs), coding blocks (CBs), their sub-segments, and / or another equivalent coding unit.

[0109] In at least one embodiment, encoder module 114 may perform additional sub-segmentation of the source video. It should be noted that the disclosed embodiments are generally applicable to video encoding, regardless of how the source video is segmented before and / or during encoding.

[0110] In at least one embodiment, during the encoding process, the prediction processing unit 6141 may receive a current image block of a specific image frame. The current image block may be one of the luma blocks or chroma blocks in the specific image frame.

[0111] Segmentation unit 61411 can divide the current image block into multiple block units. Intra-frame prediction unit 61412 can perform intra-frame prediction coding of the current block unit relative to one or more adjacent blocks in the same frame as the current block unit to provide spatial prediction. Inter-frame prediction unit 61413 can perform inter-frame prediction coding of the current block unit relative to one or more blocks in one or more reference image blocks to provide temporal prediction.

[0112] In at least one embodiment, the prediction processing unit 6141 may select one of the coding results generated by the intra-frame prediction unit 61412 and the inter-frame prediction unit 61413 based on a mode selection method (e.g., a cost function). The mode selection method may be a rate-distortion optimization (RDO) process.

[0113] The prediction processing unit 6141 can determine the selected encoding result and provide the prediction block corresponding to the selected encoding result to the first summer 6142 for generating the residual block, and to the second summer 6145 for reconstructing the encoded block unit. The prediction processing unit 6141 can further provide syntax elements (e.g., motion vectors, intra-frame mode indicators, segmentation information, and other syntax information) to the entropy coding unit 6148.

[0114] In at least one embodiment, the intra-prediction unit 61412 can perform intra-prediction on the current block unit. The intra-prediction unit 61412 can determine the intra-prediction mode for the reconstructed samples adjacent to the current block unit in order to encode the current block unit.

[0115] In at least one embodiment, the intra-prediction unit 61412 may encode the current block cell using various intra-prediction modes. The intra-prediction unit 61412 or the prediction processing unit 6141 may select an appropriate intra-prediction mode from the selected modes. The intra-prediction unit 61412 may encode the current block cell using a cross-component prediction mode to predict one of the two chrominance components of the current block cell based on the luma component of the current block cell. The intra-prediction unit 61412 may predict the first of the two chrominance components of the current block cell based on the second of the two chrominance components of the current block cell.

[0116] In at least one embodiment, as an alternative to intra-prediction performed by intra-prediction unit 61412, inter-prediction unit 61413 may perform inter-prediction on the current block unit. Inter-prediction unit 61413 may perform motion estimation to estimate the motion of the current block unit used to generate motion vectors.

[0117] The motion vector indicates the displacement of the current block cell within the current image block relative to the reference block cell within the reference image block. The inter-frame prediction unit 61413 may receive at least one reference image block stored in the decoded image buffer 6147 and estimate motion based on the received reference image block to generate a motion vector.

[0118] In at least one embodiment, the first summer 6142 can generate a residual block by subtracting the predicted block determined by the prediction processing unit 6141 from the original current block unit. The first summer 6142 may represent one or more components performing the subtraction.

[0119] In at least one embodiment, the transform / quantization unit 6143 may apply a transform to the residual block to generate residual transform coefficients, and then quantize the residual transform coefficients to further reduce the bit rate. The transform may be one of DCT, DST, AMT, MDNSST, HyGT, signal correlation transform, KLT, wavelet transform, integer transform, subband transform, or a conceptually similar transform.

[0120] In at least one implementation, the transformation can convert residual information from the pixel value domain to the transform domain, such as the frequency domain. The degree of quantization can be modified by adjusting the quantization parameters.

[0121] In at least one embodiment, the transform / quantization unit 6143 may perform a scan of a matrix including quantized transform coefficients. Alternatively, the entropy encoding unit 6148 may perform the scan.

[0122] In at least one embodiment, the entropy coding unit 6148 may receive from the prediction processing unit 6141 and the transform / quantization unit 6143 a plurality of syntax elements including quantization parameters, transform data, motion vectors, intra-frame modes, segmentation information, and other syntax information. The entropy coding unit 6148 may encode the syntax elements into a bitstream.

[0123] In at least one embodiment, the entropy coding unit 6148 can entropy-encode the quantized transform coefficients to generate an encoded bitstream by performing CAVLC, CABAC, SBAC, PIPE coding, or another entropy coding technique. The encoded bitstream can be transmitted to another device (i.e., Figure 1 The second electronic device 120 in the system may be archived for later transmission or retrieval.

[0124] In at least one embodiment, the inverse quantization / inverse transform unit 6144 may apply inverse quantization and inverse transform to reconstruct residual blocks in the pixel domain for later use as reference blocks. The second summer 6145 may add the reconstructed residual blocks to the prediction blocks provided from the prediction processing unit 6141 to generate reconstructed blocks for storage in the decoded image buffer 6147.

[0125] In at least one embodiment, the filtering unit 6146 may include a deblocking filter, a SAO filter, a bilateral filter, and / or an ALF to remove block artifacts from the reconstructed blocks. In addition to the deblocking filter, SAO filter, bilateral filter, and ALF, additional filters (in-loop or post-loop) may be used. For simplicity, these filters are not described, and the output of the second summer 6145 may be filtered.

[0126] In at least one embodiment, the decoded image buffer 6147 may be a reference image memory that stores reference blocks for the encoder module 114 to encode video in modes such as intra-frame or inter-frame coding. The decoded image buffer 6147 may include various memory devices, such as DRAM (including SDRAM, MRAM, RRAM) or other types of memory devices. The decoded image buffer 6147 may be on-chip along with other components of the encoder module 114, or off-chip relative to those components.

[0127] In at least one implementation, such as Figure 3 As shown, encoder module 114 can execute method 300 for encoding video and reconstructing block units. It can be used in... Figure 1 The configuration execution method 300 is shown in Figure 8, and reference is made to the various elements of these figures with respect to method 300. Figure 3 Each box shown can represent one or more processes, methods, or subroutines being executed.

[0128] Figure 3 The order of the boxes in this document is illustrative only and may be changed. Additional boxes may be added or fewer boxes may be used without departing from this disclosure.

[0129] In box 310, encoder module 114 receives image frames of video data. The video data can be video. (See reference...) Figure 1 and Figure 6 The first electronic device 110 can receive video via the source module 112. The encoder module 114 can determine image frames from the video.

[0130] In frame 320, encoder module 114 determines block units with block width and block height from the received video data. (See reference...) Figure 1 and Figure 6 The encoder module 114 can segment image frames to determine block units. In at least one embodiment, the prediction processing unit 6141 of the first electronic device 110 can determine block units from the video via the segmentation unit 61411, and the encoder module 114 can provide multiple segmentation instructions to the bitstream based on the segmentation results of the segmentation unit 61411. In one embodiment, the encoder module 114 can segment image frames to generate multiple coding tree units, and can further segment one of the coding tree units to determine a block unit (e.g., based on a video coding standard). See also... Figures 4A to 4C The block height H410 is equal to the block width W410, the block width W430 is equal to 8 × H430, and the block height H450 is equal to 4 × W450.

[0131] In frame 330, encoder module 114 determines a comparison between the block width and the block height. (See reference...) Figure 1 and Figure 6 The encoder module 114 can determine the comparison between the block width and the block height based on inequalities. For example, the ratio R between the block width Wb and the block height Hb is greater than or equal to a threshold T (i.e., R ≥ T). The ratio R between the width Wb and the block height Hb can be less than the threshold T (i.e., R < T).

[0132] In at least one embodiment, encoder module 114 can determine a ratio parameter RP calculated based on block width Wb and block height Hb. In at least one embodiment, a first ratio parameter RP1 can be calculated by division based on block width Wb and block height Hb. In one embodiment, when block width Wb is greater than or equal to block height Hb, the first ratio parameter RP1 can be calculated by dividing block width Wb by block height Hb (i.e., RP1 = Wb / Hb). In another embodiment, when block width Wb is less than block height Hb, the first ratio parameter RP1 can be calculated by dividing block height Hb by block width Wb (i.e., RP1 = Hb / Wb).

[0133] In at least one embodiment, the second ratio parameter RP2 can be calculated based on the block width Wb and the block height Hb using a logarithmic equation. In embodiments, one of the first ratio parameter RP1 and the second ratio parameter RP2, calculated using different formulas, can be set as the ratio parameter RP of the block unit. In at least one embodiment, the second ratio parameter RP2 can be equal to the absolute value of the difference generated by subtracting the logarithm of the block height from the logarithm of the block height (i.e., RP2 = abs(log2 Wb – log2 Hb)). In embodiments, the first ratio parameter RP1 can be equal to 2 raised to the power of the second ratio parameter RP2.

[0134] In at least one embodiment, encoder module 114 can compare a ratio parameter RP with a ratio threshold RT. In one embodiment, when the ratio parameter RP is greater than or equal to the ratio threshold RT, encoder module 114 can determine that the comparison indication ratio R is greater than or equal to the threshold T. When the ratio parameter RP is less than the ratio threshold RT, encoder module 114 can determine that the comparison indication ratio R is less than the threshold T.

[0135] In at least one embodiment, when the first ratio parameter RP1 is set to the ratio parameter RP, the encoder module 114 can compare the ratio parameter RP with the first ratio threshold RT1. In at least one embodiment, when the second ratio parameter RP2 is set to the ratio parameter RP, the encoder module 114 can compare the ratio parameter RP with the second ratio threshold RT2.

[0136] In one embodiment, when the first ratio parameter RP1 is greater than or equal to the first ratio threshold RT1 or the second ratio parameter RP2 is greater than or equal to the second ratio threshold RT2, the encoder module 114 can determine that the comparison indication ratio R is greater than or equal to the threshold T. When the first ratio parameter RP1 is less than the first ratio threshold RT1 or the second ratio parameter RP2 is less than the second ratio threshold RT2, the encoder module 114 can determine that the comparison indication ratio R is less than the threshold T.

[0137] In at least one embodiment, the first ratio threshold RT1 and the second ratio threshold RT2 can be positive integers. In at least one embodiment, the first ratio threshold RT1 can be equal to 2 raised to the power of n, where n is a positive integer. The first ratio threshold RT1 can be preset to 1, 2, 4, or 8, and the second ratio threshold RT2 can be preset to 1, 2, 3, or 4.

[0138] In at least one embodiment, the first ratio threshold RT1 can be equal to 2 raised to the power of the second ratio threshold RT2, because the first ratio parameter RP1 is equal to 2 raised to the power of the second ratio parameter RP2. Therefore, when the encoder module 114 changes the comparison from the first inequality RP1 < RT1 to the second inequality RP2 < RT2, the comparison result may remain unchanged.

[0139] In at least one embodiment, when the encoder module 114 determines a comparison between the block width Wb and the block height Hb, the encoder module 114 may compare the block width Wb with a first amplification value N1 calculated by multiplying the block height Hb by a threshold T, and compare the block height Hb with a second amplification value N2 calculated by multiplying the block width Wb by a threshold T.

[0140] In at least one embodiment, when the block width Wb is less than the first amplification value N1 and the block height Hb is less than the second amplification value N2, the encoder module 114 can determine that the comparison indication ratio R is less than the threshold T. In another embodiment, when the block width Wb is greater than or equal to the first amplification value N1 or the block height Hb is greater than or equal to the second amplification value N2, the encoder module 114 can determine that the comparison indication ratio R is greater than or equal to the threshold T.

[0141] In at least one embodiment, when encoder module 114 determines a comparison based on a first amplification value N1 and a second amplification value N2, the threshold T may be equal to a first ratio threshold RT1. Encoder module 114 may determine this comparison based on a third inequality Wb < N1 = RT1 × Hb and a fourth inequality Hb < N2 = RT1 × Wb.

[0142] In at least one embodiment, when the block width Wb is greater than the block height Hb, the comparison determined based on the first inequality RP1 = Wb / Hb < RT1 can be the same as the comparison determined based on the third inequality Wb < N1 = RT1 × Hb and the fourth inequality Hb < N2 = RT1 × Wb. When the block width Wb is less than the block height Hb, the comparison determined based on the first inequality RP1 = Hb / Wb < RT1 can also be the same as the comparison determined based on the third inequality Wb < N1 = RT1 × Hb and the fourth inequality Hb < N2 = RT1 × Wb.

[0143] In block 340, encoder module 114 determines, based on comparison, whether the geometric segmentation mode is disabled for block cells. When encoder module 114 determines that the geometric segmentation mode is disabled for block cells, method 300 may proceed to block 350. When encoder module 114 determines that the geometric segmentation mode is enabled for block cells, the method may proceed to block 360.

[0144] Further reference Figure 1 and Figure 6When the comparison indicator ratio R is greater than or equal to the threshold T, the encoder module 114 can determine that the geometric segmentation mode is disabled for the block cell. When the comparison indicator ratio R is less than the threshold T, the encoder module 114 can determine that the geometric segmentation mode is enabled for the block cell.

[0145] In block 350, encoder module 114 generates a prediction block by predicting block units using a first prediction mode different from the geometric segmentation mode. Further reference... Figure 1 and Figure 6 The encoder module 114 can generate multiple encoded results generated by the intra-frame prediction unit 61412 and the inter-frame prediction unit 61413. The encoder module 114 can then select one of the encoded results based on a mode selection method (e.g., a cost function). The mode selection method can be a rate-distortion optimization (RDO) process.

[0146] In at least one embodiment, when the geometric segmentation mode is disabled for block cells, the encoder module 114 can select a first prediction mode from a plurality of option modes. In one embodiment, when the comparison indicator ratio R is greater than or equal to a threshold T, the encoder module 114 can predict block cells based on the first prediction mode to generate a prediction block. Each of the option modes is different from the geometric segmentation mode. In at least one embodiment, the option modes can include a plurality of merge candidate modes in the merge candidate list.

[0147] In box 360, encoder module 114 predicts block cells to generate a predicted block by using a second prediction mode selected from a plurality of candidate modes, including geometric segmentation modes. Further reference... Figure 1 and Figure 6 The encoder module 114 can generate the encoded results produced by the intra-frame prediction unit 61412 and the inter-frame prediction unit 61413. Then, the encoder module 114 can select one of the encoded results based on a mode selection method.

[0148] In at least one embodiment, when a geometric segmentation mode is enabled for a block cell, the encoder module 114 can select a second prediction mode from a plurality of candidate modes. In one embodiment, when the comparison indicator ratio R is less than a threshold T, the encoder module 114 can predict block cells based on the second prediction mode to generate a prediction block. In at least one embodiment, the candidate modes may include an option mode and a geometric segmentation mode.

[0149] In block 370, encoder module 114 reconstructs block units based on predicted blocks. In at least one embodiment, a block unit may include multiple block elements. In one embodiment, each block element may be a pixel element. Further reference Figure 1 and Figure 2The encoder module 114 can determine multiple residual components by subtracting the prediction block from the block elements and provides a bitstream including multiple coefficients corresponding to the residual components. The encoder module 114 can return the residual components based on the coefficients and add the returned residual components to the prediction block to generate reconstructed block cells.

[0150] The disclosed embodiments should be considered illustrative rather than restrictive in all respects. It should also be understood that while this disclosure is not limited to the specific disclosed embodiments, many rearrangements, modifications, and substitutions are possible without departing from the scope of this disclosure.

Claims

1. A method for decoding a bitstream using an electronic device, the method comprising: Receive image frames from the bitstream; Determine the block unit with block width and block height from the received image frame; Based on a comparison of the block width and the block height, it is determined whether the geometric segmentation mode is disabled for the block unit. When the comparison indicates that the ratio between the block width and the block height is greater than or equal to a threshold, the geometric segmentation mode is disabled for that block unit. The geometric segmentation mode is not disabled when the comparison indicates that the ratio is less than the threshold. The block width is compared with a first magnification value generated by multiplying the block height by the threshold. The block height is compared with a second magnification value generated by multiplying the block width by the threshold. When the block width is less than the first magnification value and the block height is less than the second magnification value, the comparison indicates that the ratio is less than the threshold. When the block width is greater than or equal to the first magnification value, the comparison indicates that the ratio is greater than or equal to the threshold. When the block height is greater than or equal to the second magnification value, the comparison indicates that the ratio is greater than or equal to the threshold, and when the geometric segmentation mode is applied to the block unit, the block unit is divided to generate multiple sub-blocks predicted by different merging candidates of the block unit; When the geometric segmentation mode is disabled for the block cell, the block cell is predicted based on a prediction mode different from the geometric segmentation mode to generate a prediction block; and The block unit is reconstructed based on the predicted block.

2. The method according to claim 1, further comprising: Determine the ratio parameter generated based on the block width and the block height; Compare the ratio parameter with the ratio threshold; When the ratio parameter is greater than or equal to the ratio threshold, the comparison indicates that the ratio value is greater than or equal to the threshold; as well as When the ratio parameter is less than the ratio threshold, the comparison indicates that the ratio is less than the threshold.

3. The method according to claim 2, characterized in that, When the block width is greater than the block height, the ratio parameter is determined by dividing the block width by the block height; and When the block height is greater than or equal to the block width, the ratio parameter is determined by dividing the block height by the block width.

4. The method according to claim 2, characterized in that, The ratio parameter is equal to the absolute value of the difference, which is generated by subtracting the base-2 logarithm of the block height from the base-2 logarithm of the block width.

5. The method according to claim 1, further comprising: When the block unit is predicted using the geometric segmentation pattern, the segmentation index, the first merge index, and the second merge index of the block unit are determined. The block units are divided based on the segmentation index to generate a first sub-block and a second sub-block; as well as The first sub-block is predicted by selecting a first merge pattern from multiple merge candidates based on the first merge index, and the second sub-block is predicted by selecting a second merge pattern from the multiple merge candidates based on the second merge index.

6. A method for decoding a bitstream using an electronic device, the method comprising: Receive image frames from the bitstream; Determine the block unit with block width and block height from the received image frame; Determine the comparison between the block width and the block height; When the comparison indicates that the ratio between the block width and the block height is greater than or equal to a threshold, the block cells are predicted to generate a prediction block based on a first prediction mode different from the geometric segmentation mode, wherein... The block width is compared with a first magnification value generated by multiplying the block height by the threshold. The block height is compared with a second magnification value generated by multiplying the block width by the threshold. When the block width is greater than or equal to the first magnification value, the comparison indicates that the ratio is greater than or equal to the threshold. When the block height is greater than or equal to the second magnification value, the comparison indicates that the ratio is greater than or equal to the threshold. When the geometric segmentation mode is applied to the block unit, the block unit is divided to generate multiple sub-blocks predicted by different merge candidates of the block unit; as well as The block unit is reconstructed based on the predicted block.

7. The method according to claim 6, further comprising: Determine the ratio parameter generated based on the block width and the block height; Compare the ratio parameter with the ratio threshold; as well as When the ratio parameter is greater than or equal to the ratio threshold, the comparison indicates that the ratio is greater than or equal to the threshold.

8. The method according to claim 7, characterized in that, When the block width is greater than the block height, the ratio parameter is determined by dividing the block width by the block height; and When the block height is greater than or equal to the block width, the ratio parameter is determined by dividing the block height by the block width.

9. The method according to claim 7, characterized in that, The ratio parameter is equal to the absolute value of the difference, which is generated by subtracting the base-2 logarithm of the block height from the base-2 logarithm of the block width.

10. The method according to claim 7, further comprising: When the ratio parameter is less than the ratio threshold, the comparison indicates that the ratio is less than the threshold; as well as When the comparison indicates that the ratio is less than the threshold, the block cell is predicted by selecting a second prediction mode from a plurality of candidate modes including the geometric segmentation mode to generate the predicted block.

11. The method according to claim 6, further comprising: When the block width is less than the first magnification value and the block height is less than the second magnification value, the comparison indicates that the ratio is less than the threshold. as well as When the comparison indicates that the ratio is less than the threshold, the block cell is predicted to generate the predicted block by selecting a second prediction mode from a plurality of candidate modes including the geometric segmentation mode.

12. An electronic device for decoding a bitstream, the electronic device comprising: At least one processor; as well as A memory coupled to the at least one processor and storing a program that, when executed by the at least one processor, causes the at least one processor to: Receive image frames from the bitstream; Determine the block unit with block width and block height from the received image frame; Determine the comparison between the block width and the block height; When the comparison indicates that the ratio between the block width and the block height is greater than or equal to a threshold, the block cells are predicted to generate a prediction block based on a first prediction mode different from the geometric segmentation mode, wherein... The block width is compared with a first magnification value generated by multiplying the block height by the threshold. The block height is compared with a second magnification value generated by multiplying the block width by the threshold. When the block width is greater than or equal to the first magnification value, the comparison indicates that the ratio is greater than or equal to the threshold. When the block height is greater than or equal to the second magnification value, the comparison indicates that the ratio is greater than or equal to the threshold. When the block width is less than the first magnification value and the block height is less than the second magnification value, the comparison indicates that the ratio is less than the threshold. When the comparison indicates that the ratio is less than the threshold, the block unit is predicted to generate the predicted block by selecting a second prediction mode from a plurality of candidate modes including the geometric segmentation mode. When the geometric segmentation mode is applied to the block unit, the block unit is divided to generate multiple sub-blocks predicted by different merge candidates of the block unit; as well as The block unit is reconstructed based on the predicted block.

13. The electronic device according to claim 12, characterized in that, When the program is executed by the at least one processor, the at least one processor also causes the at least one processor to: Determine the ratio parameter generated based on the block width and the block height; Compare the ratio parameter with the ratio threshold; and When the ratio parameter is greater than or equal to the ratio threshold, the comparison indicates that the ratio is greater than or equal to the threshold.

14. The electronic device according to claim 13, characterized in that, When the block width is greater than the block height, the ratio parameter is determined by dividing the block width by the block height; and When the block height is greater than or equal to the block width, the ratio parameter is determined by dividing the block height by the block width.

15. The electronic device according to claim 13, characterized in that, The ratio parameter is equal to the absolute value of the difference, which is generated by subtracting the base-2 logarithm of the block height from the base-2 logarithm of the block width.

16. The electronic device according to claim 13, characterized in that, When the program is executed by the at least one processor, the at least one processor further causes the at least one processor to: When the ratio parameter is less than the ratio threshold, the comparison indicates that the ratio is less than the threshold; and When the comparison indicates that the ratio is less than the threshold, the block cell is predicted by selecting a second prediction mode from a plurality of candidate modes including the geometric segmentation mode to generate the predicted block.

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