Interleaved parallel dc / dc boost converter based on capacitor-diode cells

Abstract

The application discloses a kind of based on diode-capacitor unit's staggered parallel DC / DC boost converter, belong to the field of power electronic converter.The converter is based on staggered parallel boost converter, and the input side / output side is increased by several by diode, capacitor capacitor-diode unit, by controlling the conduction and shutdown of two power switches, the on-off condition of diode, the connection mode of inductance and capacitance in circuit can be changed, so as to achieve the effect of improving voltage gain.The voltage gain of the application is higher, the voltage stress of switching device is lower, the average value of inductance current is smaller, and is suitable for fuel cell, photovoltaic cell and other new energy power generation system.

Description

Technical Field

[0001] This invention belongs to the field of power electronic converters, specifically an interleaved parallel DC / DC boost converter based on capacitor-diode units. Background Technology

[0002] Energy is the material foundation of human societal development and plays a crucial role in it. Under the dual pressures of energy scarcity and environmental concerns, new energy power generation technologies such as wind, solar, and hydrogen energy have gained unprecedented development opportunities. Fuel cells, as a clean and efficient new energy power generation device, can directly convert hydrogen energy into electrical energy, without being limited by the Carnot cycle or polluting the environment, thus greatly improving energy utilization efficiency. However, fuel cells have the characteristics of a low-voltage, high-current output current source, making it difficult to directly connect to an inverter system for grid-connected operation. A front-end power converter with boost function is required to raise the output voltage to a level that meets the needs of the downstream inverter system.

[0003] High-gain boost converters are generally classified into isolated and non-isolated types. In isolated converters, a higher voltage gain can be achieved by adjusting the turns ratio of the high-frequency transformer. However, an excessively high turns ratio can affect the transformer's linearity and increase its leakage inductance, thereby reducing the converter's efficiency. Compared to isolated converters, non-isolated converters have gained widespread attention from scholars both domestically and internationally due to their simpler circuit structure and lower cost. Traditional boost converters are characterized by simple topology and flexible control, but their voltage gain is limited within the allowable duty cycle range, and the switching devices experience significant voltage stress. Building upon traditional boost converters, many researchers have introduced interleaved parallel technology, coupled inductors, switched inductor units, switched capacitors, and capacitor-diode units. Interleaved parallel boost converters have lower input current ripple and can share converter power using current sharing techniques, but high voltage gain can only be achieved at extreme duty cycles and power device losses are relatively high. Boost converters based on coupled inductors achieve higher voltage gain by changing the turns ratio of the coupled inductor windings, but due to leakage inductance, clamping circuits are needed to suppress turn-off voltage spikes of the switching transistors. Boost converters based on switched inductor units extend the voltage gain range, but the voltage stress on the power devices is still relatively high and the gain is limited. Boost converters based on switched capacitor units and capacitor-diode units have lower voltage stress on the switching devices, but the effective value of the current flowing through the power switches is relatively large and the voltage gain is only twice that of boost converters. Summary of the Invention

[0004] The purpose of this invention is to provide an interleaved parallel DC / DC boost converter based on capacitor-diode units.

[0005] The technical solution to achieve the purpose of this invention is: an interleaved parallel DC / DC boost converter based on capacitor-diode units, comprising interleaved parallel boost units and an output-side charge pump unit, wherein:

[0006] The interleaved parallel boost unit includes an input-side charge pump unit, a first inductor, a second inductor, a first power switch, a second power switch, and an input source. The input-side charge pump unit consists of a first capacitor and a first diode. The cathode of the first diode is connected to the anode of the first capacitor. The cathode of the first capacitor and the anode of the first diode are respectively connected to the two ends of the second inductor. The anode of the first diode is connected to the positive terminal of the input source, the cathode of the input source is connected to the source of the second power switch, and the drain of the second power switch is connected to the cathode of the first capacitor. The source of the second power switch is connected to the source of the first power switch, the drain of the first power switch is connected to one end of the first inductor, and the other end of the first inductor is connected to the positive terminal of the input source.

[0007] The output-side charge pump unit consists of a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a second diode, a third diode, a fourth diode, a fifth diode, and a load. The anode of the fourth diode is connected to one end of the fourth capacitor and the cathode of the third diode. The other end of the fourth capacitor is connected to the cathode of the second diode and one end of the second capacitor. The other end of the second capacitor is connected to the drain of the first power switch. The cathode of the fourth diode is connected to one end of the third capacitor and the anode of the second diode. The other end of the third capacitor is connected to the anode of the third diode and the cathode of the first diode. The anode of the fifth diode is connected to the cathode of the second diode. The cathode of the fifth diode is connected to one end of the fifth capacitor and one end of the load. The other end of the fifth capacitor is connected to the other end of the load and the negative terminal of the input source.

[0008] Preferably, the first power switch and the second power switch adopt a centrally symmetrical conduction strategy within one cycle. When the duty cycle D is less than 0.5, the first power switch and the second power switch have three combined states within one cycle: in the first stage t0 to t1, the first power switch is on and the second power switch is off; in the second stage t1 to t2, the first power switch and the second power switch are both off; and in the third stage t2 to t3, the first power switch is off and the second power switch is on. When the duty cycle D is greater than 0.5, the first power switch and the second power switch have three combined states: in the first stage t0 to t1, the first power switch is on and the second power switch is off; in the second stage t1 to t2, the first power switch and the second power switch are both on; and in the third stage t2 to t3, the first power switch is off and the second power switch is on.

[0009] Preferably, the time intervals of the three stages t0~t1, t1~t2, and t2~t3 within one switching cycle are denoted as T1, T2, and T3, respectively, and Ts represents one switching cycle. Then, T1=T3=(1-D)Ts, T2=(2D-1)Ts, and D is the duty cycle.

[0010] Preferably, during the phase when the first power switch is turned on and the second power switch is turned off, the second diode and the third diode are turned on, while the first diode, the fourth diode, and the fifth diode are turned off; the input power supply charges the first inductor through the first power switch; the input power supply, the second inductor, the first capacitor, and the third / fourth capacitor charge the second capacitor through the first power switch and the second diode VD2 / the third diode; the fifth capacitor provides energy to the load.

[0011] Preferably, during the turn-off phase of the first and second power switches, the second, third, and fifth diodes are turned on, while the first and fourth diodes are turned off; the input power supply, the second inductor, the first capacitor, and the third / fourth capacitor charge the fifth capacitor through the second diode VD2 / the third and fifth diodes, while simultaneously providing energy to the load; the input power supply, the first inductor, and the second capacitor charge the fifth capacitor through the fifth diode, while simultaneously providing energy to the load.

[0012] Preferably, during the stage where the first power switch is turned off and the second power switch is turned on, the first diode, the fourth diode, and the fifth diode are turned on, while the second diode and the third diode are turned off; the input power supply charges the second inductor through the second power switch and charges the first capacitor through the second power switch and the first diode; the input power supply, the first inductor, and the second capacitor charge the first capacitor, the third capacitor, and the fourth capacitor through the second power switch and the fourth diode, and charge the fifth capacitor through the fifth diode, thereby providing energy to the load.

[0013] Preferably, during the conduction phase of the first power switch and the second power switch, the first diode is turned on, while the second, third, fourth, and fifth diodes are turned off; the input power supply charges the first inductor through the first power switch; the input power supply charges the second inductor through the second power switch, and charges the first capacitor through the second power switch and the first diode; the fifth capacitor provides energy to the load.

[0014] Compared with the prior art, the present invention has the following significant advantages: (1) By controlling the conduction and turn-off of two power switching transistors, the on / off state of the diodes and the connection method of the inductors and capacitors in the circuit can be changed, thereby achieving the effect of improving voltage gain; (2) The voltage stress on the switching devices is low, and the average value of the inductor current and the ripple are small; (3) In the two cases of duty cycle D<0.5 and D>0.5, the power switching transistors of the converter have three different combination states in one cycle, which makes the control flexible and versatile. Attached Figure Description

[0015] Figure 1 This is a circuit diagram of the alternating parallel DC / DC boost converter based on capacitor-diode units according to the present invention.

[0016] Figure 2 This is the equivalent circuit diagram of the alternating parallel DC / DC boost converter based on capacitor-diode units according to the present invention, wherein... Figure 2 (a) is the equivalent circuit diagram of the first power switch S1 being turned on and the second power switch S2 being turned off. Figure 2 (b) is the equivalent circuit diagram of the first power switch S1 and the second power switch S2 during the turn-off stage when D<0.5; Figure 2 (c) is the equivalent circuit diagram of the first power switch S1 being turned off and the second power switch S2 being turned on. Figure 2 (d) is the equivalent circuit diagram of the first power switch S1 and the second power switch S2 during the conduction stage when D>0.5.

[0017] Figure 3 The main waveform diagrams of the alternating parallel DC / DC boost converter based on capacitor-diode units of this invention are shown below. Figure 3 (a) is a waveform diagram of the current flowing through the first inductor L1 and the second inductor L2 and the voltage across each switch and diode when D<0.5; Figure 3 (b) is a waveform diagram of the current flowing through the first inductor L1 and the second inductor L2 and the voltage across each switch and diode when D>0.5.

[0018] Figure 4 The output voltage simulation waveform of the alternating parallel DC / DC boost converter based on switched capacitor units of this invention is shown. Detailed Implementation

[0019] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0020] Based on current research on non-isolated Boost converters, this invention proposes an interleaved parallel DC / DC boost converter based on capacitor-diode units, enabling it to achieve high voltage gain while minimizing voltage stress on switching devices, average inductor current, and ripple. For example... Figure 1 As shown, the interleaved parallel DC / DC boost converter based on capacitor-diode units consists of an input source Uin, a load R, an input-side charge pump unit 1, an interleaved parallel boost unit 2, and an output-side charge pump unit 3.

[0021] The input-side charge pump unit 1 is composed of a first capacitor C1 and a first diode VD1; the cathode of the first diode VD1 is connected to the anode of the first capacitor C1.

[0022] The interleaved parallel boost unit 2 includes an input-side charge pump unit 1, a first inductor L1, a second inductor L2, a first power switch S1, a second power switch S2, and an input source Uin. The negative terminal of the first capacitor C1 and the anode of the first diode VD1 in the input-side charge pump unit 1 are respectively connected to the two ends of the second inductor L2. The anode lead of the first diode VD1 is connected to the positive terminal of the input source Uin, the negative terminal of the input source Uin is connected to the source of the second power switch S2, and the drain of the second power switch S2 is connected to the negative terminal of the first capacitor C1. The source lead of the second power switch S2 is connected to the source of the first power switch S1, the drain of the first power switch S1 is connected to one end of the first inductor L1, and the other end of the first inductor L1 is connected to the positive terminal of the input source Uin.

[0023] The output-side charge pump unit 3 consists of a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a second diode VD2, a third diode VD3, a fourth diode VD4, a fifth diode VD5, and a load R. The anode of the fourth diode VD4 is connected to one end of the fourth capacitor C4, and its lead is connected to the cathode of the third diode VD3. The other end of the fourth capacitor C4 is connected to the cathode of the second diode VD2, and its lead is connected to one end of the second capacitor C2. The other end of the second capacitor C2 is connected to the drain of the first power switch S1. The cathode of the fourth diode VD4 is connected to one end of the third capacitor C3, and its lead is connected to the anode of the second diode VD2. The other end of the third capacitor C3 is connected to the anode of the third diode VD3, and its lead is connected to the cathode of the first diode VD1. The anode of the fifth diode VD5 is connected to the cathode of the second diode VD2. The cathode of the fifth diode VD5 is connected to one end of the fifth capacitor C5, and its lead is connected to one end of the load R. The other end of the fifth capacitor C5 is connected to the other end of the load R, and its lead is connected to the negative terminal of the input source Uin.

[0024] In the alternating parallel DC / DC boost converter based on capacitor-diode units, the first power switch S1 and the second power switch S2 adopt a centrally symmetrical conduction control strategy within one cycle. When the duty cycle D is less than 0.5, the first power switch (S1) and the second power switch (S2) have three combined states within one cycle: In the first stage t0 to t1, the first power switch (S1) is on and the second power switch (S2) is off; in the second stage t1 to t2, the first power switch (S1) and the second power switch (S2) are both off; in the third stage t2 to t3, the first power switch (S1) is off and the second power switch (S2) is on. When the duty cycle D is greater than 0.5, the first power switch (S1) and the second power switch (S2) have three combined states: In the first stage t0 to t1, the first power switch (S1) is on and the second power switch (S2) is off; in the second stage t1 to t2, the first power switch (S1) and the second power switch (S2) are both on; in the third stage t2 to t3, the first power switch (S1) is off and the second power switch (S2) is on. In summary, there are four possible combinations of states for the first power switch (S1) and the second power switch (S2). The equivalent circuits for these four states are as follows: Figure 2 As shown.

[0025] During the phase when the first power switch (S1) is turned on and the second power switch (S2) is turned off, such as Figure 2 As shown in (a); the second diode (VD2) and the third diode (VD3) are turned on, while the first diode (VD1), the fourth diode (VD4), and the fifth diode (VD5) are turned off; the input power supply (Vin) charges the first inductor (L1) through the first power switch (S1); the input power supply (Vin), the second inductor (L2), the first capacitor (C1), and the third capacitor (C3) / fourth capacitor (C4) charge the second capacitor (C2) through the first power switch (S1) and the second diode VD2 / third diode (VD3); the fifth capacitor (C5) provides energy to the load (R).

[0026] During the turn-off phase of the first power switch (S1) and the second power switch (S2), such as Figure 2As shown in (b); the second diode (VD2), the third diode (VD3), and the fifth diode (VD5) are turned on, while the first diode (VD1) and the fourth diode (VD4) are turned off; the input power supply (Vin), the second inductor (L2), the first capacitor (C1), and the third capacitor (C3) / fourth capacitor (C4) charge the fifth capacitor (C5) through the second diode VD2 / third diode (VD3) and the fifth diode (VD5), while simultaneously providing energy to the load (R); the input power supply (Vin), the first inductor (L1), and the second capacitor (C2) charge the fifth capacitor (C5) through the fifth diode (VD5), while simultaneously providing energy to the load (R).

[0027] During the stage when the first power switch (S1) is turned off and the second power switch (S2) is turned on, such as Figure 2 As shown in (c); the first diode (VD1), the fourth diode (VD4), and the fifth diode (VD5) are turned on, while the second diode (VD2) and the third diode (VD3) are turned off; the input power supply (Vin) charges the second inductor (L2) through the second power switch (S2), and charges the first capacitor (C1) through the second power switch (S2) and the first diode (VD1); the input power supply (Vin), the first inductor (L1), and the second capacitor (C2) charge the first capacitor (C1), the third capacitor (C3), and the fourth capacitor (C4) through the second power switch (S2) and the fourth diode (VD4), and charge the fifth capacitor (C5) through the fifth diode (VD5), thus providing energy to the load (R).

[0028] During the conduction phase of the first power switch (S1) and the second power switch (S2), such as Figure 2 As shown in (d); the first diode (VD1) is turned on, and the second diode (VD2), the third diode (VD3), the fourth diode (VD4), and the fifth diode (VD5) are turned off; the input power supply (Vin) charges the first inductor (L1) through the first power switch (S1); the input power supply (Vin) charges the second inductor (L2) through the second power switch (S2), and charges the first capacitor (C1) through the second power switch (S2) and the first diode (VD1); the fifth capacitor (C5) provides energy to the load (R).

[0029] In the circuit operating mode, "branch(...) / / branch(...)" means that two branches are connected in parallel. For example, "(first inductor L1, second diode VD2) / / (first diode VD1, second inductor L2)" means that "the branch containing (first inductor L1, second diode VD2) is connected in parallel with the branch containing (first diode VD1, second inductor L2)".

[0030] When the duty cycle D < 0.5, the main circuit waveform is as follows: Figure 3 As shown in (a), where U gs1 U gs2 U represents the control signals for the first power switch (S1) and the second power switch (S2), respectively. S1 U S2 U represents the voltage across the first power switch (S1) and the second power switch (S2), respectively. VD1 ~U VD5 This indicates the voltage across diodes 1 through 5 (VD5), U C1 ~U C5 I represents the voltage across capacitors 1 through 5 (C5). L1 I L2 These represent the currents of the first inductor (L1) and the second inductor (L2), respectively. Additionally, U... out This represents the output voltage, and D represents the duty cycle.

[0031] Assume that the time intervals of the three stages (0~t1), (t1~t2), and (t2~t3) of the converter within one switching cycle are denoted as T1, T2, and T3, and Ts represents one switching cycle. Then T1 = T3 = DTs, and T2 = (1-2D)Ts.

[0032] During the period from 0 to t1 when the first power switch S1 is on and the second power switch S2 is off, the input source Uin, the first inductor L1, and the first power switch S1 form a loop; the input source Uin, the second inductor L2, the first capacitor C1, (the third capacitor C3, the second diode VD2) / / (the third diode VD3, the fourth capacitor C4), the second capacitor C2, and the first power switch S1 form another loop. The fifth capacitor C5 provides energy to the load R, maintaining a constant output voltage. In one switching cycle, according to Kirchhoff's voltage law, we can obtain...

[0033]

[0034] During the turn-off phase (t1~t2) of the first power switch S1 and the second power switch S2, the input source Uin, the first inductor L1, the second capacitor C2, the fifth diode VD5, and the fifth capacitor C5 form a circuit to provide energy to the load R. The input source Uin, the second inductor L2, the first capacitor C1, (the third capacitor C3, the second diode VD2) / / (the third diode VD3, the fourth capacitor C4), the fifth diode VD5, and the fifth capacitor C5 form a circuit to provide energy to the load R. In one switching cycle, according to Kirchhoff's voltage law, we can obtain...

[0035]

[0036] During the period when the first power switch S1 is off and the second power switch S2 is on (t2~t3), the input source Uin, the second inductor L2, and the second power switch S2 form one loop; the input source Uin, the first diode VD1, the first capacitor C1, and the second power switch S2 form another loop; the input source Uin, the first inductor L1, the second capacitor C2, the fourth capacitor C4, the fourth diode VD4, the third capacitor C3, the first capacitor C1, and the second power switch S2 form another loop; and the input source Uin, the first inductor L1, the second capacitor C2, the fifth diode VD5, and the fifth capacitor C5 form yet another loop, providing energy to the load R. In one switching cycle, according to Kirchhoff's voltage law, we can obtain...

[0037]

[0038] Since the voltage across the capacitor remains essentially constant, the voltages across capacitors C1, C3 through C5 can be expressed as:

[0039]

[0040] Combining equations (1), (2), and (3), we can establish the inductor volt-second balance equation for inductors L1 and L2, and obtain...

[0041]

[0042] Simplifying equation (4), the voltage gain of the converter when the duty cycle D < 0.5 is:

[0043]

[0044] In addition, the maximum voltage stress that the power switching transistors S1 and S2 can withstand is

[0045]

[0046] The maximum voltage stress that diodes VD1 to VD5 can withstand is

[0047]

[0048] When the duty cycle D > 0.5, the main circuit waveform is as follows: Figure 3 As shown in (b), U gs1 U gs2 U represents the control signals for the first power switch (S1) and the second power switch (S2), respectively. S1 U S2 U represents the voltage across the first power switch (S1) and the second power switch (S2), respectively. VD1 ~U VD5This indicates the voltage across diodes 1 through 5 (VD5), U C1 ~U C5 I represents the voltage across capacitors 1 through 5 (C5). L1 I L2 These represent the currents of the first inductor (L1) and the second inductor (L2), respectively. Additionally, U... out This represents the output voltage, and D represents the duty cycle.

[0049] Assume that the time intervals of the three stages (t0~t1), (t1~t2), and (t2~t3) of the converter within one switching cycle are denoted as T1, T2, and T3, and Ts represents one switching cycle. Then T1=T3=(1-D)Ts, T2=(2D-1)Ts.

[0050] During the period from 0 to t1 when the first power switch S1 is turned on and the second power switch S2 is turned off, the analysis is the same as above.

[0051] During the turn-off phase (t1~t2) of the first power switch S1 and the second power switch S2, the input source Uin, the second inductor L2, and the second power switch S2 form a loop; the input source Uin, the first diode VD1, the first capacitor C1, and the second power switch S2 form a loop; the input source Uin, the first inductor L1, and the first power switch S1 form a loop; and the fifth capacitor C5 provides energy to the load R. In one switching cycle, according to Kirchhoff's voltage law, we can obtain...

[0052] U L1 =U L2 =U in (9)

[0053] During the period when the first power switch S1 is turned off and the second power switch S2 is turned on (t2~t3), the analysis is the same as above.

[0054] Combining equations (1), (3), and (9), we can establish the inductor volt-second balance equation for inductors L1 and L2, and obtain...

[0055]

[0056] Simplifying equation (4), the voltage gain of the converter when the duty cycle D > 0.5 is:

[0057]

[0058] The maximum voltage stress that power switching transistors S1 and S2 can withstand is

[0059]

[0060] The maximum voltage stress that diodes VD1 to VD5 can withstand is

[0061]

[0062] Combining equations (6) and (11), it can be seen that the output voltage gain of the present invention is relatively large. Combining equations (7), (8), (12), and (13), it can be seen that the voltage stress borne by the switching device in the present invention is relatively low, which helps to reduce the conduction loss of the switching device.

[0063] like Figure 4 As shown, when the input voltage is 10V and the duty cycles D1 and D2 of the first power switch S1 and the second power switch S2 are both set to 0.64, the output voltage can be maintained at around 120V, which is close to the theoretical calculation value, verifying that the present invention has the characteristic of high voltage gain.

Claims

1. A capacitor-diode unit-based interleaved parallel DC / DC boost converter, characterized in that, Includes an interleaved parallel boost unit (2) and an output-side charge pump unit (3), wherein: The interleaved parallel boost unit (2) includes an input-side charge pump unit (1), a first inductor (L1), a second inductor (L2), a first power switch (S1), a second power switch (S2), and an input source (Uin); the input-side charge pump unit (1) is composed of a first capacitor (C1) and a first diode (VD1); the cathode of the first diode (VD1) is connected to the anode of the first capacitor (C1); the cathode of the first capacitor (C1) and the anode of the first diode (VD1) are respectively connected to the second capacitor (C1). The two ends of the inductor (L2); the anode of the first diode (VD1) is connected to the positive terminal of the input source (Uin), the negative terminal of the input source (Uin) is connected to the source of the second power switch (S2), the drain of the second power switch (S2) is connected to the negative terminal of the first capacitor (C1); the source of the second power switch (S2) is connected to the source of the first power switch (S1), the drain of the first power switch (S1) is connected to one end of the first inductor (L1), and the other end of the first inductor (L1) is connected to the positive terminal of the input source (Uin); The output-side charge pump unit (3) consists of a second capacitor (C2), a third capacitor (C3), a fourth capacitor (C4), a fifth capacitor (C5), a second diode (VD2), a third diode (VD3), a fourth diode (VD4), a fifth diode (VD5), and a load (R). The anode of the fourth diode (VD4) is connected to one end of the fourth capacitor (C4) and the cathode of the third diode (VD3). The other end of the fourth capacitor (C4) is connected to the cathode of the second diode (VD2) and one end of the second capacitor (C2). The other end of the second capacitor (C2) is connected to the first power supply. The drain of the power switching transistor (S1); the cathode of the fourth diode (VD4) is connected to one end of the third capacitor (C3) and the anode of the second diode (VD2), and the other end of the third capacitor (C3) is connected to the anode of the third diode (VD3) and the cathode of the first diode (VD1); the anode of the fifth diode (VD5) is connected to the cathode of the second diode (VD2), the cathode of the fifth diode (VD5) is connected to one end of the fifth capacitor (C5) and one end of the load (R), and the other end of the fifth capacitor (C5) is connected to the other end of the load (R) and the negative terminal of the input source (Uin); The first power switch (S1) and the second power switch (S2) employ a centrally symmetrical conduction strategy within one cycle. When the duty cycle D is less than 0.5, the first power switch (S1) and the second power switch (S2) have three combined states within one cycle: In the first stage t0~t1, the first power switch (S1) is on and the second power switch (S2) is off; in the second stage t1~t2, both the first power switch (S1) and the second power switch (S2) are off; in the third stage t2~t3, the first power switch (S1) is off and the second power switch (S2) is off. When the first power switch (S1) is turned off and the second power switch (S2) is turned on, and when the duty cycle D is greater than 0.5, the first power switch (S1) and the second power switch (S2) have three combined states: in the first stage t0 to t1, the first power switch (S1) is turned on and the second power switch (S2) is turned off; in the second stage t1 to t2, the first power switch (S1) and the second power switch (S2) are turned on at the same time; in the third stage t2 to t3, the first power switch (S1) is turned off and the second power switch (S2) is turned on.

2. The alternating parallel DC / DC boost converter based on capacitor-diode units according to claim 1, characterized in that, The time intervals between the three stages t0~t1, t1~t2, and t2~t3 within a switching cycle are denoted as T1, T2, and T3, respectively. Ts represents one switching cycle. Then, T1=T3=(1-D)Ts, T2=(2D-1)Ts, and D is the duty cycle.

3. The alternating parallel DC / DC boost converter based on capacitor-diode units according to claim 1, characterized in that, During the phase where the first power switch (S1) is turned on and the second power switch (S2) is turned off, the second diode (VD2) and the third diode (VD3) are turned on, while the first diode (VD1), the fourth diode (VD4), and the fifth diode (VD5) are turned off. The input power supply (Vin) charges the first inductor (L1) through the first power switch (S1). The input power supply (Vin), the second inductor (L2), the first capacitor (C1), and the third capacitor (C3) / fourth capacitor (C4) charge the second capacitor (C2) through the first power switch (S1) and the second diode VD2 / third diode (VD3). The fifth capacitor (C5) provides energy to the load (R).

4. The alternating parallel DC / DC boost converter based on capacitor-diode units according to claim 1, characterized in that, During the turn-off phase of the first power switch (S1) and the second power switch (S2), the second diode (VD2), the third diode (VD3), and the fifth diode (VD5) are turned on, while the first diode (VD1) and the fourth diode (VD4) are turned off. The input power supply (Vin), the second inductor (L2), the first capacitor (C1), and the third capacitor (C3) / fourth capacitor (C4) charge the fifth capacitor (C5) through the second diode VD2 / third diode (VD3) and fifth diode (VD5), while simultaneously providing energy to the load (R). The input power supply (Vin), the first inductor (L1), and the second capacitor (C2) charge the fifth capacitor (C5) through the fifth diode (VD5), while simultaneously providing energy to the load (R).

5. The alternating parallel DC / DC boost converter based on capacitor-diode units according to claim 1, characterized in that, During the phase where the first power switch (S1) is off and the second power switch (S2) is on, the first diode (VD1), the fourth diode (VD4), and the fifth diode (VD5) are on, while the second diode (VD2) and the third diode (VD3) are off. The input power supply (Vin) charges the second inductor (L2) through the second power switch (S2) and charges the first capacitor (C1) through the second power switch (S2) and the first diode (VD1). The input power supply (Vin), the first inductor (L1), and the second capacitor (C2) charge the first capacitor (C1), the third capacitor (C3), and the fourth capacitor (C4) through the second power switch (S2) and the fourth diode (VD4), and charge the fifth capacitor (C5) through the fifth diode (VD5), thus providing energy to the load (R).

6. The alternating parallel DC / DC boost converter based on capacitor-diode units according to claim 1, characterized in that, During the conduction phase of the first power switch (S1) and the second power switch (S2), the first diode (VD1) is turned on, while the second diode (VD2), the third diode (VD3), the fourth diode (VD4), and the fifth diode (VD5) are turned off. The input power supply (Vin) charges the first inductor (L1) through the first power switch (S1). The input power supply (Vin) charges the second inductor (L2) through the second power switch (S2), and charges the first capacitor (C1) through the second power switch (S2) and the first diode (VD1). The fifth capacitor (C5) provides energy to the load (R).

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