Synchronous accurate voltage glitch injection circuit and method for side channel attacks

Abstract

The present invention discloses a circuit and method for synchronously injecting precise voltage glitch for side channel attack, the circuit comprises an oscilloscope, a precision voltage source, a host computer, an attacked password chip, a high-speed multi-channel signal switching chip, and a single-chip microcomputer, wherein the precision voltage source is connected to the high-speed multi-channel signal switching chip, the high-speed multi-channel signal switching chip is respectively connected to the attacked password chip and the single-chip microcomputer, the attacked password chip is respectively connected to the single-chip microcomputer and the host computer, and the oscilloscope is connected to the attacked password chip. The present invention can accurately inject voltage glitch faults at a certain time position when the password chip is running, and can be used for fault injection experiments of hardware devices running different cryptographic algorithms, providing a physical experimental basis for subsequent fault analysis and key recovery work.

Description

Technical Field

[0001] The present invention relates to the technical field of side channel attacks, and in particular to a synchronous and precise voltage glitch injection circuit and method for side channel attacks. Background Art

[0002] Voltage fault attack is a type of side channel attack. By analyzing the fault output results of the encryption chip, it is expected to deduce the key used by the encryption chip. The existing voltage fault injection technology for side channel attack is mainly continuous undervoltage fault injection and undervoltage glitch fault injection technology, which does not have the function of injecting faults at a fixed position. The existing continuous undervoltage fault injection and undervoltage glitch fault injection technologies have certain shortcomings in the fault injection experiment on the encryption chip: on the one hand, although continuous undervoltage fault injection is easy to implement technically, it will cause the chip to produce multiple multi-byte faults, and the faults are difficult to screen; on the other hand, the existing undervoltage glitch fault injection technology cannot achieve fault injection at a specified position, and the results of multiple experiments under the same conditions are mostly different. In addition, undervoltage glitches are difficult to inject faults stably, which can easily cause the encryption results of the chip to output slowly instead of failing. In the long-term fault injection experiment, it was found that overvoltage glitches are more likely to cause chip failures. In order to further study the impact of voltage faults on encryption chips, consider injecting faults at a certain position of the specified encryption process and then perform cryptographic analysis. Summary of the invention

[0003] The purpose of the present invention is to provide a synchronous and precise voltage glitch injection circuit and method for side channel attacks, which can accurately inject voltage glitch faults at a certain time position when a cryptographic chip is running. It can be used for fault injection experiments of hardware devices running different cryptographic algorithms, and provides a physical experimental basis for subsequent fault analysis and key recovery work.

[0004] To achieve the above object, the present invention provides the following solutions:

[0005] A synchronous and precise voltage glitch injection circuit for side channel attacks, comprising an oscilloscope, a precision voltage source, a host computer, an attacked password chip, a high-speed multi-channel signal switching chip, and a single-chip microcomputer, wherein the precision voltage source is connected to the high-speed multi-channel signal switching chip, the high-speed multi-channel signal switching chip is respectively connected to the attacked password chip and the single-chip microcomputer, the attacked password chip is respectively connected to the single-chip microcomputer and the host computer, and the oscilloscope is connected to the attacked password chip;

[0006] The precision voltage source is used to provide two voltage outputs, the high-speed multi-channel signal switching chip is used to switch the two voltage outputs of the precision voltage source, and output a voltage glitch signal to the attacked password chip; the single-chip microcomputer is used to control the switching time of the high-speed multi-channel signal switching chip, the attacked password chip transmits the running encryption result to the host computer through the serial port, the host computer is used to collect fault data of the attacked password chip, and is also used for programming the single-chip microcomputer, and the voltage glitch signal injection time and duration are regulated by editing the code; the oscilloscope is used to observe the electromagnetic signal of the attacked password chip to determine the voltage fault injection position.

[0007] Furthermore, the oscilloscope is PicoScope5244D with a bandwidth of 300MHz; the precision voltage source is KEYSIGHT E3631A with a voltage accuracy of up to mV and electrical isolation between the two voltage outputs; the host computer is a PC with a Windows system, using an ACER E1-471G laptop; the attacked password chip is an ATmega16A microcontroller; the high-speed multi-channel signal switching chip is ISL54200, with a switching speed of up to 880MHz; the microcontroller is STC12A60S2.

[0008] The present invention also provides a method for synchronizing and accurately injecting voltage glitch against side channel attacks, which is applied to the above-mentioned circuit for synchronizing and accurately injecting voltage glitch against side channel attacks, and comprises the following steps:

[0009] S1, determine the normal operating voltage range of the attacked cryptographic chip according to the chip manual, connect its VCC and GND pins to a voltage output of a precision voltage source, roughly locate the chip's undervoltage fault threshold and overvoltage fault threshold with a step value of 0.1V, and determine the fault voltage;

[0010] S2, connecting a precision voltage source with a high-speed multi-channel signal switching chip, wherein the two voltage outputs of the precision voltage source are respectively the normal working voltage VCC1 of the attacked password chip and the fault voltage VCC2 obtained in step S1; the high-speed multi-channel signal switching chip has a control signal input pin IN, a switching enable pin EN, a to-be-switched signal 1 pin PORT1, a to-be-switched signal 2 pin PORT2, a signal output pin COM, and VCC and GND pins, wherein PORT1 is connected to the normal working voltage VCC1, and PORT2 is connected to the fault voltage VCC2;

[0011] S3, connecting the single-chip microcomputer with the high-speed multi-channel signal switching chip, wherein the single-chip microcomputer defines a certain IO pin to be responsible for outputting the control signal of the high-speed multi-channel signal switching chip;

[0012] S4, connecting the MCU and the attacked encryption chip. The attacked encryption chip generates a falling edge trigger during operation, which triggers the external interrupt INT0 of the MCU to synchronize the two.

[0013] S5, using an oscilloscope and an electromagnetic probe to observe the electromagnetic leakage signal of the attacked encryption chip, determining the time position of the attack statement according to the design logic of the encryption algorithm and writing the corresponding timing function, so that the single-chip microcomputer controls the high-speed multi-channel signal switching chip and the precision voltage source to generate voltage glitches at the attack position;

[0014] S6, connecting the high-speed multi-channel signal switching chip and the attacked encryption chip, so that the signal output pin COM and the ground pin GND of the high-speed multi-channel signal switching chip are connected to the power supply pin VCC and the ground pin GND of the attacked encryption chip respectively;

[0015] S7, the MCU and the precision voltage source are powered on, and an overvoltage glitch or undervoltage glitch fault is injected into the attacked encryption chip at the planned position. The initial voltage value of VCC2 is the fault threshold obtained in step S1. During the experiment, the voltage fault value, the voltage glitch injection position and the duration of the voltage glitch can be adjusted. The output results of the chip are observed through the serial port of the host computer, and the fault types generated by the chip under different parameters are analyzed.

[0016] According to the specific embodiments provided by the present invention, the present invention discloses the following technical effects: the synchronous and precise voltage glitch injection circuit and method for side channel attack provided by the present invention are composed of an oscilloscope, a precision voltage source, a host computer, an attacked cryptographic chip, a high-speed multi-channel signal switching chip, and a single-chip microcomputer. The complete synchronous and precise voltage glitch injection circuit requires a single-chip microcomputer, a precision voltage source, and a high-speed multi-channel signal switching chip. The time position of the voltage glitch injection and the duration of the glitch are regulated by the single-chip microcomputer; the falling edge interrupt trigger function of the single-chip microcomputer is used to achieve synchronization with the attacked cryptographic chip, and the working mode of the high-speed multi-channel signal switching chip is controlled by the single-chip microcomputer to control the output time of two different voltages, which can generate ns-level overvoltage and undervoltage glitch pulses; the present invention can realize overvoltage glitch fault injection and undervoltage glitch fault injection into the cryptographic chip, and the time position of the voltage glitch injection and the duration of the glitch are regulated by the single-chip microcomputer, so as to analyze the fault type generated by the cryptographic chip under different voltage parameters, and is expected to recover the key used by the cryptographic chip in combination with other side channel analysis methods such as differential fault analysis and algebraic fault analysis. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0018] Figure 1 It is a control block diagram of a synchronous and precise voltage glitch injection circuit for side channel attacks according to the present invention;

[0019] Figure 2 The circuit connection diagram of the attacked encryption chip and the precision voltage source of the present invention;

[0020] Figure 3 It is a circuit connection diagram of the precision voltage source and the high-speed multi-channel signal switching chip of the present invention;

[0021] Figure 4 It is a circuit connection diagram of the single chip microcomputer and the high-speed multi-channel signal switching chip of the present invention;

[0022] Figure 5 A circuit connection diagram of the single chip microcomputer of the present invention and the attacked encryption chip;

[0023] Figure 6 This is an example diagram of the electromagnetic leakage signal of the encryption chip of the present invention;

[0024] Figure 7 It is a circuit connection diagram of the high-speed multi-channel signal switching chip of the present invention and the attacked encryption chip;

[0025] Figure 8 The invention provides a synchronous and precise voltage glitch injection circuit for side channel attacks;

[0026] Explanation of the reference numerals: 1. Oscilloscope; 2. Precision voltage source; 3. Host computer; 4. Attacked password chip; 5. High-speed multi-channel signal switching chip; 6. Single-chip microcomputer. DETAILED DESCRIPTION

[0027] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0028] The purpose of the present invention is to provide a synchronous and precise voltage glitch injection circuit for side channel attacks, which can accurately inject voltage glitch faults at a certain time position when a cryptographic chip is running. It can be used for fault injection experiments of hardware devices running different cryptographic algorithms, and provides a physical experimental basis for subsequent fault analysis and key recovery work.

[0029] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0030] like Figure 1 As shown, the synchronous and precise voltage glitch injection circuit for side channel attacks provided by the embodiment of the present invention includes an oscilloscope 1, a precision voltage source 2, a host computer 3, an attacked password chip 4, a high-speed multi-channel signal switching chip 5, and a single-chip microcomputer 6. The precision voltage source 2 is connected to the high-speed multi-channel signal switching chip 5, and the high-speed multi-channel signal switching chip 5 is respectively connected to the attacked password chip 4 and the single-chip microcomputer 6, and the attacked password chip 4 is respectively connected to the single-chip microcomputer 6 and the host computer 3, and the oscilloscope 1 is connected to the attacked password chip 4;

[0031] The precision voltage source 2 is used to provide two voltage outputs, the high-speed multi-channel signal switching chip 5 is used to switch the two voltage outputs of the precision voltage source 2, and output a voltage glitch signal to the attacked password chip 4; the single-chip computer 6 is used to control the switching time of the high-speed multi-channel signal switching chip 5, the attacked password chip 4 transmits the running encryption result to the host computer 3 through the serial port, the host computer 3 is used to collect the fault data of the attacked password chip 4, and is also used for programming the single-chip computer 6, and the voltage glitch signal injection time and duration are regulated by editing the code; the oscilloscope 1 is used to observe the electromagnetic signal of the attacked password chip 4 to determine the voltage fault injection position.

[0032] Among them, the oscilloscope 1 uses PicoScope5244D with a bandwidth of 300MHz; the precision voltage source 2 uses KEYSIGHT E3631A with a voltage accuracy of up to mV and electrical isolation between the two voltage outputs; the host computer 3 is a PC with a windows system, using an ACER E1-471G laptop; the attacked password chip 4 uses an ATmega16A microcontroller, which has low power consumption and can run a lightweight encryption algorithm; the high-speed multi-channel signal switching chip 5 is ISL54200, and its switching speed can reach up to 880MHz; the microcontroller 6 uses STC12A60S2, which is compatible with traditional 51 microcontrollers, but the speed is increased by 8 to 12 times.

[0033] The present invention also provides a method for synchronizing and accurately injecting voltage glitch against side channel attacks, which is applied to the above-mentioned circuit for synchronizing and accurately injecting voltage glitch against side channel attacks, and comprises the following steps:

[0034] S1, determine the normal working voltage range of the attacked cryptographic chip according to the chip manual, connect its VCC and GND pins to a voltage output of a precision voltage source, roughly locate the undervoltage fault threshold and overvoltage fault threshold of the chip with a step value of 0.1V, and determine the fault voltage; the circuit connection between the attacked encryption chip and the voltage source is as follows: Figure 2 As shown;

[0035] S2, connect the precision voltage source with the high-speed multi-channel signal switching chip, wherein the two voltage outputs of the precision voltage source are respectively the normal working voltage VCC1 of the attacked password chip and the fault voltage VCC2 obtained in step S1; the high-speed multi-channel signal switching chip has a control signal input pin IN, a switching enable pin EN, a to-be-switched signal 1 pin PORT1, a to-be-switched signal 2 pin PORT2, a signal output pin COM, and VCC and GND pins. The circuit connection between the voltage source and the high-speed multi-channel signal switching chip is as follows: Figure 3 As shown, PORT1 is connected to the normal working voltage VCC1, and PORT2 is connected to the fault voltage VCC2;

[0036] S3, connect the single-chip microcomputer with the high-speed multi-channel signal switching chip, where the single-chip microcomputer defines a certain IO pin to be responsible for outputting the control signal of the high-speed multi-channel signal switching chip; assuming that the control signal output pin of the single-chip microcomputer is P1^0, the circuit connection diagram is as follows Figure 4 As shown;

[0037] S4, connect the MCU and the attacked encryption chip. In order to control the voltage burr injection at the location where the attacked encryption chip executes the statement, the attacked encryption chip needs to be synchronized with the MCU. The attacked encryption chip generates a falling edge trigger during operation, and the falling edge triggers the external interrupt INT0 of the MCU to synchronize the two. The circuit connection diagram of the MCU and the attacked encryption chip is shown in Figure 5 As shown;

[0038] S5, use an oscilloscope and an electromagnetic probe to observe the electromagnetic leakage signal of the attacked encryption chip, such as Figure 6 As shown in the figure, serial numbers 1 to 8 are 8 register operation leaks of the encryption algorithm. The attacker determines the time position of the attack statement according to the design logic of the encryption algorithm and writes the corresponding timing function, so that the microcontroller controls the high-speed multi-channel signal switching chip and the precision voltage source to generate voltage glitches at the attack position;

[0039] S6, connect the high-speed multi-channel signal switching chip and the attacked encryption chip, so that the signal output pin COM and the ground pin GND of the high-speed multi-channel signal switching chip are respectively connected to the power supply pin VCC and the ground pin GND of the attacked encryption chip; the circuit connection diagram of the high-speed multi-channel signal switching chip and the attacked encryption chip is as shown in Figure 7 As shown;

[0040] S7, the MCU and the precision voltage source are powered on, and an overvoltage glitch or undervoltage glitch fault is injected into the attacked encryption chip at the planned position. The initial voltage value of VCC2 is the fault threshold obtained in step S1. During the experiment, the voltage fault value, the voltage glitch injection position and the duration of the voltage glitch can be adjusted. The output results of the chip are observed through the serial port of the host computer, and the fault types generated by the chip under different parameters are analyzed. The schematic diagram of the complete synchronous precision voltage glitch injection circuit is shown in Figure 8 shown.

[0041] The existing voltage fault injection technologies for side channel attacks are mainly continuous undervoltage fault injection and undervoltage glitch fault injection technologies, and do not have the function of injecting faults at fixed positions. Figure 5 The synchronous circuit realizes the voltage glitch fault injection technology of attacking the specified position, and can selectively realize overvoltage glitch and undervoltage glitch. Through comparative experiments, it is found that the overvoltage glitch fault injection technology is more efficient than the undervoltage glitch fault injection technology. Under the same parameter configuration, multiple overvoltage experiments can make the fault results repeated, while undervoltage experiments are difficult to reproduce. Therefore, the design of the synchronous circuit and the realization of the overvoltage glitch injection technology are the main advantages of the present invention.

[0042] The invention provides a synchronous and precise voltage glitch injection circuit and method for side channel attacks. The circuit is composed of an oscilloscope, a precision voltage source, a host computer, an attacked cryptographic chip, a high-speed multi-channel signal switching chip, and a single chip. The complete synchronous and precise voltage glitch injection circuit requires a single chip, a precision voltage source, and a high-speed multi-channel signal switching chip. The time position of the voltage glitch injection and the duration of the glitch are regulated by the single chip. The falling edge interrupt trigger function of the single chip is used to achieve synchronization with the attacked cryptographic chip, and the working mode of the high-speed multi-channel signal switching chip is controlled by the single chip to control the output time of two different voltages, so that ns-level overvoltage and undervoltage glitch pulses can be generated. The invention can realize overvoltage glitch fault injection and undervoltage glitch fault injection into the cryptographic chip, and the time position of the voltage glitch injection and the duration of the glitch are regulated by the single chip to analyze the fault type generated by the cryptographic chip under different voltage parameters. In combination with other side channel analysis methods such as differential fault analysis and algebraic fault analysis, the key used by the cryptographic chip can be recovered.

[0043] The principles and implementation methods of the present invention are described in this article using specific examples. The description of the above embodiments is only used to help understand the method and core idea of ​​the present invention. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A synchronous and precise voltage glitch injection method for side channel attacks, characterized in that: A synchronizable precise voltage glitch injection circuit for side channel attack includes the following steps: S1, determine the normal operating voltage range of the attacked cryptographic chip according to the chip manual, connect its VCC and GND pins to a voltage output of a precision voltage source, roughly locate the chip's undervoltage fault threshold and overvoltage fault threshold with a step value of 0.1V, and determine the fault voltage; S2, connecting a precision voltage source with a high-speed multi-channel signal switching chip, wherein the two voltage outputs of the precision voltage source are respectively the normal working voltage VCC1 of the attacked password chip and the fault voltage VCC2 obtained in step S1; the high-speed multi-channel signal switching chip has a control signal input pin IN, a switching enable pin EN, a to-be-switched signal 1 pin PORT1, a to-be-switched signal 2 pin PORT2, a signal output pin COM, and VCC and GND pins, wherein PORT1 is connected to the normal working voltage VCC1, and PORT2 is connected to the fault voltage VCC2; S3, connects the single-chip microcomputer with the high-speed multi-channel signal switching chip, where the single-chip microcomputer defines a The pin is responsible for outputting the control signal of the high-speed multi-channel signal switching chip; S4, connecting the MCU and the attacked encryption chip. The attacked encryption chip generates a falling edge trigger during operation, which triggers the external interrupt INT0 of the MCU to synchronize the two. S5, using an oscilloscope and an electromagnetic probe to observe the electromagnetic leakage signal of the attacked encryption chip, determining the time position of the attack statement according to the design logic of the encryption algorithm and writing the corresponding timing function, so that the single-chip microcomputer controls the high-speed multi-channel signal switching chip and the precision voltage source to generate voltage glitches at the attack position; S6, connecting the high-speed multi-channel signal switching chip and the attacked encryption chip, so that the signal output pin COM and the ground pin GND of the high-speed multi-channel signal switching chip are connected to the power supply pin VCC and the ground pin GND of the attacked encryption chip respectively; S7, the single-chip computer and the precision voltage source are powered on, and an overvoltage glitch or undervoltage glitch fault is injected into the attacked encryption chip at the planned position. The initial voltage value of VCC2 is the fault threshold obtained in step S1. During the experiment, the voltage fault value, the voltage glitch injection position and the duration of the voltage glitch can be adjusted. The output results of the chip are observed through the serial port of the host computer, and the fault types generated by the attacked encryption chip under different parameters are analyzed; The synchronous and precise voltage glitch injection circuit for side channel attacks comprises: an oscilloscope (1), a precision voltage source (2), a host computer (3), an attacked password chip (4), a high-speed multi-channel signal switching chip (5), and a single-chip computer (6); the precision voltage source (2) is connected to the high-speed multi-channel signal switching chip (5); the high-speed multi-channel signal switching chip (5) is respectively connected to the attacked password chip (4) and the single-chip computer (6); the attacked password chip (4) is respectively connected to the single-chip computer (6) and the host computer (3); and the oscilloscope (1) is connected to the attacked password chip (4); The precision voltage source (2) is used to provide two voltage outputs, the high-speed multi-channel signal switching chip (5) is used to switch the two voltage outputs of the precision voltage source (2), and output a voltage glitch signal to the attacked password chip (4); the single-chip computer (6) is used to control the switching time of the high-speed multi-channel signal switching chip (5), the attacked password chip (4) transmits the running encryption result to the host computer (3) through the serial port, the host computer (3) is used to collect the fault data of the attacked password chip (4), and is also used for programming the single-chip computer (6), and the voltage glitch signal injection time and duration are regulated by editing the code; the oscilloscope (1) is used to observe the electromagnetic signal of the attacked password chip (4) to determine the voltage fault injection position.

2. According to the method for synchronous and precise voltage glitch injection for side channel attack described in claim 1, the oscilloscope (1) is selected from PicoScope5244D, which has a bandwidth of 300MHz; the precision voltage source (2) is selected from KEYSIGHTE3631A, the voltage accuracy can reach mV, and electrical isolation is performed between the two voltage outputs; the host computer (3) is a PC with Windows system, using ACERE1-471G laptop computer; the attacked password chip (4) is selected from ATmega16A single-chip microcomputer; the high-speed multi-channel signal switching chip (5) is selected from ISL54200, and its switching speed can reach up to 880MHz; the single-chip microcomputer (6) is selected from STC12A60S2.

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