Display device

Abstract

A display device comprises: a substrate; a first insulating layer arranged on the substrate; a first lower electrode arranged on the first insulating layer; a second lower electrode arranged on the first insulating layer, separated from the first lower electrode, and formed of the same material as the first lower electrode; a first wiring arranged between the first lower electrode and the second lower electrode; a second insulating layer arranged on the first wiring; a first organic layer arranged on the first lower electrode, including a light-emitting layer; a second organic layer arranged on the second lower electrode, including the light-emitting layer; a first upper electrode arranged on the first organic layer; a second upper electrode arranged on the second organic layer; and a second wiring arranged on the second insulating layer, opposite to the first wiring, forming a capacitor between the second wiring and the first wiring.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2021-020759 filed on February 12, 2021, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Embodiments of the present invention relate to a display device. Background Art

[0004] In recent years, display devices using organic light emitting diodes (OLEDs) as display elements have been put into practical use. The display element has an organic layer between a pixel electrode and a common electrode. In addition to the light emitting layer, the organic layer also includes functional layers such as a hole transport layer and an electron transport layer. Such an organic layer is formed, for example, by vacuum evaporation.

[0005] In the ultra-high-definition panels used in virtual reality (VR) and the like, the area of ​​each pixel is very small. In addition, in the ultra-high-definition panel, the driving circuit that drives the pixel gate line is also arranged at a pitch equal to the pixel pitch, so the area of ​​each driving circuit is also very small. In the pixel circuit and the driving circuit, capacitors are sometimes formed in each circuit for operation, but in the ultra-high-definition panel, it is difficult to accommodate capacitors with large capacitance within the pixel pitch. In the case of multi-layering of metal layers and insulating layers in order to increase the capacitance with a small area, the process may be complicated and the cost may be increased. In the case of increasing the frame in order to ensure the area and increase the capacitance, the commercial value of the panel may be reduced. Summary of the invention

[0006] According to this embodiment, a display device is provided, comprising: a substrate; a first insulating layer, arranged on the substrate; a first lower electrode, arranged on the first insulating layer; a second lower electrode, arranged on the first insulating layer, separated from the first lower electrode, and formed of the same material as the first lower electrode; a first wiring, arranged between the first lower electrode and the second lower electrode; a second insulating layer, arranged on the first wiring; a first organic layer, arranged on the first lower electrode, including a light-emitting layer; a second organic layer, arranged on the second lower electrode, including the light-emitting layer; a first upper electrode, arranged on the first organic layer; a second upper electrode, arranged on the second organic layer; and a second wiring, arranged on the second insulating layer, opposite to the first wiring, forming a capacitor between the second wiring and the first wiring.

[0007] According to the present embodiment, a display device is provided, comprising: a substrate; a first insulating layer, arranged on the substrate; a first lower electrode, arranged on the first insulating layer; a second lower electrode, arranged on the first insulating layer and separated from the first lower electrode; a first wiring, arranged between the first lower electrode and the second lower electrode; a second insulating layer, arranged on the first wiring, having a first opening overlapping with the first lower electrode, a second opening overlapping with the second lower electrode, a groove between the first lower electrode and the second lower electrode, a first surface between the first opening and the groove, and a second surface between the first opening and the groove; a first organic layer, arranged from the first lower electrode to the first surface, comprising A light-emitting layer; a second organic layer, arranged from the second lower electrode to the second surface, including the light-emitting layer; a third organic layer, arranged in the groove, separated from the first organic layer and the second organic layer, including the light-emitting layer; and an upper electrode, covering the first organic layer, the second organic layer and the third organic layer, forming a capacitor between the upper electrode and the first wiring, the groove having a bottom surface, a first side surface rising from the bottom surface and connected to the first surface, and a second side surface rising from the bottom surface and connected to the second surface, a first interval between the first side surface and the second side surface on the upper side of the groove is smaller than a second interval between the first side surface and the second side surface on the bottom surface side of the groove, and the third organic layer is arranged on the bottom surface.

[0008] According to this embodiment, a display device is provided, comprising: a substrate; a first insulating layer, arranged on the substrate; a first lower electrode, arranged on the first insulating layer; a second lower electrode, arranged on the first insulating layer and separated from the first lower electrode; a first wiring, arranged between the first lower electrode and the second lower electrode; a second insulating layer, arranged on the first wiring, having a first opening overlapping with the first lower electrode, a second opening overlapping with the second lower electrode, a groove between the first lower electrode and the second lower electrode, a first surface between the first opening and the groove, and a second surface between the first opening and the groove; a second wiring, arranged in the groove, opposite to the first wiring, forming an electrical connection between the second wiring and the first wiring a first organic layer, arranged from the first lower electrode to the first surface, comprising a light-emitting layer; a second organic layer, arranged from the second lower electrode to the second surface, comprising the light-emitting layer; a third organic layer, covering the second wiring in the groove, separated from the first organic layer and the second organic layer, comprising the light-emitting layer; and an upper electrode, covering the first organic layer, the second organic layer and the third organic layer, the groove having a bottom surface, a first side surface rising from the bottom surface and connected to the first surface, and a second side surface rising from the bottom surface and connected to the second surface, a first interval between the first side surface and the second side surface on the upper side of the groove is smaller than a second interval between the first side surface and the second side surface on the bottom surface side of the groove, and the second wiring is arranged on the bottom surface. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 A diagram showing a configuration example of a display device according to an embodiment.

[0010] Figure 2 It is a plan view showing a structural example of a pixel according to an embodiment.

[0011] Figure 3 It is a plan view showing a structural example of metal wiring according to the embodiment.

[0012] Figure 4 It means along Figure 3 The cross-sectional view of the structural example of the display device taken along the line AA shown is shown.

[0013] Figure 5 It is a cross-sectional view showing a structural example of a display device according to Modification Example 1.

[0014] Figure 6 It is a cross-sectional view showing a structural example of a display device involved in Modification Example 2.

[0015] Figure 7 This is a cross-sectional view showing a structural example of a display device according to Modification 3.

[0016] Figure 8 This is a cross-sectional view showing a structural example of a display device according to Modification 4.

[0017] Fig. 9 This is a cross-sectional view showing a structural example of a display device according to Modification 5.

[0018] Fig.10 This is a cross-sectional view showing a structural example of a display device according to Modification Example 6.

[0019] Fig.11 It is a plan view showing a structural example of metal wiring involved in Modification Example 7.

[0020] Fig.12 It is a top view showing a structural example of a pixel involved in modification example 8.

[0021] Fig.13 It is a plan view showing a structural example of metal wiring involved in Modification Example 8.

[0022] Fig.14 It is a plan view showing a structural example of a pixel involved in Modification Example 9. DETAILED DESCRIPTION

[0023] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0024] In addition, the disclosure is only an example, and for those skilled in the art, the contents that can be easily thought of by appropriate changes that maintain the main purpose of the invention are of course also included in the scope of the present invention. In addition, with respect to the drawings, in order to make the description clearer, the width, thickness, shape, etc. of each part are sometimes schematically represented compared with the actual method, but it is only an example after all and does not limit the interpretation of the present invention. In addition, in this specification and each figure, for the constituent elements that play the same or similar functions as the constituent elements described previously with respect to the figures that have appeared, the same reference figure numerals are marked, and sometimes repeated detailed descriptions are appropriately omitted.

[0025] In addition, in the accompanying drawings, as needed, for easy understanding, mutually orthogonal X-axis, Y-axis and Z-axis are recorded. The direction along the X-axis is referred to as the X-direction or the first direction X, the direction along the Y-axis is referred to as the Y-direction or the second direction Y, and the direction along the Z-axis is referred to as the Z-direction or the third direction Z. The first direction X, the second direction Y and the third direction Z may also intersect at angles other than 90 degrees. The lengths of the first direction X and the second direction Y are sometimes referred to as width, and the length of the third direction Z is referred to as thickness. In this specification, the direction from the substrate 10 toward the display element 20 is sometimes referred to as the "upper side" (or simply upper), and the direction from the display element 20 toward the substrate 10 is referred to as the "lower side" (or simply lower). In the case of "the second layer above the first layer" and "the second layer below the first layer", the second layer may be in contact with the first layer or separated from the first layer. Sometimes, the plane defined by the X-axis (first direction X) and the Y-axis (second direction Y) is called the X-Y plane, the plane defined by the X-axis (first direction X) and the Z-axis (third direction Z) is called the X-Z plane, and the plane defined by the Y-axis (second direction Y) and the Z-axis (third direction Z) is called the Y-Z plane. Observing the X-Y plane is called a top view.

[0026] (Implementation Method)

[0027] The display device DSP according to the present embodiment is an organic electroluminescent display device including an organic light emitting diode (OLED) as a display element, and is mounted in a television, a personal computer, a mobile terminal, a mobile phone, or the like.

[0028] Figure 1 This is a diagram showing a configuration example of a display device DSP according to the present embodiment.

[0029] The display device DSP includes an insulating substrate 10. The substrate 10 may be glass or a flexible resin film. The display device DSP includes a display area DA for displaying an image and a non-display area NDA around the display area DA.

[0030] The display device DSP includes a plurality of pixels PX arranged in a matrix in a first direction X and a second direction Y in a display area DA. The pixel PX includes a plurality of sub-pixels SP1, SP2, and SP3. In one example, the pixel PX includes a red sub-pixel SP1, a green sub-pixel SP2, and a blue sub-pixel SP3. In addition, the pixel PX may include four or more sub-pixels in which sub-pixels of other colors such as white are added in addition to the sub-pixels of the three colors described above.

[0031] A configuration example of one sub-pixel SP included in the pixel PX will be briefly described.

[0032] That is, the sub-pixel SP includes a pixel circuit 1 and a display element 20 driven and controlled by the pixel circuit 1. The pixel circuit 1 includes a pixel switch 2, a driving transistor 3, and a capacitor 4. The pixel switch 2 and the driving transistor 3 are switching elements composed of, for example, thin film transistors.

[0033] Regarding the pixel switch 2, the gate electrode is connected to the scanning line GL, the source electrode is connected to the signal line SL, and the drain electrode is connected to one electrode constituting the capacitor 4 and the gate electrode of the driving transistor 3. Regarding the driving transistor 3, the source electrode is connected to the other electrode constituting the capacitor 4 and the power supply line PL, and the drain electrode is connected to the anode of the display element 20. The cathode of the display element 20 is connected to the power supply line FL. In addition, the structure of the pixel circuit 1 is not limited to the example shown in the figure.

[0034] The display element 20 is an organic light emitting diode (OLED) as a light emitting element. For example, the sub-pixel SP1 includes a display element that emits light corresponding to a red wavelength, the sub-pixel SP2 includes a display element that emits light corresponding to a green wavelength, and the sub-pixel SP3 includes a display element that emits light corresponding to a blue wavelength. The structure of the display element 20 will be described later.

[0035] Figure 2 1 is a plan view showing a structural example of a pixel PX according to the present embodiment. Figure 2 Only structures necessary for explanation are shown.

[0036] The display device DSP includes an insulating layer 12, a lower electrode E1, and an auxiliary wiring CAW. Figure 2 In the example shown, the display device DSP includes an insulating layer 12 (1211, 1212, 1213, 1214, 1221 and 1222), a lower electrode E1 (E11, E12 and E13) and auxiliary wirings CAW (CAW11, CAW12, CAW13, CAW14, CAW21 and CAW22).

[0037] The lower electrode E1 is disposed in the sub-pixel SP. Figure 2 In the example shown, the lower electrode E1 includes lower electrodes E11, E12, and E13. The lower electrode E11 is arranged in the sub-pixel SP1. The lower electrode E12 is arranged in the sub-pixel SP2. The lower electrode E13 is arranged in the sub-pixel SP3. The lower electrodes E11 to E13 are arranged in the first direction X. The lower electrodes including the lower electrodes E11 to E13 are electrodes arranged for each sub-pixel or each display element, and are sometimes referred to as pixel electrodes, anodes, etc.

[0038] The lower electrode E1 is formed in a rectangular shape in a plan view. In this case, the lower electrode E1 has four end portions Eg. Figure 2In the example shown, the lower electrodes E11 to E13 are each formed into a rectangular shape having a short axis in the first direction X and a long axis in the second direction Y. The lower electrode E11 has an end Eg (Eg11) on the front end side of the arrow in the first direction X, an end Eg (Eg12) on the opposite side to the front end of the arrow in the first direction X, an end Eg (Eg13) on the front end side of the second direction Y, and an end Eg (Eg14) on the opposite side to the front end in the second direction Y. The lower electrode E12 has an end Eg (Eg21) on the front end side of the arrow in the first direction X, an end Eg (Eg22) on the opposite side to the front end of the arrow in the first direction X, an end Eg (Eg23) on the front end side of the second direction Y, and an end Eg (Eg24) on the opposite side to the front end in the second direction Y. The lower electrode E13 has an end Eg (Eg31) on the front end side of the arrow in the first direction X, an end Eg (Eg32) on the opposite side to the front end of the arrow in the first direction X, an end Eg (Eg33) on the front end side of the second direction Y, and an end Eg (Eg34) on the opposite side to the front end in the second direction Y. In addition, the lower electrode E1 may be formed in a shape other than a rectangular shape in a plan view.

[0039] The insulating layer 12 is formed in a lattice shape in a plan view. The insulating layer 12 is formed so as to divide the display element or the sub-pixel, and is sometimes referred to as a bank, a rib, a partition wall, etc. Figure 2 In the example shown, the insulating layer 12 has insulating layers (banks) 1211, 1212, 1213, 1214, 1221, and 1222. The insulating layers 1211, 1212, 1213, and 1214 extend in the second direction Y. The insulating layers 1211 to 1214 are arranged at intervals in the first direction X. The insulating layers 1211, 1212, 1213, and 1214 are arranged in the order described toward the front end side of the arrow in the first direction X. The insulating layers 1221 and 1222 extend in the first direction X. The insulating layers 1221 and 1222 are arranged at intervals in the second direction Y. The insulating layers 1221 and 1222 are arranged in the order described toward the front end side of the arrow in the second direction Y. The insulating layers 1211 to 1214 and the insulating layers 1221 and 1222 intersect each other. The insulating layer 12 has an opening OP overlapping with the lower electrode E1.

[0040] exist Figure 2In the example shown, the insulating layer 12 has an opening OP1 overlapping with the lower electrode E11, an opening OP2 overlapping with the lower electrode E12, and an opening OP3 overlapping with the lower electrode E13. The opening OP1 corresponds to a region surrounded by the insulating layers 1211 and 1212 and the insulating layers 1221 and 1222. That is, the central portion of the lower electrode E11 overlapping with the opening OP1 is exposed from the insulating layer 12. The opening OP2 corresponds to a region surrounded by the insulating layers 1212 and 1213 and the insulating layers 1221 and 1222. That is, the central portion of the lower electrode E12 overlapping with the opening OP2 is exposed from the insulating layer 12. The opening OP3 corresponds to a region surrounded by the insulating layers 1213 and 1214 and the insulating layers 1221 and 1222. That is, the central portion of the lower electrode E13 overlapping with the opening OP3 is exposed from the insulating layer 12.

[0041] exist Figure 2 In the example shown, the insulating layer 12 covers the peripheral portion of each of the lower electrodes E11 to E13. The insulating layer 1221 overlaps with the end Eg14 of the lower electrode E11, the end Eg24 of the lower electrode E12, and the end Eg34 of the lower electrode E13. The insulating layer 1222 overlaps with the end Eg13 of the lower electrode E11, the end Eg23 of the lower electrode E12, and the end Eg33 of the lower electrode E13. The insulating layer 1211 overlaps with the end Eg12 of the lower electrode E11. The insulating layer 1212 overlaps with the end Eg11 of the lower electrode E11 and the end Eg22 of the lower electrode E12. The insulating layer 1213 overlaps with the end Eg21 of the lower electrode E12 and the end Eg32 of the lower electrode E13. The insulating layer 1214 overlaps with the end Eg31 of the lower electrode E13.

[0042] The auxiliary wiring CAW overlaps with the insulating layer 12. For example, the auxiliary wiring CAW is arranged in a lattice pattern so as to overlap with the insulating layer 12 in a plan view. For example, the auxiliary wiring CAW does not overlap with the lower electrode E1 in a plan view.

[0043] exist Figure 2In the example shown, the auxiliary wiring CAW includes auxiliary wirings CAW11, CAW12, CAW13, CAW14, CAW21, and CAW22. The auxiliary wirings CAW11, CAW12, CAW13, and CAW14 extend in the second direction Y. The auxiliary wirings CAW11 to CAW14 are arranged at intervals in the first direction X. For example, the auxiliary wirings CAW11, CAW12, CAW13, and CAW14 are arranged in the order described toward the front end side of the arrow in the first direction X. The auxiliary wirings CAW21 and CAW22 extend in the first direction X. The auxiliary wirings CAW21 and CAW22 are arranged at intervals in the second direction Y. For example, the auxiliary wirings CAW21 and CAW22 are arranged in the order described toward the front end side of the arrow in the second direction Y. The auxiliary wirings CAW11 to CAW14 intersect the auxiliary wirings CAW21 and CAW22, respectively.

[0044] exist Figure 2 In the example shown, the auxiliary wiring CAW11 overlaps with the insulating layer 1211, the auxiliary wiring CAW12 overlaps with the insulating layer 1212, the auxiliary wiring CAW13 overlaps with the insulating layer 1213, and the auxiliary wiring CAW14 overlaps with the insulating layer 1214. The auxiliary wiring CAW21 overlaps with the insulating layer 1221, and the auxiliary wiring CAW22 overlaps with the insulating layer 1222. The auxiliary wirings CAW11 to CAW14 and the auxiliary wirings CAW21 and CAW22 do not overlap with the lower electrode E1.

[0045] Here, the outer shape of the sub-pixel SP is, for example, equivalent to the outer shape of the lower electrode E1. That is, the sub-pixel SP1, the sub-pixel SP2, and the sub-pixel SP3 constituting one pixel PX are respectively formed into a substantially rectangular shape extending in the second direction Y, and are arranged in the first direction X. The luminous colors of adjacent sub-pixels arranged in the first direction X are different from each other. In addition, the luminous colors of adjacent sub-pixels arranged in the first direction X may also be the same. The areas of the sub-pixels SP1, the sub-pixels SP2, and the sub-pixels SP3 may be equal to each other, or may be different from each other as described later. In addition, the outer shape of the sub-pixels may be defined by the outer shape of the luminous area of ​​the display element.

[0046] Figure 3 It is a plan view showing a structural example of the metal wiring MW involved in this embodiment. Figure 3 The structure shown corresponds to Figure 2 The structure shown. Figure 3 Only structures necessary for explanation are shown.

[0047] The display device DSP has metal wiring MW and the like. Figure 3In the example shown, the display device DSP includes an insulating layer 12 (1211, 1212, 1213, 1214, 1221 and 1222), a lower electrode E1 (E11, E12 and E13) and metal wirings MW (MW11, MW12, MW13, MW14, MW21 and MW22).

[0048] The metal wiring MW overlaps with the insulating layer 12. For example, the metal wiring MW is arranged in a grid shape so as to overlap with the insulating layer 12 when viewed from above. In addition, the metal wiring MW overlaps with the auxiliary wiring CAW. For example, the metal wiring MW is arranged in a grid shape so as to overlap with the auxiliary wiring CAW when viewed from above. For example, the metal wiring MW does not overlap with the lower electrode E1 when viewed from above. The metal wiring MW forms a capacitance (parasitic capacitance) between it and the auxiliary wiring CAW. The metal wiring MW is connected to a prescribed wiring. For example, the metal wiring MW may also be connected to a transistor. In addition, the metal wiring MW may also be floating. In addition, the metal wiring MW may not be arranged in a grid shape. The so-called "same", "identical" and "equivalent" include the case where the physical quantity, material, or structure (construction) of multiple objects, spaces or regions, etc. that become objects are exactly the same, and of course also include the case where they are slightly different to the extent that they are considered to be substantially the same.

[0049] exist Figure 3 In the example shown, the metal wiring MW includes metal wirings MW11, MW12, MW13, MW14, MW21, and MW22. The metal wirings MW11, MW12, MW13, and MW14 extend in the second direction Y. The metal wirings MW11 to MW14 are arranged at intervals in the first direction X. For example, the metal wirings MW11, MW12, MW13, and MW14 are arranged in the order described with respect to the front end side of the arrows in the first direction X. The metal wirings MW21 and MW22 extend in the first direction X. The metal wirings MW21 and MW22 are arranged at intervals in the second direction Y. For example, the metal wirings MW21 and MW22 are arranged in the order described with respect to the front end side of the arrows in the second direction Y. The metal wirings MW11 to MW14 intersect the metal wirings MW21 and MW22, respectively.

[0050] exist Figure 3 In the example shown, the metal wiring MW11 overlaps with the insulating layer 1211, the metal wiring MW12 overlaps with the insulating layer 1212, the metal wiring MW13 overlaps with the insulating layer 1213, and the metal wiring MW14 overlaps with the insulating layer 1214. The metal wiring MW21 overlaps with the insulating layer 1221, and the metal wiring MW22 overlaps with the insulating layer 1222. The metal wirings MW11 to MW14 and the metal wirings MW21 and MW22 do not overlap with the lower electrode E1.

[0051] exist Figure 3 In the example shown, metal wiring MW11 overlaps auxiliary wiring CAW11, metal wiring MW12 overlaps auxiliary wiring CAW12, metal wiring MW13 overlaps auxiliary wiring CAW13, metal wiring MW14 overlaps auxiliary wiring CAW14, metal wiring MW21 overlaps auxiliary wiring CAW21, and metal wiring MW22 overlaps auxiliary wiring CAW22.

[0052] Figure 4 It means along Figure 3 The sectional view of the structure example of the display device DSP cut along the line AA shown in FIG. Figure 4 In the figure, only the main part of the display device DSP is shown.

[0053] The display device DSP includes a substrate 10, an insulating layer 11, a lower electrode E1 (E11 and E12), a metal wiring MW (MW12), an insulating layer 12 (1212), an organic layer OR (OR1, OR2 and OR3), an upper electrode E2 (E21, E22 and E23) and an auxiliary wiring CAW (CAW12). The display device DSP includes a display element 20. The display element 20 (20A and 20B) is composed of the lower electrode E1 (E11 and E12), the organic layer OR (OR1 and OR2) and the upper electrode E2 (E21 and E22).

[0054] exist Figure 4 In the example shown, the display element 20 includes display elements 20A and 20B. The display element 20A is composed of a lower electrode E11, an organic layer OR1, and an upper electrode E21. The display element 20B is composed of a lower electrode E12, an organic layer OR2, and an upper electrode E22.

[0055] The insulating layer 11 is disposed on the substrate 10. The insulating layer 11 corresponds to the base layer of the display element 20, and is, for example, an organic insulating layer. Figure 1 The pixel switch 2 and the like of the pixel circuit 1 are arranged on the substrate 10 and covered by an insulating layer such as an insulating layer 11, but the illustration is omitted here. Figure 4 In the example shown, the insulating layer 11 corresponds to the base layer of the display elements 20A and 20B. The insulating layer 11 may be formed of a single layer or multiple layers. Another layer may be disposed between the substrate 10 and the insulating layer 11.

[0056] The lower electrode E1 is disposed on the insulating layer 11. Figure 4 In the example shown, the lower electrode E1 includes lower electrodes E11 and E12. The lower electrodes E11 and E12 are disposed on the insulating layer 11. The plurality of lower electrodes E1 are arranged at intervals in the first direction X. Figure 4In the example shown, the end Eg11 of the lower electrode E11 and the end Eg22 of the lower electrode E12 are arranged with a gap (or interval) GP1 in the first direction X. The lower electrode E1 may be electrically connected to the switching element via a contact hole formed in the insulating layer 11, although not shown in the figure. For example, the lower electrode E11 may be electrically connected to the switching element via a contact hole formed in the insulating layer 11, although not shown in the figure. For example, the lower electrode E12 may be electrically connected to the switching element via a contact hole formed in the insulating layer 11, although not shown in the figure. In addition, other layers may be arranged between the lower electrode E1 and the insulating layer 11.

[0057] The lower electrode E1 (E11 and E12) is, for example, a transparent electrode formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). In addition, the lower electrode E1 may be a metal electrode formed of a metal material such as silver or aluminum. In addition, the lower electrode E1 may be a laminate of a transparent electrode and a metal electrode. For example, the lower electrode E1 may be composed of a single layer, a laminate in which a transparent electrode, a metal electrode, and a transparent electrode are laminated in this order, or a laminate of more than three layers.

[0058] The metal wiring MW is arranged on the insulating layer 11. In addition, the metal wiring MW may be arranged other than on the insulating layer 11. Figure 4 In the example shown, the metal wiring MW has a metal wiring MW12. The metal wiring MW12 is arranged on the insulating layer 11. That is, the metal wiring MW12 is arranged on the same layer as the lower electrodes E11 and E12. In addition, the metal wiring MW12 may be arranged other than on the insulating layer 11. That is, the metal wiring MW12 may be arranged on a layer different from the lower electrodes E11 and E12.

[0059] The metal wiring MW is arranged between two adjacent lower electrodes E1. Figure 4 In the example shown, the metal wiring MW12 has a width W1. The metal wiring MW12 is arranged in the center of the gap GP1 between the lower electrodes E11 and E12 in the first direction X. For example, the metal wiring MW12 is separated from the end Eg11 of the lower electrode E11 by the gap GP2 in the first direction X, and is separated from the end Eg22 of the lower electrode E12 by the gap GP2 in the first direction X. In addition, the metal wiring MW12 may be arranged offset from the center of the gap GP1 between the lower electrodes E11 and E12. In addition, the metal wiring MW12 may be separated from the end Eg11 of the lower electrode E11 and the end Eg22 of the lower electrode E12 by different gaps, respectively.

[0060] The metal wiring MW is, for example, formed of the same material as the lower electrode E1. In addition, the metal wiring MW may also be formed of a material different from the lower electrode E1. The metal wiring MW is, for example, a transparent electrode formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). In addition, the metal wiring MW may also be a metal electrode formed of a metal material such as silver or aluminum. The metal wiring MW may also be a stack of a transparent electrode and a metal electrode. For example, the metal wiring MW may be a stack of transparent electrodes, metal electrodes, and transparent electrodes stacked in this order, or may be a stack of more than three layers. In addition, the metal wiring MW may also be a single layer. In addition, the metal wiring MW may also be used to form a capacitor for holding pixel charges. When the metal wiring MW is formed of the same material and the same layer as the lower electrode E1, there is no need to add a new process to form a capacitor, and the display device DSP can be manufactured at a low cost.

[0061] The insulating layer 12 is disposed on the insulating layer 11, the lower electrode E1, and the metal wiring MW. The insulating layer 12 is, for example, an organic insulating layer. The insulating layer 12 has an opening OP (OP1 and OP2). The opening OP is formed on the lower electrode E1. The opening OP penetrates the insulating layer 12 and is formed to the lower electrode E1. Figure 4 In the example shown, the insulating layer 12 has an opening OP1, an opening OP2, and a dam 1212. The opening OP1 is formed on the lower electrode E11. The opening OP2 is formed on the lower electrode E12. The dam 1212 is located on the insulating layer 11, the end Eg11 of the lower electrode E11, the end Eg22 of the lower electrode E12, and the metal wiring MW12. In other words, the dam 1212 overlaps (or faces) the metal wiring MW12. The dam 1212 has, for example, a flat portion FP1 formed at the vertex portion. The flat portion FP1 is formed, for example, in the insulating layer 12 from a portion corresponding to the end Eg11 of the lower electrode E11 to a portion corresponding to the end Eg22 of the lower electrode E12. The dam 1212 has, for example, a surface that curves from the opening OP1 to the flat portion FP1 and a surface that curves from the opening OP2 to the flat portion FP1. The dam 1212 has a thickness TH1. Figure 4 In the example shown, the thickness TH1 corresponds to the highest position of the bank 1212, for example, corresponds to the distance between the flat portion FP1 and the insulating layer 11. The thickness TH1 is several μm, for example, 1.5 to 2.0 μm.

[0062] The organic layer OR is disposed on the lower electrode E1 and the insulating layer 12. Figure 4In the example shown, the organic layer OR includes organic layers OR1, OR2, and OR3. The organic layer OR1 is arranged on the lower electrode E11 corresponding to the opening OP1 and on the dam 1212. The organic layer OR1 is arranged on a curved surface extending from the lower electrode E11 corresponding to the opening OP1 to the flat portion FP1 in the dam 1212. The organic layer OR2 is arranged on the lower electrode E12 corresponding to the opening OP2 and on the dam 1212. The organic layer OR2 is arranged on a curved surface extending from the lower electrode E12 corresponding to the opening OP2 to the flat portion FP1 of the dam 1212 in the dam 1212. The organic layer OR3 is arranged on the auxiliary wiring CAW12 described later. The organic layers OR1 to OR3 are not in contact with each other. In other words, the organic layers OR1 to OR3 are divided. That is, the organic layer OR1 is separated from the organic layers OR2 and OR3, the organic layer OR2 is separated from the organic layers OR3 and OR1, and the organic layer OR3 is separated from the organic layers OR1 and OR2. The organic layer OR1 is in contact with the auxiliary wiring CAW12 described later, for example, the end portion on the opposite side of the arrow front end side of the first direction X of the auxiliary wiring CAW12. In addition, the organic layer OR1 may not be in contact with the auxiliary wiring CAW12. The organic layer OR2 is in contact with the auxiliary wiring CAW12 described later, for example, the end portion on the arrow front end side of the first direction X of the auxiliary wiring CAW12. In addition, the organic layer OR2 may not be in contact with the auxiliary wiring CAW12.

[0063] The organic layer OR includes a light-emitting layer that emits light with the magnitude of a current flowing by applying a predetermined voltage between the lower electrode E1 and the upper electrode E2. In addition to the light-emitting layer, the organic layer OR also includes at least one of a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer. For example, the organic layers OR1 to OR3 include light-emitting layers of the same color. In addition, the organic layers OR1 to OR3 may include light-emitting layers of different colors.

[0064] The upper electrode E2 is disposed on the organic layer OR. The upper electrode E2 covers the organic layer OR. Figure 4 In the example shown, the upper electrode E2 includes upper electrodes E21, E22, and E23. The upper electrode E21 is arranged on the organic layer OR1. The upper electrode E21 covers the organic layer OR1. The upper electrode E22 is arranged on the organic layer OR2. The upper electrode E22 covers the organic layer OR2. The upper electrode E23 is arranged on the organic layer OR3. The upper electrode E23 covers the organic layer OR3. The upper electrode E21 contacts the end of the auxiliary wiring CAW12 described later, for example, the auxiliary wiring CAW12, on the opposite side of the arrow front end side in the first direction X. The upper electrode E22 contacts the end of the auxiliary wiring CAW12 described later, for example, the auxiliary wiring CAW12, on the front end side in the first direction X. The upper electrode E23 is separated from the upper electrodes E21 and E22.

[0065] The upper electrode E2 is a transparent electrode formed of a transparent conductive material such as ITO or IZO. Figure 1 The upper electrode E2 is electrically connected to the power supply line FL of the display area DA shown. The upper electrode E2 is an electrode commonly configured for multiple sub-pixels or multiple display elements, and is sometimes called a common electrode, a counter electrode, a cathode, etc. In addition, the upper electrode E2 may also be covered by a transparent protective layer (including at least one of an inorganic insulating layer and an organic insulating layer). The upper electrode E2 may be composed of a single layer or a laminate.

[0066] The auxiliary wiring CAW is arranged on the insulating layer 12. The auxiliary wiring CAW overlaps (or faces) the metal wiring MW. Figure 4 In the example shown, the auxiliary wiring CAW includes an auxiliary wiring CAW12. The auxiliary wiring CAW12 is arranged on the bank 1212. The auxiliary wiring CAW12 is arranged, for example, on the flat portion FP1 of the bank 1212. The auxiliary wiring CAW12 overlaps (or faces) the metal wiring MW12.

[0067] The auxiliary wiring CAW is arranged between two adjacent organic layers OR. In other words, the auxiliary wiring CAW is arranged between two adjacent upper electrodes E2. Figure 4 In the example shown, the auxiliary wiring CAW12 is arranged between the organic layers OR1 and OR2. In other words, the auxiliary wiring CAW12 is arranged between the upper electrode E21 and the upper electrode E22.

[0068] The auxiliary wiring CAW separates (or divides) two adjacent organic layers OR. The auxiliary wiring CAW separates (or divides) two adjacent upper electrodes E2 and electrically connects the two adjacent upper electrodes E2. Figure 4 In the example shown, the auxiliary wiring CAW12 separates (or divides) the organic layer OR1 and the organic layer OR2 . The auxiliary wiring CAW12 separates (or divides) the adjacent upper electrodes E21 and E22 , and electrically connects the adjacent upper electrodes E21 and E22 .

[0069] The auxiliary wiring CAW is a metal wiring, for example, a low-resistance metal wiring, and can be used to assist in reducing the resistance of a high-resistance layer made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).

[0070] The auxiliary wiring CAW is composed of a laminate. In addition, the auxiliary wiring CAW may be composed of a single layer instead of a laminate. The auxiliary wiring CAW is composed of three layers of metal films, for example, titanium (Ti) / aluminum (Al) / titanium (Ti). Figure 4In the example shown, the auxiliary wiring CAW12 has an upper layer LL, a middle layer ML, and a lower layer UL. The upper layer LL, the middle layer ML, and the lower layer UL are, for example, low-resistance metal wirings. The upper layer LL is, for example, formed of titanium (Ti). The middle layer ML is, for example, formed of aluminum (Al). The lower layer UL is, for example, formed of titanium (Ti). In addition, the upper layer LL and the middle layer ML of the auxiliary wiring CAW12 may be semiconductors or insulators, and the lower layer UL may be low-resistance metal wirings.

[0071] exist Figure 4 In the example shown, the lower layer UL is, for example, arranged on the flat portion FP1 of the dam 1212. In the auxiliary wiring CAW12, the middle layer ML is arranged on the lower layer UL, and the upper layer LL is arranged on the middle layer ML. In the auxiliary wiring CAW12, the middle layer ML is retreated further toward the center or the inner side than the lower layer UL and the upper layer LL. In other words, the width W3 of the middle layer ML is smaller than the width W2 of the lower layer UL and the upper layer LL. That is, the width W2 of the upper layer LL and the lower layer UL is larger than the width W3 of the middle layer ML. The width W2 of the upper layer LL and the lower layer UL is the same. In addition, the width W2 of the upper layer LL and the lower layer UL may be different. The width W2 of the upper layer LL and the lower layer UL is, for example, the same as the width of the flat portion FP1. In addition, the width of the upper layer LL and the lower layer UL may be different. The width W2 of the upper layer LL may be different from the width W1 of the metal wiring MW12. In addition, the width W2 of the upper layer LL may be the same as the width W1 of the metal wiring MW12. The width W3 of the middle layer ML may be the same as the width W1 of the metal wiring MW12. Alternatively, the width W3 of the middle layer ML may be different from the width W1 of the metal wiring MW12. The width W2 of the lower layer UL may be different from the width W1 of the metal wiring MW12. Alternatively, the width W2 of the lower layer UL may be the same as the width W1 of the metal wiring MW12.

[0072] exist Figure 4 In the example shown, in the auxiliary wiring CAW12, the upper layer LL and the lower layer UL protrude further than the middle layer ML. In the auxiliary wiring CAW12, the upper layer LL has the function of serving as an eave of the middle layer ML, shielding the organic layer OR from adhering to the middle layer ML. In the auxiliary wiring CAW12, the lower layer UL has the function of electrically connecting the upper electrodes E21 and E22, lowering the resistance of the layer with high resistance, such as the upper electrode E2, and forming a capacitance (parasitic capacitance) between the opposed electrode, such as the metal wiring MW.

[0073] exist Figure 4In the example shown, the thickness TH2 of the auxiliary wiring CAW12 is greater than the thickness after stacking the organic layer OR (OR1 and OR2) and the upper electrode E2 (E21 and E22) arranged on the dam 1212. The thickness TH2 corresponds to, for example, the distance from the flat portion FP1 to the organic layer OR3. The upper layer LL is separated from the upper electrodes E21 and E22. That is, the upper layer LL is not in contact with the upper electrodes E21 and E22. The middle layer ML is separated from the upper electrodes E21 and E22. That is, the middle layer ML is not in contact with the upper electrodes E21 and E22. The lower layer UL is in contact with the upper electrodes E21 and E22. In addition, the lower layer UL may not be in contact with the organic layers OR1 and OR2. In other words, the lower layer UL may be separated from the organic layers OR1 and OR2. The lower layer UL of the auxiliary wiring CAW12 is separated from the metal wiring MW12 by a distance TH3. A capacitance is formed between the auxiliary wiring CAW12 and the metal wiring MW12. In other words, a capacitance Cs1 is formed between the lower layer UL of the auxiliary wiring CAW12 and the metal wiring MW12.

[0074] The display element 20 forms a light-emitting region by disposing an organic layer OR between the lower electrode E1 and the upper electrode E2. Figure 4 In the example shown, the display element 20A forms a light-emitting region by disposing the organic layer OR1 between the lower electrode E11 and the upper electrode E21. The display element 20B forms a light-emitting region by disposing the organic layer OR2 between the lower electrode E12 and the upper electrode E22. In addition, the organic layer OR3 is disposed between the auxiliary wiring CAW12 and the upper electrode E23, and is completely separated from the organic layer OR1 and the organic layer OR2, so it hardly emits light or does not emit light. In addition, since the portion of the organic layer OR1 covering the dam 1212 is located between the dam 1212 and the upper electrode E21, it hardly emits light. Similarly, since the portion of the organic layer OR2 covering the dam 1212 is located between the dam 1212 and the upper electrode E22, it hardly emits light.

[0075] In the display device DSP, for example, the organic layer OR is formed by a vacuum evaporation method. Figure 4 In the example shown, after forming the bank 1212, an organic material for forming the organic layer OR (OR1 to OR3) is evaporated. When the organic material is evaporated, the organic layer OR is evaporated on the upper layer LL, and due to the shielding effect of the upper layer LL, the organic layer OR is not attached to the middle layer ML. The organic layer OR is attached to the lower layer UL, for example, at the end of the lower layer UL. Figure 4In the example shown, the organic layer OR1 is in contact with the end of the lower layer UL on the opposite side of the arrow front end side in the first direction X. In addition, the organic layer OR1 may not be in contact with the end of the lower layer UL on the opposite side of the arrow front end side in the first direction. The organic layer OR2 is in contact with the end of the lower layer UL on the opposite side of the arrow front end side in the first direction X. In addition, the organic layer OR2 may not be in contact with the end of the lower layer UL on the opposite side of the arrow front end side in the first direction X. The upper electrode E2 is formed, for example, by sputtering. When formed by sputtering, the upper electrode E2 is attached to the lower layer UL and electrically connected to the auxiliary wiring CAW. Figure 4 In the example shown, the upper electrode E21 is attached to the lower layer UL by winding around the organic layer OR1 attached to the end of the lower layer UL on the side opposite to the arrow tip side in the first direction X, and is electrically connected to the lower layer UL of the auxiliary wiring CAW12. The upper electrode E22 is attached to the lower layer UL by winding around the organic layer OR2 attached to the end of the lower layer UL on the arrow tip side in the first direction X, and is electrically connected to the lower layer UL of the auxiliary wiring CAW12. Therefore, the upper electrodes E21 and E22 are electrically connected through the lower layer UL.

[0076] exist Figure 4 In the example shown, the auxiliary wiring CAW12 is formed by sputtering an upper layer LL, a middle layer ML, and a lower layer UL in an overlapping manner. The auxiliary wiring CAW12 formed by sputtering an upper layer LL, a middle layer ML, and a lower layer UL in an overlapping manner is patterned and etched by a photolithography process to obtain a three-layer film with a rectangular cross section. Then, the middle layer (e.g., aluminum) ML is selectively etched using a weak alkali or aluminum etching solution to obtain an auxiliary wiring CAW12 in which the middle layer (e.g., aluminum) ML is recessed.

[0077] According to the present embodiment, the display device DSP has metal wiring MW such as metal wiring MW12 and auxiliary wiring CAW such as auxiliary wiring CAW12 that overlap (or face each other) via an insulating layer 12 such as a dam 1212. The metal wiring MW and the auxiliary wiring CAW form a capacitor via the insulating layer 12. For example, the metal wiring MW12 and the auxiliary wiring CAW12 form a capacitor Cs1 via the dam 1212. Therefore, the display device DSP can realize a large capacity with a small area and almost no additional process at a low cost. Therefore, the display device DSP can realize high precision and narrow frame.

[0078] Next, refer to Figures 5 to 14 The modified examples of the present embodiment are described separately. In the modified examples of the present embodiment described below, the same reference numerals are marked on the same parts as above and their detailed description is omitted, and the parts different from the above are described in detail. In addition, in other modified examples, the same effect as the above embodiment can also be obtained.

[0079] (Variant 1)

[0080] The structure of the bank 1212 of the display device DSP according to the first modification is different from that of the display device DSP according to the above-described embodiment.

[0081] Figure 5 FIG. 4 is a cross-sectional view showing a configuration example of a display device DSP according to Modification 1. Figure 5 In the figure, only the main part of the display device DSP is shown.

[0082] exist Figure 5 In the example shown, the dam 1212 has a vertex TP1. The dam 1212 is curved toward the vertex TP1. In other words, the dam 1212 is formed in a semicircular or mountain-shaped shape. The dam 1212 has, for example, a curved surface extending from the opening OP1 to the vertex TP1 and a curved surface extending from the opening OP2 to the vertex TP1. The dam 1212 has a thickness TH1. The thickness TH1 corresponds to the highest position of the dam 1212, for example, the interval between the vertex TP1 and the insulating layer 11.

[0083] exist Figure 5 In the example shown, the auxiliary wiring CAW12 contacts the vertex TP1 of the bank 1212, bends along the shape of the bank 1212, and is arranged on the bank 1212. The lower layer UL of the auxiliary wiring CAW12, for example, contacts the vertex TP1 of the bank 1212, bends along the shape (bend) of the bank 1212, and is arranged on the bank 1212. The bottom of the middle layer ML of the auxiliary wiring CAW12, for example, bends along the shape (curved surface) of the lower layer UL.

[0084] exist Figure 5 In the example shown, the thickness TH2 of the auxiliary wiring CAW12 corresponds to the distance from the vertex TP1 of the dam 1212 to the organic layer OR3. The portion of the lower layer UL located at the vertex TP1 of the dam 1212 is separated from the metal wiring MW12 by a distance TH3. A capacitor Cs1 is formed between the metal wiring MW and the portion of the lower layer UL located in a direction perpendicular to the metal wiring MW12. Since the lower layer UL is bent relative to the metal wiring MW12, a capacitor Cs2 is formed between the metal wiring MW and the portion of the lower layer UL located in a direction inclined from the metal wiring MW12. Since the lower layer UL is bent relative to the metal wiring MW12, a capacitor Cs3 is formed between the metal wiring MW and the portion of the lower layer UL located in a direction inclined from the metal wiring MW12.

[0085] Therefore, the display device DSP according to Modification 1 can obtain the same effects as the display device DSP according to the above embodiment. In addition, the display device DSP according to Modification 1 can have a larger capacity than the display device DSP according to the above embodiment.

[0086] (Variant 2)

[0087] The structure of the bank 1212 of the display device DSP according to the second modification is different from that of the display device DSP according to the above embodiment.

[0088] Figure 6 FIG. 4 is a cross-sectional view showing a configuration example of a display device DSP according to a second modification. Figure 6 In the figure, only the main part of the display device DSP is shown.

[0089] exist Figure 6 In the example shown, the bank 1212 is formed with a recessed portion RE that is recessed downward. The recessed portion RE is located between the lower electrodes E11 and E12. In other words, the recessed portion RE is located between the organic layers OR1 and OR2. In other words, the recessed portion RE is located between the upper electrodes E21 and E22. For example, the recessed portion RE is formed in a portion that is opposite to the metal wiring MW or in a portion that is located directly above the metal wiring MW. For example, the recessed portion RE is formed in Figure 4 The portion of the flat portion FP1 of the dam 1212 shown is opposite to the metal wiring MW or is located directly above the metal wiring MW. The bottom of the recess RE is formed, for example, flat. In addition, the bottom of the recess RE may also be formed unevenly, for example, it may be curved. The width of the recess RE is, for example, smaller than the width W1 of the metal wiring MW. In addition, the width of the recess RE may also be greater than the width W1 of the metal wiring MW. The depth of the recess RE is, for example, less than the thickness TH2 of the auxiliary wiring CAW.

[0090] exist Figure 6 In the example shown, the auxiliary wiring CAW12 is arranged in the recess RE of the dam 1212. The lower layer UL of the dam 1212 is arranged in the recess RE of the dam 1212, for example. The lower layer UL is bent downward along the shape of the recess RE. In other words, the lower layer UL is recessed downward along the shape of the recess RE. The middle layer ML is bent downward along the shape of the lower layer UL, for example. In other words, the middle layer ML is recessed downward along the shape of the lower layer UL. The upper layer LL is bent downward along the shape of the middle layer ML, for example. In other words, the upper layer LL is recessed downward along the shape of the middle layer ML. The portion of the lower layer UL located in the recess RE of the dam 1212 is separated from the metal wiring MW12 by a distance TH4. The distance TH4 is smaller than the distance TH3. A capacitance Cs4 is formed between the lower layer UL of the auxiliary wiring CAW12 and the metal wiring MW12. The capacitance Cs4 is larger than the capacitance Cs1.

[0091] Therefore, the display device DSP according to Modification 2 can obtain the same effects as the display device DSP according to the above-mentioned embodiment. In addition, the display device DSP according to Modification 2 can have a larger capacity than the display device DSP according to the embodiment.

[0092] (Variant 3)

[0093] The display device DSP according to the third modification has a different structure of the metal wiring MW12 from that of the display device DSP according to the second modification.

[0094] Figure 7 It is a cross-sectional view showing a configuration example of a display device DSP according to a third modification. Figure 7 The display device DSP shown corresponds to Figure 6 The display device DSP shown. Figure 7 In the figure, only the main part of the display device DSP is shown.

[0095] exist Figure 7 In the example shown, the metal wiring MW12 has a width W4. The width W4 is, for example, smaller than the width W1. The metal wiring MW12 is separated from the end Eg11 of the lower electrode E11 by a gap GP3 in the first direction X, and is separated from the end Eg22 of the lower electrode E12 by a gap GP3 in the first direction X. The gap GP3 is larger than the gap G2. Alternatively, the metal wiring MW12 may be separated from the end Eg11 of the lower electrode E11 and the end Eg22 of the lower electrode E12 by different gaps, respectively.

[0096] exist Figure 7 In the example shown, a capacitor Cs1 is formed between the lower layer UL of the auxiliary wiring CAW12 and the metal wiring MW12.

[0097] Therefore, the display device DSP involved in Variation 3 can obtain the same effect as the display device DSP involved in the above embodiment. In addition, the width of the metal wiring MW12 of the display device DSP of Variation 3 can be smaller than the width of the metal wiring MW12 of the display device DSP of the embodiment, Variation 1 and Variation 2.

[0098] (Variant 4)

[0099] The structure of the bank 1212 of the display device DSP according to the fourth modification is different from that of the display device DSP according to the above-mentioned embodiment and the modification.

[0100] Figure 8 4 is a cross-sectional view showing a configuration example of a display device DSP according to Modification 4. Figure 8 In the figure, only the main part of the display device DSP is shown.

[0101] The display device DSP includes a substrate 10, an insulating layer 11, lower electrodes E1 (E11 and E12), a metal wiring MW (MW12), an insulating layer 12 (1212), an organic layer OR (OR1, OR2 and OR3), and an upper electrode E2 (E21, E22 and E23).

[0102] exist Figure 8 In the example shown, the end Eg11 of the lower electrode E11 and the end Eg22 of the lower electrode E12 are arranged with a gap (or interval) GP4 in the first direction X. The gap GP4 may be the same as the gap GP1, larger than the gap GP1, or smaller than the gap GP1.

[0103] exist Figure 8 In the example shown, the metal wiring MW12 has a width W5. The width W5 may be the same as the width W1 or W4, or may be larger than the width W1 or W4, or may be smaller than the width W1 or W4. The metal wiring MW12 is arranged at the center of the gap GP4 between the lower electrodes E11 and E12 in the first direction X. For example, the metal wiring MW12 is separated from the end Eg11 of the lower electrode E11 by the gap GP5 in the first direction X, and is separated from the end Eg22 of the lower electrode E12 by the gap GP5 in the first direction X. The gap GP5 may be the same as the gap GP2 or the gap GP3, or may be larger than the gap GP2 or the gap GP3, or may be smaller than the gap GP2 or the gap GP3. In addition, the metal wiring MW12 may be arranged offset from the center of the gap GP4 between the lower electrodes E11 and E12. In addition, the metal wiring MW12 may be separated from the end Eg11 of the lower electrode E11 and the end Eg22 of the lower electrode E12 by different gaps, respectively.

[0104] exist Figure 8 In the example shown, the bank 1212 has a groove (recess or concave portion) T12 and a surface SF (SF1 and SF2). The groove T12 is arranged between the lower electrode E11 and the lower electrode E12. The groove T12 does not overlap with the lower electrode E1 (E11 and E12), for example. The groove T12 overlaps with the metal wiring MW12. The surface SF has a surface SF1 and a surface SF2. The surface SF1 is located between the groove T12 and the opening OP1. The surface SF2 is located between the groove T12 and the opening OP2. The insulating layer 12 has a thickness TH1.

[0105] The trench T12 has a bottom surface (bottom) BS and side surfaces SS (SS1 and SS2) rising from the bottom surface BS. Figure 8 In the example shown, the side surface SS includes a side surface SS1 and a side surface SS2. The side surface SS1 and the side surface SS2 are spaced apart from each other in the first direction X. The side surface SS1 is connected to the surface SF1. The side surface SS2 is connected to the surface SF2. The trench T12 corresponds to a space surrounded by the side surface SS1, the side surface SS2, and the bottom surface BS. The trench T12 has a depth DP. The depth DP is, for example, 0.5 to 1.0 μm.

[0106] The trench T12 has a gap (or interval) GP6 between the side surface SS1 and the side surface SS2 in its upper portion UP, and a gap (or interval) GP7 between the side surface SS1 and the side surface SS2 in the bottom surface BS. The gap GP6 is smaller than the gap GP7. That is, the trench T12 is formed so that the width along the first direction X becomes smaller as it moves from the bottom surface BS toward the upper portion UP. In other words, the side surface SS1 is inclined relative to the normal direction of the bottom surface BS in a manner overlapping with the bottom surface BS. Similarly, the side surface SS2 is inclined relative to the normal direction of the bottom surface BS in a manner overlapping with the bottom surface BS. The gap GP6 is, for example, larger than the width W5. In addition, the gap GP6 may be the same as the width W5, or may be smaller than the width W5.

[0107] exist Figure 8 In the example shown, the organic layer OR1 covers the lower electrode E11 and the surface SF1 located at the opening OP1. The organic layer OR2 covers the lower electrode E12 and the surface SF2 located at the opening OP2. The organic layer OR3 is arranged in the trench T12. The organic layer OR3 is arranged on the bottom surface BS of the trench T12. The organic layer OR3 is separated from the organic layer OR1 and the organic layer OR2. In addition, other layers may be arranged between the organic layer OR3 and the bottom surface BS.

[0108] exist Figure 8 In the example shown, the upper electrode E2 has upper electrodes E21 and E22. The upper electrode E21 is configured to extend from above the organic layer OR1 to the inside of the trench T12. The upper electrode E22 is configured to extend from above the organic layer OR2 to the inside of the trench T12. The upper electrodes E21 and E22 are continuously configured inside the trench T12. In other words, the upper electrode E21 and the upper electrode E22 are connected inside the trench T12. The upper electrode E2 (E21 and / or E22) covers the organic layer OR3 inside the trench T12 and contacts the bottom surface BS. In addition, the upper electrode E2 (E21 and / or E22) contacts the side surface SS1 and the side surface SS2 inside the trench T12. The upper electrode E2 (E21 and / or E22) overlapping (or facing) the metal wiring MW12 is separated from the metal wiring MW12 by a distance TH5. In other words, the upper electrode E2 (E21 and / or E22) disposed on the organic layer OR3 is separated from the metal wiring MW12 by a distance TH5. The distance TH5 is, for example, smaller than the distances TH3 and TH4. In addition, the distance TH5 may be less than the distance TH3 and greater than the distance TH4. The upper electrode E2 (E31 and / or E22) forms a capacitor Cs5 between it and the metal wiring MW12 via the insulating layer (dam) 1212 and the organic layer OR3. The capacitor Cs5 is larger than the capacitor Cs1. In addition, the capacitor Cs5 may be larger than the capacitor Cs4 or less than the capacitor Cs4. In addition, the capacitor Cs5 may be less than the capacitor Cs1.

[0109] exist Figure 8 In the example shown, the organic layer OR3 is located between the insulating layer 12 and the upper electrode E2 (E21 and / or E22), and is completely separated from the organic layer OR1 and the organic layer OR2, so it does not emit light or hardly emits light. In addition, within the organic layer OR1, the area covering the surface SF1 is located between the insulating layer 12 and the upper electrode E2, so it hardly emits light. Similarly, within the organic layer OR2, the area covering the surface SF2 is located between the insulating layer 12 and the upper electrode E2, so it hardly emits light.

[0110] The organic layer OR is formed, for example, by vacuum evaporation. After forming the insulating layer 12 having the opening OP1, the opening OP2 and the groove T12, an organic material for forming the organic layer OR is evaporated. Since the side surface SS1 is inclined in a manner overlapping with the bottom surface BS, the organic layer OR is hardly formed or not formed on the side surface SS1. Thus, the organic layer OR is formed so that the organic layer OR1 and the organic layer OR3 are separated. Similarly, since the side surface SS2 is inclined in a manner overlapping with the bottom surface BS, the organic layer OR is hardly formed or not formed on the side surface SS2. Thus, the organic layer OR is formed so that the organic layer OR2 and the organic layer OR3 are separated. In addition, in the area of ​​the bottom surface BS that overlaps with the side surface SS1 and the side surface SS2 in the third direction Z, the organic layer OR is hardly formed or not formed. In addition, the upper electrode E2 is formed by sputtering, and is thus continuously formed on the bottom surface BS, the side surface SS1 and the side surface SS2 on the organic layer OR.

[0111] Therefore, the display device DSP according to Modification 4 can obtain the same effects as the display device DSP according to the above embodiment. In addition, the display device DSP according to Modification 4 can achieve a larger capacity than the display device DSPs according to the above embodiment and modifications.

[0112] (Variant 5)

[0113] The display device DSP according to the fifth modification is different from the display device DSP according to the fourth modification in that it includes an auxiliary wiring CAW.

[0114] Fig. 9 It is a cross-sectional view showing a configuration example of a display device DSP according to Modification 5. Fig. 9 The display device DSP shown corresponds to Figure 8 The display device DSP shown. Fig. 9 In the figure, only the main part of the display device DSP is shown.

[0115] exist Fig. 9In the example shown, the auxiliary wiring CAW12 is located on the bottom surface BS of the trench T12. In other words, the lower layer UL of the auxiliary wiring CAW12 is located above the bottom surface BS of the trench T12. The width of the auxiliary wiring CAW12 is, for example, less than the gap GP6. The width of the auxiliary wiring CAW12 is, for example, the same as the width W5. In addition, the width of the auxiliary wiring CAW12 can be, for example, larger than the width W5 or smaller than the width W5. The thickness of the auxiliary wiring CAW12 is, for example, smaller than the depth DP of the trench T12. In other words, the depth DP of the trench T12 is greater than the thickness of the auxiliary wiring CAW12. Fig. 9 In the example shown, the lower layer UL of the auxiliary wiring CAW12 is separated from the metal wiring MW12 by a distance TH6. The distance TH6 is, for example, smaller than the distance TH5. A capacitor Cs6 is formed between the lower layer UL of the auxiliary wiring CAW12 and the metal wiring MW12. The capacitor Cs6 is, for example, larger than the capacitor Cs5. Alternatively, the capacitor Cs6 may be smaller than the capacitor Cs5. The organic layer OR3 covers the auxiliary wiring CAW12 in the trench, and a portion of the organic layer OR3 is located on the bottom surface BS of the trench T12.

[0116] Therefore, the display device DSP according to the fifth modification can obtain the same effects as those of the display device DSP according to the above-mentioned embodiment and the modification.

[0117] (Variant 6)

[0118] The display device DSP according to the sixth modification is different from the display device DSP according to the above-described embodiment in the arrangement of the metal wirings MW.

[0119] Fig.10 2 is a cross-sectional view showing a configuration example of a display device DSP according to Modification Example 6. Fig.10 In the figure, only the main part of the display device DSP is shown.

[0120] exist Fig.10 In the example shown, the insulating layer 11 includes an insulating layer 111 and an insulating layer 112. The insulating layer 112 is disposed on the insulating layer 111. The insulating layer 112 corresponds to a base layer of the display element 20. Fig.10 In the example shown, the insulating layer 112 corresponds to the base layer of the display elements 20A and 20B.

[0121] exist Fig.10 In the example shown, the lower electrodes E11 and E12 are arranged on the insulating layer 112. Fig.10In the example shown, the metal wiring MW12 is arranged on the insulating layer 111 and is covered by the insulating layer 112. In other words, the metal wiring MW12 is arranged between the insulating layers 111 and 112. The metal wiring MW12 is separated from the lower layer UL of the auxiliary wiring CAW12 by a distance TH7. The distance TH7 is greater than the distance TH3. A capacitor Cs7 is formed between the metal wiring MW12 and the lower layer UL of the auxiliary wiring CAW12. The capacitor Cs7 is, for example, smaller than the capacitor Cs1. In addition, the metal wiring MW12 may be arranged other than between the insulating layers 111 and 112. For example, the metal wiring MW12 may be arranged between the substrate 10 and the insulating layer 11.

[0122] Therefore, the display device DSP involved in the modification example 6 can obtain the same effect as the display device DSP of the above-mentioned embodiment and modification examples.

[0123] (Variant 7)

[0124] The display device DSP according to the seventh modification example has a different structure of the metal wiring MW from the display device DSP according to the above-mentioned embodiment and the modification example.

[0125] Fig.11 It is a plan view showing a structural example of the metal wiring MW involved in the seventh modification. Figure 7 The structure shown corresponds to Figure 2 The structure shown. Fig.11 Only structures necessary for explanation are shown.

[0126] exist Fig.11 In the example shown, the metal wirings MW11 to MW14 and the metal wirings MW21 and MW22 are divided, respectively. In other words, the metal wirings MW11 to MW14 and the metal wirings MW21 and MW22 each include a plurality of metal wirings arranged at intervals.

[0127] Therefore, the display device DSP according to Modification 7 can obtain the same effects as those of the display device DSP according to the above-mentioned embodiment and modification.

[0128] (Variant 8)

[0129] The display device DSP according to the modification example 8 has a different structure of a pixel PX from the display device DSP according to the above-mentioned embodiment and the modification example.

[0130] Fig.12 It is a plan view showing a structural example of a pixel PX according to Modification Example 8. Fig.12 Only structures necessary for explanation are shown.

[0131] exist Fig.12In the example shown, the display device DSP includes a plurality of pixels PX arranged in a first direction X and a second direction Y. The pixel PX includes a plurality of sub-pixels SP4, SP5, and SP6. In one example, the pixel PX includes a red sub-pixel SP4, a green sub-pixel SP5, and a blue sub-pixel SP6.

[0132] exist Fig.12 In the example shown, the display device DSP includes an insulating layer 12 (1215, 1216, 1217, 1223, 1224, and 1225), a lower electrode E1 (E14, E15, and E16), and auxiliary wirings CAW (CAW15, CAW16, and CAW17).

[0133] exist Fig.12 In the example shown, the lower electrode E1 includes lower electrodes E14, E15, and E16. The lower electrode E14 is arranged in the sub-pixel SP4. The lower electrode E15 is arranged in the sub-pixel SP5. The lower electrode E16 is arranged in the sub-pixel SP6. The lower electrodes E14 and E15 are arranged in the second direction Y. The lower electrodes E14 and E15 and the lower electrode E16 are arranged in the first direction X.

[0134] exist Fig.12 In the example shown, the insulating layer 12 has insulating layers (banks) 1215, 1216, 1217, 1223, 1224, and 1225. The insulating layers 1215, 1216, and 1217 extend in the second direction Y. The insulating layers 1215 to 1217 are arranged at intervals in the first direction X. For example, the insulating layers 1215, 1216, and 1217 are arranged in the order described toward the front end side of the arrow in the first direction X. The insulating layers 1223, 1224, and 1225 extend in the first direction X. The insulating layer 1225 is shorter than the insulating layers 1223 and 1224. For example, the length of the insulating layer 1225 corresponds to the interval between the insulating layers 1215 and 1216 in the first direction X. The insulating layers 1223 to 1225 are arranged at intervals in the second direction Y. For example, the insulating layers 1223 , 1225 , and 1224 are arranged in the order described with their front ends facing the arrows in the second direction Y. The insulating layers 1215 to 1217 intersect the insulating layers 1223 and 1224 , respectively. The insulating layers 1215 and 1216 intersect the insulating layer 1225 .

[0135] exist Fig.12In the example shown, the insulating layer 12 has an opening OP4 overlapping with the lower electrode E14, an opening OP5 overlapping with the lower electrode E15, and an opening OP6 overlapping with the lower electrode E16. The opening OP4 corresponds to a region surrounded by the insulating layers 1215 and 1216 and the insulating layers 1223 and 1225. That is, the central portion of the lower electrode E14 overlapping with the opening OP4 is exposed from the insulating layer 12. The opening OP5 corresponds to a region surrounded by the insulating layers 1215 and 1216 and the insulating layers 1225 and 1224. That is, the central portion of the lower electrode E15 overlapping with the opening OP5 is exposed from the insulating layer 12. The opening OP6 corresponds to a region surrounded by the insulating layers 1216 and 1217 and the insulating layers 1223 and 1224. That is, the central portion of the lower electrode E16 overlapping with the opening OP6 is exposed from the insulating layer 12.

[0136] exist Fig.12 In the example shown, the insulating layer 1223 overlaps with the end of the lower electrode E14 on the side opposite to the arrow tip side in the second direction Y and the end of the lower electrode E16 on the side opposite to the arrow tip side in the second direction Y. The insulating layer 1224 overlaps with the end of the lower electrode E15 on the side opposite to the arrow tip side in the second direction Y and the end of the lower electrode E16 on the side opposite to the arrow tip side in the second direction Y. The insulating layer 1225 overlaps with the end of the lower electrode E14 on the side opposite to the arrow tip side in the second direction Y and the end of the lower electrode E15 on the side opposite to the arrow tip side in the second direction Y. The insulating layer 1215 overlaps with the end of the lower electrode E14 on the side opposite to the arrow tip side in the first direction X and the end of the lower electrode E15 on the side opposite to the arrow tip side in the first direction X. The insulating layer 1216 overlaps with the end of the lower electrode E14 on the arrow front end side in the first direction X, the end of the lower electrode E15 on the arrow front end side in the first direction X, and the end of the lower electrode E16 on the opposite side to the arrow front end side in the first direction X. The insulating layer 1217 overlaps with the end of the lower electrode E16 on the arrow front end side in the first direction X.

[0137] exist Fig.12In the example shown, the auxiliary wiring CAW includes auxiliary wirings CAW15, CAW16, CAW17, CAW23, CAW24, and CAW25. The auxiliary wirings CAW15, CAW16, and CAW17 extend in the second direction Y. The auxiliary wirings CAW15 to CAW17 are arranged at intervals in the first direction X. For example, the auxiliary wirings CAW15, CAW16, and CAW17 are arranged in the order described toward the front end side of the arrow in the first direction X. The auxiliary wirings CAW23, CAW24, and CAW25 extend in the first direction X. The auxiliary wiring CAW25 is shorter than the auxiliary wirings CAW23 and CAW24. For example, the length of the auxiliary wiring CAW25 is equivalent to the interval between the auxiliary wiring CAW15 and the auxiliary wiring CAW16 in the first direction X. The auxiliary wirings CAW23 to CAW25 are arranged at intervals in the second direction Y. For example, the auxiliary wirings CAW23, CAW25, and CAW24 are arranged in the order described toward the front end side of the arrow in the second direction Y. The auxiliary wirings CAW15 to CAW17 intersect with the auxiliary wirings CAW23 and CAW24 , respectively. The auxiliary wirings CAW15 and CAW16 intersect with the auxiliary wiring CAW25 .

[0138] The auxiliary wiring CAW15 overlaps with the insulating layer 1215, the auxiliary wiring CAW16 overlaps with the insulating layer 1216, and the auxiliary wiring CAW17 overlaps with the insulating layer 1217. The auxiliary wiring CAW23 overlaps with the insulating layer 1223, the auxiliary wiring CAW24 overlaps with the insulating layer 1224, and the auxiliary wiring CAW25 overlaps with the insulating layer 1225. The auxiliary wirings CAW15 to CAW17 and the auxiliary wirings CAW23 to CAW25 do not overlap with the lower electrode E1.

[0139] Here, the sub-pixel SP4 is formed into a substantially rectangular shape extending in the first direction X, the sub-pixel SP5 is formed into a substantially rectangular shape extending in the second direction Y, and the sub-pixel SP6 is formed into a substantially rectangular shape extending in the second direction Y. The width of the sub-pixel SP4 in the first direction X is the same as the width of the sub-pixel SP5 in the first direction X. The width of the sub-pixel SP6 in the second direction Y is almost equal to the sum of the width of the sub-pixel SP4 in the second direction Y and the width of the sub-pixel SP5 in the second direction Y. The areas of the sub-pixels SP4 to SP6 are different from each other. The area of ​​the sub-pixel SP5 is larger than the area of ​​the sub-pixel SP4, and the area of ​​the sub-pixel SP6 is larger than the area of ​​the sub-pixel SP5. In addition, the area of ​​the sub-pixel SP5 may also be the same as the area of ​​the sub-pixel SP4.

[0140] Fig.13 It is a plan view showing a structural example of the metal wiring MW involved in the eighth modification. Fig.13 The structure shown corresponds to Fig.12 The structure shown. Fig.13 Only structures necessary for explanation are shown.

[0141] exist Fig.13 In the example shown, the display device DSP includes an insulating layer 12 (1215, 1216, 1217, 1223 and 1224), a lower electrode E1 (E14, E15 and E16), and metal wirings MW (MW15, MW16, MW17, MW23 and MW24).

[0142] exist Fig.13 In the example shown, the metal wiring MW includes metal wirings MW15, MW16, MW17, MW23, MW24, and MW25. The metal wirings MW15, MW16, and MW17 extend in the second direction Y. The metal wirings MW15 to MW17 are arranged at intervals in the first direction X. For example, the metal wirings MW15, MW16, MW17, and MW18 are arranged in the order of the description toward the front end side of the arrow in the first direction X. The metal wirings MW23, MW24, and MW25 extend in the first direction X. The metal wiring MW25 is shorter than the metal wirings MW23 and MW24. For example, the length of the metal wiring MW25 is equivalent to the interval between the metal wirings MW15 and the metal wirings MW16 in the first direction X. The metal wirings MW23 to MW25 are arranged at intervals in the second direction Y. For example, the metal wirings MW23, MW25, and MW24 are arranged in the order of the description toward the front end side of the arrow in the second direction Y. The metal wirings MW15 to MW17 intersect the metal wirings MW23 and MW24, respectively. The metal wirings MW15 and MW16 intersect with the metal wiring MW25.

[0143] exist Fig.13 In the example shown, the metal wiring MW15 overlaps with the insulating layer 1215, the metal wiring MW16 overlaps with the insulating layer 1216, and the metal wiring MW17 overlaps with the insulating layer 1217. The metal wiring MW23 overlaps with the insulating layer 1223, the metal wiring MW24 overlaps with the insulating layer 1224, and the metal wiring MW25 overlaps with the insulating layer 1225. The metal wirings MW15 to MW17 and the metal wirings MW23 to MW25 do not overlap with the lower electrode E1.

[0144] exist Fig.13 In the example shown, metal wiring MW15 overlaps auxiliary wiring CAW15, metal wiring MW16 overlaps auxiliary wiring CAW16, and metal wiring MW17 overlaps auxiliary wiring CAW17. Metal wiring MW23 overlaps auxiliary wiring CAW23, metal wiring MW24 overlaps auxiliary wiring CAW24, and metal wiring MW25 overlaps auxiliary wiring CAW25.

[0145] Therefore, the display device DSP involved in the modification example 8 can obtain the same effect as the display device DSP of the above-mentioned embodiment and modification example.

[0146] (Variant 9)

[0147] The display device DSP according to the modification example 9 has a different structure of a pixel PX from the display devices DSP according to the above-mentioned embodiment and the modification examples.

[0148] Fig.14 It is a plan view showing a structural example of a pixel PX according to Modification Example 9. Fig.14 Only structures necessary for explanation are shown.

[0149] exist Fig.14 In the example shown, the display device DSP includes a plurality of pixels PX arranged in a diamond arrangement in a first direction X and a second direction Y. The pixel PX corresponds to a PenTile pixel in which a sub-pixel SP is shared between a plurality of adjacent pixels PX. The pixel PX includes a plurality of sub-pixels SP7, SP8, and SP9. In one example, the pixel PX includes a blue sub-pixel SP7, a green sub-pixel SP8, and a red sub-pixel SP9.

[0150] Fig.14 In the example shown, the display device DSP includes an insulating layer 12 , lower electrodes E1 ( E17 , E18 , and E19 ), auxiliary wirings CAW, metal wirings MW, and the like.

[0151] exist Fig.14 In the example shown, the lower electrode E1 includes lower electrodes E17, E18, and E19. The lower electrode E17 is arranged in the sub-pixel SP7. The lower electrode E18 is arranged in the sub-pixel SP8. The lower electrode E19 is arranged in the sub-pixel SP9. The lower electrodes E17 to E19 are arranged in a triangular shape when viewed from above. The lower electrode E17 is arranged on the front end side of the arrow in the first direction X and the front end side of the arrow in the second direction Y relative to the lower electrode E18 when viewed from above. The lower electrode E19 is arranged on the opposite side of the front end side of the arrow in the first direction X and the front end side of the arrow in the second direction Y relative to the lower electrode E18 when viewed from above. The shapes of the lower electrodes E17 to E19 are different. In addition, the shapes of the two lower electrodes E1 in the lower electrodes E17 to E19 may be the same. The areas of the lower electrodes E17 to E19 are different. In addition, the areas of the two lower electrodes E1 in the lower electrodes E17 to E19 may be the same.

[0152] exist Fig.14In the example shown, the insulating layer 12 is formed in an inclined lattice shape when viewed from above. The insulating layer 12 has an opening OP7 overlapping with the lower electrode E17, an opening OP8 overlapping with the lower electrode E18, and an opening OP9 overlapping with the lower electrode E19. The central portion of the opening OP7 is exposed from the insulating layer 12. The central portion of the opening OP8 is exposed from the insulating layer 12. The central portion of the opening OP9 is exposed from the insulating layer 12.

[0153] exist Fig.14 In the illustrated example, the auxiliary wiring CAW is arranged in an inclined lattice pattern so as to overlap with the insulating layer 12 in a plan view.

[0154] exist Fig.14 In the example shown, the metal wiring MW is arranged in an oblique lattice shape so as to overlap with the insulating layer 12 in a plan view. In other words, the metal wiring MW is arranged in an oblique lattice shape so as to overlap with the auxiliary wiring CAW in a plan view.

[0155] Here, the outer shape of the sub-pixel SP7 is equivalent to the outer shape of the lower electrode E17. For example, the outer shape of the sub-pixel SP7 is square. In addition, the outer shape of the sub-pixel SP7 may be a shape other than a square. The outer shape of the sub-pixel SP8 is equivalent to the outer shape of the lower electrode E18. For example, the outer shape of the sub-pixel SP8 is rectangular. In addition, the outer shape of the sub-pixel SP8 may be a shape other than a rectangle. The outer shape of the sub-pixel SP9 is equivalent to the outer shape of the lower electrode E19. For example, the outer shape of the sub-pixel SP9 is square. In addition, the outer shape of the sub-pixel SP9 may be a shape other than a square. The area of ​​the sub-pixel SP7 is larger than the areas of the sub-pixels SP8 and SP9. The area of ​​the sub-pixel SP8 is less than the area of ​​the sub-pixel SP9. In addition, the area of ​​the sub-pixel SP8 may be larger than the area of ​​the sub-pixel SP9.

[0156] Therefore, the display device DSP involved in the modification example 8 can obtain the same effect as the display device DSP of the above-mentioned embodiment and modification example.

[0157] An embodiment is described, but this embodiment is given by way of example only and is not intended to limit the scope of the invention. In fact, the novel embodiments described herein may be embodied in various other ways. In addition, various omissions, substitutions and changes may be made to the form of the embodiments described herein without departing from the spirit of the invention. The attached claims and their equivalents are intended to cover these forms or modifications that fall within the scope and spirit of the invention.

Claims

1. A display device comprising: Base material; A first insulating layer is disposed on the substrate; A first lower electrode, disposed on the first insulating layer; a second lower electrode, disposed on the first insulating layer, separated from the first lower electrode, and formed of the same material as the first lower electrode; a first wiring arranged between the first lower electrode and the second lower electrode; A second insulating layer is disposed on the first wiring; A first organic layer, disposed on the first lower electrode, comprising a light-emitting layer; A second organic layer, disposed on the second lower electrode, comprising the light-emitting layer; A first upper electrode, disposed on the first organic layer; A second upper electrode is disposed on the second organic layer; as well as a second wiring, which is disposed on the second insulating layer and faces the first wiring, and forms a capacitor between the second wiring and the first wiring; The cross section of the second insulating layer is formed into a semicircular shape, The second wiring is arranged in a bent manner along the shape of the second insulating layer.

2. The display device according to claim 1, The first wiring is disposed on the first insulating layer.

3. The display device according to claim 1, The first wiring, the first lower electrode, and the second lower electrode are formed of the same material.

4. The display device according to claim 1, The first upper electrode and the second upper electrode are in contact with the second wiring.

5. The display device according to claim 1, comprising: a third organic layer, disposed on the second wiring, separated from the first organic layer and the second organic layer, and having the light-emitting layer; and The third upper electrode is disposed on the third organic layer and is separated from the first upper electrode and the second upper electrode.

6. The display device according to claim 1, The second wiring is formed of a low-resistance metal wiring.

7. A display device comprising: Base material; A first insulating layer is disposed on the substrate; A first lower electrode, disposed on the first insulating layer; a second lower electrode, disposed on the first insulating layer, separated from the first lower electrode, and formed of the same material as the first lower electrode; a first wiring arranged between the first lower electrode and the second lower electrode; A second insulating layer is disposed on the first wiring; A first organic layer, disposed on the first lower electrode, comprising a light-emitting layer; A second organic layer, disposed on the second lower electrode, comprising the light-emitting layer; A first upper electrode, disposed on the first organic layer; A second upper electrode is disposed on the second organic layer; as well as a second wiring, which is disposed on the second insulating layer and faces the first wiring, and forms a capacitor between the second wiring and the first wiring; The second insulating layer has a recessed portion at a portion facing the first wiring. The second wiring is arranged in the recess.

8. The display device according to claim 7, The first wiring is disposed on the first insulating layer.

9. The display device according to claim 7, The first wiring, the first lower electrode, and the second lower electrode are formed of the same material.

10. The display device according to claim 7, The first upper electrode and the second upper electrode are in contact with the second wiring.

11. The display device according to claim 7, comprising: a third organic layer, disposed on the second wiring, separated from the first organic layer and the second organic layer, and having the light-emitting layer; and The third upper electrode is disposed on the third organic layer and is separated from the first upper electrode and the second upper electrode.

12. The display device according to claim 7, The second wiring is formed of a low-resistance metal wiring.

13. A display device comprising: Base material; A first insulating layer is disposed on the substrate; A first lower electrode, disposed on the first insulating layer; a second lower electrode, disposed on the first insulating layer and separated from the first lower electrode; a first wiring arranged between the first lower electrode and the second lower electrode; a second insulating layer, disposed on the first wiring, having a first opening overlapping the first lower electrode, a second opening overlapping the second lower electrode, a groove between the first lower electrode and the second lower electrode, a first surface between the first opening and the groove, and a second surface between the first opening and the groove; A first organic layer is arranged from the first lower electrode to the first surface, and includes a light-emitting layer; A second organic layer is arranged from the second lower electrode to the second surface, and includes the light-emitting layer; A third organic layer, disposed in the groove, separated from the first organic layer and the second organic layer, and including the light-emitting layer; as well as an upper electrode covering the first organic layer, the second organic layer, and the third organic layer, and forming a capacitor between the upper electrode and the first wiring, The groove has a bottom surface, a first side surface rising from the bottom surface and connected to the first surface, and a second side surface rising from the bottom surface and connected to the second surface. A first distance between the first side surface and the second side surface on the upper side of the groove is smaller than a second distance between the first side surface and the second side surface on the bottom side of the groove. The third organic layer is disposed on the bottom surface.

14. The display device according to claim 13, The upper electrode contacts the first side surface and the second side surface.

15. The display device according to claim 13, The first wiring is disposed on the first insulating layer.

16. The display device according to claim 13, The first wiring, the first lower electrode, and the second lower electrode are formed of the same material.

17. A display device comprising: Base material; A first insulating layer is disposed on the substrate; A first lower electrode, disposed on the first insulating layer; a second lower electrode, disposed on the first insulating layer and separated from the first lower electrode; a first wiring arranged between the first lower electrode and the second lower electrode; a second insulating layer, disposed on the first wiring, having a first opening overlapping the first lower electrode, a second opening overlapping the second lower electrode, a groove between the first lower electrode and the second lower electrode, a first surface between the first opening and the groove, and a second surface between the first opening and the groove; a second wiring, arranged in the groove, facing the first wiring, and forming a capacitor between the second wiring and the first wiring; A first organic layer is arranged from the first lower electrode to the first surface, and includes a light-emitting layer; A second organic layer is arranged from the second lower electrode to the second surface, and includes the light-emitting layer; a third organic layer, covering the second wiring in the groove, separated from the first organic layer and the second organic layer, and including the light-emitting layer; as well as an upper electrode covering the first organic layer, the second organic layer and the third organic layer, The groove has a bottom surface, a first side surface rising from the bottom surface and connected to the first surface, and a second side surface rising from the bottom surface and connected to the second surface. A first distance between the first side surface and the second side surface on the upper side of the groove is smaller than a second distance between the first side surface and the second side surface on the bottom side of the groove. The second wiring is disposed on the bottom surface.

18. The display device according to claim 17, The upper electrode contacts the first side surface and the second side surface.

19. The display device according to claim 17, The first wiring is disposed on the first insulating layer.

20. The display device according to claim 17, The first wiring, the first lower electrode, and the second lower electrode are formed of the same material.

21. The display device according to claim 17, The second wiring is formed of a low-resistance metal wiring.

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