Display panel, manufacturing method thereof and display device

Abstract

Embodiments of the present application provide a display panel, a manufacturing method thereof and a display device, and relate to the technical field of display, to improve the problem of sub-pixel light stealing. The display panel comprises a plurality of pixel regions and at least a non-pixel region between two adjacent pixel regions; the display panel further comprises: a substrate; a light-emitting device layer on one side of the substrate, the light-emitting device layer comprising an organic common layer; a first opening in the non-pixel region, the first opening comprising a first sidewall and a second sidewall, wherein the first sidewall is from a first film layer, and the second sidewall is from a second film layer, the first film layer and the second film layer are respectively on one side of the organic common layer facing the substrate, and the organic common layer is recessed in the first opening.

Description

[Technical Field]

[0001] This invention relates to the field of display technology, and in particular to a display panel, its manufacturing method, and a display device. [Background Technology]

[0002] Compared to liquid crystal display (LCD) panels, organic light-emitting diode (OLED) panels have advantages such as self-illumination, high luminous efficiency, low power consumption, fast response, wide viewing angle, high brightness, vibrant colors, and thinness, and are widely used in various electronic devices.

[0003] In existing technologies, when an OLED display panel displays an image, ideally, if only a portion of the pixel area needs to be illuminated, the pixel areas that should not be illuminated should be completely off. However, due to the strong leakage current between the illuminated pixel area and its adjacent pixel areas, the adjacent pixel areas that should not be illuminated may become slightly lit due to the leakage current, resulting in the problem of sub-pixel "stealing" light and affecting the display effect. [Summary of the Invention]

[0004] In view of this, embodiments of the present invention provide a display panel and a method for manufacturing the same, as well as a display device, to improve the problem of sub-pixel overexposure.

[0005] On one hand, embodiments of the present invention provide a display panel, including a plurality of pixel regions and at least a non-pixel region located between two adjacent pixel regions;

[0006] The display panel also includes:

[0007] Substrate;

[0008] A light-emitting device layer located on one side of a substrate, the light-emitting device layer including an organic common layer;

[0009] A first opening is located in the non-pixel region. The first opening includes a first sidewall and a second sidewall, wherein the first sidewall comes from a first film layer and the second sidewall comes from a second film layer. The first film layer and the second film layer are respectively located on the side of the organic common layer facing the substrate, and the organic common layer is recessed within the first opening.

[0010] On the other hand, embodiments of the present invention provide a method for manufacturing a display panel, for manufacturing the above-mentioned display panel, comprising:

[0011] A first film layer and a second film layer are formed on a substrate, wherein a first sidewall of the first film layer and a second sidewall of the second film layer form a first opening located in a non-pixel region;

[0012] A light-emitting device layer is formed on the side of the first film layer and the second film layer facing away from the substrate. The light-emitting device layer includes an organic common layer that is recessed within the first opening.

[0013] In another aspect, embodiments of the present invention provide a display device including the aforementioned display panel.

[0014] One of the above technical solutions has the following beneficial effects:

[0015] Traditional openings in panel structures are formed by etching a single film layer, with the sidewalls of these openings all originating from the same film layer. Due to current technological limitations, the morphology of these openings is significantly restricted; for example, they are often inverted trapezoidal openings with large bottom and top widths, resulting in a correspondingly large volume.

[0016] The first opening in this embodiment differs from the opening described above. In this embodiment, the sidewalls of the first opening originate from two different film layers. By adjusting the tilt angle between the sidewalls and the bottom surface of the two film layers, their relative positions, and the etching area, the tilt degree of the first and second sidewalls and the distance between them can be flexibly adjusted, thereby achieving flexible control over the shape, volume, and other parameters of the first opening. For example, this embodiment can utilize two film layers to form a small, V-shaped slit-like first opening. In this way, when the organic common layer is recessed within the first opening, a stress concentration point will exist at the bottom of the film layer. This causes the film layer to naturally fracture under the intrinsic stress, high temperature, and external force, forming a break zone that isolates the organic common layer between two adjacent pixel regions, effectively preventing the mutual flow of holes and electrons between adjacent pixel regions. In this way, when only a portion of the pixel area needs to be illuminated, the illuminated portion will not transmit holes and electrons to adjacent pixel areas, thus avoiding the problem of adjacent pixel areas being illuminated without permission. In other words, in this embodiment of the invention, based on current process capabilities, openings can be used to isolate the organic common layer between adjacent pixel areas, effectively blocking the flow of holes and electrons between adjacent pixel areas.

[0017] In addition, the light-emitting device layer also includes a cathode located on the side of the organic common layer facing away from the substrate. Since the embodiments of the present invention can form a smaller first opening, as multiple organic common layers are recessed in the first opening, the organic common layers can fill the first opening to a greater extent. When the cathode is subsequently formed, it can be ensured that the cathode is continuous at the first opening, thereby avoiding the cathode from being broken and improving the continuity of the cathode. [Attached Image Description]

[0018] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a cross-sectional view of a display panel in the prior art;

[0020] Figure 2 A cross-sectional view of a display panel provided in an embodiment of the present invention;

[0021] Figure 3 This is a top view of the display panel provided in an embodiment of the present invention;

[0022] Figure 4 Another cross-sectional view of the display panel provided in an embodiment of the present invention;

[0023] Figure 5 This is a schematic diagram of a first opening provided in an embodiment of the present invention;

[0024] Figure 6 This is a top view of a disconnected region in an organic common layer provided in an embodiment of the present invention;

[0025] Figure 7 This is a schematic diagram of another structure of the first opening provided in an embodiment of the present invention;

[0026] Figure 8 This is a schematic diagram showing the dimensions of the first opening provided in an embodiment of the present invention;

[0027] Figure 9 This is a schematic diagram of a first film layer and a second film layer provided in an embodiment of the present invention;

[0028] Figure 10 This is another cross-sectional view of the display panel provided in an embodiment of the present invention;

[0029] Figure 11 This is a schematic diagram of another structure of the first and second membrane layers provided in an embodiment of the present invention;

[0030] Figure 12 This is another cross-sectional view of the display panel provided in an embodiment of the present invention;

[0031] Figure 13 A top view of the pixel region and the first opening provided in an embodiment of the present invention;

[0032] Figure 14 for Figure 13 A sectional view along the A1-A2 direction;

[0033] Figure 15 Another top view of the pixel region and the first opening provided in an embodiment of the present invention;

[0034] Figure 16 for Figure 15 A sectional view along the B1-B2 direction;

[0035] Figure 17 This is a schematic diagram of another arrangement of pixel regions provided in an embodiment of the present invention;

[0036] Figure 18 This is a schematic diagram of a filling layer provided in an embodiment of the present invention;

[0037] Figure 19 A top view of the first opening provided in an embodiment of the present invention;

[0038] Figure 20 Another top view of the first opening provided in an embodiment of the present invention;

[0039] Figure 21 Another top view of the first opening provided in an embodiment of the present invention;

[0040] Figure 22 This is a schematic diagram of a step structure provided in an embodiment of the present invention;

[0041] Figure 23 This is another structural schematic diagram of the stepped structure provided in an embodiment of the present invention;

[0042] Figure 24 This is a schematic diagram of an organic common layer provided in an embodiment of the present invention;

[0043] Figure 25 A flowchart of a manufacturing method provided in an embodiment of the present invention;

[0044] Figure 26 Another flowchart of the manufacturing method provided in the embodiment of the present invention;

[0045] Figure 27 for Figure 26 A corresponding process flow diagram;

[0046] Figure 28 for Figure 26 Another corresponding process flow diagram;

[0047] Figure 29 This is another process flow diagram provided in an embodiment of the present invention;

[0048] Figure 30 This is a schematic diagram of a display device provided in an embodiment of the present invention.

Detailed Implementation Methods

[0049] To better understand the technical solution of the present invention, the embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0050] It should be understood that the described embodiments are merely some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0051] The terminology used in the embodiments of this invention is for the purpose of describing particular embodiments only and is not intended to limit the invention. The singular forms “a,” “the,” and “the” as used in the embodiments of this invention and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0052] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0053] Before describing the technical solutions provided by the embodiments of the present invention, the present invention first explains the reasons for sub-pixel overexposure in the prior art:

[0054] like Figure 1 As shown, Figure 1 This is a cross-sectional view of a display panel in the prior art. The display panel includes a substrate 101 and a light-emitting device layer 102 located on one side of the substrate 101. The light-emitting device layer 102 includes: an anode 103; a pixel definition layer 104 located on the side of the anode 103 facing away from the substrate 101, the pixel definition layer 104 including an opening for defining a pixel region 110; a hole transport layer 105 located on the side of the pixel definition layer 104 facing away from the substrate 101; a light-emitting layer 106 located within the opening; an electron transport layer 107 located on the side of the light-emitting layer 106 facing away from the substrate 101; and a cathode 108 located on the side of the electron transport layer 107 facing away from the substrate 101. The hole transport layer 105 and the electron transport layer 107 are full-coverage film layers, covering both the pixel region 110 and the non-pixel region 111.

[0055] When the pixel region 110 is lit, the anode 103 and cathode 108 in the pixel region 110 receive the corresponding driving voltage. At this time, holes migrate to the light-emitting layer 106 via the hole transport layer 105, and electrons also migrate to the light-emitting layer 106 in the pixel region 110 via the electron transport layer 107. Holes and electrons meet in the light-emitting layer 106 to form excitons. The excitons excite the light-emitting molecules in the light-emitting layer 106 to emit visible light.

[0056] However, since the hole transport layer 105 and the electron transport layer 107 are fully covered, that is, the organic common layer between adjacent pixel regions 110 is also connected, when only a portion of the pixel region 110 needs to be lit, the holes injected into the hole transport layer 105 and the electrons injected into the electron transport layer 107 in the lit pixel region 110 will migrate along the hole transport layer 105 and the electron transport layer 107 to the light-emitting layer 106 of the adjacent pixel region 110 that should not be lit, thereby causing the pixel region 110 that should not be lit to light up, resulting in the phenomenon of sub-pixel stealth lighting.

[0057] To improve the problem of light leakage, the inventors discovered during their research that, for example... Figure 2 As shown, Figure 2 A cross-sectional view of a display panel provided in an embodiment of the present invention shows that a groove 109 can be provided on the pixel definition layer 104, so that the hole transport layer 105 and the electron transport layer 107 are recessed in the groove 109, increasing the extension length of this part of the organic common layer between adjacent pixel regions 110, thereby increasing the impedance of this part of the organic common layer and suppressing the migration ability of electrons / holes between adjacent pixel regions 110.

[0058] However, further research by the inventors revealed that while increasing the impedance of the organic common layer could improve the leakage problem to some extent, the improvement was not significant.

[0059] In response, embodiments of the present invention further provide a display panel, such as... Figure 3 As shown, Figure 3 This is a top view of a display panel provided in an embodiment of the present invention. The display panel includes a plurality of pixel regions 1 and non-pixel regions 2 located between at least two adjacent pixel regions 1. Pixel regions 1 can be understood as the opening areas of sub-pixels, i.e., the areas where the light-emitting layer is located, while non-pixel regions 2 can be understood as the non-opening areas of sub-pixels.

[0060] like Figure 4 and Figure 5 As shown, Figure 4 This is another cross-sectional view of the display panel provided in an embodiment of the present invention. Figure 5This is a schematic diagram of a first opening provided in an embodiment of the present invention. The display panel further includes: a substrate 3; a light-emitting device layer 4 located on one side of the substrate 3, the light-emitting device layer 4 including an organic common layer 5; and a first opening 6 located in the non-pixel region 2, the first opening 6 including a first sidewall 7 and a second sidewall 8, wherein the first sidewall 7 comes from a first film layer 9, the second sidewall 8 comes from a second film layer 10, and the first film layer 9 and the second film layer 10 are respectively located on the side of the organic common layer 5 facing the substrate 3.

[0061] It should be emphasized that, in this embodiment of the invention, the first opening 6 is defined by the sidewalls of two different film layers, the first film layer 9 and the second film layer 10. The first film layer 9 and the second film layer 10 are two film layers formed using different film-forming processes. For example, the first film layer 9 can be formed using a first film-forming process, and then the second film layer 10 can be formed using a second film-forming process; or, the second film layer 10 can be formed using a first film-forming process, and then the first film layer 9 can be formed using a second film-forming process.

[0062] If we describe the first opening 6 from another perspective, it can be: The display panel also includes an auxiliary film layer located on the side of the substrate 3 facing the organic common layer 5. The auxiliary film layer includes a first film layer 9 and a second film layer 10. The auxiliary film layer also includes a first opening 6 located in the non-pixel area. The first sidewall 7 of the first opening 6 belongs to the first film layer 9, and the second sidewall 8 of the first opening 6 belongs to the second film layer 10.

[0063] Traditional openings in panel structures, such as Figure 2 The groove 109 shown is typically formed by etching a single film layer, and the sidewalls of such openings all originate from the same film layer. Due to current process capabilities, the morphology of this type of opening is subject to significant limitations. For example, such openings are often inverted trapezoidal openings with large bottom and top widths, resulting in a correspondingly large volume.

[0064] The first opening 6 in this embodiment differs from the opening described above. In this embodiment, the sidewalls of the first opening 6 originate from two different film layers. By adjusting the tilt angle between the sidewalls and the bottom surface of the two film layers, their relative positions, and the etching area, the tilt degree of the first sidewall 7 and the second sidewall 8, as well as the distance between them, can be flexibly adjusted. This allows for flexible control of the shape, volume, and other parameters of the first opening 6. For example, this embodiment can utilize two film layers to form a small, V-shaped slit-like first opening 6. In this way, when the organic common layer 5 is recessed within the first opening 6, a stress concentration point will exist at the bottom of the film layer. This causes the film layer to naturally fracture under the intrinsic stress, high temperature, and external force, forming a break region 11. This isolates the organic common layer 5 between two adjacent pixel regions 1, effectively preventing the mutual flow of holes and electrons in adjacent pixel regions 1.

[0065] In this way, when only a portion of pixel region 1 needs to be illuminated, the illuminated portion of pixel region 1 will no longer transmit holes and electrons to adjacent pixel regions 1, thereby avoiding the problem of adjacent pixel regions 1 being illuminated without signal transmission. In other words, in this embodiment of the invention, based on current process capabilities, openings can be used to isolate the organic common layer 5 between adjacent pixel regions 1, effectively blocking the flow of holes and electrons between adjacent pixel regions 1.

[0066] In addition, see again Figure 4 The light-emitting device layer 4 also includes a cathode 34 located on the side of the organic common layer 5 facing away from the substrate 3. Since the first film layer 9 and the second film layer 10 can be used to form a smaller first opening 6 in this embodiment of the invention, as multiple organic common layers 5 are recessed in the first opening 6, the organic common layers 5 can fill the first opening 6 to a greater extent. When the cathode 34 is subsequently formed, it can be ensured that the cathode 34 is continuous at the first opening 6, thereby avoiding the cathode 34 from being broken and improving the continuity of the cathode 34.

[0067] In one feasible implementation, see again Figure 5 The organic common layer 5 includes a disconnection region 11. In a direction perpendicular to the plane of the substrate 3, the disconnection region 11 overlaps with the first opening 6 to effectively isolate the organic common layer 5 in adjacent pixel regions 1 and prevent the mutual flow of holes and electrons between different pixel regions 1.

[0068] In one feasible implementation, see again Figure 5The first sidewall 7 and the second sidewall 8 are two opposite sidewalls of the first opening 6, which can better define the shape of the first opening 6 by using the first sidewall 7 and the second sidewall 8, making it easier to form a slit-shaped first opening 6, and making it easier for the organic common layer 5 to have stress concentration points at the bottom of the first opening 6.

[0069] Furthermore, the first opening 6 is located at least between two adjacent pixel regions 1. The first sidewall 7 and the second sidewall 8 are two opposite sidewalls of the first opening 6 in the first direction x, and the first sidewall 7 and the second sidewall 8 overlap at least in the first direction x, which is the arrangement direction of the pixel regions 1 on both sides of the non-pixel region 2 where the first opening 6 is located. At this time, as Figure 6 As shown, Figure 6 This is a top view of the disconnected region 11 in the organic common layer 5 provided in an embodiment of the present invention. When the organic common layer 5 is disconnected at the bottom of the first opening 6, the disconnected region 11 formed by the organic common layer 5 at the bottom of the first opening 6 extends along the second direction y intersecting the first direction x, which is more conducive to blocking the mutual flow of holes and electrons between two adjacent pixel regions 1 in the first direction x.

[0070] Furthermore, see again Figure 5 Along the direction from the organic common layer 5 to the substrate 3: the first sidewall 7 is inclined toward the second sidewall 8, and the second sidewall 8 is inclined toward the first sidewall 7. In other words, along the direction from the organic common layer 5 to the substrate 3, the distance between the first sidewall 7 and the second sidewall 8 decreases in the first direction x, that is, the width of the first opening 6 decreases, which helps to reduce the bottom width of the first opening 6. When the organic common layer 5 is recessed in the first opening 6, the stress on the organic common layer 5 at the bottom of the first opening 6 is greater, and the possibility of fracture is higher.

[0071] Furthermore, such as Figure 7 As shown, Figure 7 This is another structural schematic diagram of the first opening 6 provided in an embodiment of the present invention. The first sidewall 7 and the second sidewall 8 intersect, that is, the bottom sides of the first sidewall 7 and the second sidewall 8 are in contact. At this time, the first opening 6 is a V-shaped slit structure with a sharp corner at the bottom. The organic common layer 5 is more likely to break at the bottom of the first opening 6.

[0072] It should be noted that the organic common layer 5 is very thin, generally at the nanometer level. In the manufacturing process of the display panel, due to the influence of the process capability, the organic common layer 5 deposited on the sidewall of the film layer will be further thinned, especially towards the bottom of the first opening 6, the thickness of the organic common layer 5 is smaller. This not only makes the organic common layer 5 at the bottom of the first opening 6 more likely to break under stress, but also after the organic common layer 5 breaks, the organic common layers 5 extending on the first sidewall 7 and the second sidewall 8 will not come into contact, so that the organic common layer 5 is effectively disconnected.

[0073] In one feasible implementation, such as Figure 8 As shown, Figure 8 The first opening 6 provided in the embodiment of the present invention is shown in the schematic diagram. The first film layer 9 includes a first bottom surface 13 near the substrate 3. The included angle between the first sidewall 7 and the first bottom surface 13 is A1, 60° < A1 < 90°. The second film layer 10 includes a second bottom surface 14 near the substrate 3. The included angle between the second sidewall 8 and the second bottom surface 14 is A2, 60° < A2 < 90°.

[0074] The light-emitting device layer 4 also includes a cathode 34 located on the side of the organic common layer 5 facing away from the substrate 3. In the first direction x, the maximum distance between the first sidewall 7 and the second sidewall 8 is L1, where L1 < 2 × d1, d1 is the sum of the film thicknesses of the cathode 34 and the organic common layer 5, and the first direction x is the arrangement direction of the pixel regions 1 on both sides of the non-pixel region 2 where the first opening 6 is located.

[0075] It should be noted that the film thickness of the cathode 34 and the organic common layer 5 in the embodiments of the present invention can be understood as the film thickness of this part of the cathode 34 and the organic common layer 5 within the pixel region 1. If there are multiple organic common layers 5, d1 is the sum of the film thickness of the cathode 34 and the multiple organic common layers 5.

[0076] In this embodiment of the invention, by setting L1 within 2×d1, and under the premise that A1 and A2 are within the range of 60° to 90°, the top widths L1 and L2 of the first opening 6 will not be very large. At this time, the shape of the first opening 6 can be defined as a very narrow slit that tends to be a V-shaped structure, making it easier for the organic common layer 5 at the bottom of the first opening 6 to have stress concentration points, and thus easier to break.

[0077] Furthermore, by designing the top width L1 of the first opening to be less than twice the sum of the thicknesses of the cathode 34 and the organic common layer 5, the top of the first opening 6 can be prevented from being too wide. When one or more organic common layers 5 are recessed in the first opening 6, the organic common layers 5 extending on the first sidewall 7 and the second sidewall 8 can basically fill the first opening 6. When the cathode 34 is subsequently formed, the cathode 34 will not be deeply recessed in the first opening 6, thereby reducing the undulation of the cathode 34 at the first opening 6, ensuring the continuity of the cathode 34 to a greater extent, and preventing the cathode 34 from being disconnected.

[0078] Furthermore, please see again Figure 8 In the first direction x, the minimum distance between the first sidewall 7 and the second sidewall 8 is L2, where L2 > 2 × d2, and d2 is the film thickness of the organic common layer 5. If there are multiple organic common layers 5, d2 is the sum of the film thicknesses of the multiple organic common layers 5. In this case, when the organic common layer 5 is disconnected at the bottom of the first opening 6, it can prevent the organic common layers 5 extending on the first sidewall 7 and the second sidewall 8 from contacting each other at the bottom, which is more conducive to achieving the blocking of holes and electrons.

[0079] In one feasible implementation, such as Figure 9 As shown, Figure 9 This is a schematic diagram of a first film layer 9 and a second film layer 10 provided in an embodiment of the present invention. The second film layer 10 is located on the side of the first film layer 9 facing away from the substrate 3. The first film layer 9 includes a first groove 15, and the second film layer 10 includes a second groove 16. In a direction perpendicular to the plane of the substrate 3, a portion of the second groove 16 overlaps with a portion of the first groove 15, and a portion of the second film layer 10 is recessed within the first groove 15. The sidewall of the second film layer 10 recessed within the first groove 15 is a second sidewall 8, and the sidewall of the first film layer 9 opposite to the second sidewall 8 is a first sidewall 7.

[0080] In the above configuration, the first film layer 9 and the second film layer 10 are two film layers with different layers. By making the first opening 6 formed by the misalignment of the grooves in the two film layers, in addition to better forming the V-shaped slit-like first opening 6 to cause the organic common layer 5 to break, the part of the first film layer 9 exposed in the second groove 16 and the second film layer 10 above it will form an undulating step-like surface. Compared with the method of setting the groove in a single film layer, the embodiment of the present invention can increase the length of the part of the organic common layer 5 extending in the non-pixel region 2 to a greater extent, thereby increasing the impedance of this part of the organic common layer 5 to a greater extent and more effectively suppressing the flow of holes and electrons in the pixel region 1 to the surrounding areas.

[0081] In one feasible implementation, please refer again. Figure 4The light-emitting device layer 4 further includes a pixel definition layer 17 located on the side of the organic common layer 5 facing the substrate 3. The pixel definition layer 17 includes a second opening 18 for defining a pixel region 1. The display panel also includes a planarization layer 19 located on the side of the pixel definition layer 17 facing the substrate 3, wherein the first film layer 9 is the planarization layer 19 and the second film layer 10 is the pixel definition layer 17.

[0082] In the panel structure, the planarization layer 19 is used to planarize the film layer, and therefore usually has a large thickness. By reusing the planarization layer 19 as the first film layer 9, a first opening 6 with a greater depth can be formed using the planarization layer 19. In addition to breaking at the bottom of the first opening 6, the organic common layer 5 is also prone to breaking at the junction of the top surface of the planarization layer 19 and the first sidewall 7. By breaking the organic common layer 5 in multiple places, the flow of holes and electrons between adjacent pixel regions 1 is blocked to a greater extent. Moreover, since the organic common layer 5 is in direct contact with the pixel definition layer 17 in the non-pixel region 2, when the planarization layer 19 is reused as the first film layer 9 and the pixel definition layer 17 is reused as the second film layer 10, the organic common layer 5 can be directly recessed in the first opening 6 formed by the two. There are no other film layers below the organic common layer 5, so the organic common layer 5 is more likely to have sharp corners at the bottom of the first opening 6, and the stress is more concentrated, thus making it more prone to breakage.

[0083] Furthermore, by reusing the planarization layer 19 as the first film layer 9 and the pixel definition layer 17 as the second film layer 10, the first groove 15 can be etched on the planarization layer 19 and the second groove 16 can be etched on the pixel definition layer 17 simply by changing the mask patterns corresponding to the pixel definition layer 17 and the planarization layer 19. This not only eliminates the need for additional process steps, resulting in lower process costs, but also avoids increasing the overall thickness of the panel, making it easier to achieve a thinner and lighter display panel design.

[0084] Alternatively, in another feasible implementation, such as Figure 10 and Figure 11 As shown, Figure 10 This is another cross-sectional view of the display panel provided in an embodiment of the present invention. Figure 11 This is another schematic diagram of the first film layer 9 and the second film layer 10 provided in an embodiment of the present invention. The light-emitting device layer 4 further includes a pixel defining layer 17 located on the side of the organic common layer 5 facing the substrate 3. The pixel defining layer 17 includes a second opening 18 for defining a pixel region 1. The display panel further includes a planarization layer 19 and a first insulating layer 20. The planarization layer 19 is located on the side of the pixel defining layer 17 facing the substrate 3, and the first insulating layer 20 is located on the side of the planarization layer 19 facing the substrate 3. The first film layer 9 is the first insulating layer 20, and the second film layer 10 is the planarization layer 19.

[0085] It should be noted that, see again Figure 10 The display panel also includes a circuit device layer 21, which comprises a semiconductor layer 22, a first metal layer 23, a second metal layer 24, and a third metal layer 25 sequentially disposed along a direction away from the substrate 3. The semiconductor layer 22 forms the active layer of a transistor, the first metal layer 23 forms the gate of the transistor, the second metal layer 24 forms the first and second electrodes of the transistor, and the third metal layer 25 forms power signal lines electrically connected to the transistor. A planarization layer 19 is located on the side of the third metal layer 25 facing away from the substrate 3, and the first insulating layer 20 can be an insulating layer between the second metal layer 24 and the third metal layer 25.

[0086] Because the planarization layer 19 is relatively thick, when the planarization layer 19 is reused as the second film layer 10, the extension length of the second sidewall 8 is relatively large. In addition to the breakage at the bottom of the first opening 6, the organic common layer 5 is also prone to breakage at the top surface of the planarization layer 19 and the junction of the second sidewall 8, thereby blocking the flow of holes and electrons between adjacent pixel regions 1 to a greater extent.

[0087] Furthermore, by reusing the first insulating layer 20 as the first film layer 9 and the planarization layer 19 as the second film layer 10, the first groove 15 can be etched on the first insulating layer 20 and the second groove 16 can be etched on the planarization layer 19 simply by changing the mask pattern corresponding to the first insulating layer 20 and the planarization layer 19. This not only eliminates the need for new processes and reduces process costs, but also does not increase the overall thickness of the panel, making it easier to achieve a thinner and lighter display panel design.

[0088] Furthermore, see again Figure 11 The pixel defining layer 17 also includes a third opening 26, which exposes at least the first opening 6 in a direction perpendicular to the plane of the substrate 3. In this case, the pixel defining layer 17 will not be recessed within the first opening 6 formed by the planarization layer 19 and the first insulating layer 20. Between the formation of the organic common layer 5, the pixel defining layer 17 can be prevented from filling the first opening 6, making the organic common layer 5 more prone to breakage at the bottom of the first opening 6. Furthermore, the overall groove depth formed by the three film layers is greater, resulting in a longer extension length and higher impedance for the organic common layer 5 between the non-pixel regions 2.

[0089] Furthermore, see again Figure 11 In the direction perpendicular to the plane of the substrate 3, the second groove 16 is located in the third opening 26. At this time, a step can be formed between the pixel definition layer 17 and the planarization layer 19, thereby further increasing the impedance of the organic common layer 5 in the non-pixel region 2 and suppressing the flow of holes and electrons in the pixel region 1 to the surrounding area to a greater extent.

[0090] Furthermore, see again Figure 9 and Figure 11 The first groove 15 penetrates the first membrane layer 9, and the second groove 16 penetrates the second membrane layer 10, so as to further increase the depth of the first opening 6, making the organic common layer 5 easier to break at the bottom of the first opening 6.

[0091] In one feasible implementation, such as Figure 12 As shown, Figure 12 In another cross-sectional view of the display panel provided in this embodiment of the invention, the light-emitting device layer 4 further includes a pixel definition layer 17 located on the side of the organic common layer 5 facing the substrate 3. The pixel definition layer 17 includes a second opening 18, which is used to define the pixel region 1.

[0092] The first film layer 9 and the second film layer 10 are located between the pixel definition layer 17 and the organic common layer 5, respectively, and the first film layer 9 and the second film layer 10 are disposed in the same layer. It should be noted that although the first film layer 9 and the second film layer 10 are disposed in the same layer, the first film layer 9 and the second film layer 10 are still formed separately through two patterning processes.

[0093] In this configuration, the first film layer 9 and the second film layer 10 are located above the pixel definition layer 17 and are set on the same layer. At this time, the shape of the first opening 6 can be flexibly adjusted by directly adjusting the film thickness of the first film layer 9 and the second film layer 10 and adjusting the distance between the first film layer 9 and the second film layer 10. The design of the first opening 6 is simpler.

[0094] In one feasible implementation, such as Figure 13 and Figure 14 As shown, Figure 13 This is a top view of pixel region 1 and first opening 6 provided in an embodiment of the present invention. Figure 14 for Figure 13 A cross-sectional view along the A1-A2 direction shows that pixel region 1 includes a red pixel region 27 for emitting red light, a green pixel region 28 for emitting green light, and a blue pixel region 29 for emitting blue light. The second film layer 10 is located on the side of the first film layer 9 facing away from the substrate 3, and the blue pixel region 29 is located on one side of the second sidewall 8 in the first opening 6.

[0095] When the second film layer 10 is located on the side of the first film layer 9 facing away from the substrate 3, the layer height at the second sidewall 8 is greater. In addition to the possibility of breakage at the bottom of the first opening 6, the organic common layer 5 is also prone to breakage at the top edge of the second sidewall 8. Therefore, the reliability of the breakage of the organic common layer 5 at the second sidewall 8 is higher. Furthermore, the second sidewall 8 has a greater extension length, and the impedance of the organic common layer 5 extending on the second sidewall 8 is also greater. Therefore, holes and electrons in the pixel region 1 on the second sidewall 8 side are less likely to flow towards the second sidewall 8, meaning that the leakage suppression effect is better on the second sidewall 8 side.

[0096] Since the starting voltage of the blue pixel region 29 is higher than that of the red pixel region 27 and the green pixel region 28, when the blue pixel region 29 is lit, the red pixel region 27 and the green pixel region 28 are more likely to experience sub-pixel stealing due to leakage current. In this embodiment of the invention, by placing the blue pixel region 29 on one side of the second sidewall 8, which has a better effect on suppressing leakage current, the problem of red pixel region 27 and green pixel region 28 stealing light when the blue pixel region 29 is lit can be better prevented.

[0097] In one feasible implementation, such as Figure 15 and Figure 16 As shown, Figure 15 This is another top view of the pixel region 1 and the first opening 6 provided in an embodiment of the present invention. Figure 16 for Figure 15 In a cross-sectional view along the B1-B2 direction, the first sidewall 7 includes a first bottom edge 30 near the substrate 3 and a first top edge 31 away from the substrate 3, and the second sidewall 8 includes a second bottom edge 32 near the substrate 3 and a second top edge 33 away from the substrate 3. The distance h2 between the second top edge 33 and the second bottom edge 32 in the second sidewall 8 is greater than the distance h1 between the first top edge 31 and the first bottom edge 30 in the first sidewall 7.

[0098] Pixel region 1 includes a red pixel region 27 for emitting red light, a green pixel region 28 for emitting green light, and a blue pixel region 29 for emitting blue light. The blue pixel region 29 is located on one side of the second sidewall 8 in the first opening 6.

[0099] Because the layer height is greater at the second sidewall 8, the organic common layer 5 is more prone to breakage not only at the bottom of the first opening 6, but also at the intersection of the second sidewall 8 and the top surface of the second film layer 10. Furthermore, the impedance of the organic common layer 5 extending on the second sidewall 8 is also greater. Therefore, the leakage suppression effect is better on the second sidewall 8 side. By placing the blue pixel region 29 on the side of the second sidewall 8 where leakage suppression is more effective, the problem of red pixel region 27 and green pixel region 28 being illuminated when the blue pixel region 29 is lit can be better prevented.

[0100] It should be noted that, in this embodiment of the invention, pixel region 1 can be... Figure 13 and Figure 15 The conventional layout shown, or, as... Figure 17 As shown, Figure 17 This is a schematic diagram of another arrangement of pixel region 1 provided in an embodiment of the present invention. Pixel region 1 can also be arranged in other ways. Figure 17 The windmill arrangement shown is not limited to other arrangements for pixel area 1.

[0101] It should be noted that, because the volume of the first opening 6 formed in this embodiment of the invention is relatively small, the first opening 6 is more easily filled as the number of organic common layer 5 films deposited within it increases. In a feasible embodiment, see again... Figure 4 The light-emitting device layer 4 also includes a cathode 34 located on the side of the organic common layer 5 facing away from the substrate 3. The cathode 34 is connected in the pixel region 1 and the non-pixel region 2. That is, in the direction perpendicular to the plane of the substrate 3, the cathode 34 overlaps with the disconnection region 11 of the organic common layer 5, thereby ensuring that the cathode 34 is continuous in both the pixel region 1 and the non-pixel region 2.

[0102] Furthermore, such as Figure 18 As shown, Figure 18 This is a schematic diagram of a filling layer 35 provided in an embodiment of the present invention. The light-emitting device layer 4 also includes a cathode 34 located on the side of the organic common layer 5 facing away from the substrate 3. The display panel also includes a filling layer 35, which is located in the first opening 6 and between the organic common layer 5 and the cathode 34. If the first opening 6 is deep, the filling layer 35 can be used to fill the first opening 6, preventing the cathode 34 from being recessed in the first opening 6 and ensuring the continuity of the cathode 34 to a greater extent.

[0103] In one feasible implementation, such as Figure 19 As shown, Figure 19 This is a top view of the first opening 6 provided in an embodiment of the present invention. The first opening 6 includes a strip-shaped opening 36. The extension direction of the strip-shaped opening 36 intersects with the arrangement direction of the pixel regions 1 on both sides of the non-pixel region 2 where the strip-shaped opening 36 is located. At this time, the extension direction of the disconnected region 11 in the organic common layer 5 also intersects with the arrangement direction of the pixel regions 1 on both sides, which is more conducive to blocking the mutual flow of holes and electrons between two adjacent pixel regions 1.

[0104] In one feasible implementation, such as Figure 20 As shown, Figure 20This is another top view of the first opening 6 provided in an embodiment of the present invention. The first opening 6 includes an annular opening 37, which surrounds the pixel region 1. At this time, the disconnection region 11 in the organic common layer 5 is also arranged around the pixel region 1, which can suppress the flow of holes and electrons in the pixel region 1 to the surroundings in all directions.

[0105] In one feasible implementation, such as Figure 21 As shown, Figure 21 This is another top view of the first opening 6 provided in an embodiment of the present invention. The first opening 6 is in the form of a mesh, and in a direction perpendicular to the plane of the substrate 3, the pixel region 1 is exposed within the mesh of the first opening 6. This arrangement not only suppresses the flow of holes and electrons in the pixel region 1 to the surroundings in all directions, but is also more suitable for display panels with a higher pixel density where the pixel region 1 is arranged more compactly.

[0106] In one feasible implementation, such as Figure 22 and Figure 23 As shown, Figure 22 This is a schematic diagram of a step structure 38 provided in an embodiment of the present invention. Figure 23 This is another schematic diagram of the stepped structure 38 provided in an embodiment of the present invention. The display panel also includes the stepped structure 38, which is located in the non-pixel region 2 and on the side of the organic common layer 5 facing the substrate 3. The stepped structure 38 further increases the impedance of the organic common layer 5 extending in the non-pixel region 2, and further suppresses the flow of holes and electrons in the pixel region 1 to the surrounding area.

[0107] It should be noted that the stepped structure 38 can be formed by the first film layer 9, the second film layer 10, or other film layers located on the side of the organic common layer 5 facing the substrate 3. Taking the first film layer 9 as the planarization layer 19 and the second film layer 10 as the pixel definition layer 17 as an example, the stepped structure 38 can be formed by the pixel definition layer 17.

[0108] The step structure 38 can be a protrusion. Furthermore, the display panel can also include a support pillar located in the non-pixel area 2. In the manufacturing process of the display panel, the support pillar is used to support the mask plate for forming the light-emitting layer. When the step structure is a protrusion, the step structure can be reused with the support pillar, thus eliminating the need for an additional process to form the step structure.

[0109] Alternatively, the stepped structure 38 can also be a groove. See again. Figure 23The light-emitting device layer 4 also includes a cathode 34 located on the side of the organic common layer 5 facing away from the substrate 3. The stepped structure 38 includes a third groove 39. In a direction perpendicular to the plane of the substrate 3, the depth of the third groove 39 is greater than the film thickness of the organic common layer 5, and the depth of the third groove 39 is less than or equal to the sum of the film thicknesses of the organic common layer 5 and the cathode 34.

[0110] With this configuration, the organic common layer 5 is recessed within the third groove 39. While increasing the extension length of the organic common layer 5 by utilizing the third groove 39, the depth of the third groove 39 is relatively small. The recessed organic common layer 5 can basically fill the third groove 39, thereby preventing the subsequent cathode 34 from being significantly recessed within the third groove 39 and better ensuring the continuity of the cathode 34.

[0111] It should be noted that, unlike the first opening 6, the third groove 39 is a groove formed by etching a single film layer. The sidewalls of the third groove 39 all come from the same film layer. Therefore, the third groove 39 has a different morphology from the first opening 6. The third groove 39 can be a large-volume inverted trapezoidal groove. The included angle between the sidewall and the bottom surface of the film layer used to form the third groove 39 can be between 60° and 70°.

[0112] In one feasible implementation, such as Figure 24 As shown, Figure 24 This is a schematic diagram of an organic common layer 5 provided in an embodiment of the present invention. The light-emitting device layer 4 further includes: an anode 40 located on one side of the substrate 3; a light-emitting layer 41 located on the side of the anode 40 facing away from the substrate 3; and a cathode 34 located on the side of the light-emitting layer 41 facing away from the substrate 3.

[0113] See you again Figure 24 The organic common layer 5 includes a hole transport layer 42 and a hole injection layer 43 located between the anode 40 and the light-emitting layer 41, and / or, the organic common layer 5 includes an electron transport layer 44 and an electron injection layer 45 located between the light-emitting layer 41 and the cathode 34, and / or, the light-emitting layer 41 includes a first light-emitting layer 46 and a second light-emitting layer 47, and the first light-emitting layer 46 and the second light-emitting layer 47 overlap in a direction perpendicular to the plane of the substrate 3. The organic common layer 5 includes a charge generation layer 48 located between the first light-emitting layer 46 and the second light-emitting layer 47 to effectively block the mutual flow of holes and electrons between different pixel regions 1.

[0114] Based on the same inventive concept, embodiments of the present invention also provide a method for manufacturing a display panel, which is used to manufacture the aforementioned display panel, in conjunction with... Figures 3-5 ,like Figure 25 As shown, Figure 25 This is a flowchart of a manufacturing method provided in an embodiment of the present invention, the manufacturing method comprising:

[0115] Step S1: A first film layer 9 and a second film layer 10 are formed on the substrate 3, wherein the first sidewall 7 of the first film layer 9 and the second sidewall 8 of the second film layer 10 form a first opening 6 located in the non-pixel region 2.

[0116] Step S2: A light-emitting device layer 4 is formed on the side of the first film layer 9 and the second film layer 10 facing away from the substrate 3. The light-emitting device layer 4 includes an organic common layer 5, which is recessed in the first opening 6.

[0117] Unlike traditional openings in panel structures, the sidewalls of the first opening 6 in this embodiment of the invention originate from two different film layers. By adjusting the tilt angle between the sidewalls and the bottom surface of the two film layers, their relative positions, and the etching area, the tilt degree of the first sidewall 7 and the second sidewall 8, as well as the distance between them, can be flexibly adjusted. This allows for flexible control of the shape, volume, and other parameters of the first opening 6. For example, this embodiment can utilize two film layers to form a small, V-shaped slit-like structure for the first opening 6. In this way, when the organic common layer 5 is recessed within the first opening 6, a stress concentration point will exist at the bottom of the film layer. This causes the film layer to naturally fracture under the intrinsic stress, high temperature, and external force, forming a break zone 11. This isolates the organic common layer 5 between two adjacent pixel regions 1, effectively preventing the mutual flow of holes and electrons in adjacent pixel regions 1. In this way, when only a portion of pixel region 1 needs to be lit, the lit portion of pixel region 1 will no longer transmit holes and electrons to adjacent pixel regions 1, thereby avoiding the problem of adjacent pixel regions 1 being lit without permission.

[0118] In addition, the light-emitting device layer 4 also includes a cathode 34 located on the side of the organic common layer 5 facing away from the substrate 3. Since the embodiments of the present invention can use the first film layer 9 and the second film layer 10 to form a smaller first opening 6, as multiple organic common layers 5 are recessed in the first opening 6, the first opening 6 can be filled to a greater extent. When the cathode 34 is subsequently formed, it can be ensured that the cathode 34 is continuous at the first opening 6, avoiding the cathode 34 from being broken and improving the reliability of the cathode 34.

[0119] In one feasible implementation, such as Figure 26 As shown, Figure 26 This is another flowchart of the manufacturing method provided in an embodiment of the present invention. The process of step S1 may specifically include:

[0120] Step S11: A first film layer 9 is formed on the substrate 3, the first film layer 9 including a first groove 15.

[0121] Step S12: A second film layer 10 is formed on the side of the first film layer 9 facing away from the substrate 3. The second film layer 10 includes a second groove 16. In the direction perpendicular to the plane of the substrate 3, a portion of the second groove 16 overlaps with a portion of the first groove 15, and a portion of the second film layer 10 is recessed in the first groove 15. The sidewall of the second film layer 10 recessed in the first groove 15 is a second sidewall 8, and the sidewall of the first film layer 9 opposite to the second sidewall 8 is a first sidewall 7.

[0122] In the above configuration, the first film layer 9 and the second film layer 10 are two film layers with different layers. By making the first opening 6 misaligned with the grooves in the two film layers, in addition to the organic common layer 5 being broken by using the first opening 6, an undulating step-like surface is formed between the part of the first film layer 9 exposed in the second groove 16 and the second film layer 10 above it. Compared with the method of setting grooves in a single film layer, the embodiment of the present invention can increase the length of the part of the organic common layer 5 extending in the non-pixel region 2 to a greater extent, thereby increasing the impedance of the part of the organic common layer 5 to a greater extent and more effectively suppressing the flow of holes and electrons in the pixel region 1 to the surrounding areas.

[0123] Furthermore, such as Figure 27 As shown, Figure 27 for Figure 26 According to a corresponding process flow diagram, step S11 may specifically include: forming a planarization layer 19 on the substrate 3, forming a first groove 15 on the planarization layer 19, and reusing the planarization layer 19 as a first film layer 9.

[0124] Step S12 may specifically include: forming a pixel definition layer 17 on the side of the planarization layer 19 facing away from the substrate 3, forming a second groove 16 and a second opening 18 on the pixel definition layer 17, the second opening 18 being used to define the pixel region 1, and the pixel definition layer 17 being reused as a second film layer 10.

[0125] In the panel structure, the planarization layer 19 is used to planarize the film layer, and therefore usually has a large thickness. By reusing the planarization layer 19 as the first film layer 9, a first opening 6 with a greater depth can be formed using the planarization layer 19. In addition to the bottom of the first opening 6, the organic common layer 5 is also prone to breakage at the junction of the top surface of the planarization layer 19 and the first sidewall 7, thereby blocking the flow of holes and electrons between adjacent pixel regions 1 to a greater extent. Moreover, since the organic common layer 5 is in direct contact with the pixel definition layer 17 in the non-pixel region 2, when the planarization layer 19 is reused as the first film layer 9 and the pixel definition layer 17 is reused as the second film layer 10, the organic common layer 5 can be directly recessed in the first opening 6 formed by the two. There are no other film layers below the organic common layer 5, so the organic common layer 5 is more likely to have sharp corners at the bottom of the first opening 6, and the stress is more concentrated, thus making it more prone to breakage.

[0126] Furthermore, by reusing the planarization layer 19 as the first film layer 9 and the pixel definition layer 17 as the second film layer 10, the first groove 15 and the second groove 16 can be etched on the planarization layer 19 and the pixel definition layer 17 respectively, simply by changing the mask pattern corresponding to the pixel definition layer 17 and the planarization layer 19. This not only eliminates the need for new processes and reduces process costs, but also does not increase the overall thickness of the panel, making it easier to achieve a thinner and lighter display panel design.

[0127] Or, such as Figure 28 As shown, Figure 28 for Figure 26 In another corresponding process flow diagram, step S11 may specifically include: forming a first insulating layer 20 on the substrate 3, forming a first groove 15 on the first insulating layer 20, and reusing the first insulating layer 20 as a first film layer 9.

[0128] Step S12 may specifically include: forming a planarization layer 19 on the side of the first insulating layer 20 facing away from the substrate 3, forming a second groove 16 on the planarization layer 19, and reusing the planarization layer 19 as a second film layer 10.

[0129] Because the planarization layer 19 is relatively thick, when the planarization layer 19 is reused as the second film layer 10, the extension length of the second sidewall 8 is relatively large. In addition to the organic common layer 5 breaking at the bottom of the first opening 6, the organic common layer 5 is also prone to breaking at the junction of the top surface of the planarization layer 19 and the first sidewall 7, thereby blocking the flow of holes and electrons between adjacent pixel regions 1 to a greater extent.

[0130] Furthermore, by reusing the first insulating layer 20 as the first film layer 9 and the planarization layer 19 as the second film layer 10, the first groove 15 can be etched on the first insulating layer 20 and the second groove 16 can be etched on the planarization layer 19 simply by changing the mask pattern corresponding to the first insulating layer 20 and the planarization layer 19. This not only eliminates the need for new processes and reduces process costs, but also does not increase the overall thickness of the panel, making it easier to achieve a thinner and lighter display panel design.

[0131] Furthermore, combined Figure 11 ,like Figure 29 As shown, Figure 29 Another process flow diagram provided in this embodiment of the invention shows that, after forming the planarization layer 19, the fabrication method further includes:

[0132] Step S13: A pixel definition layer 17 is formed on the side of the planarization layer 19 facing away from the substrate 3. A second opening 18 and a third opening 26 are formed on the pixel definition layer 17. The second opening 18 is used to define the pixel region 1. In a direction perpendicular to the plane of the substrate 3, the third opening 26 exposes at least the first opening 6.

[0133] At this time, the pixel definition layer 17 will not be recessed within the first opening 6 formed by the planarization layer 19 and the first insulating layer 20. Between the formation of the organic common layer 5, the pixel definition layer 17 can be prevented from filling the first opening 6, making the organic common layer 5 more prone to breakage at the bottom of the first opening 6. Moreover, the overall groove depth formed by the above three film layers is greater, so the extension length of the organic common layer 5 between the non-pixel regions 2 is greater, resulting in higher impedance.

[0134] Based on the same inventive concept, embodiments of the present invention also provide a display device, such as... Figure 30 As shown, Figure 30 This is a schematic diagram of a display device provided in an embodiment of the present invention. The display device includes the aforementioned display panel 100. The specific structure of the display panel 100 has been described in detail in the above embodiments and will not be repeated here. Figure 30 The display device shown is for illustrative purposes only. The display device can be any electronic device with display function, such as a mobile phone, tablet computer, laptop computer, e-reader or television.

[0135] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

[0136] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A display panel, characterized in that, It includes multiple pixel regions and at least a non-pixel region located between two adjacent pixel regions; The display panel also includes: Substrate; A light-emitting device layer located on one side of a substrate, the light-emitting device layer including an organic common layer; A first opening is located in the non-pixel region. The first opening includes a first sidewall and a second sidewall, wherein the first sidewall comes from a first film layer, the second sidewall comes from a second film layer, the first film layer and the second film layer are respectively located on the side of the organic common layer facing the substrate, and the organic common layer is recessed in the first opening. The light-emitting device layer also includes a cathode located on the side of the organic common layer facing away from the substrate; The first film layer includes a first bottom surface near the substrate, and the angle between the first sidewall and the first bottom surface is A1, 60° < A1 < 90°. The second film layer includes a second bottom surface near the substrate, and the angle between the second sidewall and the second bottom surface is A2, 60° < A2 < 90°. In a first direction, the maximum distance between the first sidewall and the second sidewall is L1, L1 < 2 × d1, where d1 is the sum of the film thicknesses of the cathode and the organic common layer. The first direction is the arrangement direction of the pixel regions on both sides of the non-pixel region where the first opening is located. And / or, the display panel further includes a stepped structure located in the non-pixel region and on the side of the organic common layer facing the substrate; the stepped structure includes a third groove, the depth of which is greater than the film thickness of the organic common layer in a direction perpendicular to the plane of the substrate, and the depth of which is less than or equal to the sum of the film thicknesses of the organic common layer and the cathode.

2. The display panel according to claim 1, characterized in that, The organic common layer includes a break region that overlaps with the first opening in a direction perpendicular to the plane of the substrate.

3. The display panel according to claim 1, characterized in that, The first sidewall and the second sidewall are two sidewalls opposite to the first opening.

4. The display panel according to claim 3, characterized in that, Along the direction from the organic common layer toward the substrate: the first sidewall is inclined toward the second sidewall, and the second sidewall is inclined toward the first sidewall.

5. The display panel according to claim 4, characterized in that, The first sidewall and the second sidewall intersect.

6. The display panel according to claim 1, characterized in that, In the first direction, the minimum distance between the first sidewall and the second sidewall is L2, where L2 > 2 × d2, and d2 is the film thickness of the organic common layer.

7. The display panel according to claim 1, characterized in that, The second film layer is located on the side of the first film layer that faces away from the substrate; The first film layer includes a first groove, and the second film layer includes a second groove. In a direction perpendicular to the plane of the substrate, a portion of the second groove overlaps with a portion of the first groove, and a portion of the second film layer is recessed within the first groove. Wherein, the sidewall of the second film layer recessed in the first groove is the second sidewall, and the sidewall of the first film layer opposite to the second sidewall is the first sidewall.

8. The display panel according to claim 1 or 7, characterized in that, The light-emitting device layer further includes a pixel definition layer located on the side of the organic common layer facing the substrate, the pixel definition layer including a second opening for defining the pixel region; The display panel also includes a planarization layer located on the side of the pixel definition layer facing the substrate; Wherein, the first film layer is the planarization layer, and the second film layer is the pixel definition layer.

9. The display panel according to claim 1 or 7, characterized in that, The light-emitting device layer further includes a pixel definition layer located on the side of the organic common layer facing the substrate, the pixel definition layer including a second opening for defining the pixel region; The display panel further includes a planarization layer and a first insulating layer, the planarization layer being located on the side of the pixel definition layer facing the substrate, and the first insulating layer being located on the side of the planarization layer facing the substrate; Wherein, the first film layer is the first insulating layer, and the second film layer is the planarization layer.

10. The display panel according to claim 9, characterized in that, The pixel definition layer further includes a third opening that exposes at least the first opening in a direction perpendicular to the plane of the substrate.

11. The display panel according to claim 10, characterized in that, The second film layer is located on the side of the first film layer that faces away from the substrate; The first film layer includes a first groove, and the second film layer includes a second groove. In a direction perpendicular to the plane of the substrate, a portion of the second groove overlaps with a portion of the first groove, and a portion of the second film layer is recessed within the first groove. In a direction perpendicular to the plane of the substrate, the second groove is located within the third opening.

12. The display panel according to claim 7, characterized in that, The first groove penetrates the first film layer, and the second groove penetrates the second film layer.

13. The display panel according to claim 1, characterized in that, The light-emitting device layer further includes a pixel definition layer located on the side of the organic common layer facing the substrate, the pixel definition layer including a second opening for defining the pixel region; The first film layer and the second film layer are respectively located between the pixel definition layer and the organic common layer, and the first film layer and the second film layer are disposed in the same layer.

14. The display panel according to claim 1, characterized in that, The pixel region includes a blue pixel region for emitting blue light, and the blue pixel region is located on one side of the second sidewall in the first opening; The second film layer is located on the side of the first film layer that faces away from the substrate.

15. The display panel according to claim 1, characterized in that, The first sidewall includes a first bottom edge near the substrate and a first top edge away from the substrate, and the second sidewall includes a second bottom edge near the substrate and a second top edge away from the substrate. The distance between the second top edge and the second bottom edge in the second sidewall is greater than the distance between the first top edge and the first bottom edge in the first sidewall. The pixel region includes a blue pixel region for emitting blue light, and the blue pixel region is located on one side of the second sidewall in the first opening.

16. The display panel according to claim 1, characterized in that, The display panel further includes a filler layer located at the first opening and between the organic common layer and the cathode.

17. The display panel according to claim 1, characterized in that, The cathode is connected in both the pixel region and the non-pixel region.

18. The display panel according to claim 1, characterized in that, The first opening includes a strip-shaped opening, the extension direction of which intersects the arrangement direction of the pixel regions on both sides of the non-pixel region where the strip-shaped opening is located.

19. The display panel according to claim 1, characterized in that, The first opening includes an annular opening that surrounds the pixel region.

20. The display panel according to claim 1, characterized in that, The first opening is mesh-like, and the pixel region is exposed within the mesh of the first opening in a direction perpendicular to the plane of the substrate.

21. The display panel according to claim 1, characterized in that, The light-emitting device layer further includes: The anode is located on one side of the substrate; A light-emitting layer located on the side of the anode facing away from the substrate; The cathode is located on the side of the light-emitting layer that faces away from the substrate; The organic common layer includes a hole transport layer and a hole injection layer located between the anode and the light-emitting layer; And / or, the organic common layer includes an electron transport layer and an electron injection layer located between the light-emitting layer and the cathode; And / or, the light-emitting layer includes a first light-emitting layer and a second light-emitting layer, wherein the first light-emitting layer and the second light-emitting layer overlap in a direction perpendicular to the plane of the substrate, and the organic common layer includes a charge-generating layer located between the first light-emitting layer and the second light-emitting layer.

22. A method for manufacturing a display panel, characterized in that, For manufacturing the display panel as described in claim 1, comprising: A first film layer and a second film layer are formed on a substrate, wherein a first sidewall of the first film layer and a second sidewall of the second film layer form a first opening located in a non-pixel region; A light-emitting device layer is formed on the side of the first film layer and the second film layer facing away from the substrate. The light-emitting device layer includes an organic common layer, which is recessed within the first opening. The light-emitting device layer also includes a cathode located on the side of the organic common layer facing away from the substrate; The first film layer includes a first bottom surface near the substrate, and the angle between the first sidewall and the first bottom surface is A1, 60° < A1 < 90°. The second film layer includes a second bottom surface near the substrate, and the angle between the second sidewall and the second bottom surface is A2, 60° < A2 < 90°. In a first direction, the maximum distance between the first sidewall and the second sidewall is L1, L1 < 2 × d1, where d1 is the sum of the film thicknesses of the cathode and the organic common layer. The first direction is the arrangement direction of the pixel regions on both sides of the non-pixel region where the first opening is located. And / or, the display panel further includes a stepped structure located in the non-pixel region and on the side of the organic common layer facing the substrate; the stepped structure includes a third groove, the depth of which is greater than the film thickness of the organic common layer in a direction perpendicular to the plane of the substrate, and the depth of which is less than or equal to the sum of the film thicknesses of the organic common layer and the cathode.

23. The manufacturing method according to claim 22, characterized in that, The process of forming the first film layer and the second film layer on the substrate includes: The first film layer is formed on the substrate, and the first film layer includes a first groove; A second film layer is formed on the side of the first film layer facing away from the substrate. The second film layer includes a second groove. In a direction perpendicular to the plane of the substrate, a portion of the second groove overlaps with a portion of the first groove, and a portion of the second film layer is recessed within the first groove. Wherein, the sidewall of the second film layer recessed in the first groove is the second sidewall, and the sidewall of the first film layer opposite to the second sidewall is the first sidewall.

24. The manufacturing method according to claim 23, characterized in that, The process of forming the first film layer includes: forming a planarization layer on the substrate, forming the first groove on the planarization layer, and reusing the planarization layer as the first film layer; The process of forming the second film layer includes: forming a pixel definition layer on the side of the planarization layer opposite to the substrate, forming a second groove and a second opening on the pixel definition layer, the second opening being used to define a pixel region, and the pixel definition layer being reused as the second film layer.

25. The manufacturing method according to claim 23, characterized in that, The process of forming the first film layer includes: forming a first insulating layer on the substrate, forming the first groove on the first insulating layer, and reusing the first insulating layer as the first film layer; The process of forming the second film layer includes: forming a planarization layer on the side of the first insulating layer opposite to the substrate, forming the second groove on the planarization layer, and reusing the planarization layer as the second film layer.

26. The manufacturing method according to claim 25, characterized in that, After forming the planarization layer, the fabrication method further includes: A pixel definition layer is formed on the side of the planarization layer facing away from the substrate. A second opening and a third opening are formed on the pixel definition layer. The second opening is used to define a pixel region. The third opening exposes at least the first opening in a direction perpendicular to the plane of the substrate.

27. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 21.

Images