Schottky barrier diode

Abstract

The Schottky barrier diode of the present invention comprises: an n-type semiconductor substrate; at least one p-type guard ring, which is arranged on the upper surface side of the semiconductor substrate; an anode electrode, which is arranged on the upper surface of the semiconductor substrate; a cathode electrode, which is arranged on the back surface of the semiconductor substrate; and an insulating film, which is arranged on the innermost inner guard ring of the at least one guard ring, the anode electrode being overlapped on the insulating film, the end of the anode electrode being arranged directly above the inner guard ring, the anode electrode being arranged separately from the inner guard ring, and the thickness of the insulating film being greater than or equal to 1.0 μm.

Description

Technical Field

[0001] The present invention relates to a Schottky barrier diode. Background Art

[0002] Patent Document 1 discloses a Schottky barrier diode in which a guard ring formed of a semiconductor layer of an opposite conductivity type is formed on the surface of a semiconductor base of a certain conductivity type.

[0003] Patent Document 1: Japanese Patent Application Laid-Open No. 63-138769 Summary of the Invention

[0004] In the Schottky barrier diode described in Patent Document 1, if the forward current increases, the forward voltage drop of the pn junction formed between the guard ring and the semiconductor substrate may become lower than the forward voltage drop of the Schottky portion. This may cause the terminal region to be destroyed due to current concentration.

[0005] The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to obtain a Schottky barrier diode capable of suppressing current concentration in a guard ring.

[0006] The Schottky barrier diode of the present invention comprises: an n-type semiconductor substrate; at least one p-type guard ring, which is arranged on the upper surface side of the semiconductor substrate; an anode electrode, which is arranged on the upper surface of the semiconductor substrate; a cathode electrode, which is arranged on the back surface of the semiconductor substrate; and an insulating film, which is arranged on the innermost inner guard ring among the at least one guard ring, the anode electrode is overlapped on the insulating film, the end of the anode electrode is arranged directly above the inner guard ring, the anode electrode is arranged separately from the inner guard ring, and the thickness of the insulating film is greater than or equal to 1.0 μm.

[0007] The Schottky barrier diode of the present invention comprises: an n-type semiconductor substrate; a plurality of p-type guard rings, which are arranged on the upper surface side of the semiconductor substrate; an anode electrode, which is arranged on the upper surface of the semiconductor substrate; a cathode electrode, which is arranged on the back surface of the semiconductor substrate; and an insulating film, which is arranged on the innermost inner guard ring among the plurality of guard rings, the anode electrode is placed on the insulating film, the end of the anode electrode is arranged directly above the inner guard ring, and the anode electrode is arranged separately from the inner guard ring.

[0008] The Schottky barrier diode of the present invention comprises: an n-type semiconductor substrate; at least one p-type guard ring, which is arranged on the upper surface side of the semiconductor substrate; an insulating film, which is arranged on the innermost inner guard ring of the at least one guard ring; an anode electrode, which is arranged on the upper surface of the semiconductor substrate and overlaps the insulating film; a cathode electrode, which is arranged on the back surface of the semiconductor substrate; and a high-resistance layer, which has a higher resistance than the inner guard ring and separates the inner guard ring from the anode electrode.

[0009] Effects of the Invention

[0010] In the Schottky barrier diode according to the present invention, the anode electrode and the guard ring are connected via the capacitance component of the insulating film, thereby suppressing current concentration in the guard ring. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 This is a cross-sectional view of the Schottky barrier diode according to the first embodiment.

[0012] Figure 2 This is a diagram illustrating the dimensions of the Schottky barrier diode according to the first embodiment.

[0013] Figure 3 This is a cross-sectional view of a Schottky barrier diode according to the second embodiment.

[0014] Figure 4 It is a cross-sectional view of a Schottky barrier diode according to the third embodiment.

[0015] Figure 5 This is a cross-sectional view of a Schottky barrier diode according to a fourth embodiment.

[0016] Figure 6 It is a cross-sectional view of a Schottky barrier diode according to the fifth embodiment.

[0017] Figure 7 It is a cross-sectional view of a Schottky barrier diode according to the sixth embodiment.

[0018] Figure 8 It is a cross-sectional view of a Schottky barrier diode according to the seventh embodiment. DETAILED DESCRIPTION

[0019] The Schottky barrier diode according to each embodiment will be described with reference to the accompanying drawings. The same reference numerals are used for the same or corresponding components, and redundant description may be omitted.

[0020] Implementation Method 1

[0021] Figure 1This is a cross-sectional view of a Schottky barrier diode 100 according to Embodiment 1. The Schottky barrier diode 100 includes a semiconductor substrate 10 . The semiconductor substrate 10 is formed of, for example, silicon. The semiconductor substrate 10 includes an n+ type semiconductor layer 12 and an n-type semiconductor layer 14 provided on the n+ type semiconductor layer 12 .

[0022] A plurality of p-type guard rings 16 are provided on the upper surface of the semiconductor substrate 10. The innermost guard ring 16 among the plurality of guard rings 16 is referred to as an inner guard ring 17. The guard rings 16 other than the inner guard ring 17 are referred to as outer guard rings 18.

[0023] Semiconductor substrate 10 includes a cell region 10a, through which the main current of Schottky barrier diode 100 flows, and a termination region 10b surrounding cell region 10a. In this embodiment, the inner end of inner guard ring 17 forms the boundary between termination region 10b and cell region 10a. Here, "inner" refers to the side of semiconductor substrate 10 where cell region 10a is located relative to termination region 10b. Guard ring 16 is formed to surround cell region 10a.

[0024] An anode electrode 22 is provided on the upper surface of the semiconductor substrate 10. Anode electrode 22 is electrically connected to n-type semiconductor layer 14 in cell region 10a. Anode electrode 22 is a Schottky barrier electrode. A cathode electrode 30 is provided on the back surface of the semiconductor substrate 10. Cathode electrode 30 is electrically connected to n+-type semiconductor layer 12.

[0025] An insulating film 20 is provided on the guard rings 16 . The thickness T1 of the insulating film 20 is, for example, greater than or equal to 1.0 μm. The insulating film 20 covers the entire upper surface of the plurality of guard rings 16 .

[0026] The anode electrode 22 is placed on the insulating film 20. The end of the anode electrode 22 is located directly above the inner guard ring 17. The insulating film 20 is provided so that the anode electrode 22 does not contact the inner guard ring 17. In this way, the anode electrode 22 is provided separately from the inner guard ring 17.

[0027] Typically, Schottky barrier diodes maintain their withstand voltage by placing the Schottky barrier electrode in contact with the innermost portion of the p-type guard ring region, thereby conducting potential to the guard ring. However, as the forward current increases, the forward voltage Vpn of the pn junction formed between the guard ring and the semiconductor substrate may fall below the forward voltage VF of the Schottky junction. Consequently, current may concentrate in the guard ring, particularly during freewheeling.

[0028] In contrast, in this embodiment, the anode electrode 22 and the guard ring 16 are connected via the insulating film 20. Therefore, the forward voltage Vpn of the path connecting the anode electrode 22, the insulating film 20, the inner guard ring 17, and the n-type semiconductor layer 14 can be adjusted by the capacitance component of the insulating film 20. Consequently, the forward voltage Vpn can be adjusted so that it does not fall below the forward voltage VF between the anode electrode 22 and the n-type semiconductor layer 14. Consequently, current concentration at the guard ring 16 can be suppressed. Consequently, damage to the Schottky barrier diode 100 due to thermal runaway can be avoided.

[0029] The capacitance component of the insulating film 20 may be adjusted so that Vpn>VF within a predetermined current range. The predetermined current range is, for example, the range of current flowing when the Schottky barrier diode 100 is driven.

[0030] Furthermore, by forming the anode electrode 22 so as to overlap the guard ring 16 via the insulating film 20 , the potential near the boundary between the cell region 10 a and the termination region 10 b can be stabilized.

[0031] Furthermore, current concentration is likely to occur near the boundary between the cell region 10a and the terminal region 10b. Therefore, by ensuring that the inner guard ring 17, particularly among the multiple guard rings 16, is not in contact with the anode electrode 22, current concentration can be effectively suppressed. Therefore, it is sufficient that at least the inner guard ring 17, among the multiple guard rings 16, is separated from the anode electrode 22. In other words, all guard rings 16 may be separated from the anode electrode 22, or the outer guard ring 18 may be in contact with the anode electrode 22.

[0032] Furthermore, the insulating film 20 only needs to be provided at least on the inner guard ring 17. The insulating film 20 may also cover the entire upper surface of the inner guard ring 17, leaving the outer guard ring 18 exposed. Furthermore, as long as the inner guard ring 17 does not contact the anode electrode 22, a portion of the inner guard ring 17 may be exposed from the insulating film 20.

[0033] Furthermore, the thickness T1 of the insulating film 20 in this embodiment is greater than or equal to 1 μm. As a comparative example to this embodiment, a thin insulating film, for example, less than or equal to 0.5 μm, can be formed to form an inversion layer for a p-type channel below the insulating film 20. In this case, it is believed that the inversion layer forms only in a region shallower than the guard ring. Consequently, the depletion layer is less likely to extend toward the end region, potentially increasing its curvature. Consequently, the withstand voltage of the Schottky barrier diode may decrease.

[0034] In contrast, in this embodiment, the thickness T1 of the insulating film 20 is set to 1.0 μm or greater to prevent the formation of an inversion layer near the inner guard ring 17. This prevents channel inversion from occurring below the insulating film 20. Furthermore, the insulating film 20 ensures capacitance, fixing the potentials of the anode electrode 22 and the guard ring 16. The insulating film 20 can also be formed from a deposited oxide film such as TEOS (Tetra Eth Oxy Silane).

[0035] The thickness T1 of the insulating film 20 may be smaller than 1.0 μm as long as it can suppress current concentration. In the present embodiment, a plurality of guard rings 16 are provided. However, this is not limiting, and at least one guard ring 16 may be provided.

[0036] Furthermore, if the anode electrode 22 extends above the outer guard ring 18, the electric field distribution may change, causing a decrease in withstand voltage. Furthermore, the creepage distance between the anode electrode 22 and other metal parts may be shortened, making discharge more likely. In contrast, in this embodiment, the end of the anode electrode 22 is positioned directly above the inner guard ring 17. Therefore, the outer guard ring 18 does not capacitively couple with the anode electrode 22 via the insulating film 20. This prevents a decrease in withstand voltage. Furthermore, the creepage distance can be maintained.

[0037] Furthermore, according to the configuration of this embodiment, the capacitance component can be adjusted by the overlapping area between the inner guard ring 17 and the anode electrode 22 .

[0038] Figure 2 This figure illustrates the dimensions of the Schottky barrier diode 100 according to Embodiment 1. The width L2 of the inner guard ring 17 can be greater than or equal to the width L1 of the portion of the anode electrode 22 that overlaps the insulating film 20. For example, L1 = 20 μm and L2 = 50 μm. Thus, even if the positional relationship between the anode electrode 22 and the inner guard ring 17 deviates due to manufacturing fluctuations, the end of the anode electrode 22 can be reliably positioned directly above the inner guard ring 17. Consequently, the inner guard ring 17 can be reliably capacitively coupled to the anode electrode 22. Furthermore, capacitive coupling between the anode electrode 22 and the outer guard ring 18 can be prevented.

[0039] The semiconductor substrate 10 can also be formed from a wide-bandgap semiconductor with a larger bandgap than silicon. Examples of wide-bandgap semiconductors include silicon carbide, gallium oxide, gallium nitride-based materials, or diamond. This can increase the forward voltage Vpn. In particular, by using materials such as gallium oxide, which have a larger bandgap than silicon carbide, the current load in the cell region 10a can be increased, thereby suppressing current concentration in the guard ring 16.

[0040] These modifications can be appropriately applied to the Schottky barrier diodes according to the following embodiments. The Schottky barrier diodes according to the following embodiments have many similarities with the first embodiment, so the description will focus on the differences from the first embodiment.

[0041] Implementation Method 2

[0042] Figure 3 This is a cross-sectional view of a Schottky barrier diode 200 according to Embodiment 2. The shape of the insulating film 20 of Schottky barrier diode 200 differs from that of Schottky barrier diode 100. In Embodiment 1, the inner end of the insulating film 20 is rectangular. In contrast, the end of the insulating film 20 according to this embodiment, located on the inner side of the semiconductor substrate 10, is tapered.

[0043] The insulating film 20 has a tapered portion 220a that becomes thinner toward the end. In this embodiment, the capacitance component can be adjusted by the angle of the end of the insulating film 20. In addition, the capacitance can be adjusted without changing the maximum thickness of the insulating film 20.

[0044] The thickness T1 of the insulating film 20 is, for example, 1.0 μm or more at the end of the inner guard ring 17 directly above the inner side of the semiconductor substrate 10 .

[0045] Furthermore, the tapered portion 220a is located directly above the inner end of the inner guard ring 17. This allows the forward voltage Vpn to be adjusted at a location where current tends to concentrate. This is not limiting; the tapered portion 220a can be located anywhere between the anode electrode 22 and the guard ring 16. This achieves the effect of adjusting the capacitance component.

[0046] Implementation 3

[0047] Figure 4 This is a cross-sectional view of a Schottky barrier diode 300 according to Embodiment 3. The structure of a cathode electrode 330 of the Schottky barrier diode 300 is different from that of the Schottky barrier diode 100. An opening 332 is formed in the cathode electrode 330 directly below the inner guard ring 17 to expose the semiconductor substrate 10.

[0048] The cathode electrode 330 is partially removed directly below the inner guard ring 17. Consequently, the cathode electrode 330 is separated on the cell region 10a side and the terminal region 10b side. This lengthens the path of current flowing from the inner guard ring 17, increasing the forward voltage Vpn. Furthermore, by reducing the area of ​​the cathode electrode 330, the forward voltage Vpn can be increased. Consequently, current concentration at the guard ring 16 can be suppressed.

[0049] In this embodiment, the opening 332 exposes the semiconductor substrate 10 over a predetermined range L3 from directly below the inner guard ring 17. Adjusting the distance L3 allows the forward voltage Vpn to be adjusted. Distance L3 can be, for example, the thickness of the drift layer. Furthermore, the angle formed by a virtual line connecting the end of the inner guard ring 17 and the end of the cathode electrode 330 and a perpendicular line to the back surface of the semiconductor substrate 10 is denoted by θ1. By varying θ1, the forward voltage Vpn can be adjusted. A larger value for θ1 results in a higher forward voltage Vpn.

[0050] The strength during die bonding can be improved by the portion of the cathode electrode 330 on the end region 10b side separated by the opening 332. Alternatively, the portion of the cathode electrode 330 on the end region 10b side may be omitted.

[0051] exist Figure 4 In the example, the area of ​​the opening 332 is larger than the area of ​​the inner guard ring 17. However, the present invention is not limited thereto, and the opening 332 may be formed in at least a portion of the cathode electrode 330 directly below the inner guard ring 17.

[0052] Implementation 4

[0053] Figure 5 This is a cross-sectional view of a Schottky barrier diode 400 according to Embodiment 4. Schottky barrier diode 400 differs from Schottky barrier diode 100 in that it includes a second p-type semiconductor layer 411. Second p-type semiconductor layer 411 is provided directly below inner guard ring 17 in semiconductor substrate 10. Second p-type semiconductor layer 411 is provided on the back side of semiconductor substrate 10.

[0054] The second p-type semiconductor layer 411 limits the conductive area on the cathode side. Specifically, the second p-type semiconductor layer 411 lengthens the path for current flowing to the cathode. This further increases the forward voltage Vpn. This also reduces current concentration in the guard ring 16.

[0055] The second p-type semiconductor layer 411 is provided within a predetermined range L4 extending from directly below the inner guard ring 17. Adjusting the distance L4 allows for adjustment of the forward voltage Vpn. Furthermore, the angle formed by the virtual line connecting the ends of the inner guard ring 17 and the second p-type semiconductor layer 411 and the perpendicular to the back surface of the semiconductor substrate 10 is denoted by θ2. By varying θ2, the forward voltage Vpn can be adjusted. A larger value for θ2 results in a higher forward voltage Vpn.

[0056] exist Figure 5In the example shown, the area of ​​the second p-type semiconductor layer 411 is larger than the area of ​​the inner guard ring 17. This is not limiting, and the second p-type semiconductor layer 411 may be provided in at least a portion of the portion directly below the inner guard ring 17 of the semiconductor substrate 10. For example, the second p-type semiconductor layer 411 may be provided only in the portion directly below the inner guard ring 17 of the semiconductor substrate 10. By reducing the area of ​​the second p-type semiconductor layer 411 in the cell region 10a, the effect of the second p-type semiconductor layer 411 on the electrical characteristics of the Schottky barrier diode 400 can be suppressed.

[0057] Furthermore, the second p-type semiconductor layer 411 is provided on the n+-type semiconductor layer 12 and is exposed on the back surface of the semiconductor substrate 10. This is not limiting; the second p-type semiconductor layer 411 may also be provided directly below the inner guard ring 17 at a position deeper than the back surface of the semiconductor substrate 10. In other words, the second p-type semiconductor layer 411 need not be exposed on the back surface of the semiconductor substrate 10. In this case, the path of current flowing from the inner guard ring 17 to the cathode side can be lengthened, thereby increasing the forward voltage Vpn.

[0058] In addition, the second p-type semiconductor layer 411 may also extend to the end of the termination region 10 b .

[0059] Implementation 5

[0060] Figure 6 This is a cross-sectional view of a Schottky barrier diode 500 according to Embodiment 5. Schottky barrier diode 500 differs from Schottky barrier diode 100 in that it includes a crystal defect layer 519. Crystal defect layer 519 is provided directly below inner guard ring 17 in semiconductor substrate 10. Crystal defect layer 519 is formed by ion irradiation, electron beam irradiation, or the like.

[0061] In this embodiment, the forward voltage Vpn can be increased by increasing the speed of the pn junction, thereby suppressing current concentration in the guard ring 16 .

[0062] Furthermore, the crystal defect layer 519 is provided only directly below the inner guard ring 17 of the plurality of guard rings 16. This can suppress a drop in the withstand voltage of the terminal region 10b. The invention is not limited thereto and the crystal defect layer 519 may also be provided directly below the outer guard ring 18.

[0063] Implementation Method 6

[0064] Figure 7This is a cross-sectional view of a Schottky barrier diode 600 according to Embodiment 6. Schottky barrier diode 600 differs from Schottky barrier diode 100 in that it includes a first p-type semiconductor layer 615. First p-type semiconductor layer 615 is provided on the upper surface of semiconductor substrate 10, further inward than inner guard ring 17, in contact with inner guard ring 17. The concentration of first p-type semiconductor layer 615 is lower than that of inner guard ring 17. Inner guard ring 17 and first p-type semiconductor layer 615 are electrically connected and have the same potential.

[0065] The insulating film 20 completely covers the upper surface of the inner guard ring 17. The first p-type semiconductor layer 615 is exposed from the insulating film 20. The end portion of the first p-type semiconductor layer 615 located inside the semiconductor substrate 10 is exposed from the insulating film 20. More than half of the upper surface of the first p-type semiconductor layer 615 is exposed from the insulating film 20. The portion of the upper surface of the first p-type semiconductor layer 615 exposed from the insulating film 20 is in direct contact with the anode electrode 22.

[0066] Inner guard ring 17 and anode electrode 22 are separated by first p-type semiconductor layer 615. The first p-type semiconductor layer 615 has a higher resistance than that of inner guard ring 17. The contact resistance between first p-type semiconductor layer 615, which has a lower impurity concentration than inner guard ring 17, and anode electrode 22 is higher than the contact resistance between inner guard ring 17 and anode electrode 22. Therefore, as in Embodiment 1, current concentration at guard ring 16 can be suppressed.

[0067] In this embodiment, the first p-type semiconductor layer 615 is provided inside the inner guard ring 17. This is not limiting, and the first p-type semiconductor layer 615 can be provided so as to separate the anode electrode 22 from the inner guard ring 17. For example, the first p-type semiconductor layer 615 may also enclose the inner guard ring 17.

[0068] The high-resistance layer separating the inner guard ring 17 from the anode electrode 22 is not limited to the first p-type semiconductor layer 615. The inner guard ring 17 and the anode electrode 22 may be separated by a layer having a higher resistance than the inner guard ring 17. The inner guard ring 17 and the anode electrode 22 may also be separated by a layer having a higher contact resistance with the anode electrode 22 than the contact resistance between the inner guard ring 17 and the anode electrode 22.

[0069] In addition, in the present embodiment, the end of the anode electrode 22 is provided right above the inner guard ring 17 . However, the present invention is not limited thereto, and the anode electrode 22 may extend above the outer guard ring 18 .

[0070] Implementation 7

[0071] Figure 8This is a cross-sectional view of a Schottky barrier diode 700 according to Embodiment 7. This embodiment differs from Schottky barrier diode 100 in the configuration of insulating film 20 and the inclusion of resistor 724. In addition to a portion of inner guard ring 17, insulating film 20 also covers multiple guard rings 16. Inner guard ring 17 has an exposed portion from insulating film 20 on the inner side of semiconductor substrate 10 at its end. Resistor 724 covers this exposed portion.

[0072] The resistor 724 is, for example, a polysilicon resistor. The resistor 724 is disposed on the upper surface of the semiconductor substrate 10, further inward than the insulating film 20. The resistor 724 is adjacent to the insulating film 20. The resistor 724 has a higher resistance than the inner guard ring 17. The anode electrode 22 is attached to the resistor 724 and the insulating film 20.

[0073] In this embodiment, the resistor 724 corresponds to a high resistance layer that separates the inner guard ring 17 from the anode electrode 22. As in the sixth embodiment, the resistance component of the resistor 724 can suppress current concentration on the guard ring 16.

[0074] In addition, the arrangement of the resistor 724 is not limited to Figure 8 The resistor 724 only needs to be provided between the anode electrode 22 and the inner guard ring 17. For example, the resistor 724 may be provided inside the semiconductor substrate 10.

[0075] Alternatively, both the first p-type semiconductor layer 615 and the resistor 724 described in Embodiment 6 may be provided as the high resistance layer. This can further increase the forward voltage Vpn.

[0076] Furthermore, the technical features described in each embodiment may be used in combination as appropriate.

[0077] Description of the label

[0078] 10 semiconductor substrate, 10a unit region, 10b end region, 12 n+ type semiconductor layer, 14 n-type semiconductor layer, 16 guard ring, 17 inner guard ring, 18 outer guard ring, 20 insulating film, 22 anode electrode, 30 cathode electrode, 100, 200 Schottky barrier diodes, 220a tapered portion, 300 Schottky barrier diode, 330 cathode electrode, 332 opening, 400 Schottky barrier diode, 411 second p-type semiconductor layer, 500 Schottky barrier diode, 519 crystal defect layer, 600 Schottky barrier diode, 615 first p-type semiconductor layer, 700 Schottky barrier diode, 724 resistor.

Claims

1. A Schottky barrier diode, characterized in that: have: n-type semiconductor substrate; at least one p-type guard ring disposed on the upper surface side of the semiconductor substrate; an insulating film disposed on the innermost inner guard ring of the at least one guard ring; an anode electrode, which is disposed on the upper surface of the semiconductor substrate and is attached to the insulating film; a cathode electrode, which is disposed on the back side of the semiconductor substrate; as well as a high resistance layer having a higher resistance than the inner guard ring, separating the inner guard ring from the anode electrode; The high resistance layer includes a resistor provided on the upper surface of the semiconductor substrate further inside than the insulating film. The inner guard ring has an exposed portion exposed from the insulating film on a side of the end portion disposed inside the semiconductor substrate. The resistor covers the entire exposed portion.

2. A Schottky barrier diode, characterized in that: have: n-type semiconductor substrate; at least one p-type guard ring disposed on the upper surface side of the semiconductor substrate; an insulating film disposed on the innermost inner guard ring of the at least one guard ring; an anode electrode, which is disposed on the upper surface of the semiconductor substrate and is attached to the insulating film; a cathode electrode, which is disposed on the back side of the semiconductor substrate; as well as a high resistance layer having a higher resistance than the inner guard ring, separating the inner guard ring from the anode electrode; The high-resistance layer includes a first p-type semiconductor layer having a lower concentration than that of the inner guard ring, and the high-resistance layer is provided on the upper surface side of the semiconductor substrate, further inward than the inner guard ring, in contact with the inner guard ring. The insulating film completely covers the upper surface of the inner guard ring. The first p-type semiconductor layer is exposed from the insulating film, A portion of the upper surface of the first p-type semiconductor layer exposed from the insulating film is in direct contact with the anode electrode.

3. The Schottky barrier diode according to claim 1, wherein: The resistor is a polysilicon resistor.

4. The Schottky barrier diode according to any one of claims 1 to 3, characterized in that The end of the anode electrode is arranged right above the inner protection ring.

5. The Schottky barrier diode according to any one of claims 1 to 3, characterized in that The thickness of the insulating film is greater than or equal to 1.0 μm.

6. The Schottky barrier diode according to any one of claims 1 to 3, characterized in that An opening is formed in the cathode electrode directly below the inner guard ring to expose the semiconductor substrate.

7. The Schottky barrier diode according to claim 6, wherein: The opening exposes the semiconductor substrate in a predetermined range from immediately below the inner guard ring.

8. The Schottky barrier diode according to any one of claims 1 to 3, characterized in that A second p-type semiconductor layer is provided in the semiconductor substrate directly below the inner guard ring.

9. The Schottky barrier diode according to claim 8, characterized in that: The second p-type semiconductor layer is provided in a predetermined range from immediately below the inner guard ring.

10. The Schottky barrier diode according to any one of claims 1 to 3, characterized in that: A crystal defect layer is provided in the semiconductor substrate directly below the inner guard ring.

11. The Schottky barrier diode according to any one of claims 1 to 3, characterized in that: The semiconductor substrate is formed of a wide bandgap semiconductor.

12. The Schottky barrier diode according to claim 11, wherein: The wide bandgap semiconductor is silicon carbide, gallium oxide, gallium nitride or diamond.

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