Chip Verification Method and Device

Abstract

The present disclosure relates to the field of chip verification technologies, and specifically provides a chip verification method and apparatus. A chip verification method includes: obtaining test case data of a test case to be tested on a first verification platform and a configuration description file of the test case to be tested; parsing the configuration description file based on a preset tool script, and configuring the test case data to a second verification platform according to the parsing result; executing the test case to be tested on the second verification platform to obtain a verification result of the test case to be tested. In the embodiments of the present disclosure, the efficiency of test case transplantation is improved, so that chip verification is more efficient and smooth, and the verification cycle is shortened.

Description

Technical Field

[0001] The present disclosure relates to the technical field of chip verification, and in particular, to a chip verification method and apparatus. Background Art

[0002] Chip verification is an important part of chip development, which runs through the entire chip development cycle. With the rapid iteration of chip technology in the consumer electronics field, the demand for accelerating chip verification is becoming increasingly strong.

[0003] Taking an ISP (Image Signal Processing) chip as an example, nowadays, ISP chips not only have the characteristics of high resolution (up to 4K or even 8K) and high frame rate (up to 30FPS), but also the algorithm integration degree and functions are becoming increasingly complex, resulting in a very complex verification process and a long verification cycle for a test case to be verified. Summary of the Invention

[0004] To improve the chip verification efficiency and shorten the chip verification cycle, embodiments of the present disclosure provide a chip verification method, apparatus, electronic device, and storage medium.

[0005] In a first aspect, embodiments of the present disclosure provide a chip verification method, including:

[0006] Obtaining the case data of a test case on a first verification platform and the configuration description file of the test case;

[0007] Parsing the configuration description file based on a preset tool script, and configuring the case data to a second verification platform according to the parsing result;

[0008] Executing the test case on the second verification platform to obtain the verification result of the test case.

[0009] In some embodiments, the case data includes an initialization data file and a chip instruction file; the parsing the configuration description file based on a preset tool script and configuring the case data to a second verification platform according to the parsing result includes:

[0010] Parsing the configuration description file based on the preset tool script to obtain a first parsing result of the initialization data file and a second parsing result of the chip instruction file;

[0011] Storing the initialization data file at a first storage location of a storage component of the second verification platform according to the first parsing result, and storing the chip instruction file at a second storage location of the storage component of the second verification platform according to the second parsing result.

[0012] In some embodiments, the use case data includes a register configuration file; parsing the configuration description file based on a preset tool script and configuring the use case data into a second verification platform according to the parsing result includes:

[0013] Parsing the configuration description file based on the preset tool script to obtain a third parsing result of the register configuration file;

[0014] Performing data format conversion on the register configuration file according to the third parsing result to obtain a target register configuration file; the target register configuration file includes a register address and a register value;

[0015] Storing the target register configuration file at a third storage location of a storage component of the second verification platform.

[0016] In some embodiments, executing the test case to be tested on the second verification platform to obtain a verification result of the test case to be tested includes:

[0017] Executing the test case to be tested on the second verification platform to obtain an actual execution result;

[0018] Based on the preset tool script, obtaining an expected result file included in the test case to be tested, and obtaining a verification result of the test case to be tested according to the actual execution result and the expected execution result file.

[0019] In some embodiments, obtaining the expected result file included in the test case to be tested based on the preset tool script includes:

[0020] Parsing the configuration description file based on the preset tool script to obtain a fourth parsing result of the expected result file; the fourth parsing result includes a storage location and a data length of the expected result file;

[0021] Obtaining the expected result file from the storage component according to the fourth parsing result.

[0022] In some embodiments, executing the test case to be tested on the second verification platform to obtain a verification result of the test case to be tested includes:

[0023] Obtaining a platform hardware database file and a platform configuration file of the second verification platform;

[0024] Based on the platform hardware database file and the platform configuration file, executing the test case to be tested on a test chip component of the second verification platform to obtain the verification result.

[0025] In some embodiments, the first verification platform includes a verification platform based on a software emulator, and the second verification platform includes a verification platform based on a hardware emulator.

[0026] Second, embodiments of the present disclosure provide a chip verification device, including:

[0027] An acquisition module, configured to acquire test case data of a test case to be measured on a first verification platform and a configuration description file of the test case to be measured;

[0028] A script processing module, configured to parse the configuration description file based on a preset tool script and configure the test case data to a second verification platform according to the parsing result;

[0029] A verification platform module, configured to execute the test case to be measured on the second verification platform to obtain a verification result of the test case to be measured.

[0030] In some embodiments, the test case data includes an initialization data file and a chip instruction file; the script processing module is configured to:

[0031] Parse the configuration description file based on the preset tool script to obtain a first parsing result of the initialization data file and a second parsing result of the chip instruction file;

[0032] Store the initialization data file in a first storage location of a storage component of the second verification platform according to the first parsing result, and store the chip instruction file in a second storage location of the storage component of the second verification platform according to the second parsing result.

[0033] In some embodiments, the test case data includes a register configuration file; the script processing module is configured to:

[0034] Parse the configuration description file based on the preset tool script to obtain a third parsing result of the register configuration file;

[0035] Perform data format conversion on the register configuration file according to the third parsing result to obtain a target register configuration file; the target register configuration file includes a register address and a register value;

[0036] Store the target register configuration file in a third storage location of a storage component of the second verification platform.

[0037] In some embodiments, the verification platform module is configured to:

[0038] Execute the test case to be measured on the second verification platform to obtain an actual execution result;

[0039] Obtain the expected result file included in the test case to be tested based on the preset tool script, and obtain the verification result of the test case to be tested according to the actual execution result and the expected execution result file.

[0040] In some embodiments, the verification platform module is configured to:

[0041] Parse the configuration description file based on the preset tool script to obtain a fourth parsing result of the expected result file; the fourth parsing result includes the storage location and data length of the expected result file;

[0042] Obtain the expected result file from the storage component according to the fourth parsing result.

[0043] In some embodiments, the verification platform module is configured to:

[0044] Obtain the platform hardware database file and platform configuration file of the second verification platform;

[0045] Based on the platform hardware database file and platform configuration file, execute the test case to be tested on the chip component to be tested of the second verification platform to obtain the verification result.

[0046] In some embodiments, the first verification platform includes a verification platform based on a software emulator, and the second verification platform includes a verification platform based on a hardware emulator.

[0047] In a third aspect, embodiments of the present disclosure provide an electronic device, including:

[0048] A processor; and

[0049] A memory storing computer instructions for causing the processor to execute the chip verification method according to any embodiment of the first aspect.

[0050] In a fourth aspect, embodiments of the present disclosure provide a storage medium storing computer instructions for causing a computer to execute the chip verification method according to any embodiment of the first aspect.

[0051] The chip verification method according to the embodiments of the present disclosure includes obtaining the case data of the test case on the first verification platform and the configuration description file of the test case, parsing the configuration description file based on a preset tool script, configuring the case data to the second verification platform according to the parsing result, and executing the test case on the second verification platform to obtain the verification result of the test case. In the embodiments of the present disclosure, the automatic transplantation of the test case is realized based on a preset tool script, and the verification process of the test case on the second verification platform is realized, reducing the risk of errors in manually transplanting cases one by one, improving the case transplantation efficiency, thereby making the chip verification more efficient and smooth and shortening the verification cycle. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] In order to more clearly illustrate the specific embodiments of the present disclosure or the technical solutions in the prior art, the following will briefly introduce the drawings required for use in the description of the specific embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0053] Figure 1 It is a flowchart of the chip verification method according to some embodiments of the present disclosure.

[0054] Figure 2 It is a schematic structural diagram of the second verification platform according to some embodiments of the present disclosure.

[0055] Figure 3 It is a flowchart of the chip verification method according to some embodiments of the present disclosure.

[0056] Figure 4 It is a flowchart of the chip verification method according to some embodiments of the present disclosure.

[0057] Figure 5 It is a flowchart of the chip verification method according to some embodiments of the present disclosure.

[0058] Figure 6 It is a flowchart of the chip verification method according to some embodiments of the present disclosure.

[0059] Figure 7 It is a flowchart of the chip verification method according to some embodiments of the present disclosure.

[0060] Figure 8 It is a block diagram of the structure of the chip verification device according to some embodiments of the present disclosure.

[0061] Figure 9 It is a block diagram of the structure of the electronic device according to some embodiments of the present disclosure. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0062] The technical solutions of the present disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present disclosure without creative efforts belong to the scope of protection of the present disclosure. In addition, the technical features involved in different embodiments of the present disclosure described below can be combined with each other as long as they do not conflict with each other.

[0063] Nowadays, the chip technology in the consumer electronics field is iterating rapidly, and the market demand determines that the demand for chip verification acceleration and development cycle shortening is very strong. Taking the ISP (Image Signal Processing) chip as an example, in addition to the characteristics of high resolution, high frame rate, and high algorithm integration, the functions integrated in the current relatively advanced ISP chips are becoming more and more complex, which leads to a very complex process for a single test case in the verification process of the ISP chip.

[0064] Currently, the verification platforms used to verify ISP chips can be mainly divided into software simulation-based verification platforms and hardware emulation-based verification platforms. For the verification process of ISP chips, due to the characteristics of high resolution and high frame rate of ISP chips, the verification time of many test cases on the software simulation side of Simulation is very long, and even the verification cycle of a single test case can be as long as several days, while the prototype verification platform based on Emulation hardware emulation can greatly shorten the test case verification time.

[0065] However, the inventors of this case have found through research that usually the original test cases are in the format based on software simulation of Simulation and cannot be directly used on the prototype verification platform of Emulation hardware emulation, and the format needs to be transplanted. However, for ISP chips, some test cases need to process a video stream, and the test case data includes multiple frames of image data. When processing each frame of image, a very large number of registers need to be configured. If relying on manual transplantation, the transplantation process is very cumbersome and the error rate is relatively high. Moreover, as the chip design is gradually improved, a large number of test cases need to be verified. If the test cases are transplanted manually one by one, the efficiency is very low, which greatly increases the chip verification cycle.

[0066] Based on the problems existing in the above related technologies, the embodiments of the present disclosure provide a chip verification method, device, electronic device, and storage medium, aiming to achieve the automatic transplantation and verification of test cases, improve the chip verification efficiency, and shorten the verification cycle.

[0067] In some embodiments, the embodiments of the present disclosure provide a chip verification method, which can be applied to a verification scenario for verifying a chip.

[0068] For the convenience of understanding the following embodiments of the present disclosure, some terms mentioned in the following embodiments are first explained:

[0069] 1) ISP (Image Signal Processing) chip, an image signal processing chip. It is mainly a chip used to process the signals output by the front-end image sensor to match image sensors of different manufacturers.

[0070] 2) Simulator software emulator. A verification platform based on software simulation, that is, the verification of test cases is implemented based on software, and its verification speed is slow and the efficiency is low.

[0071] 3) Emulator hardware emulator. A prototype verification platform based on hardware, which can map RTL (Register Transfer Level) to the hardware simulation platform through the manufacturer's customization process to implement the verification of test cases, and its verification speed is relatively fast.

[0072] 4) Test case. It refers to a data file provided to verify the chip algorithm. Taking the verification of the ISP chip as an example, the test case can include an image file provided to verify the ISP algorithm. The test chip component of the chip verification platform can obtain the actual execution result by executing the test case, and by comparing the actual execution result with the expected execution result of the test case, it can be determined whether the test case passes the verification.

[0073] Secondly, the application scenario of the chip verification method disclosed in the embodiments of the present disclosure is described. The chip verification method of the embodiments of the present disclosure can be applied to a general prototype verification method for various chips. The functional codes of each platform component of the chip verification platform in the embodiments of the present disclosure are all developed using a synthesizable hardware description language. Therefore, when facing different verification scenarios, only a small amount of adaptation needs to be done to the bottom-layer hardware library files (such as clocks and storage components), and only one set of source code needs to be maintained for the rest of the hardware, which has high generality.

[0074] Here, the hardware description language can be a language used to describe the structure and behavior of a digital system hardware in text form. With it, a logic circuit diagram, a logic expression, and the logic function completed by a digital logic system can be represented. In one example, the hardware description language can be Verilog or System Verilog, etc.

[0075] Such as Figure 1As shown, in some embodiments, the chip verification method of the present disclosure includes:

[0076] S110. Obtain the case data of the test case on the first verification platform and the configuration description file of the test case.

[0077] In the embodiments of the present disclosure, it is necessary to automatically transplant the test case based on the format of the first verification platform to the second verification platform and implement the verification of the test case.

[0078] In some embodiments, the first verification platform may include a verification platform based on a software emulator, that is, Simulator; the second verification platform may include a verification platform based on a hardware emulator, that is, Emulator. Through the method of the embodiments of the present disclosure, the original test case based on the Simulator format can be automatically transplanted into a test case based on the Emulator format, and the verification of the test case on the Emulator platform can be implemented.

[0079] Of course, it can be understood that the first verification platform and the second verification platform are not limited to the above examples, and may also be any other chip verification platforms suitable for implementation, such as an FPGA (Field Programmable Gate Array) hardware platform, etc. The present disclosure does not limit this.

[0080] The case data refers to the relevant data for implementing the verification of the test case. For example, in some embodiments, the case data of the test case may include: an initialization data file, that is, the excitation data source of the test case, such as an image or video stream file data processed by an ISP algorithm; a chip instruction file, the instruction data for controlling the operation of the test chip components; a register configuration file, the relevant data for configuring the registers of the microcontroller during the verification process; an expected result file, that is, the expected execution result data of the test case, such as a reference file obtained by processing the initialization data through an ISP algorithm.

[0081] The configuration description file refers to a file for describing each data included in the above case data. For example, in one embodiment, the configuration description file includes the following types of information:

[0082] Information 1: The file name of the initialization data file and the first storage location that needs to be initialized to the storage component;

[0083] Information 2: The file name of the chip instruction file and the second storage location that needs to be initialized to the storage component;

[0084] Information 3: The file name of the register configuration file;

[0085] Information 4, the starting address location and data length of the expected result file in the storage component;

[0086] Information 5, the file name of the expected result file.

[0087] In the embodiments of the present disclosure, when verifying a test case to be tested, the case data and the configuration description file of the test case to be tested can be obtained. However, the format of the case data is based on the format of the first verification platform and cannot be directly used on the second verification platform. Therefore, it is necessary to implement the transplantation of the case data through one or more of the following method steps of the present disclosure.

[0088] S120. Parse the configuration description file based on a preset tool script, and configure the case data to the second verification platform according to the parsing result.

[0089] In the embodiments of the present disclosure, a script can be programmed in a computer programming language in advance, that is, the preset tool script described in the present disclosure. The preset tool script is used to parse the configuration description file to implement the automatic transplantation of the case data.

[0090] Based on the foregoing, the configuration description file is a file for describing the case data. Therefore, in the embodiments of the present disclosure, the preset tool script can be used to automatically parse the configuration description file, and according to the parsing result of the configuration description file, the case data can be configured to the format of the second verification platform to implement the automatic transplantation of the case data.

[0091] In the following embodiments of the present disclosure, the process of implementing the transplantation of the case data by the preset tool script will be specifically described and will not be elaborated here for the time being.

[0092] It can be understood that in the embodiments of the present disclosure, the preset tool script can be a script programmed based on any programming language. For example, in one example, the preset tool script is a script programmed based on Python, and the present disclosure does not limit this.

[0093] S130. Execute the test case to be tested on the second verification platform to obtain the verification result of the test case to be tested.

[0094] In the embodiments of the present disclosure, after the transplantation of the case data of the test case to be tested is completed, the test case to be tested can be executed based on each platform component of the second verification platform by using the test chip component, so as to obtain the verification result of the test case to be tested.

[0095] In the following embodiments of the present disclosure, the specific process of verifying the test case to be tested in combination with the structure of the second verification platform will be described and will not be elaborated here for the time being.

[0096] As can be seen from the above, in the embodiments of the present disclosure, for the test cases to be measured in the format of the first verification platform, the preset tool script can be used to achieve automatic transplantation, implement the verification process of the test cases to be measured on the second verification platform, reduce the risk of manual error in transplanting cases one by one, improve the efficiency of case transplantation, so that the chip verification is more efficient and smooth, and shorten the verification cycle.

[0097] In the following embodiments of the present disclosure, the first verification platform takes the software verification platform based on Simulator (abbreviated as "Simulator platform") as an example, and the second verification platform takes the hardware verification platform based on Emulator (abbreviated as "Emulator platform") as an example. That is, the chip verification method of the present disclosure can realize the automatic transplantation of the test cases to be measured on the Simulator platform side to the Emulator platform side, and use the Emulator platform to verify the test cases to be measured.

[0098] In some embodiments, the chip verification method exemplified by the present disclosure can be mainly divided into two stages: platform creation (database) and runtime. The platform creation stage is mainly used to prepare the files required to build the Emulator platform, such as the platform hardware database file and the platform configuration file. The runtime stage can, based on the foregoing method process, use the preset tool script to configure the case data on the first verification platform side to the second verification platform, implement the verification of the test cases to be measured, and determine whether the case passes or not.

[0099] In the embodiments of the present disclosure, two types of files need to be prepared in the platform creation (database) stage: the platform hardware database file and the platform configuration file.

[0100] In some embodiments, the generation process of the platform hardware database file includes: First, the development tools provided by the Emulator platform vendor can be used to compile the platform hardware description language files of each platform component to obtain the compiled code; then, the compiled codes of each platform component are comprehensively processed, and finally the netlist database file of the hardware circuit is obtained, which is the platform hardware database file.

[0101] In one example, each platform component of the Emulator platform exemplified by the present disclosure is developed from synthesizable code. Therefore, for the Emulator platforms in different application environments, except for a small amount of adaptation to the bottom-layer hardware library files (such as clocks, storage components, etc.), only one set of functional codes needs to be maintained for the rest of the platform components. It can reduce the burden on development and maintenance personnel and reduce the cost of chip verification.

[0102] In some embodiments, the platform configuration file may include the firmware file corresponding to the microcontroller in the Emulator platform. This firmware file can provide configuration information for controlling the microcontroller driver, can also provide configuration information for configuring the verification environment register, and can also provide configuration information for the register of the chip component under test, etc. In one example, the platform configuration file can be developed in a high-level programming language such as C or C++. It is stored in a predetermined location of the storage component of the platform for initialization use by each platform component.

[0103] Figure 2 FIG. shows the structural block diagram of the Emulator platform in some embodiments of the present disclosure. As Figure 2 shown, the Emulator platform of the present disclosure example includes a plurality of platform components, specifically including: a microcontroller, an excitation generation component, a chip component under test, an output collection component, and a storage component.

[0104] The microcontroller is the main control unit of the platform, responsible for functions such as register configuration of the chip component under test and the platform, inter-frame data mode switching, interrupt and exception handling, etc.

[0105] The excitation generation component is responsible for reading out the initialization data of the test case that has been initialized to the storage component in a preset order, and transmitting it to the input port of the chip component under test in a timing that meets the requirements of the chip component under test.

[0106] The chip component under test is the chip component that needs to be verified, such as an ISP chip component. The chip component under test is responsible for executing the data input by the excitation generation component to obtain the actual execution result. In the Emulator platform, the function of the chip component under test needs to be strictly consistent with that of the final chip at the logical behavior level.

[0107] The output collection component is responsible for obtaining the actual execution result from the output port of the chip component under test, storing it in the storage component, and then reading it out in a preset order to compare with the expected execution result provided by the pre-stored ISP algorithm to determine whether the test case passes the verification.

[0108] The storage component is the storage module of the platform, used to store the data in the verification process for retrieval at any time.

[0109] It can be understood that for the parts not described in detail in the above platform creation (database) stage, those skilled in the art can undoubtedly understand and fully implement them with reference to related technologies, and the present disclosure will not elaborate on them here.

[0110] After completing the above platform creation (database) phase, the automated migration and verification process of the test cases to be measured can be implemented based on the foregoing method process, that is, entering the runtime phase, which will be described below in combination with the following embodiments.

[0111] In the embodiments of the present disclosure, first, the case data and the configuration description file of the test case to be measured can be obtained. In one example, the chip component to be measured can be an ISP chip, and the test case can include, for example, at least one frame of image data. The effect of the chip component to be measured on verifying the test case can be: performing noise reduction processing on the image data included in the case data to obtain the processed image data, and determining whether it meets the verification requirements by comparing the processed image data with the expected result data.

[0112] In some embodiments, as described above, the case data of the test case to be measured can include: an initialization data file, a chip instruction file, a register configuration file, and an expected result file.

[0113] In the embodiments of the present disclosure, when migrating the case data using a preset tool script, the main data to be migrated includes the initialization data file, the chip instruction file, and the register configuration file. The following will be specifically described in combination with Figure 3 and Figure 4 embodiments.

[0114] As Figure 3 shown, in some embodiments, for the chip verification method of the present disclosure example, the process of migrating the case data based on the preset tool script can include:

[0115] S310. Parse the configuration description file based on the preset tool script to obtain the first parsing result of the initialization data file and the second parsing result of the chip instruction file.

[0116] S320. Store the initialization data file at the first storage location of the storage component of the second verification platform according to the first parsing result, and store the chip instruction file at the second storage location of the storage component of the second verification platform according to the second parsing result.

[0117] In the embodiments of the present disclosure, the preset tool script can include multiple sub-scripts, and each sub-script is respectively used to parse one or more types of information of the configuration description file described above.

[0118] For example, in one example, the preset tool script includes the first script A, and the first script A is used to parse "information 1" and "information 2" of the configuration description file described above.

[0119] In this example, the configuration description file is parsed by the first script A to obtain the first parsing result of the initialization data file. Based on the foregoing, the first parsing result of the initialization data file is also the "file name of the initialization data file" and the "first storage location" described in Information 1.

[0120] Meanwhile, the configuration description file is parsed by the first script A to obtain the second parsing result of the chip instruction file. Based on the foregoing, the second parsing result of the chip instruction file is also the "file name of the chip instruction file" and the "second storage location" described in Information 2.

[0121] In one example, after obtaining the first parsing result and the second parsing result, the first parsing result and the second parsing result can be written into an intermediate file m for information transfer in subsequent processes.

[0122] In the embodiments of the present disclosure, after obtaining the first parsing result and the second parsing result, the preset tool script can obtain the initialization data file from the use case data according to the file name of the initialization data file described in the first parsing result, and then store the initialization data file in the first storage location of the storage component of the Emulator platform according to the first storage location described in the first parsing result to complete the configuration of the initialization data file.

[0123] Meanwhile, the preset tool script can obtain the chip instruction file from the use case data according to the file name of the result instruction file described in the second parsing result, and then store the chip instruction file in the second storage location of the storage component of the Emulator platform according to the second storage location described in the second parsing result to complete the configuration of the chip instruction file.

[0124] In one example, the above configuration process of the initialization data file and the chip instruction file can be implemented by a sub-script in the preset tool script, which will be described in the following embodiments of the present disclosure.

[0125] As can be seen from the above, in the embodiments of the present disclosure, the preset tool script is used to realize the automatic transplantation of the initialization data file and the chip instruction file in the use case data, and wait for the subsequent chip verification process to call and use.

[0126] As Figure 4 shown, in some embodiments, for the chip verification method of the present disclosure example, the process of transplanting the use case data based on the preset tool script may include:

[0127] S410. Parse the configuration description file based on the preset tool script to obtain the third parsing result of the register configuration file.

[0128] S420. Convert the data format of the register configuration file according to the third parsing result to obtain the target register configuration file.

[0129] S430. Store the target register configuration file in the third storage location of the storage component of the second verification platform.

[0130] In some embodiments, the preset tool script includes a second script B, and the second script B is used to parse "Information 3" of the configuration description file described above.

[0131] Specifically, the configuration description file is parsed by the second script B to obtain the third parsing result of the register configuration file. Based on the foregoing, the third parsing result of the register configuration file is also the "file name of the register configuration file" described in Information 3.

[0132] After obtaining the third parsing result, the second script B can obtain the register configuration file from the use case data according to the file name of the register configuration file described in the third parsing result. It can be understood that the register configuration file in the use case data is in the format based on the Simulator platform. Therefore, in the embodiments of the present disclosure, the second script B can perform format conversion processing on the register configuration file to obtain the target register configuration file after format conversion.

[0133] In one example, after obtaining the target register configuration file, the target register configuration file can be written into an intermediate file n to facilitate subsequent storage in the storage component.

[0134] After obtaining the target register configuration file, the target register configuration file can be stored in the third storage location of the storage component. The third storage location is a pre-agreed address space, and the microcontroller will retrieve the target register configuration file for register configuration during the subsequent verification process.

[0135] It is worth noting that in some embodiments of the present disclosure, the second script B can convert the register configuration file into the format of "register address + register value", that is, the target register configuration file includes the register address and the register value, which is convenient for the microcontroller to perform register configuration during the subsequent verification process.

[0136] Specifically, during the verification process, when the microcontroller performs register configuration on each platform component. An automation program can be programmed in advance based on the high-level programming languages C or C++. Then, based on this automation program, the microcontroller first starts to loop and read several lines of the target register configuration file from the third storage location of the storage component. Each line of data is in the form of "register address + register value". Thus, the microcontroller can simply configure the register value into the register address, which improves the efficiency of register configuration and shortens the verification time.

[0137] As can be seen from the above, in the embodiments of the present disclosure, an automated migration of the register configuration file in the use case data is achieved by using a preset tool script, and it waits to be retrieved and used in the subsequent chip verification process.

[0138] In some embodiments, the preset tool script may further include a third script C, which is used to parse "Information 4" and "Information 5" of the above-mentioned configuration description file to obtain a fourth parsing result, and then according to the "file name of the expected result file" described in the fourth parsing result, obtain the expected result file from the use case data, and store the expected result file in the fourth storage location of the storage component. After the output collection component obtains the actual execution result output by the chip component to be tested, the expected result file can be downloaded from the storage component according to the "starting address and data length of the expected result file" described in the fourth parsing result, and by comparing the actual execution result with the expected result file, it is determined whether the use case to be tested passes.

[0139] In one example, after obtaining the fourth parsing result, the fourth parsing result can be written into an intermediate file p as a guiding file for subsequent downloading of the expected result file. The embodiments below of the present disclosure will be described, and details will not be elaborated here for the time being.

[0140] In the embodiments of the present disclosure, after completing the above data migration and initialization configuration, it can be based on Figure 2 the shown Emulator platform to verify the use case to be tested. The following will be described in conjunction with Figure 5 the embodiments.

[0141] As Figure 5 shown, in some embodiments, the chip verification method of the present disclosure example for verifying the use case to be tested includes:

[0142] S510. Execute the use case to be tested on the second verification platform to obtain the actual execution result.

[0143] S520. Obtain the expected result file included in the use case to be tested based on the preset tool script, and obtain the verification result of the use case to be tested according to the actual execution result and the expected execution result file.

[0144] In the embodiments of the present disclosure, first, the previously prepared platform hardware database file can be downloaded to the Emulator platform, and then based on the platform configuration file for Figure 2Configure each of the platform components shown. For example, the microcontroller configures the microcontroller driver, chip registers, verification environment registers, etc. through the platform configuration file. After that, based on the foregoing method process, the use case data of the test case to be tested is transplanted and initialized and configured to the Emulator platform through a preset tool script, which will not be elaborated in this disclosure.

[0145] See Figure 2 As shown, when using the Emulator platform to verify the test case to be tested, the stimulus generation component can read out the initialization data frame by frame from the first storage location of the storage component, and input the initialization data into the input port of the chip component to be tested according to the timing requirements that meet the chip component to be tested. The microcontroller controls the chip component to be tested to perform data processing based on the instructions described in the chip instruction file according to the received initialization data, and obtains the actual execution result of the test case to be tested. The output collection component can receive the actual execution result output by the chip component to be tested.

[0146] In some embodiments, after obtaining the actual execution result, the actual execution result can be compared with the expected execution result file of the storage component. In one example, since the amount of data to be compared is large, the actual execution result can be stored in the storage component first, and then the comparison software is used to compare the actual execution result with the expected result file. In another example, the actual execution result and the expected result file can also be directly compared on the Emulator platform, and this disclosure does not limit this.

[0147] As Figure 6 As shown, in some embodiments, the process of obtaining the expected result file based on the preset tool script in the chip verification method exemplified in this disclosure includes:

[0148] S521. Parse the configuration description file based on the preset tool script to obtain the fourth parsing result of the expected result file.

[0149] S522. Obtain the expected result file from the storage component according to the fourth parsing result.

[0150] As described above, in some embodiments, the preset tool script may further include the third script C, and the third script C is used to parse "Information 4" and "Information 5" of the configuration description file described above, so as to obtain the fourth parsing result, that is, the fourth parsing result describes "the starting address position and data length of the expected result file". Thus, according to the fourth parsing result, the starting address position of the expected result file in the storage component can be obtained, and the expected data length can be downloaded to obtain the expected result file.

[0151] It should be noted that in some embodiments, after downloading the expected result file, the downloaded expected result file can be converted into the same data format as the expected result file in the test case to be measured, so as to ensure that the format of the expected result file is consistent with the actual execution result format of the Emulator platform, which is convenient for subsequent comparison.

[0152] As shown in combination with Figure 2 When the collection component performs result comparison, it can retrieve the expected result file from the storage component based on the above process, and compare the actual execution result with the expected result file frame by frame in sequence to obtain the comparison result of the test case to be measured.

[0153] In one example, in response to the proportion of mismatched data indicated by the comparison result not exceeding a preset threshold, it is determined that the verification result of the test case to be measured passes.

[0154] In another example, in response to the proportion of mismatched data indicated by the comparison result exceeding a preset threshold, it is determined that the verification result of the test case to be measured fails.

[0155] It can be understood that the preset threshold can be the fault tolerance rate of a custom chip, and the specific data of the fault tolerance rate can be determined based on the specific verification environment and verification chip. The present disclosure does not limit this.

[0156] As can be seen from the above, in the embodiments of the present disclosure, an automated migration of test cases to be measured in the format of the Simulator platform is realized by using a preset tool script, and automated verification on the Emulator platform side is realized. There is no need to manually migrate cases one by one, reducing the risk of errors, improving the efficiency of case migration and chip verification, and shortening the chip development cycle.

[0157] Figure 7 shows a flowchart of a chip verification method in some embodiments of the present disclosure. The following will be combined with Figure 7 to describe the chip verification method in some embodiments of the present disclosure.

[0158] As Figure 7 shown, in some embodiments, the chip verification method exemplified by the present disclosure includes:

[0159] S701. Prepare a platform hardware database file and a platform configuration file in advance.

[0160] Specifically, based on the description of the aforementioned platform creation (database) stage, the platform hardware database file and platform configuration file required for the Emulator platform are obtained.

[0161] S702. Download the platform hardware database file to the Emulator platform and configure each platform component according to the platform configuration file.

[0162] Specifically, the prepared platform hardware database is downloaded to the Emulator platform, and then platform components such as microcontroller drivers, chip registers, and verification environment registers can be configured based on the platform configuration file.

[0163] S703. Parse the configuration description file of the test case to be measured based on the first script A, obtain the first parsing result of the initialization data file and the second parsing result of the chip instruction file, and obtain the intermediate file m according to the first parsing result and the second parsing result.

[0164] In the embodiment of the present disclosure, the preset tool script may include the first script A, the second script B, the third script C, and the fourth script D.

[0165] As described above, the first script A is used to parse "Information 1" and "Information 2" of the configuration description file described above. Specifically, the first script A parses the configuration description file to obtain the first parsing result for describing the "file name of the initialization data file" and the "first storage location", and the second parsing result for describing the "file name of the chip instruction file" and the "second storage location".

[0166] In the example of the present disclosure, the first parsing result and the second parsing result can be written into an intermediate file m for information transfer.

[0167] S704. Parse the configuration description file of the test case to be measured based on the second script B, obtain the third parsing result of the register configuration file, and perform data format conversion on the register configuration file according to the third parsing result to obtain the intermediate file n.

[0168] In the embodiment of the present disclosure, as described above, the second script B is used to parse "Information 3" of the configuration description file described above. Specifically, through the second script B, the configuration description file is parsed to obtain the third parsing result for describing the "file name of the register configuration file".

[0169] After obtaining the third parsing result, the second script B can obtain the register configuration file from the test case data according to the file name of the register configuration file described by the third parsing result, and then perform format conversion processing on the register configuration file to obtain the target register configuration file after format conversion.

[0170] In the example of the present disclosure, the target register configuration file can be written into an intermediate file n for subsequent input into the storage component.

[0171] S705. Parse the configuration description file of the test case to be measured based on the third script C, obtain the fourth parsing result of the expected result file, and obtain the intermediate file p according to the fourth parsing result.

[0172] Specifically, as described above, the third script C is used to parse "Information 4" and "Information 5" of the configuration description file described above. Specifically, the configuration description file is parsed by the third script C to obtain a fourth parsing result including the description of "the file name of the expected result file" and "the storage location and data length of the expected result file".

[0173] After obtaining the third parsing result, the third script C can obtain the expected result file from the use case data according to the file name of the expected result file described in the fourth parsing result, store the expected result file at the corresponding storage component location according to the file data of the expected result file, and at the same time, write the fourth parsing result into an intermediate file p.

[0174] S706. Configure the use case data to the Emulator platform based on the fourth script D.

[0175] In the embodiment of the present disclosure, the fourth script D is used to concatenate the above-mentioned various script processes. Specifically, first, the intermediate file m can be read, and according to the "file name and the first storage location of the initialization data file" described in the intermediate file m, the initialization data file is configured to the first storage location of the storage component. According to the "file name and the second storage location of the chip instruction file" described in the intermediate file m, the chip instruction file is configured to the second storage location of the storage component. The initialization configuration of the initialization data file and the chip instruction file is completed.

[0176] In one example, the initialization data file and the chip instruction file can be stored at the corresponding locations of the storage component by means of backdoor writing to improve the writing speed.

[0177] Secondly, the fourth script D can read the intermediate file n, and the target register configuration file after format conversion described in the intermediate file n is stored at the third storage location of the storage component to complete the initialization configuration of the target register configuration file.

[0178] In one example, similarly, the target register configuration file can be stored in the storage component by means of backdoor writing to improve the writing speed.

[0179] S707. Based on the use case data of the test case to be tested, execute the use case data on the Emulator platform using the chip component to be tested to obtain the actual execution result of the test case to be tested.

[0180] In the embodiment of the present disclosure, refer to Figure 2As shown in the figure, when using the Emulator platform to verify the test case to be tested, the stimulus generation component can read out the initialization data frame by frame from the first storage location of the storage component, and input the initialization data into the input port of the chip under test according to the timing requirements that meet the chip under test component. The micro-control component controls the chip under test component to perform data processing based on the instructions described in the chip instruction file according to the received initialization data, and obtains the actual execution result of the test case to be tested.

[0181] Those skilled in the art can understand and fully implement with reference to the foregoing description, and the present disclosure will not elaborate herein.

[0182] S708. Based on the fourth script D, obtain the expected result file downloaded by the storage component according to the fourth parsing result, and compare the actual execution result with the expected result file to obtain the verification result of the test case to be tested.

[0183] In the embodiment of the present disclosure, the fourth script D downloads data of a specified length from the corresponding storage location of the storage component according to the "storage location and data length of the expected result file" described in the fourth parsing result, so as to obtain the expected result file.

[0184] In one example, after downloading the expected result file, the data format of the expected result file can also be converted to be the same as the data format of the expected result file in the test case to be tested, which is convenient for result comparison.

[0185] After obtaining the actual execution result and the expected result file, the Emulator platform can retrieve the expected result file from the storage component based on the above process, compare the actual execution result with the expected result file frame by frame in sequence to obtain the comparison result of the test case to be tested, and determine the final verification result of the test case to be tested according to the comparison result. In one example, the verification result can be written into a file and saved, which is convenient for users to view the verification result of the test case to be tested at any time.

[0186] As can be seen from the above, in the embodiment of the present disclosure, the preset tool script is used to realize the automatic transplantation of the test case to be tested in the format of the Simulator platform, and realize the automatic verification on the Emulator platform side, without manually transplanting the cases item by item, reducing the risk of errors, improving the efficiency of case transplantation and chip verification, and shortening the chip development cycle.

[0187] In some embodiments, the present disclosure provides a chip verification device, which can be applied to a verification scenario for verifying a chip.

[0188] As Figure 8 shown, in some embodiments, the chip verification device of the present disclosure example includes:

[0189] The acquisition module 10 is configured to acquire the test case data of the test case to be tested on the first verification platform and the configuration description file of the test case to be tested;

[0190] The script processing module 20 is configured to parse the configuration description file based on a preset tool script and configure the test case data to the second verification platform according to the parsing result;

[0191] The verification platform module 30 is configured to execute the test case to be tested on the second verification platform to obtain the verification result of the test case to be tested.

[0192] As can be seen from the above, in the embodiments of the present disclosure, for the test case to be tested in the format of the first verification platform, the preset tool script can be used to achieve automatic transplantation, realize the verification process of the test case to be tested on the second verification platform, reduce the risk of manual error in transplanting cases one by one, improve the efficiency of case transplantation, so that the chip verification is more efficient and smooth, and shorten the verification cycle.

[0193] In some embodiments, the test case data includes an initialization data file and a chip instruction file; the script processing module 20 is configured to:

[0194] Parse the configuration description file based on a preset tool script to obtain a first parsing result of the initialization data file and a second parsing result of the chip instruction file;

[0195] Store the initialization data file in the first storage location of the storage component of the second verification platform according to the first parsing result, and store the chip instruction file in the second storage location of the storage component of the second verification platform according to the second parsing result.

[0196] As can be seen from the above, in the embodiments of the present disclosure, the preset tool script is used to achieve automatic transplantation of the initialization data file and the chip instruction file in the test case data, and wait for subsequent chip verification processes to call and use.

[0197] In some embodiments, the test case data includes a register configuration file; the script processing module 20 is configured to:

[0198] Parse the configuration description file based on a preset tool script to obtain a third parsing result of the register configuration file;

[0199] Perform data format conversion on the register configuration file according to the third parsing result to obtain a target register configuration file; the target register configuration file includes register addresses and register values;

[0200] Store the target register configuration file in the third storage location of the storage component of the second verification platform.

[0201] As described above, in the embodiments of the present disclosure, a preset tool script is used to implement automatic transplantation of the register configuration file in the test case data, and wait for subsequent chip verification processes to call and use it.

[0202] In some embodiments, the verification platform module 30 is configured to:

[0203] Execute the test case to be tested on the second verification platform to obtain the actual execution result;

[0204] Obtain the expected result file included in the test case to be tested based on the preset tool script, and obtain the verification result of the test case according to the actual execution result and the expected execution result file.

[0205] In some embodiments, the verification platform module 30 is configured to:

[0206] Parse the configuration description file based on the preset tool script to obtain the fourth parsing result of the expected result file; the fourth parsing result includes the storage location and data length of the expected result file;

[0207] Obtain the expected result file from the storage component according to the fourth parsing result.

[0208] In some embodiments, the verification platform module 30 is configured to:

[0209] Obtain the platform hardware database file and platform configuration file of the second verification platform;

[0210] Based on the platform hardware database file and platform configuration file, execute the test case to be tested on the test chip component of the second verification platform to obtain the verification result.

[0211] In some embodiments, the first verification platform includes a verification platform based on a software emulator, and the second verification platform includes a verification platform based on a hardware emulator.

[0212] As described above, in the embodiments of the present disclosure, a preset tool script is used to implement automatic transplantation of the test case to be tested in the Simulator platform format, and implement automatic verification on the Emulator platform side, without manually transplanting cases one by one, reducing the risk of errors, improving the efficiency of case transplantation and chip verification, and shortening the chip development cycle.

[0213] In some embodiments, the present disclosure provides an electronic device, including:

[0214] A processor; and

[0215] A memory storing computer instructions for causing the processor to execute the chip verification method according to any embodiment of the first aspect.

[0216] In some embodiments, the present disclosure provides a storage medium storing computer instructions for causing a computer to execute the chip verification method according to any embodiment of the first aspect.

[0217] Specifically, Figure 9 FIG. shows a schematic structural diagram of an electronic device 600 suitable for implementing the method of the present disclosure. Through Figure 9 the illustrated electronic device, the corresponding functions of the above-mentioned processor and storage medium can be realized.

[0218] As Figure 9 shown, the electronic device 600 includes a processor 601, which can perform various appropriate actions and processes according to a program stored in the memory 602 or a program loaded from the storage section 608 into the memory 602. In the memory 602, various programs and data required for the operation of the electronic device 600 are also stored. The processor 601 and the memory 602 are connected to each other via a bus 604. An input / output (I / O) interface 605 is also connected to the bus 604.

[0219] The following components are connected to the I / O interface 605: an input section 606 including a keyboard, a mouse, etc.; an output section 607 including, for example, a cathode ray tube (CRT), a liquid crystal display (LCD), etc. and a speaker; a storage section 608 including a hard disk, etc.; and a communication section 609 including a network interface card such as a LAN card, a modem, etc. The communication section 609 performs communication processing via a network such as the Internet. A drive 610 is also connected to the I / O interface 605 as needed. A removable medium 611, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is installed on the drive 610 as needed so that a computer program read therefrom can be installed into the storage section 608 as needed.

[0220] Particularly, according to an embodiment of the present disclosure, the above method process can be implemented as a computer software program. For example, an embodiment of the present disclosure includes a computer program product including a computer program tangibly embodied on a machine-readable medium, the computer program including program code for performing the above method. In such an embodiment, the computer program can be downloaded and installed from a network through the communication section 609 and / or installed from the removable medium 611.

[0221] The flowcharts and block diagrams in the accompanying drawings illustrate the possible architectures, functions, and operations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagram may represent a module, a segment of a program, or a part of code, which contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than that marked in the accompanying drawings. For example, two consecutive blocks shown may actually be executed substantially in parallel, and they may sometimes be executed in the reverse order, depending on the functions involved. It should also be noted that each block in the block diagram and / or flowchart, as well as the combinations of blocks in the block diagram and / or flowchart, can be implemented by a dedicated hardware-based system that performs the specified functions or operations, or can be implemented by a combination of dedicated hardware and computer instructions.

[0222] Obviously, the above-described embodiments are merely examples given for clear illustration and are not limitations on the embodiments. For those of ordinary skill in the art, other different forms of changes or variations can be made based on the above description. It is not necessary and impossible to enumerate all the embodiments here. The obvious changes or variations derived therefrom are still within the protection scope of the present disclosure.

Claims

1. A chip verification method, characterized in that, Including: Obtain the test case data of the test case to be tested on the first verification platform, as well as the configuration description file of the test case to be tested. The test case data includes an initialization data file, a chip instruction file, and a register configuration file. The configuration description file is a file used to describe each data included in the test case data; Parse the configuration description file based on a preset tool script, and configure the test case data to the second verification platform according to the parsing result; Execute the test case to be tested on the second verification platform to obtain the verification result of the test case to be tested; The step of parsing the configuration description file based on a preset tool script and configuring the test case data to the second verification platform includes: Parse the configuration description file based on the preset tool script to obtain a first parsing result of the initialization data file and a second parsing result of the chip instruction file; store the initialization data file in a first storage location of the storage component of the second verification platform according to the first parsing result, and store the chip instruction file in a second storage location of the storage component of the second verification platform according to the second parsing result; Parse the configuration description file based on the preset tool script to obtain a third parsing result of the register configuration file; perform data format conversion on the register configuration file according to the third parsing result to obtain a target register configuration file; the target register configuration file includes a register address and a register value; store the target register configuration file in a third storage location of the storage component of the second verification platform.

2. The method according to claim 1, wherein The step of executing the test case to be tested on the second verification platform to obtain the verification result of the test case to be tested includes: Execute the test case to be tested on the second verification platform to obtain an actual execution result; Obtain the expected result file included in the test case to be tested based on the preset tool script, and obtain the verification result of the test case to be tested according to the actual execution result and the expected result file.

3. The method according to claim 2, wherein The step of obtaining the expected result file included in the test case to be tested based on the preset tool script includes: Parse the configuration description file based on the preset tool script to obtain a fourth parsing result of the expected result file; the fourth parsing result includes the storage location and data length of the expected result file; Obtain the expected result file from the storage component according to the fourth parsing result.

4. The method according to any one of claims 1 to 3, characterized in that, The step of executing the test case to be tested on the second verification platform to obtain the verification result of the test case to be tested includes: Obtain the platform hardware database file and platform configuration file of the second verification platform; Based on the platform hardware database file and platform configuration file, execute the test case to be tested on the test chip component of the second verification platform to obtain the verification result.

5. The method according to claim 1, wherein The first verification platform includes a verification platform based on a software emulator, and the second verification platform includes a verification platform based on a hardware emulator.

6. A chip verification device, characterized in that, Including: An acquisition module, configured to acquire test case data of a test case to be tested on a first verification platform and a configuration description file of the test case to be tested, where the test case data includes an initialization data file, a chip instruction file, and a register configuration file, and the configuration description file is a file for describing each data included in the test case data; A script processing module, configured to parse the configuration description file based on a preset tool script and configure the test case data to a second verification platform according to a parsing result; A verification platform module, configured to execute the test case to be tested on the second verification platform to obtain a verification result of the test case to be tested; The script processing module includes: Parsing the configuration description file based on the preset tool script to obtain a first parsing result of the initialization data file and a second parsing result of the chip instruction file; storing the initialization data file at a first storage location of a storage component of the second verification platform according to the first parsing result, and storing the chip instruction file at a second storage location of the storage component of the second verification platform according to the second parsing result; parsing the configuration description file based on the preset tool script to obtain a third parsing result of the register configuration file; performing data format conversion on the register configuration file according to the third parsing result to obtain a target register configuration file; the target register configuration file includes a register address and a register value; storing the target register configuration file at a third storage location of the storage component of the second verification platform.

7. An electronic device, characterized in that, Including: A processor; And A memory storing computer instructions for causing the processor to execute the chip verification method according to any one of claims 1 to 5.

8. A storage medium, characterized in that, Storing computer instructions for causing a computer to execute the chip verification method according to any one of claims 1 to 5.

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