A fault-tolerant control method for voltage source inverter under asymmetric fault conditions

Abstract

The invention discloses a fault-tolerant control method for a voltage source inverter under an asymmetric fault condition, which belongs to the technical field of inverter fault ride-through, and comprises: obtaining positive and negative sequence components of voltage and current in a two-phase stationary coordinate system through a positive and negative sequence separation module; obtaining positive and negative sequence active power, reactive power and positive and negative sequence current amplitude; obtaining the difference between a preset current limit and the sum of the amplitudes of the positive and negative sequence components of the current, and using it as a positive sequence reference voltage to achieve micro-source output current limitation; calculating the amplitude coefficient between voltage sequence components that meets different fault tolerance requirements according to a composite sequence network diagram; obtaining an error voltage value by subtracting the preset reference voltage from the actual voltage positive sequence component through the obtained voltage amplitude coefficient and phase reference output, and obtaining an active power voltage reference value; using the reactive power frequency reference value and the active power voltage reference value as reference inputs of a voltage outer loop regulator, achieving micro-source system fault-tolerant control, and optimizing the fault-tolerant effect.

Description

Technical Field

[0001] The invention belongs to the technical field of inverter fault ride-through, and in particular to a fault-tolerant control method of a voltage source inverter under an asymmetric fault condition. Background Art

[0002] In recent years, with the continuous development of the economy and society, the demand for electricity in human society has been increasing. Renewable energy distributed generation represented by photovoltaics and wind power has the characteristics of less environmental pollution and high energy utilization rate, which can effectively alleviate environmental problems and energy crises and has received widespread attention. Among them, droop control is widely used in the field of distributed generation control because it can achieve reasonable energy distribution of each micro-source in the system and meet the needs of "plug and play". During the operation of microgrids, short-circuit faults are often encountered. At this time, the traditional voltage-type micro-source control strategy cannot guarantee the safe and reliable operation of the system. Unlike synchronous generators (SG), it has strong overcurrent capacity. The inverter-type distributed power supply is controlled by the interface inverter, which has the characteristics of small inertia and weak overcurrent capacity. It is easy to generate large overcurrent, causing the power electronic switch tube to burn out, and then causing large-scale microgrid system paralysis. Therefore, it is very necessary to study the micro-source fault response strategy.

[0003] There are two traditional solutions for voltage source inverter fault response. One is to install circuit breakers or fuses, which is not ideal in terms of response time, response effect and cost. The other is to improve the micro-source control strategy to achieve fault ride-through. However, the existing solutions have the problem of changing the micro-source control properties, which is not conducive to further analysis of the micro-source fault characteristics. Or they only focus on the safe limitation of the micro-source output current, which cannot give full play to the control properties of the voltage source inverter, and further control design is required after the fault is cleared. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a fault-tolerant control method for a voltage source inverter under an asymmetric fault condition, which can achieve two fault-tolerant effects, namely, optimizing the output voltage imbalance and normal operation of the non-fault phase, while ensuring that the output current of the micro-source is within a safe threshold.

[0005] To achieve the above goals, the following technical solutions are adopted:

[0006] A fault-tolerant control method for a voltage source inverter under an asymmetric fault condition comprises the following steps:

[0007] Step 1: collect the load voltage and current signals of the micro source through the positive and negative sequence separation module, and obtain the positive and negative sequence components of the voltage and current in the two-phase stationary coordinate system respectively; according to the positive and negative sequence components of the voltage and current, obtain the positive and negative sequence active power, reactive power and positive and negative sequence current amplitude;

[0008] Step 2, obtaining the difference between the preset current limit and the sum of the amplitudes of the positive and negative sequence components of the current, and then multiplying it by the proportional coefficient, and using it as the positive sequence reference voltage to achieve micro-source output current limitation;

[0009] Step 3, according to the composite sequence network diagram, calculate the amplitude coefficient between voltage sequence components that meet different fault tolerance requirements;

[0010] Step 4: By obtaining the voltage amplitude coefficient and phase reference output, the preset reference voltage is subtracted from the actual voltage positive sequence component to obtain an error voltage value, and the active power voltage reference value is obtained; according to the reactive power frequency reference value and the active power voltage reference value, as the reference input of the voltage outer loop regulator, through the voltage outer loop and the current inner loop, the fault-tolerant control of the micro-source system is realized.

[0011] The solution of the present invention is further improved in that: in the step 1, it specifically includes: using a double second-order generalized integrator to realize the separation of positive and negative sequences of electrical quantities, and the extraction method is: collecting the micro-source output voltage signal u a 、u b , u c and the current signal i a 、i b 、i c , the three-phase output voltage and current are transformed by Clarke to obtain the voltage representation u in the two-phase stationary coordinate system α 、u β and current representation i α 、i β , and then generate a moving operator with a lag of 90° with the help of a second-order generalized integrator (SOGI). The positive and negative sequence components of the voltage in the two-phase stationary coordinate system can be obtained through corresponding calculations and The positive and negative sequence components of current are and Further obtain the positive and negative sequence active power P output by the micro source + , P - and reactive power Q + , Q - , the positive and negative sequence current amplitudes of the micro-source output current are I1 and I2;

[0012] The relationship between the current representation and its sequence component representation in the two-phase stationary coordinate system is as follows:

[0013]

[0014] where q = e -jπ / 2 is a displacement operator, which is equivalent to lagging the waveform by 90°, [T αβ ] is the coordinate transformation matrix, [T + ]、[T - ] is the positive and negative sequence separation matrix.

[0015] The solution of the present invention is further improved in that: in the step 2, specifically including: setting the micro-source output current amplitude safety limit value I lim The difference is made from the sum of the sequence component amplitudes, and then multiplied by a certain proportional coefficient g, and the result is applied to the micro-source reference voltage to achieve current safety limitation;

[0016] Then the voltage amplitude output of the original PU droop control output is

[0017] U o =U * +k m (P ref -P o )

[0018] becomes

[0019]

[0020] in

[0021]

[0022] Where U * is the given voltage of the power loop, k m is the droop coefficient, P ref , are the power loop given active power and the given positive sequence active power, P o , are respectively the actual active output of the micro-source and the positive sequence active output, U o , are the actual voltage output and positive sequence voltage output of the micro-source, Δu is the given voltage increment, g is the proportional coefficient, I lim is the safety limit of the micro-source output current amplitude, I1 and I2 are the positive and negative sequence current amplitudes of the micro-source output current.

[0023] The solution of the present invention is further improved in that: in the step 3, specifically including: introducing the amplitude coefficient k between voltage sequence components to realize the control of negative sequence voltage, according to different fault tolerance requirements (optimization of micro-source output voltage imbalance and normal operation of non-fault phase), combined with the micro-source fault composite sequence network diagram, reasonably setting the coefficient k, respectively realizing the two fault tolerance goals of normal operation of non-fault phase at load and optimization of voltage imbalance; the coefficient k corresponding to different fault tolerance requirements (optimization of micro-source output voltage imbalance and normal operation of non-fault phase) can be derived and obtained as follows:

[0024]

[0025]

[0026] in, is the positive sequence voltage output by the micro source, is the rated voltage of the micro source output, is the positive sequence component of the voltage at the fault point, are respectively the positive and negative sequence current components of the micro-source output, Z1 and Z2 are the positive and negative sequence equivalent output impedances of the inverter, and generally they are approximately equal. f , Z load are the short-circuit impedance and the load respectively.

[0027] The solution of the present invention is further improved in that: in the step 4, it specifically includes: using a QPR regulator to achieve effective control of the voltage sequence component and the current sequence component through a voltage outer loop and a current inner loop.

[0028] By adopting the above technical solution, the technical effects achieved are:

[0029] 1. This technical solution adopts sequence-based current limiting control, which has a fast response speed to faults. According to the change of fault current, the positive sequence reference voltage is adaptively adjusted to achieve safe limitation of the inverter output current.

[0030] 2. This technical solution controls the negative sequence reference voltage by introducing the amplitude coefficient between the reference voltage sequence components. The coefficient is set according to different requirements. For different degrees of faults, two fault tolerance effects can be achieved adaptively: optimization of voltage imbalance at the fault location and normal operation of the non-fault phase (better support for the positive sequence voltage). This is of certain significance for single-phase critical loads and critical loads sensitive to imbalance.

[0031] 3. This technical solution does not change the control properties of the voltage source inverter, which is conducive to further analysis of micro-source fault characteristics. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required to be used in the embodiments are briefly introduced below.

[0033] Figure 1 The present invention is a fault-tolerant control method for a voltage source inverter under a two-phase short-circuit fault condition;

[0034] Figure 2 It is the inverter two-phase interphase fault architecture of the present invention;

[0035] Figure 3 This is the equivalent sequence network diagram of a micro-source fault when the control strategy of the present invention is not applied;

[0036] Figure 4 It is the overall block diagram of the control strategy of the present invention;

[0037] Figure 5 The composite sequence network diagram of the system under the condition of two-phase short circuit adopting the control strategy proposed by the present invention;

[0038] Figure 6 It is the simulated waveform of load side voltage and inverter output current under different degrees of two-phase short circuit fault conditions after adopting the traditional current limiting control strategy;

[0039] Figure 7 It is a simulated waveform diagram of load side voltage and inverter output current after adding the control strategy proposed by the present invention under two-phase short-circuit fault conditions of different degrees, with the goal of optimizing voltage imbalance;

[0040] Figure 8 It is a simulated waveform diagram of load side voltage and inverter output current after adding the control strategy proposed by the present invention under two-phase short circuit fault conditions of different degrees, with the normal operation of the non-fault phase as the goal. DETAILED DESCRIPTION

[0041] The present invention is further described in detail below with reference to examples:

[0042] like Figure 1 As shown, a fault-tolerant control method for a voltage source inverter under an asymmetric fault condition is provided, wherein the control method optimizes the fault-tolerant effect of the voltage source inverter during a two-phase short-circuit fault. The control method comprises:

[0043] Step 1, the voltage and current signal extraction step at the load, through the positive and negative sequence separation module, the positive and negative sequence components of the voltage and current in the two-phase stationary coordinate system are obtained respectively. Further, the positive and negative sequence active power and reactive power output by the micro-source, and the positive and negative sequence current amplitude of the micro-source output current can be calculated;

[0044] Step 2, the micro-source output current limiting method design step, obtains the current sequence component amplitude sum, and subtracts the current limit value from the sequence component amplitude sum, and then multiplies it by the proportional coefficient, and applies it to the positive sequence reference voltage to achieve micro-source output current limiting;

[0045] Step 3, the design step of the micro-source output voltage fault tolerance optimization method, introduces the voltage sequence component amplitude coefficient, and derives the voltage sequence component amplitude coefficient that meets different fault tolerance requirements based on the composite sequence network diagram;

[0046] Step 4, the overall fault-tolerant control scheme design step, uses the improved droop control with the above two schemes to obtain the voltage amplitude and phase reference output, and subtracts the reference voltage from the actual voltage to obtain the error voltage value, which is used as the reference input of the voltage outer loop regulator. After the voltage outer loop and the current inner loop, the fault-tolerant control of the micro-source system is realized.

[0047] Figure 2 This is a micro-source phase-to-phase fault architecture diagram. The fault occurs on the line transmission line, and the fault type is a BC phase-to-phase short circuit fault. are the three-phase voltages at the load, They are the three-phase short-circuit currents at the fault location.

[0048] Figure 3 This is the composite sequence network diagram of the system under two-phase short circuit fault. The composite sequence network diagram of the system can be obtained according to the boundary conditions and symmetrical component method. is the positive sequence voltage output by the micro source, They are respectively the positive and negative sequence current components of the micro-source output, are respectively the positive and negative sequence current components flowing through the load, Z1 and Z2 are the positive and negative sequence equivalent output impedances of the inverter, and generally they are approximately equal. f , Z load are the short-circuit impedance and the load respectively.

[0049] Figure 4 This paper adopts a new current limiting method, which is suitable for symmetrical and asymmetrical faults. When a two-phase phase-to-phase fault occurs, according to the fault characteristic analysis, it can be known that the maximum possible amplitude of the fault current is Therefore, we can use the inverter maximum safety limit I lim Subtract the negative sequence component of the inverter current Then the positive sequence current component is obtained The required limit is calculated and subtracted from the output positive sequence current amplitude and multiplied by the proportional coefficient g. The result is applied to the inverter positive sequence voltage reference setting value to achieve the overall downward shift of the power-voltage control curve, limit the inverter power output, and thus achieve effective limitation of the inverter output current. When a symmetrical fault occurs, the negative sequence current amplitude is The current can be effectively limited by 0. This current limiting method makes it possible to further realize the voltage loop control. For the convenience of analysis, the voltage sequence component amplitude coefficient k is introduced. According to the composite sequence network diagram, the corresponding coefficient k that meets different fault tolerance requirements (voltage imbalance optimization and normal operation of non-fault phase) is derived. Combining the introduction of the above two strategies, the positive and negative sequence reference voltage amplitude can be obtained. Further, the positive sequence reactive power control loop generates ωt for voltage synthesis to obtain the positive and negative sequence voltage components in the three-phase stationary coordinate system. After Clarke transformation, the positive and negative sequence voltage components in the two-phase stationary coordinate system can be obtained: and Then, the reference voltage in the two-phase stationary coordinate system can be obtained by synthesizing the voltage sequence components. Therefore, the voltage outer loop can realize the control of positive and negative sequence voltage through the QPR regulator, further realize the positive and negative sequence current control through the current inner loop, and finally obtain the driving signal of the three-phase switch tube through the modulation strategy of the carrier layer.

[0050] Figure 5 After adopting the control strategy proposed in the present invention under fault conditions, the negative sequence voltage output by the micro-source can be controlled, so the equivalent composite sequence network of the microgrid can be obtained. Figure 5 .

[0051] Figure 6 The following is a simulated waveform of the output voltage and current of the micro-source under the traditional fault current limiting mode. The simulation process is as follows: a phase-to-phase short circuit occurs between the BC phases at 0.3s, and the short-circuit impedance is 15 ohms. At 0.5s, the short-circuit impedance becomes 8 ohms. It can be seen that as the fault severity increases, the output voltage drop of each phase of the micro-source increases, and the output current of the micro-source is effectively limited within the safety threshold. That is, the above fault response method only has a current limiting effect. Since the control effect of the control loop outside the current loop is blocked, the voltage quality optimization cannot be further achieved.

[0052] Figure 7 and Figure 8 In order to use the present invention to maintain the output current of the micro-source below the safety limit, the simulation effect diagram of the fault-tolerant control strategy with the optimization of the voltage imbalance at the load as the goal and the normal operation of the non-fault phase as the goal is shown. Figure 7 As shown in the figure, it can be seen from the simulated waveform of the micro-source output voltage that the control strategy proposed in the present invention achieves the optimization of voltage imbalance, which is beneficial for imbalance-sensitive loads; it can be seen from the simulated waveform of the micro-source output current that the maximum amplitude of the micro-source output current is guaranteed to be maintained within the safety threshold (2 times the rated output current), which verifies that the proposed control strategy has certain adaptability and effectiveness. Figure 8As shown in the figure, under the same fault simulation conditions, it can be seen from the output voltage simulation waveform that phase A can maintain normal operation, and the output current waveform also shows the effectiveness of the current limiting strategy, which is of certain significance for single-phase critical loads.

[0053] The fault response strategy of the traditional voltage source inverter is often to limit the current of the current control loop in the control system, so that the micro source will be converted from the voltage source control mode to the current source control mode. At the same time, after the fault is cleared, the system recovery control design needs to be further performed. Different from the traditional voltage source inverter fault response method, the present invention adopts sequence current limiting. While ensuring that the output current of the micro source is maintained at the safety threshold, the amplitude coefficient between the voltage sequence components is introduced. Through reasonable setting, for the two-phase short-circuit fault condition, the load side voltage imbalance optimization and the normal operation of the non-fault phase can be achieved respectively. Two fault tolerance effects are achieved, which is beneficial to imbalance sensitive loads and single-phase critical loads. At the same time, due to the introduction of the proposed control strategy, the control properties of the voltage source inverter are not changed, and the voltage source control mode is maintained, which will be conducive to further fault characteristic analysis, and after the fault is cleared, there is no need to further perform recovery control design.

[0054] The implementation described above is only a description of the preferred implementation mode of the present invention, and does not limit the scope of the present invention. Without departing from the design spirit of the present invention, various modifications and improvements made to the technical solution of the present invention by ordinary technicians in this field should fall within the protection scope determined by the claims of the present invention.

Claims

1. A fault-tolerant control method for a voltage source inverter under an asymmetric fault condition, characterized in that: The steps include: Step 1: collect the load voltage and current signals of the micro source through the positive and negative sequence separation module, and obtain the positive and negative sequence components of the voltage and current in the two-phase stationary coordinate system respectively; according to the positive and negative sequence components of the voltage and current, obtain the positive and negative sequence active power, reactive power and positive and negative sequence current amplitude; Step 2, obtaining the difference between the preset current limit and the sum of the amplitudes of the positive and negative sequence components of the current, and then multiplying it by the proportional coefficient, and using it as the positive sequence reference voltage to achieve micro-source output current limitation; The step 2 specifically includes: Let the micro-source output current amplitude safety limit I lim The difference is made from the sum of the sequence component amplitudes, and then multiplied by the proportional coefficient g, and the result is applied to the micro-source reference voltage to achieve current safety limitation; Then the voltage amplitude output of the original PU droop control output is IN o =U * +k m (P ref -P o ) becomes in Where U * is the given voltage of the power loop, k m is the droop coefficient, P ref , are the power loop given active power and the given positive sequence active power, P o , are respectively the actual active output of the micro-source and the positive sequence active output, U o , are the actual voltage output and positive sequence voltage output of the micro source, Δu is the given voltage increment, g is the proportional coefficient, I lim is the safety limit of the micro-source output current amplitude, I1 and I2 are the positive and negative sequence current amplitudes of the micro-source output current Step 3, according to the composite sequence network diagram, calculate the amplitude coefficient between voltage sequence components that meets different fault tolerance requirements; Step 3 specifically includes: The amplitude coefficient k between voltage sequence components is introduced to realize the control of negative sequence voltage. According to different fault tolerance requirements and combined with the composite sequence network diagram of micro-source fault, the coefficient k is reasonably set to achieve the two fault tolerance goals of normal operation of non-fault phase at the load and optimization of voltage imbalance. The coefficient k corresponding to different fault tolerance requirements can be derived as follows: in, is the positive sequence voltage output by the micro source, is the rated voltage of the micro source output, is the positive sequence component of the voltage at the fault point, are respectively the positive and negative sequence current components of the micro-source output, Z1 is the positive and negative sequence equivalent output impedance of the inverter, and Z f , Z load are the short-circuit impedance and the load respectively; Step 4: By obtaining the voltage amplitude coefficient and phase reference output, the preset reference voltage is subtracted from the actual voltage positive sequence component to obtain an error voltage value, and the active power voltage reference value is obtained; according to the reactive power frequency reference value and the active power voltage reference value, as the reference input of the voltage outer loop regulator, through the voltage outer loop and the current inner loop, the fault-tolerant control of the micro-source system is realized.

2. The fault-tolerant control method of a voltage source inverter under an asymmetric fault condition according to claim 1, characterized in that: The step 1 specifically includes: A double second-order generalized integrator is used to separate the positive and negative sequences of electrical quantities. The extraction method is: collect the micro-source output voltage signal u a 、u b 、u c and the current signal i a 、i b 、i c , the three-phase output voltage and current are transformed by Clarke to obtain the voltage representation u in the two-phase stationary coordinate system α 、u β and current representation i α 、i β , and then generate a moving operator with a lag of 90o with the help of a second-order generalized integrator (SOGI). The positive and negative sequence components of the voltage in the two-phase stationary coordinate system can be obtained through corresponding calculations and The positive and negative sequence components of current are and Further obtain the positive and negative sequence active power P output by the micro source + , P - and reactive power Q + , Q - , the positive and negative sequence current amplitudes of the micro-source output current are I1 and I2; The relationship between the current representation and its sequence component representation in the two-phase stationary coordinate system is as follows: where q = e -jπ / 2 is a displacement operator, which is equivalent to lagging the waveform by 90 degrees, [T αβ ] is the coordinate transformation matrix, [T + ]、[T - ] is the positive and negative sequence separation matrix.

3. The fault-tolerant control method of a voltage source inverter under an asymmetric fault condition according to claim 1, characterized in that: The step 4 specifically includes: The QPR regulator is used to effectively control the voltage sequence component and the current sequence component through the voltage outer loop and the current inner loop.

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