Data storage device and non-volatile memory control method

Abstract

The present invention relates to a non-volatile memory mapping data management technology, and more specifically, to a data storage device and a non-volatile memory control method. A controller establishes a first mapping table and a second mapping table. Based on the first mapping table, the controller maps a first logical address requested by a host to a first block alias. Based on the second mapping table, the controller maps the first block alias to a first block on the non-volatile memory. The first mapping table further records a first offset for the first logical address, so that the first logical address is mapped to a first data management unit of the first block represented by the first block alias, wherein the first data management unit on the first block corresponds to the first offset.

Description

Technical Field

[0001] The present invention relates to mapping data management of a data storage device. Background Art

[0002] Non-volatile memory comes in various forms, such as flash memory, magnetoresistive RAM, ferroelectric RAM, resistive RAM, and spin transfer torque RAM (STT-RAM). These types of non-volatile memory are used for long-term data storage and can be used as storage media to implement a data storage device.

[0003] Non-volatile memories typically have unique storage characteristics. This technical field requires the development of control technologies that address these characteristics. For example, managing non-volatile memory mapping information must take these characteristics into account. Summary of the Invention

[0004] The present invention provides a mapping information management technology for a non-volatile memory.

[0005] A data storage device implemented according to one embodiment of the present invention includes a non-volatile memory and a controller. The controller is coupled to the non-volatile memory and is configured to operate the non-volatile memory according to a request from a host. The controller establishes a first mapping table and a second mapping table. According to the first mapping table, the controller maps a first logical address requested to be read by the host to a first block alias. According to the second mapping table, the controller maps the first block alias to a first block on the non-volatile memory. The first mapping table further records a first offset for the first logical address, so that the first logical address is mapped to a first data management unit of the first block represented by the first block alias, wherein the first data management unit on the first block corresponds to the first offset.

[0006] In one embodiment, the first mapping table uses logical addresses as indexes to list the block names and offsets mapped to different logical addresses. The second mapping table records the block names and mapping information between blocks.

[0007] In one embodiment, when the first block is completely moved to a second block, the controller modifies the second mapping table so that the first block alias is changed to represent the second block, and the controller may further modify the second mapping table so that a second block alias previously representing the second block is changed to represent the first block.

[0008] In one embodiment, after the first block is completely moved to the second block, if the host again requests to read the first logical address, the controller maps the first logical address to the first block alias according to the first mapping table and obtains the first offset. Then, the controller maps the first block alias to the second block through the second mapping table and responds to the host with a second data management unit on the second block that matches the first offset.

[0009] In one embodiment, the controller performs a complete migration from the first block to the second block during a power-on procedure.

[0010] In one embodiment, after the power-on procedure, if the data storing a second logical address in the second block is continued to be written, the controller queries the second mapping table to obtain the mapping of the second block to the first block alias, and modifies the first mapping table to record the first block alias and a second offset for the second logical address, so that the second logical address is mapped to a third data management unit in the second block represented by the first block alias for data storage, and the third data management unit on the second block corresponds to the second offset.

[0011] In one embodiment, the second mapping table includes a block alias-to-block mapping table and a block-to-block alias mapping table. The block alias-to-block mapping table uses block alias as an index and lists blocks mapped to different block aliases. The block-to-block alias mapping table uses block as an index and lists block aliases used by different blocks.

[0012] In one embodiment, the second mapping table uses block aliases as indices to list blocks mapped to different block aliases. The controller sequentially scans the columns of the second mapping table to obtain the block alias used by a target block.

[0013] In one embodiment, the second mapping table uses blocks as indexes and lists block aliases used by different blocks. The controller sequentially scans the columns of the second mapping table to obtain the block represented by a target block alias.

[0014] The controller for controlling the non-volatile memory can also be implemented by other architectures. The present invention can further implement a control method for the non-volatile memory based on the aforementioned concept.

[0015] The following describes the present invention in detail with reference to the following embodiments and accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 Illustrate the structure of block Blk in flash memory;

[0017] Figure 2FIG2 illustrates a mapping information architecture 200 implemented according to one embodiment of the present invention, including a logical address-block alias mapping table (L2M) 202, a block-block alias (FBlk-MBlk) mapping table 204, and a block alias-block (MBlk-FBlk) mapping table 206;

[0018] Figure 3 FIGURE 3 illustrates a data storage device 300 implemented according to one embodiment of the present invention;

[0019] Figure 4 Illustrated example of continuing to write data after power is restored;

[0020] Figure 5 is a flow chart illustrating a power restoration procedure according to one embodiment of the present invention;

[0021] Figure 6 FIG. 1 is a flow chart illustrating a read operation according to one embodiment of the present invention.

[0022] Explanation of symbols

[0023] Blk:Block

[0024] 200: Mapping Information Architecture

[0025] 202: Logical Address-Block Name Mapping Table (L2M)

[0026] 204: Block-Block Token Mapping Table (F2M)

[0027] 206: Block Token-Block Mapping Table (M2F)

[0028] 300: Data storage device

[0029] 302: Flash memory

[0030] 304: Controller

[0031] 306: Random Access Memory

[0032] 308:Host

[0033] F2M: Block-Block Token Mapping Table

[0034] L2M: logical address-block alias mapping table;

[0035] M2F: Block Token-Block Mapping Table

[0036] L2M_G0, L2M_G1, L2M_Gi: mapping subtable

[0037] S502~S506, S602~S608: steps. DETAILED DESCRIPTION

[0038] The following description lists various embodiments of the present invention. The following description introduces the basic concepts of the present invention and is not intended to limit the content of the present invention. The actual scope of the invention should be defined according to the scope of the patent application.

[0039] Non-volatile memory can be flash memory, magnetoresistive RAM, ferroelectric RAM, resistive RAM (RRAM), spin transfer torque RAM (STT-RAM), and other storage media that provide long-term data retention. The following discussion uses flash memory as an example, but the technology described can also be applied to other types of non-volatile memory.

[0040] Flash memory is commonly used as the storage medium for data storage devices today, including memory cards, USB flash devices, solid-state drives (SSDs), and more. One application involves packaging the flash memory and its controller together in a multi-chip package, known as an embedded flash memory module (eMMC).

[0041] Data storage devices using flash memory as storage media are used in a variety of electronic devices, including smartphones, wearable devices, tablet computers, and virtual reality devices. The computing module of the electronic device can be considered the host, operating the data storage device to access the flash memory therein.

[0042] Data storage devices using flash memory as storage media can also be used to build data centers. For example, servers can operate solid-state drive (SSD) arrays to form a data center. The server can be regarded as a host, operating the connected SSDs to access the flash memory stored therein.

[0043] Flash memory has its own special storage characteristics, which are described below.

[0044] The host uses logical addresses (e.g., logical block addresses (LBA) or global host pages (GHP)) to identify data. Where the data is actually stored in the flash memory is managed using mapping information.

[0045] The physical space of the flash memory is divided into multiple blocks for configuration and use.

[0046] Figure 1The following diagram illustrates the structure of a block Blk in a flash memory. Of course, the following dimensions may also have other implementations.

[0047] A block (Blk) includes multiple pages, for example, page 0 through page 255. Each page includes multiple sectors, for example, 32 sectors. Each sector can store 512 bytes of user data. A page can provide 16KB of storage space. One implementation uses the storage space of a block (Blk) sequentially based on page numbering—from low to high. Each page can be further divided into multiple data management units (DMUs). Taking the 4KB data management mode as an example, each DMU is 4KB in size and includes eight sectors. A page has four DMUs (4x4KB).

[0048] In one embodiment, a segment (512B) can store data corresponding to a logical block address (LBA). A 4KB data management unit (including eight segments) stores data corresponding to eight consecutive logical block addresses (LBAs), that is, corresponding to a global host page number (GHP). The mapping relationship between logical addresses (whether host page number (GHP), logical block address (LBA), or even other) and flash memory physical space is generally recorded in a logical address-flash memory mapping table (usually labeled L2P). For example, a logical address-flash memory mapping table (L2P) can list which data management unit (usually indicated by offset) in which block (usually labeled FBlk) the data of each logical address (LBA, GHP, or even other) is stored.

[0049] The logical address-to-flash memory mapping table (L2P) requires dynamic updating. Updating the L2P mapping table involves the following steps: loading the mapping information from flash memory to controller memory (e.g., a random access memory, SRAM, DRAM, or other), performing the update in the controller memory, and then restoring the mapping information back to flash memory. This mapping table update process consumes considerable system resources. Reducing the number of mapping table updates can significantly improve system performance.

[0050] For example, in the event of a power outage, the power-on process involves updating the logical address-to-flash memory mapping table (L2P). The electrical performance of the block where the write was interrupted by the power outage is affected, and the contents must be completely moved to another block during the power-on process. This block move triggers an L2P update, impacting system performance.

[0051] The present invention provides a mapping information management solution that is particularly advantageous for block migration, so that block migration only involves updating a small amount of mapping information. The present invention proposes a block alias technology. The block number of the actual physical space of the flash memory is FBlk. The present invention provides a block alias MBlk for each block FBlk. The block alias MBlk corresponding to each block FBlk is recorded in a block-block alias (FBlk-MBlk) mapping table. The present invention further maintains a block alias-block (MBlk-FBlk) mapping table in reverse. Different from a logical address-flash memory mapping table (L2P), the present invention uses a logical address-block alias mapping table (L2M) in conjunction with the block-block alias (FBlk-MBlk) mapping table and the block alias-block (MBlk-FBlk) mapping table to manage mapping data.

[0052] Figure 2 The diagram illustrates a mapping information architecture 200 implemented according to one embodiment of the present invention, including a logical address-to-block alias mapping table (L2M) 202, a block-to-block alias (FBlk-MBlk) mapping table 204, and a block alias-to-block (MBlk-FBlk) mapping table 206. The logical address-to-block alias mapping table (L2M) 202 lists the block alias MBlk to which each logical address is mapped and indicates the corresponding data management unit number (Unit). The data management unit number (Unit) can also be viewed as an offset within the block. The logical address-to-block alias mapping table (L2M) 202 shows that logical address 0x3005 is mapped to (MBlk 0x0A, Unit 0x00), logical address 0x3006 is mapped to (MBlk 0x0A, Unit 0x01), and logical address 0x3007 is mapped to (MBlk 0x0A, Unit 0x02). The block alias-block (MBlk-FBlk) mapping table 206 shows that block alias (MBlk) 0x0A is mapped to block (FBlk) 0x0A. Therefore, the logical address-block alias mapping table (L2M) 202 and the block alias-block (MBlk-FBlk) mapping table 206 jointly provide the following information: logical address 0x3005 is mapped to data management unit 0x00 of block FBlk 0x0A, logical address 0x3006 is mapped to data management unit 0x01 of block FBlk 0x0A, and logical address 0x3007 is mapped to data management unit 0x02 of block FBlk 0x0A. The block-block alias (FBlk-MBlk) mapping table 204 is the reverse of the block alias-block (MBlk-FBlk) mapping table 206. It also records that block FBlk 0x0A corresponds to block alias MBlk 0x0A.

[0053] If a block move occurs, both the block-block alias (FBlk-MBlk) mapping table 204 and the block alias-block (MBlk-FBlk) mapping table 206 are updated. Taking the complete block move from block FBlk 0x0A to block FBlk 0x0B as an example, the following description explains the process. The block-block alias (FBlk-MBlk) mapping table 204 is modified to represent block FBlk 0x0B using the block alias MBlk 0x0A, based on the original block alias of block FBlk 0x0A. The original block alias MBlk 0x01 of block FBlk 0x0B is now replaced with block FBlk 0x0A (block replacement). As shown in the figure, the block code MBlk of block FBlk 0x0A is changed from 0x0A to 0x01, and the block code MBlk of block FBlk 0x0B is changed from 0x01 to 0x0A.

[0054] Accordingly, the block alias-block (MBlk-FBlk) mapping table 206 is modified to make the block alias MBlk0x01 no longer represent the block FBlk 0x0B but the block FBlk 0x0A; and make the block alias MBlk 0x0A no longer represent the block FBlk 0x0A but the block FBlk 0x0B.

[0055] In summary, the block migration event does not modify the logical address-block alias mapping table (L2M) 202, which greatly saves system resources.

[0056] The logical address-block alias mapping table (L2M) 202, the block-block alias (FBlk-MBlk) mapping table 204, and the block alias-block (MBlk-FBlk) mapping table 206 need to be stored in a flash memory for non-volatile storage and loaded for reference or even modification when needed.

[0057] Figure 3 The diagram illustrates a data storage device 300 according to one embodiment of the present invention, comprising a flash memory 302, a controller 304, and a random access memory 306. The random access memory 306 can be static random access memory (SRAM), dynamic random access memory (DRAM), or other storage space that is accessible at high speed by the controller 204. In another embodiment, the random access memory 306 is replaced with system memory on a host 308. The host 308 operates the flash memory 302 through the controller 304. The controller 304 uses the random access memory 306 to temporarily store data while performing operations. Figure 4 In particular, the example of block replacement is discussed.

[0058] The logical address-block alias mapping table L2M, the block-block alias (FBlk-MBlk) mapping table F2M, and the block alias-block (MBlk-FBlk) mapping table M2F are stored in a non-volatile format in flash memory 302. When the controller 304 performs a block replacement, it loads the block-block alias (FBlk-MBlk) mapping table F2M and the block alias-block (MBlk-FBlk) mapping table M2F from flash memory 302 into RAM 306 for update. The example shown in the figure shows a complete block migration from block FBlk 0x0A to block FBlk 0x0B, without requiring the loading and updating of the large logical address-block alias mapping table L2M.

[0059] In addition, the design of the logical address-block alias mapping table L2M is discussed.

[0060] As process technology advances, flash memory sizes are increasing. For a 4TB flash memory, the logical address-block alias mapping table (L2M) can reach 4GB. For an 8TB flash memory, the logical address-block alias mapping table (L2M) can reach 8GB. Loading and updating an excessively large L2M logical address-block alias mapping table consumes significant system resources.

[0061] One solution is to split the logical address-block alias mapping table L2M into smaller mapping sub-tables, such as mapping sub-tables L2M_G# corresponding to different logical address groups G# (# represents a number). Only the referenced mapping sub-table L2M_G# is loaded for reference or even updated. Compared to the complete logical address-block alias mapping table L2M, loading and updating the mapping sub-table L2M_G# consumes only a small amount of system resources.

[0062] Figure 4 The diagram shows an example of resuming data writing after power is restored. In this example, when power is off, the writing process is at logical address 0x3007; the interruption point is the data management unit Unit 0x02 of the block code MBlk 0x0A. Logical address 0x3007 corresponds to the mapping sub-table L2M_Gi. After power is restored, in addition to following Figure 3 Complete the update of the block-block alias (FBlk-MBlk) mapping table F2M and the block alias-block (MBlk-FBlk) mapping table M2F (with the content of the unstable block FBlk 0x0A being moved to the block FBlk 0x0B, the block alias MBlk0x0A is changed to represent the block FBlk 0x0B). Figure 4 , the mapping sub-table L2M_Gi is loaded into the random access memory 306, and the continued mapping information is dynamically recorded.

[0063] Since the subsequent write after power recovery is to block FBlk 0x0B (the block to be moved to upon power recovery), controller 304 queries block-block alias (FBlk-MBlk) mapping table F2M and obtains the system block alias MBlk 0x0A currently representing block FBlk 0x0B. When writing resumes with data at logical address 0x3008, the flash memory 302 space is used from the point of interruption (MBlk 0x0A, Unit 0x02). Logical address 0x3008 is mapped to (MBlk 0x0A, Unit 0x03), meaning data management unit 0x03 of block FBlk 0x0B is written. Logical address 0x3009 is mapped to (MBlk 0x0A, Unit 0x04), meaning data management unit 0x04 of block FBlk 0x0B is written. Logical address 0x3010 is mapped to (MBlk 0x0A, Unit 0x05), which means it is written to data management unit 0x05 of block FBlk 0x0B. Logical address 0x3011 is mapped to (MBlk 0x0A, Unit 0x06), which means it is written to data management unit 0x06 of block FBlk 0x0B. The data is correctly written to block FBlk 0x0B.

[0064] Figure 5 This flowchart illustrates a power-on / off procedure according to one embodiment of the present invention. Step S502 performs a complete migration of the interruption point block (e.g., FBlk 0x0A 0x0B). Step S504 loads the block-block alias (FBlk-MBlk) mapping table F2M and the block alias-block (MBlk-FBlk) mapping table M2F into RAM 306, modifying the block migration in step S502. For example, block FBlk 0x0B may be mapped to block alias MBlk 0x0A, or even MBlk 0x01, which is a decomposition of the original block FBlk 0x0B, may be used to represent block FBlk 0x0A. Step S506 loads the corresponding mapping sub-table L2P_Gi for continued writing, allowing it to be updated upon continued writing after power is restored.

[0065] Figure 6 This flowchart illustrates a read operation according to one embodiment of the present invention. Step S602 receives a logical address requested by the host. Step S604 queries the logical address-block alias mapping table L2M to obtain the block alias MBlk and offset mapped to the logical address. Step S606 queries the block alias-block (MBlk-FBlk) mapping table M2F to locate the block FBlk represented by the block alias MBlk. Step S608 uses the offset of block FBlk to locate the data management unit corresponding to the logical address within block FBlk and responds to the host accordingly.

[0066] by Figure 4 For example, after block FBlk 0x0A has been moved to block FBlk 0x0B and has even begun to be rewritten, if the host 308 requests to read logical address 0x3007, the controller 304 finds the mapped block alias MBlk 0x0A and displacement Unit 0x02 based on the mapping sub-table L2M_Gi corresponding to logical address 0x3007. Then, based on the block alias-block (MBlk-FBlk) mapping table M2F, it finds the block FBlk 0x0B represented by block alias MBlk 0x0A and responds to the host 308 with the data management unit Unit 0x02 that matches the displacement.

[0067] The aforementioned implementation uses two small tables—block alias-block (MBlk-FBlk) mapping table M2F and block-block alias (FBlk-MBlk) mapping table F2M—to bidirectionally display the mapping information between blocks and block aliases. However, maintaining a single-directional mapping table is also feasible.

[0068] One embodiment does not provide a block-to-block alias (FBlk-MBlk) mapping table F2M, but instead provides only a block alias-to-block (MBlk-FBlk) mapping table M2F. This table uses block alias as an index and lists the blocks mapped to different block aliases. A controller can sequentially scan the fields of this table to obtain the block alias used by a target block.

[0069] One embodiment does not provide a block alias-block (MBlk-FBlk) mapping table M2F, but instead provides only a block-block alias (FBlk-MBlk) mapping table F2M. This second mapping table lists the block aliases used by different blocks, indexed by block. The controller can sequentially scan the fields of the block-block alias (FBlk-MBlk) mapping table F2M to locate the block represented by a target block alias.

[0070] The above controller's operation design for the non-volatile memory can also be implemented by other structures. Any mapping information management based on the above concepts falls within the scope of protection of the present invention. The present invention can also implement a control method for the non-volatile memory using the above concepts.

[0071] Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Anyone familiar with the technical field may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be defined by the claims.

Claims

1. A data storage device, comprising: a non-volatile memory; as well as A controller coupled to the non-volatile memory is configured to operate the non-volatile memory according to a host request. in: The controller establishes a first mapping table and a second mapping table; According to the first mapping table, the controller maps a first logical address requested by the host to be read to a first block alias; The controller maps the first block alias to a first block on the non-volatile memory according to the second mapping table; The first mapping table further records a first offset for the first logical address, so that the first logical address is mapped to a first data management unit of the first block represented by the first block alias, wherein the first data management unit corresponds to the first offset on the first block; The first mapping table uses the logical address as an index and lists the block aliases and displacements mapped to different logical addresses; The second mapping table records block aliases and mapping information between blocks; and When the controller completely moves the first block to a second block, the controller further modifies the second mapping table so that the first block alias is changed to represent the second block.

2. The data storage device according to claim 1, wherein: When the first block is completely moved to the second block, the controller further modifies the second mapping table so that a second block alias previously representing the second block is changed to represent the first block.

3. The data storage device according to claim 1, wherein: After the first block is completely moved to the second block, if the host again requests to read the first logical address, the controller maps the first logical address to the first block alias according to the first mapping table and obtains the first offset. Then, the controller maps the first block alias to the second block through the second mapping table and responds to the host with a second data management unit on the second block that matches the first offset.

4. The data storage device according to claim 3, wherein: The controller performs a complete migration from the first block to the second block in a power-on procedure.

5. The data storage device according to claim 4, wherein: After the power-on procedure, if the second block continues to store data of a second logical address, the controller queries the second mapping table to obtain the mapping of the second block to the first block alias, and modifies the first mapping table to record the first block alias and a second offset for the second logical address, so that the second logical address is mapped to a third data management unit of the second block represented by the first block alias for data storage, and the third data management unit corresponds to the second offset on the second block.

6. The data storage device according to claim 5, wherein: The second mapping table includes a block alias-block mapping sub-table and a block-block alias mapping sub-table; The block code name-block mapping table is indexed by block code name and lists the blocks mapped by different block codes; and The block-block alias mapping table is indexed by block and lists the block aliases used by different blocks.

7. The data storage device according to claim 5, wherein: The second mapping table is indexed by block alias and lists blocks mapped to different block aliases; and The controller obtains a block alias used by a target block by sequentially scanning the columns of the second mapping table.

8. The data storage device according to claim 5, wherein: The second mapping table is indexed by block and lists block aliases used by different blocks; and The controller obtains a block represented by a target block alias by sequentially scanning the columns of the second mapping table.

9. A non-volatile memory control method, comprising: operating a non-volatile memory according to a request of a host; Creating a first mapping table and a second mapping table; According to the first mapping table, a first logical address requested by the host to be read is mapped to a first block alias; and According to the second mapping table, the first block alias is mapped to a first block on the non-volatile memory, The first mapping table further records a first offset for the first logical address, so that the first logical address is mapped to a first data management unit of the first block represented by the first block alias, and the first data management unit corresponds to the first offset on the first block; The first mapping table uses the logical address as an index and lists the block aliases and displacements mapped to different logical addresses; The second mapping table records block aliases and mapping information between blocks. When the first block is completely moved to a second block, the method further modifies the second mapping table so that the first block alias is changed to represent the second block.

10. The non-volatile memory control method according to claim 9, wherein: Also includes: When the first block is completely moved to the second block, the second mapping table is modified so that a second block alias previously representing the second block is changed to represent the first block.

11. The non-volatile memory control method according to claim 9, wherein: Also includes: After the first block is completely moved to the second block, if the host again requests to read the first logical address, the first logical address is mapped to the first block alias according to the first mapping table, and the first offset is obtained. Then, the first block alias is mapped to the second block through the second mapping table, and a second data management unit on the second block that matches the first offset is responded to the host.

12. The non-volatile memory control method according to claim 11, wherein: The complete migration from the first block to the second block is performed during a power-on procedure.

13. The non-volatile memory control method according to claim 12, wherein: Also includes: After the power-on procedure, if the second block continues to store data at a second logical address, the second mapping table is queried to obtain the mapping of the second block to the first block alias, and the first mapping table is modified to record the first block alias and a second offset for the second logical address, so that the second logical address is mapped to a third data management unit of the second block represented by the first block alias for data storage. The third data management unit corresponds to the second offset on the second block.

14. The non-volatile memory control method according to claim 13, wherein: The second mapping table includes a block alias-block mapping sub-table and a block-block alias mapping sub-table; The block code name-block mapping table is indexed by block code name and lists the blocks mapped by different block codes; and The block-block alias mapping table is indexed by block and lists the block aliases used by different blocks.

15. The non-volatile memory control method according to claim 13, wherein ； The second mapping table is indexed by block alias and lists blocks mapped to different block aliases; and The block alias used by a target block is obtained by sequentially scanning the fields of the second mapping table.

16. The non-volatile memory control method according to claim 13, wherein: The second mapping table is indexed by block and lists block aliases used by different blocks; and The block represented by a target block alias is obtained by sequentially scanning the fields of the second mapping table.

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