Lookup table circuits, chips, and computer equipment

Abstract

This application provides a lookup table circuit, chip, and computer device. The lookup table circuit provided in this application sets up at least two sets of lookup table circuits, each set having a first lookup table unit and at least one second lookup table unit. The output bit width of the first lookup table unit is configured to be the same as the output data bit width of the lookup table circuit to store the original value of the data that the lookup table circuit needs to pre-store. The output data bit width of the second lookup table unit is configured to be smaller than the output data bit width of the lookup table circuit to store the difference in the data that the lookup table circuit needs to pre-store, thus saving bit width occupied by elements in the lookup table unit. Combined with a small number of adders and selectors, the function of a large lookup table can be implemented with a reduced number of combinational logic selection circuits, thereby improving the problem of large lookup tables occupying significant chip area and causing a substantial increase in chip area.

Description

Technical Field

[0001] This application relates to the field of integrated circuits, specifically to a lookup table circuit, chip, and computer device. Background Technology

[0002] Currently, large-scale computing chips, such as DPU chips, GPU chips, and AI chips, involve numerous table lookup operations. These lookup operations are typically implemented using traditional lookup tables (LUTs). The principle of a lookup table is to address the pre-stored content in the lookup table based on the input, and then output the content (i.e., the data) at the corresponding location. The input of a lookup table is an address, and the output is data. The bit width of the input determines the number of elements in the lookup table. The bit width of the output determines the numerical value that each element in the lookup table can store. For example, for a lookup table with a 13-bit input and a 17-bit output, it can have 8192 (i.e., ...) There are 131072 elements, and each element can store a maximum value of 131072 (i.e., ...). However, lookup tables typically involve numerous combinational logic selection circuits in their circuit implementation. For example, for a lookup table with 13-bit inputs and 17-bit outputs, selecting one number from 8192 17-bit numbers requires 17 selection circuits. Therefore, as the number of elements and the bit width occupied by each element increase, large lookup tables result in a significant increase in chip area during circuit implementation. Summary of the Invention

[0003] This application provides a lookup table circuit, chip, and computer device that can reduce the chip area occupied by large lookup tables in circuit implementation.

[0004] In a first aspect, this application provides a lookup table circuit, wherein the bit width of the input address of the lookup table circuit is configured as X bits, the input address of the lookup table circuit includes a first input address and a second input address, the bit width of the first input address is configured as X1 bits, and the bit width of the second input address is configured as X2 bits, wherein X, X1, and X2 are all positive integers, and X = X1 + X2.

[0005] The bit width of the output data of the lookup table circuit is configured as Y bits;

[0006] The lookup table circuit includes: at least two sets of lookup table units, at least two adders, and a selector, wherein each set of lookup table units corresponds to at least one adder.

[0007] Each lookup table unit includes a first lookup table unit and at least one second lookup table unit. The input addresses of both the first and second lookup table units are configured as the first input address. The bit width of the output data of the first lookup table unit is configured as Y bits, and the bit width of the output data of the second lookup table unit is configured to be less than Y bits. The output data of the first lookup table unit is configured as the input data of a selector and as the input data of each adder corresponding to this lookup table unit. The output data of each second lookup table unit is configured as the input data of a corresponding adder. The output data of each adder is configured as the input data of a selector. The selector is configured to select one of the input data of the selector according to the second input address to output as the output data of the lookup table circuit.

[0008] Secondly, this application provides a chip that includes the lookup table circuit provided in the first aspect of this application.

[0009] Thirdly, this application provides a computer device including the chip provided in the second aspect of this application. Attached Figure Description

[0010] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0011] Figure 1 A schematic diagram of the lookup table circuit provided in the first embodiment of this application;

[0012] Figure 2 This is a schematic diagram of the lookup table circuit provided in the second embodiment of this application. Detailed Implementation

[0013] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0014] Currently, large lookup tables typically require many combinational logic selection circuits in their circuit implementation, which takes up chip area. Furthermore, as the number of elements and the bit width occupied by each element in the lookup table increase, large lookup tables will cause a significant increase in chip area in their circuit implementation.

[0015] This application provides a lookup table circuit that can improve the problem of large lookup tables occupying chip area and thus causing a significant increase in chip area. The lookup table circuit provided in this application has an input address width configured as X bits. The input address of the lookup table circuit includes a first input address and a second input address. The first input address has a width configured as X1 bits, and the second input address has a width configured as X2 bits, where X, X1, and X2 are all positive integers, and X = X1 + X2.

[0016] The bit width of the output data of the lookup table circuit is configured as Y bits;

[0017] The lookup table circuit includes: at least two sets of lookup table units, at least two adders, and a selector, wherein each set of lookup table units corresponds to at least one adder.

[0018] Each lookup table unit includes a first lookup table unit and at least one second lookup table unit. The input addresses of both the first and second lookup table units are configured as the first input address. The bit width of the output data of the first lookup table unit is configured as Y bits, and the bit width of the output data of the second lookup table unit is configured to be less than Y bits. The output data of the first lookup table unit is configured as the input data of a selector and as the input data of each adder corresponding to this lookup table unit. The output data of each second lookup table unit is configured as the input data of a corresponding adder. The output data of each adder is configured as the input data of a selector. The selector is configured to select one of the input data of the selector according to the second input address to output as the output data of the lookup table circuit.

[0019] The lookup table circuit provided in this application sets up at least two sets of lookup table circuits, each set having a first lookup table unit and at least one second lookup table unit. The output bit width of the first lookup table unit is configured to be the same as the output data bit width of the lookup table circuit to store the original value of the data that the lookup table circuit needs to pre-store. The output data bit width of the second lookup table unit is configured to be smaller than the output data bit width of the lookup table circuit to store the difference in the data that the lookup table circuit needs to pre-store, thus saving bit width occupied by elements in the lookup table unit. Combined with a small number of adders and selectors, the function of a large lookup table can be implemented with a reduced number of combinational logic selection circuits, thereby improving the problem of large lookup tables occupying significant chip area and causing a substantial increase in chip area.

[0020] To illustrate this application in detail, a lookup table circuit is provided in the first embodiment. Please refer to... Figure 1 , Figure 1This is a schematic diagram of a lookup table circuit provided in the first embodiment of this application. The lookup table circuit 10 includes an input interface and an output interface.

[0021] The lookup table circuit 10 receives an input address at the input interface. The bit width of the input address of the lookup table circuit 10 is configured as X bits. The input address includes a first input address and a second input address. The bit width of the first input address is configured as X1 bits. The bit width of the second input address is configured as X2 bits. Where X = X1 + X2, and X1 and X2 are both positive integers. In a modified embodiment of the first embodiment, X1 can be greater than X2.

[0022] In the first embodiment, the first input address may be the lower X1 bit address of the input address of the lookup table circuit 10, and the second input address may be the higher X2 bit address of the input address of the lookup table circuit 10.

[0023] In a modified embodiment of the first embodiment, the first input address may also be the high-order X1 bit of the input address of the lookup table circuit 10, and the second input address may be the low-order X2 bit of the input address of the lookup table circuit 10. This application does not limit the position of the first and second input addresses in the input address; any technical solution involving the first and second input addresses being two parts of the input address is within the protection scope of this application.

[0024] The lookup table circuit 10 outputs data at the output interface. The bit width of the output data of the lookup table circuit 10 is configured as Y bits, where Y is a positive integer.

[0025] The lookup table circuit 10 receives the input address at the input interface, processes it through its internal logic circuit, and outputs the data at the output interface. The internal logic circuit of the lookup table circuit 10 further includes at least two sets of lookup table units (e.g., ...). Figure 1 As shown, each dashed box represents a set of lookup table cells, at least two adders, and a selector. Each set of lookup table cells corresponds to at least one adder.

[0026] In the first embodiment, the lookup table circuit 10 may include at least two sets of lookup table units. Each set of lookup table units may include a first lookup table unit 101 and at least one second lookup table unit 103.

[0027] Specifically, in the first embodiment, the first lookup table unit 101 of each lookup table unit group includes an input interface and an output interface. Regarding the input / output interface configuration, the first lookup table unit 101 is configured to receive the first input address at the first input interface. The first lookup table unit 101 outputs data at the output interface. The bit width of the output data of the first lookup table unit 101 is configured as Y bits.

[0028] In terms of circuit connections, the input interface of the first lookup table unit 101 is connected to the input interface of the lookup table circuit 10. The output interface of the first lookup table unit 101 is configured to connect to the input of the selector 107, and is configured to connect to the input of each adder 105 corresponding to this group of lookup table units.

[0029] In terms of element configuration, the first lookup table unit 101 may include The first lookup table unit 101 has an i-th element. The i-th element can be configured to store the original value of the data that the lookup table circuit 10 needs to pre-store. In a first embodiment, the original value stored in the i-th element of the first lookup table unit 101 can be less than or equal to the original value stored in the (i+1)-th element. In a modified embodiment of the first embodiment, the original value stored in the i-th element of the first lookup table unit 101 can also be greater than or equal to the original value stored in the (i+1)-th element. Where i is a positive integer, and both i and i+1 are less than or equal to... It should be noted that the amount of data that the lookup table circuit 10 needs to pre-store can be... Each data item occupies a bit width of Y bits. The original value of the data to be pre-stored in the lookup table circuit 10 can be an absolute value.

[0030] Specifically, in the first embodiment and its variations, the second lookup table unit 103 of each set of lookup table units includes an input interface and an output interface. Regarding the input / output interface configuration, the second lookup table unit 103 is configured to receive the first input address at the input interface. The second lookup table unit 103 outputs data at the output interface, and the bit width of the output data of the second lookup table unit 103 is configured to be less than Y bits.

[0031] In terms of circuit connections, the input interface of each second lookup table unit 103 is connected to the input interface of the lookup table circuit 10. The output interface of each second lookup table unit 103 is configured to be connected to the input terminal of a corresponding adder 105.

[0032] In terms of element configuration, the second lookup table unit 103 may include The i-th element of the second lookup table unit 103 can be configured to store the difference between the data that the lookup table circuit 10 needs to pre-store and the data stored in the i-th element of the first lookup table unit 101 of this group of lookup table units, where i is a positive integer, i is less than or equal to Because the bit width occupied by the difference is smaller than the bit width occupied by the data that the lookup table circuit 10 needs to store, this application stores the difference through the second lookup table unit 103, which can save the element bit width value of the second lookup table unit 103, thereby reducing the combinational logic selection circuit of the second lookup table unit 103, and thus saving the chip area occupied by the lookup table circuit 10.

[0033] In the first embodiment, the at least two sets of lookup table units include N sets of lookup table units, where N is a positive integer greater than or equal to 2. Each set of lookup table units in the N sets (e.g., ...) Figure 1 (As shown in one of the dashed boxes) it includes one first lookup table unit 101 and M-1 second lookup table units 103, where M is a positive integer greater than or equal to 2. Since the lookup table circuit 10 can include... There are N lookup table units, so the number of the first lookup table unit 101 and the second lookup table unit 103 in the N sets of lookup table units can satisfy the following relationship: .

[0034] In the first embodiment, for each set of lookup table units, if the number M-1 of second lookup table units 103 is greater than 1, then the data stored in the i-th element of the j-th second lookup table unit 103 can be less than or equal to the data stored in the i-th element of the (j+1)-th second lookup table unit 103, where j is a positive integer and j+1 is less than or equal to M-1. In a modified embodiment of the first embodiment, if the number M-1 of second lookup table units is greater than 1, then the data stored in the i-th element of the j-th second lookup table unit can also be greater than or equal to the data stored in the i-th element of the (j+1)-th second lookup table unit, where j is a positive integer and j+1 is less than or equal to M-1. This application sets the data stored in the same position of two adjacent second lookup table units 103 to a size relationship of less than or equal to or greater than or equal to. This allows the data stored in the same position to be arranged in an ascending or descending order, thereby minimizing the difference in the stored elements of the second lookup table unit 103. This also minimizes the bit width occupied by the difference, saving the bit width of the elements in the second lookup table unit 103. This reduces the combinational logic selection circuit of the second lookup table unit 103, and thus saves the chip area occupied by the lookup table circuit 10.

[0035] In the first embodiment, in the N sets of lookup table units, the data stored in the i-th element of the first lookup table unit 101 of the k-th lookup table unit can be less than or equal to the data stored in the i-th element of the first lookup table unit 101 of the (k+1)-th lookup table unit. Furthermore, the data stored in the i-th element of the j-th second lookup table unit 103 of the k-th lookup table unit can be less than or equal to the data stored in the i-th element of the j-th second lookup table unit 103 of the (k+1)-th lookup table unit. Here, k is a positive integer. In a modified embodiment of the first embodiment, in the N sets of lookup table units, the data stored in the i-th element of the first lookup table unit of the k-th lookup table unit can also be greater than or equal to the data stored in the i-th element of the first lookup table unit of the (k+1)-th lookup table unit. Furthermore, the data stored in the i-th element of the j-th second lookup table unit of the k-th lookup table unit can also be greater than or equal to the data stored in the i-th element of the j-th second lookup table unit of the (k+1)-th lookup table unit. Where k is a positive integer. .

[0036] In the first embodiment, the number of adders 105 is the same as the number of second lookup table units 103. In each group of lookup table units, each second lookup table unit corresponds to one adder 105. Each adder 105 includes two input terminals and one output terminal. The adder 105 is used to add the two input data at the two input terminals and output the result from the output terminal. One input terminal of each adder 105 is connected to the output interface of the first lookup table unit 101 in the same group of lookup table units, and each adder receives the output data of the first lookup table unit in the same group of lookup table units from one input terminal. The other input terminal of each adder 105 is connected to the output interface of its corresponding second lookup table unit 103, and each adder receives the output data of its corresponding second lookup table unit from the other input terminal. The output terminal of each adder 105 is connected to the input terminal of the selector 107, and each adder provides input data to the selector from its output terminal.

[0037] In the first embodiment, selector 107 is configured to select one of its input data according to the second input address as output data for lookup table circuit 10. Selector 107 includes... The selector 107 comprises one input terminal, one output terminal, and one control terminal. The input terminal of the selector 107 is configured to be connected to the output interface of the first lookup table unit 101 in each lookup table unit group and the output terminal of each adder 105, respectively. The selector receives the output data of the first lookup table unit in each lookup table unit group and the output data of each adder from its input terminal. The output terminal of the selector 107 is configured to be the output interface of the lookup table circuit 10, and the selector outputs the output data of the lookup table circuit from its output terminal. The control terminal of the selector 107 is configured to receive a second input address of the input address of the lookup table circuit 10. In a modified embodiment of the first embodiment, the selector may also include multiple selection units; any selector capable of selecting the output from one of its input data based on the second input address is within the scope of protection of this application.

[0038] The lookup table circuit provided in the first embodiment and its modified embodiments of this application sets at least two sets of lookup table units, each set including one first lookup table unit and at least one second lookup table unit. The output bit width of the first lookup table unit is configured to be the same as the output data bit width of the lookup table circuit to store the original value of the data that the lookup table circuit needs to pre-store. The output data bit width of the second lookup table unit is configured to be smaller than the output data bit width of the lookup table circuit to store the difference in the data that the lookup table circuit needs to pre-store, thus saving bit width occupied by elements in the lookup table unit. Combined with a small number of adders and selectors, the function of a large lookup table can be implemented with a reduced number of combinational logic selection circuits, thereby improving the problem of large lookup tables occupying significant chip area and causing a substantial increase in chip area.

[0039] To facilitate understanding of the lookup table circuit provided in this application, the second embodiment of this application combines... Figure 2 The lookup table circuit is described in detail. Please refer to [link / reference]. Figure 2 , Figure 2 This is a schematic diagram of the lookup table circuit 10 provided in the second embodiment of this application.

[0040] The lookup table circuit 10 includes an input interface and an output interface.

[0041] The lookup table circuit 10 receives an input address at the input interface. The bit width of the input address of the lookup table circuit 10 is assumed to be 13 bits. The input address includes a first input address and a second input address. The bit width of the first input address is assumed to be 10 bits. The bit width of the second input address is assumed to be 3 bits. The first input address can be the lower 10 bits of the input address of the lookup table circuit 10, and the second input address can be the higher 3 bits of the input address of the lookup table circuit 10. That is, the lower 10 bits of the 13-bit input address of the lookup table circuit 10 are the first output address, and the higher 3 bits of the 13-bit input address of the lookup table circuit are the second output address.

[0042] The lookup table circuit 10 outputs data at the output interface. The bit width of the output data of the lookup table circuit 10 is assumed to be 17 bits.

[0043] The lookup table circuit 10 receives the input address at the input interface, processes it through its internal logic circuit, and outputs the data at the output interface. The internal logic circuit of the lookup table circuit 10 also includes: two sets of lookup table units (LUT-1, LUT-2), six adders (ADD1-ADD6) 105, and a selector 107. Each set of lookup table units corresponds to three adders 105.

[0044] In the second embodiment, the lookup table circuit 10 may include two sets of lookup table units. Each set of lookup table units may include one first lookup table unit 101 and three second lookup table units 103. Figure 2 As shown, the first set of lookup table units (LUT-1) includes one first lookup table unit (LUT0) and three second lookup table units (LUT1, LUT2, LUT3). The second set of lookup table units (LUT-2) includes one first lookup table unit (LUT4) and three second lookup table units (LUT5, LUT6, LUT7). The three second lookup table units (LUT1, LUT2, LUT3) of the first set of lookup table units (LUT-1) correspond one-to-one with the three adders (ADD1, ADD2, ADD3). The three second lookup table units (LUT5, LUT6, LUT7) of the second set of lookup table units (LUT-2) correspond one-to-one with the three adders (ADD4, ADD5, ADD6).

[0045] Currently, for those that can be pre-stored The number of data items and the bit width occupied by each data item are For large lookup tables of a certain size, their implementation requires a large number of combinational logic selection circuits, occupying significant chip area. To reduce the number of combinational logic selection circuits required for large lookup table implementation, this application's lookup table circuit divides the large lookup table into eight smaller lookup tables, forming two groups. Each group has one first lookup table unit and three second lookup table units. Combined with a small number of adders and selectors, the functionality of a large lookup table can be achieved with significantly reduced combinational logic selection circuitry. It should be noted that the number of divisions is related to the bit width of the input address of the divided lookup table; this application preferably uses an input address width of no more than 10 bits for the divided lookup table.

[0046] Specifically, in the second embodiment, the first lookup table unit (LUT0) 101 of the first lookup table unit LUT-1 includes an input interface and an output interface. Regarding the input / output interface configuration, the first lookup table unit (LUT0) 101 is configured to receive the first input address at the input interface. The first lookup table unit (LUT0) 101 outputs data at the output interface. The bit width of the output data of the first lookup table unit (LUT0) 101 is configured to be 17 bits.

[0047] In terms of circuit connections, the input interface of the first lookup table unit (LUT0) 101 is connected to the input interface of the lookup table circuit 10. The output interface of the first lookup table unit (LUT0) 101 is configured to connect to the input terminal of the selector 107, and is configured to connect to the input terminal of each adder (ADD1, ADD2, ADD3) 105 corresponding to this group of lookup table units, that is, it is configured to connect to the input terminals of adders ADD1, ADD2, and ADD3.

[0048] In terms of element configuration, the first lookup table unit (LUT0) 101 may include The first lookup table unit (LUT0) 101 has an i-th element. The i-th element can be configured to store the original value of the data that the lookup table circuit 10 needs to pre-store. In a second embodiment, the original value stored in the i-th element of the first lookup table unit (LUT0) 101 can be less than or equal to the original value stored in the (i+1)-th element. In a modified embodiment of the second embodiment, the original value stored in the i-th element of the first lookup table unit (LUT0) 101 can also be greater than or equal to the original value stored in the (i+1)-th element. Here, i is a positive integer, and both i and i+1 are less than or equal to... .

[0049] In the second embodiment, the first lookup table unit (LUT4) 101 of the second set of lookup table units LUT-2 includes an input interface and an output interface. Regarding the input / output interface configuration, the first lookup table unit (LUT4) 101 is configured to receive the first input address at the input interface. The first lookup table unit (LUT4) 101 outputs data at the output interface. The bit width of the output data of the first lookup table unit (LUT4) 101 is configured to be 17 bits.

[0050] In terms of circuit connections, the input interface of the first lookup table unit (LUT4) 101 is connected to the input interface of the lookup table circuit 10. The output interface of the first lookup table unit (LUT4) 101 is configured to connect to the input terminal of the selector 107, and is configured to connect to the input terminal of each adder (ADD4, ADD5, ADD6) 105 corresponding to this group of lookup table units, that is, it is configured to connect to the input terminals of adders ADD4, ADD5, and ADD6.

[0051] In terms of element configuration, the first lookup table unit (LUT4) 101 may include The first lookup table unit (LUT4) 101 has an i-th element. The i-th element can be configured to store the original value of the data that the lookup table circuit 10 needs to pre-store. In a second embodiment, the original value stored in the i-th element of the first lookup table unit (LUT4) 101 can be less than or equal to the original value stored in the (i+1)-th element. In a modified embodiment of the second embodiment, the original value stored in the i-th element of the first lookup table unit (LUT4) 101 can also be greater than or equal to the original value stored in the (i+1)-th element. Where i is a positive integer, and both i and i+1 are less than or equal to... .

[0052] It should be noted that the amount of data that the lookup table circuit 10 needs to pre-store can be... Each data item can occupy a bit width of 17 bits. The original value of the data that needs to be pre-stored in the lookup table circuit 10 can be an absolute value.

[0053] Specifically, in the second embodiment, the second lookup table units (LUT1, LUT2, LUT3) 103 of the first set of lookup table units LUT-1 include an input interface and an output interface. Regarding the input / output interface configuration, the second lookup table units (LUT1, LUT2, LUT3) 103 are configured to receive the first input address at the input interface. The second lookup table units (LUT1, LUT2, LUT3) 103 output data at the output interface, and the bit width of the output data of the second lookup table units (LUT1, LUT2, LUT3) 103 is configured to be less than Y bits.

[0054] In terms of circuit connections, the input interface of each second lookup table unit 103 is connected to the input interface of the lookup table circuit 10. The output interface of each second lookup table unit 103 is configured to connect to the input terminal of a corresponding adder 105. For example... Figure 2 As shown, the output interface of LUT1 is configured to connect to the input terminal of ADD1; the output interface of LUT2 is configured to connect to the input terminal of ADD2; and the output interface of LUT3 is configured to connect to the input terminal of ADD3.

[0055] In terms of element configuration, the second lookup table unit (LUT1, LUT2, LUT3) 103 may include The i-th element of the second lookup table unit (LUT1, LUT2, LUT3) 103 can be configured to store the difference between the data to be pre-stored by the lookup table circuit 10 and the data stored in the i-th element of the first lookup table unit 101 of this group of lookup table units, where i is a positive integer, less than or equal to 10 ... .

[0056] In the second embodiment, the second lookup table units (LUT5, LUT6, LUT7) 103 of the second set of lookup table units LUT-2 include an input interface and an output interface. Regarding the input / output interface configuration, the second lookup table units (LUT5, LUT6, LUT7) 103 are configured to receive the first input address at the input interface. The second lookup table units (LUT5, LUT6, LUT7) 103 output data at the output interface, and the bit width of the output data of the second lookup table units (LUT5, LUT6, LUT7) 103 is configured to be less than Y bits.

[0057] In terms of circuit connections, the input interface of each second lookup table unit 103 is connected to the input interface of the lookup table circuit 10. The output interface of each second lookup table unit 103 is configured to connect to the input terminal of a corresponding adder 105. For example... Figure 2 As shown, the output interface of LUT5 is configured to connect to the input of ADD4; the output interface of LUT6 is configured to connect to the input of ADD5; and the output interface of LUT7 is configured to connect to the input of ADD6.

[0058] In terms of element configuration, the second lookup table unit (LUT5, LUT6, LUT7) 103 may include The i-th element of the second lookup table unit (LUT5, LUT6, LUT7) 103 can be configured to store the difference between the data to be pre-stored by the lookup table circuit 10 and the data stored in the i-th element of the first lookup table unit 101 of this group of lookup table units, where i is a positive integer, less than or equal to 10 ... .

[0059] Because the bit width occupied by the difference is smaller than the bit width occupied by the data that the lookup table circuit 10 needs to store, this application stores the difference through the second lookup table unit 103, which can save the element bit width value of the second lookup table unit 103, thereby reducing the combinational logic selection circuit of the second lookup table unit 103, and thus saving the chip area occupied by the lookup table circuit 10.

[0060] In the second embodiment, in each lookup table unit, such as Figure 2 In the first set of lookup table units LUT-1 or the second set of lookup table units LUT-2 shown, the data stored in the i-th element of the j-th second lookup table unit 103 can be less than or equal to the data stored in the i-th element of the (j+1)-th second lookup table unit 103, where j is a positive integer and j+1 is less than or equal to 3. In a modified embodiment of the second embodiment, the data stored in the i-th element of the j-th second lookup table unit can also be greater than or equal to the data stored in the i-th element of the (j+1)-th second lookup table unit, where j is a positive integer and j+1 is less than or equal to 3. This application sets the data stored in the same position of two adjacent second lookup table units 103 to a size relationship of less than or equal to or greater than or equal to. This allows the data stored in the same position of the second lookup table units 103 to be arranged in an ascending or descending order, which makes the difference between the stored elements of the second lookup table units 103 as small as possible. In other words, the bit width occupied by the difference is as small as possible, saving the bit width value of the elements of the second lookup table units 103. This reduces the combinational logic selection circuit of the second lookup table units 103, and thus saves the chip area occupied by the lookup table circuit 10.

[0061] In the second embodiment, in the two sets of lookup table units, the data stored in the i-th element of the first lookup table unit 101 of the first lookup table unit LUT-1 can be less than or equal to the data stored in the i-th element of the first lookup table unit 101 of the second lookup table unit LUT-2. Furthermore, the data stored in the i-th element of the j-th second lookup table unit 103 of the first lookup table unit LUT-1 can be less than or equal to the data stored in the i-th element of the j-th second lookup table unit of the second lookup table unit LUT-2. In a modified embodiment of the first embodiment, in the two sets of lookup table units, the data stored in the i-th element of the first lookup table unit of the first lookup table unit can also be greater than or equal to the data stored in the i-th element of the first lookup table unit of the second lookup table unit. Furthermore, the data stored in the i-th element of the j-th second lookup table unit of the first lookup table unit can also be greater than or equal to the data stored in the i-th element of the j-th second lookup table unit of the second lookup table unit.

[0062] In the second embodiment, the number of adders 105 is the same as the number of second lookup table units 103. In each group of lookup table units, each second lookup table unit corresponds to one adder 105. For example... Figure 2 As shown, in the first set of lookup table units, LUT1 corresponds to ADD1, LUT2 corresponds to ADD2, and LUT3 corresponds to ADD3. In the second set of lookup table units, LUT5 corresponds to ADD4, LUT6 corresponds to ADD5, and LUT7 corresponds to ADD6. In each set of lookup table units, each adder 105 includes two inputs and one output. Adder 105 is used to add the two inputs of the two inputs and output the result from the output. One input of each adder 105 is connected to the output of the first lookup table unit 101. The other input of each adder 105 is connected to the output of its corresponding second lookup table unit 103. The output of each adder 105 is connected to the input of the selector 107. Figure 2 As shown, for each adder 105 corresponding to the first set of lookup table units, one input terminal of ADD1 is connected to the output of LUT0, and the other input terminal of ADD1 is connected to the output of LUT1. ADD1 is used to add the output of LUT0 and the output of LUT1 and then output the result. One input terminal of ADD2 is connected to the output of LUT0, and the other input terminal of ADD2 is connected to the output of LUT2. ADD2 is used to add the output of LUT0 and the output of LUT2 and then output the result. One input terminal of ADD3 is connected to the output of LUT0, and the other input terminal of ADD3 is connected to the output of LUT3. ADD3 is used to add the output of LUT0 and the output of LUT3 and then output the result. For each adder 105 corresponding to the second set of lookup table units, one input of ADD4 is connected to the output of LUT4, and the other input of ADD4 is connected to the output of LUT5. ADD4 is used to add the output of LUT4 and the output of LUT5 and then output the result. One input of ADD5 is connected to the output of LUT4, and the other input of ADD5 is connected to the output of LUT6. ADD5 is used to add the output of LUT4 and the output of LUT6 and then output the result. One input of ADD6 is connected to the output of LUT4, and the other input of ADD6 is connected to the output of LUT7. ADD6 is used to add the output of LUT4 and the output of LUT7 and then output the result.

[0063] In the second embodiment, selector 107 is configured to select one of its inputs and output it according to the second input address, as the output of lookup table circuit 10. Selector 107 includes an input terminal, an output terminal, and a control terminal. The input terminal of selector 107 includes... Each selector 107 has one input. The inputs of selector 107 are configured to correspond one-to-one with the output of the first lookup table unit 101 in each lookup table unit group and the output of each adder 105. For example... Figure 2 As shown, the output of LUT0 is connected to the input of selector 107, and the outputs of ADD1, ADD2, and ADD3 are also connected to the input of selector 107; the output of LUT4 is connected to the input of selector 107, and the outputs of ADD4, ADD5, and ADD6 are also connected to the input of selector 107. The output of selector 107 is configured as the output of lookup table circuit 10, and the control terminal of selector 107 is configured to receive the second input address of the input address of lookup table circuit 10.

[0064] The lookup table circuit provided in the second embodiment of this application sets up a first lookup table unit LUT0 and seven second lookup table units LUT1-LUT7. The output bit width of the first lookup table unit LUT0 is configured to be the bit width of the output data of the lookup table circuit to store the original value of the data that the lookup table circuit needs to store in advance. The output data bit width of the second lookup table units is configured to be smaller than the output data bit width of the lookup table circuit to store the difference of the data that the lookup table circuit needs to store in advance. This saves the bit width occupied by the elements in the lookup table unit. With the help of a small number of adders and selectors, the function of a large lookup table can be realized with a reduction in the number of combinational logic selection circuits. This improves the problem that the current large lookup tables occupy chip area and thus cause a significant increase in chip area.

[0065] It should be noted that the lookup table circuit provided in the second embodiment of this application is a specific example of the lookup table circuit provided in the first embodiment or a modified embodiment of the first embodiment of this application. The first embodiment or a modified embodiment of the first embodiment of this application can be referred to in the detailed description of the second embodiment of this application.

[0066] This application also provides a chip. The chip can be a data processing chip, which may be an FPGA chip with CPU capabilities or an ASIC chip with SOC capabilities. The chip includes the lookup table circuit. The lookup table circuit may be the lookup table circuit provided in the first embodiment of this application or a modified embodiment of the first embodiment. The lookup table circuit may also be the lookup table circuit provided in the second embodiment of this application.

[0067] This application also provides a computer device. The computer device includes the chip provided in this application. It is understood that the computer device can be a server, a mobile terminal, or other similar device. The server may include a single computer device, a server cluster consisting of multiple servers, or a distributed server structure.

[0068] This application uses specific embodiments to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this application specification should not be construed as a limitation of this application.

Claims

1. A lookup table circuit, characterized in that, The input address of the lookup table circuit is configured with a bit width of X bits. The input address of the lookup table circuit includes a first input address and a second input address. The bit width of the first input address is configured with X1 bits, and the bit width of the second input address is configured with X2 bits. Where X, X1, and X2 are all positive integers, and X = X1 + X2. The bit width of the output data of the lookup table circuit is configured as Y bits; The lookup table circuit includes: at least two sets of lookup table units, at least two adders, and a selector, wherein each set of lookup table units corresponds to at least one adder. Each lookup table unit includes a first lookup table unit and at least one second lookup table unit. The input addresses of both the first and second lookup table units are configured with the first input address. The output data width of the first lookup table unit is configured to be Y bits. The first lookup table unit includes 2... X1 The first lookup table unit has 1, and the i-th element is configured to store the original value of the data that the lookup table circuit needs to pre-store, where i is a positive integer, less than or equal to 2. X1 , The bit width of the output data of the second lookup table unit is configured to be less than Y bits. The second lookup table unit includes 2 X1 The i-th element of the second lookup table unit is configured to store the difference between the data that the lookup table circuit needs to pre-store and the data stored in the i-th element of the first lookup table unit. The output data of the first lookup table unit is configured as the input data of the selector and as the input data of each adder corresponding to the lookup table unit in this group. The output data of each second lookup table unit is configured as the input data of a corresponding adder. The output data of each adder is configured as the input data of the selector. The selector is configured to select one of the input data of the selector according to the second input address to output as the output data of the lookup table circuit.

2. The lookup table circuit according to claim 1, characterized in that, The original value stored in the i-th element of the first lookup table unit is less than or equal to the original value stored in the (i+1)-th element, or the original value stored in the i-th element of the first lookup table unit is greater than or equal to the original value stored in the (i+1)-th element, where i+1 is less than or equal to 2. X1 .

3. The lookup table circuit according to claim 1 or 2, characterized in that, The at least two sets of lookup table units comprise N sets of lookup table units, each set comprising one first lookup table unit and M-1 second lookup table units, wherein N×(1+(M-1))=2 X2 N and M are both positive integers greater than or equal to 2.

4. The lookup table circuit according to claim 3, characterized in that, If the number of second lookup table units M-1 is greater than 1, then the data stored in the i-th element of the j-th second lookup table unit is less than or equal to the data stored in the i-th element of the (j+1)-th second lookup table unit, or the data stored in the i-th element of the j-th second lookup table unit is greater than or equal to the data stored in the i-th element of the (j+1)-th second lookup table unit. Where j is a positive integer, and j+1 is less than or equal to M-1.

5. The lookup table circuit according to claim 4, characterized in that, The data stored in the i-th element of the first lookup table unit of the k-th lookup table unit is less than or equal to the data stored in the i-th element of the first lookup table unit of the (k+1)-th lookup table unit; the data stored in the i-th element of the j-th second lookup table unit of the k-th lookup table unit is less than or equal to the data stored in the i-th element of the j-th second lookup table unit of the (k+1)-th lookup table unit. Alternatively, the data stored in the i-th element of the first lookup table unit of the k-th lookup table unit is greater than or equal to the data stored in the i-th element of the first lookup table unit of the (k+1)-th lookup table unit; the data stored in the i-th element of the j-th second lookup table unit of the k-th lookup table unit is greater than or equal to the data stored in the i-th element of the j-th second lookup table unit of the (k+1)-th lookup table unit. Where k is a positive integer, 2≦k+1≦N.

6. The lookup table circuit according to claim 1, characterized in that, In each set of lookup table units, each second lookup table unit corresponds to an adder. Each adder includes two input terminals and one output terminal. Each adder receives the output data of the first lookup table unit from one input terminal, and each adder receives the output data of the corresponding second lookup table unit from the other input terminal. Each adder provides input data to the selector from its output terminal.

7. The lookup table circuit according to claim 1, characterized in that, The selector includes 2 X2 The selector has one input terminal, one output terminal, and one control terminal. The selector receives the output data of the first lookup table unit in each lookup table unit group and the output data of each adder from the input terminal. The selector outputs the output data of the lookup table circuit from the output terminal. The control terminal of the selector is configured to receive the second input address of the input address of the lookup table circuit.

8. The lookup table circuit according to claim 1, characterized in that, The first input address is the lower X1 bit of the input address of the lookup table circuit, and the second input address is the higher X2 bit of the input address of the lookup table circuit.

9. A chip, characterized in that, The chip includes a lookup table circuit as described in any one of claims 1 to 8.

10. A computer device, characterized in that, Includes the chip as described in claim 9.

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