Biometric sensing device and display device including the same

Abstract

Embodiments of the present disclosure provide a biometric sensing device and a display device including the same. The biometric sensing device includes a first thin-film transistor, a second thin-film transistor, and a photodiode. The first thin-film transistor has a gate. The second thin-film transistor has a semiconductor layer and a non-gate electrode terminal. The non-gate electrode terminal is electrically connected to the gate of the first thin-film transistor. The photodiode contacts the semiconductor layer.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to an electronic device, and more particularly to a biometrics sensing device and a display device including the same. Background Art

[0002] As the application of electronic devices continues to expand, display technology is also advancing rapidly. As the use of electronic devices and user habits and needs evolve, the requirements for their structure and quality are becoming increasingly stringent, leading to various challenges facing these devices. For example, the sensitivity of sensor elements in electronic devices is affected by the equivalent capacitance of the circuit. Therefore, the research and development of electronic devices requires continuous updates and adjustments. Summary of the Invention

[0003] The present disclosure is directed to a biometric identification sensing device and a display device including the same, which can improve photoelectric conversion efficiency and have good sensitivity or electrical quality.

[0004] According to an embodiment of the present disclosure, a biometric sensing device includes a first thin-film transistor, a second thin-film transistor, and a photodiode. The first thin-film transistor has a gate. The second thin-film transistor has a semiconductor layer and a non-gate electrode terminal. The non-gate electrode terminal is electrically connected to the gate of the first thin-film transistor. The photodiode contacts the semiconductor layer.

[0005] According to an embodiment of the present disclosure, a display device includes a display panel and a biometrics sensing device disposed under the display panel.

[0006] In summary, in a biometric sensing device or a display device including the same according to an embodiment of the present disclosure, since the sensing circuit can control the second thin-film transistor via a drive signal, the second thin-film transistor can be turned on during the sensing value readout period, causing the charge stored in the photodiode to be selectively transferred to the floating diffusion node due to the charge transfer effect. Therefore, the charge on the floating diffusion node is essentially the charge transferred from the photodiode. The equivalent capacitance on the floating diffusion node can be reduced. Consequently, the photoelectric conversion efficiency of the biometric sensing device or its sensing circuit can be improved. The biometric sensing device can have good sensitivity or electrical quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 A schematic diagram of a sensing circuit of a biometric sensing device according to an embodiment of the present disclosure;

[0008] Figure 2 This is a signal timing diagram of a sensing circuit according to an embodiment of the present disclosure;

[0009] Figure 3A schematic cross-sectional view of a biometric sensing device according to an embodiment of the present disclosure;

[0010] Figure 4 A schematic cross-sectional view of a biometric sensing device according to another embodiment of the present disclosure;

[0011] Figure 5 is a cross-sectional schematic diagram of a biometric sensing device according to another embodiment of the present disclosure;

[0012] Figure 6 FIG. 1 is a cross-sectional schematic diagram of a display device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0013] The present disclosure will be understood by referring to the following detailed description in conjunction with the accompanying drawings. It should be noted that, for ease of understanding and for the sake of simplicity, many of the drawings in this disclosure depict only portions of electronic devices, and certain components in the drawings are not drawn to scale. Furthermore, the number and dimensions of components in the drawings are for illustrative purposes only and are not intended to limit the scope of this disclosure.

[0014] Throughout this disclosure and the claims that follow, certain words will be used to refer to specific components. It will be understood by those skilled in the art that electronic equipment manufacturers may refer to the same components by different names. This document does not intend to distinguish between components that have the same function but different names. In the following description and claims, words such as "include," "contain," and "have" are open-ended words and should therefore be interpreted as meaning "including but not limited to..." Therefore, when the terms "include," "contain," and / or "have" are used in the description of this disclosure, they specify the presence of corresponding features, regions, steps, operations, and / or components, but do not exclude the presence of one or more corresponding features, regions, steps, operations, and / or components.

[0015] Directional terms used herein, such as "up," "down," "front," "back," "left," "right," etc., are used only with reference to the directions in the accompanying drawings. Therefore, the directional terms used are for illustrative purposes only and are not intended to limit the present disclosure. In the accompanying drawings, each figure illustrates the general characteristics of the methods, structures, and / or materials used in particular embodiments. However, these figures should not be construed as defining or limiting the scope or nature of the embodiments. For example, the relative sizes, thicknesses, and positions of various layers, regions, and / or structures may be reduced or exaggerated for clarity.

[0016] In the present disclosure, the length and width may be measured using an optical microscope, and the thickness may be measured using a cross-sectional image from an electron microscope, but the present invention is not limited thereto.

[0017] The terms "approximately," "equal to," "equal," or "same," "substantially," or "approximately" are generally interpreted as meaning within a range of 20% of a given value, or within a range of 10%, 5%, 3%, 2%, 1% or 0.5% of a given value.

[0018] In this disclosure, when a structure (or layer, component, or substrate) is located on top of another structure (or layer, element, or substrate), this may mean that the two structures are adjacent and directly connected, or that the two structures are adjacent but not directly connected. Indirect connection means that at least one intervening structure (or intervening layer, intervening component, intervening substrate, or intervening spacer) is present between the two structures. The bottom surface of one structure is adjacent to or directly connected to the top surface of the intervening structure, and the top surface of the other structure is adjacent to or directly connected to the bottom surface of the intervening structure. The intervening structure may be composed of a single or multiple layers of physical or non-physical structures, without limitation. In this disclosure, when a structure is disposed "on" another structure, this may mean that the structure is "directly" on the other structure, or that the structure is "indirectly" on the other structure, i.e., at least one structure is interposed between the two structures.

[0019] The terms "first," "second," etc., within this disclosure may be used herein to describe various elements, components, regions, layers, and / or parts, but these elements, components, regions, and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Therefore, the "first element," "component," "region," "layer," or "part" discussed below is used to distinguish it from the "second element," "component," "region," "layer," or "part," and is not used to limit the order or specific elements, components, regions, layers, and / or parts. Moreover, the "first" element referred to in a description paragraph may be renamed the "second" element in the claims.

[0020] The electronic device may have a display function, wherein the display device of the embodiment of the present disclosure may include a display device, an antenna device, a sensing device, a splicing device or a transparent display device, but is not limited thereto. The electronic device may be a rollable, stretchable, bendable or flexible electronic device. The electronic device may, for example, include liquid crystal, light emitting diode (LED), quantum dot (QD), fluorescence, phosphorescence or other suitable materials and their materials may be arranged and combined in any manner or other suitable display media, or a combination of the foregoing; the light emitting diode may, for example, include an organic light emitting diode (OLED), millimeter / sub-millimeter light emitting diode (mini LED), micro LED or quantum dot light emitting diode (QD, which may be, for example, QLED, QDLED), but is not limited thereto. The antenna device may, for example, be a liquid crystal antenna, but is not limited thereto. The splicing device may, for example, be a display splicing device or an antenna splicing device, but is not limited thereto. It should be noted that the electronic device may be any of the aforementioned arrangements and combinations, but is not limited thereto. Furthermore, the electronic device may have a rectangular, circular, polygonal shape, a shape with curved edges, or other suitable shapes. The electronic device may include peripheral systems such as a drive system, a control system, a light source system, a shelving system, etc. to support the display device, antenna device, or splicing device. The following description of this disclosure will be based on a biometric sensor device and a display device incorporating the same, but the disclosure is not limited thereto.

[0021] In the present disclosure, the various embodiments described below may be mixed and matched without departing from the spirit and scope of the present disclosure. For example, some features of one embodiment may be combined with some features of another embodiment to form another embodiment.

[0022] Reference will now be made in detail to exemplary embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.

[0023] Figure 1 FIG. 1 is a schematic diagram of a sensing circuit of a biometric sensing device according to an embodiment of the present disclosure. Figure 2 FIG. 1 is a signal timing diagram of a sensing circuit according to an embodiment of the present disclosure. Figure 3 This is a cross-sectional diagram of a biometric sensing device according to an embodiment of the present disclosure. Figure 3 Some components are omitted. Figure 1 、 Figure 2 and Figure 3In one embodiment of the present disclosure, the biometric sensing device 10 is a fingerprint sensing device, but is not limited thereto. In other embodiments, the biometric sensing device 10 includes a face sensing device, a palm print sensing device, an iris sensing device, a retina sensing device, or other suitable biometric sensing devices. The biometric sensing device 10 is, for example, a sensing circuit. The biometric sensing device 10 includes a first thin film transistor T1, a second thin film transistor T2, and a photodiode PD. The first thin film transistor T1 has a gate G1. The second thin film transistor T2 has a semiconductor layer PS2 and an electrode terminal (e.g., a non-gate G2) Figure 1 The second end D2 shown, which may be a source or a drain). The electrode end of the non-gate G2 is electrically connected to the gate G1 of the first thin film transistor T1. The second thin film transistor T2 is connected to the first thin film transistor T1 at a floating diffusion node FD (floating diffusion). At least a portion of the semiconductor layer PS2 may be extended. The photodiode PD contacts the at least a portion of the semiconductor layer PS2, but is not limited thereto. In some embodiments, the biometric sensing device 10 further includes a third thin film transistor T3 and a fourth thin film transistor T4. The third thin film transistor T3 is electrically connected to the gate G1 of the first thin film transistor T1. The fourth thin film transistor T4 is electrically connected to the electrode end of the non-gate G1 of the first thin film transistor T1 (for example Figure 1 (The first terminal S1 shown in FIG3 may be a source or drain.) Under the above configuration, after the third thin-film transistor T3 is reset, the stored charge in the photodiode PD is transferred to the floating diffusion node FD via the second thin-film transistor T2. This reduces the equivalent capacitance of the floating diffusion node FD. This improves photoelectric conversion efficiency, resulting in improved sensitivity and electrical quality for the biometric sensing device 10.

[0024] Please continue to refer to Figure 1 and Figure 3The biometric sensing device 10 includes a substrate 100 and a sensing circuit BC disposed on the substrate 100. The sensing circuit BC includes a plurality of thin film transistors (TFTs), a data line DL, and a photodiode PD. The plurality of TFTs include, for example, a first TFT T1, a second TFT T2, a third TFT T3, and a fourth TFT T4. Each TFT includes a gate and a non-gate electrode (e.g., a first terminal or a second terminal). In this embodiment, the gate G1 of the first TFT T1 and the non-gate electrode of the second TFT T2 are electrically connected to a floating diffusion node FD. Specifically, the non-gate electrode of the second TFT T2 includes a first terminal S2 (e.g., the source of the second TFT T2) and a second terminal D2 (e.g., the drain of the second TFT T2). The first terminal S2 is electrically connected to the photodiode PD. The second terminal D2 is electrically connected to the gate G1 of the first TFT T1 at the floating diffusion node FD. The second terminal D1 of the first TFT T1 is coupled to a first voltage source VCC0. In the above configuration, the first thin film transistor T1 can be a source follower and have a signal amplification application. In addition, the gate G2 of the second thin film transistor T2 can receive a signal Tx (eg, a driving signal) to determine the switching of the second thin film transistor T2.

[0025] One end of the photodiode PD can be electrically connected to the first end S2 of the second thin-film transistor T2. The other end of the photodiode PD is coupled to a third voltage source VEE. When the photodiode PD is irradiated by optical radiation, current or charge can be generated and stored in the photodiode PD. The optical radiation can include, for example, visible light, ultraviolet light, infrared light, X-rays, microwaves, or other suitable radiation types. Under the above configuration, the signal Tx can control the second thin-film transistor T2 to determine whether to transfer the charge in the photodiode PD to the floating diffusion node FD and the gate G1 of the first thin-film transistor T1.

[0026] The non-gate electrode terminal of the third thin-film transistor T3 is electrically connected to the gate G1 of the first thin-film transistor T1. For example, a first terminal S3 of the third thin-film transistor T3 (e.g., the source or drain of the third thin-film transistor T3) is electrically connected to the gate G1 of the first thin-film transistor T1 at a floating diffusion node FD. A second terminal D3 of the third thin-film transistor T3 (e.g., the source or drain of the third thin-film transistor T3) is coupled to the second voltage source VCC1. In some embodiments, the gate G3 of the third thin-film transistor T3 can receive a signal RST to determine whether the third thin-film transistor T3 is on or off. In some embodiments, the voltage of the third voltage source VEE can be lower than the voltage of the first voltage source VCC0 or the voltage of the second voltage source VCC1, but is not limited thereto.

[0027] In some embodiments, the second voltage source VCC1 can be a reset voltage. The signal RST can be a reset signal. In other words, the third thin-film transistor T3 can be a reset thin-film transistor (reset TFT). Under the above configuration, the signal RST can control the third thin-film transistor T3 to reset the voltages of the floating diffusion node FD and the gate G1 of the first thin-film transistor T1. Furthermore, the voltage at the floating diffusion node FD can be used to control the switching of the first thin-film transistor T1.

[0028] The non-gate electrode terminal of the fourth thin-film transistor T4 is electrically connected to the non-gate electrode terminal of the first thin-film transistor T1. For example, the second terminal D4 of the fourth thin-film transistor T4 (e.g., the source or drain of the fourth thin-film transistor T4) is electrically connected to the first terminal S1 of the first thin-film transistor T1. The first terminal S4 of the fourth thin-film transistor T4 (e.g., the source or drain of the fourth thin-film transistor T4) is coupled to the data line DL. In some embodiments, the gate G4 of the fourth thin-film transistor T4 can receive a signal SEL to determine whether the fourth thin-film transistor T4 is on or off.

[0029] In some embodiments, the signal SEL may be a selection signal. That is, the fourth thin-film transistor T4 may be a selector thin-film transistor (TFT). Under the above configuration, the signal SEL may control the fourth thin-film transistor T4 so that, during a read operation, the signal from the first voltage source VCC0 of the first thin-film transistor T1 is transmitted to the data line DL through the fourth thin-film transistor T4, allowing the signal to be read in a subsequent step.

[0030] In some embodiments, the data line DL may be selectively coupled to a signal reading element (not shown) to read the signal transmitted from the first terminal S4 of the fourth thin-film transistor T4 to the data line DL, but the present invention is not limited thereto. In this embodiment, the sensing circuit BC may be a 4T active pixel sensor (APS) including four thin-film transistors (TFTs), but the present invention is not limited thereto.

[0031] The thin film transistors in the disclosed embodiments (eg, the first thin film transistor T1, the second thin film transistor T2, the third thin film transistor T3, and the fourth thin film transistor T4) may include a semiconductor layer (eg, Figure 3 , semiconductor layer PS1, semiconductor layer PS2, semiconductor layer PS3 and semiconductor layer PS4 are shown in the figure. The material of the semiconductor layer includes, for example, amorphous silicon, low temperature polysilicon (LTPS) or metal oxide or other suitable materials, but is not limited thereto. The thin film transistor can be a thin film transistor including a top gate, a bottom gate or a dual gate or double gate, or a combination of the above materials, but is not limited thereto. In some embodiments, the thin film transistor can have the above different semiconductor materials. The first end and the second end of the thin film transistor disclosed herein (such as the first thin film transistor T1, the second thin film transistor T2, the third thin film transistor T3 and the fourth thin film transistor T4) can be the source and the drain, respectively, but the disclosure is not limited thereto. In addition, the gate of the thin film transistor can be regarded as the control end of the thin film transistor. In addition, the gate of the thin film transistor disclosed herein can include polysilicon, metal or other conductive materials, but is not limited thereto. The aforementioned metals include, but are not limited to, copper (Cu), aluminum (Al), molybdenum (Mo), tungsten (W), gold (Au), chromium (Cr), nickel (Ni), platinum (Pt), or titanium (Ti). The material of the source and drain electrodes of the thin film transistor disclosed herein may include, but are not limited to, metals such as copper (Cu), aluminum (Al), molybdenum (Mo), tungsten (W), gold (Au), chromium (Cr), nickel (Ni), platinum (Pt), or titanium (Ti).

[0032] The following will be passed Figure 1 and Figure 2 The control method of the sensing circuit BC is briefly described.

[0033] In this embodiment, the sensing circuit BC can be divided into multiple periods within a frame, depending on the user's design, including a pre-reset period, a reset period, an exposure period, a reference value readout period, and a sensed value readout period. In some embodiments, each frame can be defined as the period between time t0 and time t6. In some embodiments, each frame can be 50 milliseconds or longer, but is not limited thereto.

[0034] Specifically, first, before time t0 , the reset signal RST, the driving signal Tx, and the selection signal SEL are at low voltage levels.

[0035] Then, during the pre-reset period (pre-reset) from time t0 to time t1, the reset signal RST and the drive signal Tx are switched to a high voltage level. Therefore, the gates G3 and G2 of the third thin-film transistor T3 and the second thin-film transistor T2 receive the reset signal RST and the drive signal Tx, respectively. The third thin-film transistor T3 and the second thin-film transistor T2 are turned on (i.e., in a conductive state). The selection signal SEL still maintains a low voltage level, which means that the fourth thin-film transistor T4 is turned off (i.e., in a non-conductive state). In addition, the drive signal Tx is switched to a low voltage level before time t1, and the reset signal RST is switched to a low voltage level at time t1. In other words, the second thin-film transistor T2 is turned off before the third thin-film transistor T3.

[0036] During the pre-reset period, the voltage of the floating diffusion node FD connected to the gate G1 of the first thin film transistor T1 , the first end S2 of the second thin film transistor T2 , and the first end S3 of the third thin film transistor T3 may be reset according to the voltage of the second voltage source VCC1 .

[0037] Next, during the reset period (reset) from time t2 to time t3, the reset signal RST and the drive signal Tx are switched to a high voltage level. The select signal SEL remains at a low voltage level. The drive signal Tx is switched to a low voltage level before time t3, and the reset signal RST is switched to a low voltage level at time t3. In other words, the second thin-film transistor T2 is turned off before the third thin-film transistor T3. Similar to the pre-reset period, during the reset period, the voltage of the floating diffusion node FD and the voltage of the first terminal S2 of the second thin-film transistor T2 can be reset, so this description will not be repeated.

[0038] In some embodiments, the pre-reset period and the reset period may be combined into one reset period, but the present invention is not limited thereto. In other embodiments, only one of the pre-reset period and the reset period may be performed, but the present invention is not limited thereto.

[0039] Next, during the exposure period from time t3 to time t4, the reset signal RST, the drive signal Tx, and the selection signal SEL are at low voltage levels. During the exposure period, light radiation irradiates the photodiode PD of the sensing circuit BC, generating current and storing charge in the photodiode PD.

[0040] Then, during the reference value readout period from time t4 to time t5, at time t4, the reset signal RST and the selection signal SEL are switched to a high voltage level. The drive signal Tx is a low voltage level. Therefore, the gates G3 and G4 of the third thin film transistor T3 and the fourth thin film transistor T4 receive the reset signal RST and the selection signal SEL, respectively. The third thin film transistor T3 and the fourth thin film transistor T4 are turned on. Before time t5, the reset signal RST is switched to a low voltage level to turn off the third thin film transistor T3. During the reference value readout period, the voltage of the floating diffusion node FD is, for example, a background value before exposure, and can be output to the data line DL through the first thin film transistor T1 and the fourth thin film transistor T4. The signal reading element coupled to the data line DL can set the read background value as the first signal.

[0041] Next, during the sensing value readout period from time t5 to time t6, at time t5, the drive signal Tx is switched to a high voltage level. The select signal SEL is at a high voltage level from time t4 to time t6. In addition, the reset signal RST is at a low voltage level. Therefore, the gates G2 and G4 of the second thin-film transistor T2 and the fourth thin-film transistor T4 receive the drive signal Tx and the select signal SEL, respectively. The second thin-film transistor T2 and the fourth thin-film transistor T4 are turned on. Before time t5, the drive signal Tx is switched to a low voltage level, turning off the second thin-film transistor T2.

[0042] When the second thin-film transistor T2 is turned on by a drive signal Tx, the charge stored in the photodiode PD is selectively transferred to the floating diffusion node FD, which is used to control the switching of the first thin-film transistor T1. During the sensed value readout period, the voltage at the floating diffusion node FD represents, for example, the sensed voltage of the photodiode PD after exposure, and can be output to the data line DL via the first thin-film transistor T1 and the fourth thin-film transistor T4. A signal reading element coupled to the data line DL can set the read sensed value as the second signal.

[0043] Then, the signal reading element can compare the first signal (background value) with the second signal (sensing value) to obtain optical information.

[0044] It is worth noting that the sensitivity of the sensing circuit BC can be defined by the following equation 1:

[0045] QE × CG = Sensitivity (Formula 1)

[0046] Where QE is the quantum efficiency of the photodiode (PD), and CG is the conversion gain. The conversion gain can be defined by the following equation 2:

[0047]

[0048] Where q is the charge of the photodiode PD, and C FD is the equivalent capacitance on the floating diffusion node FD. The quantum efficiency QE depends on the material and is a constant. Therefore, the equivalent capacitance C on the floating diffusion node FD is FD The lower the value, the higher the photoelectric conversion efficiency CG. The higher the photoelectric conversion efficiency CG, the higher the sensitivity of the sensing circuit BC.

[0049] When the driving signal Tx controls the second thin film transistor T2 to be turned on, the charge stored in the photodiode PD is selectively transferred to the floating diffusion node FD due to the charge transfer effect. Compared with the sensing circuit without the second thin film transistor T2, the equivalent capacitance C on the floating diffusion node FD is FD Including the equivalent capacitance of the photodiode PD and the equivalent capacitance of the third thin film transistor T3, the equivalent capacitance C on the floating diffusion node FD of this embodiment is FD Because the equivalent capacitance of the photodiode PD is not included, it can be reduced. Under the above configuration, the photoelectric conversion efficiency CG of the sensing circuit BC of this embodiment can be improved. The biometric sensing device 10 or its sensing circuit BC can have good sensitivity or electrical quality.

[0050] The following will be passed Figure 1 and Figure 3 Next, the structure of the biometrics sensing device 10 will be described.

[0051] The substrate 100 of one embodiment of the present disclosure may be a hard substrate or a flexible substrate. The material of the substrate 100 includes glass, quartz, ceramic, sapphire or plastic or other suitable materials, but is not limited thereto. In another embodiment, the material of the substrate 110 may include a suitable opaque material. In some embodiments, when the substrate 110 is a flexible substrate, it may include a suitable flexible material, such as polycarbonate (PC), polyimide (PI), polypropylene (PP) or polyethylene terephthalate (PET), other suitable materials or a combination of the foregoing materials, but is not limited thereto. In addition, the transmittance of the substrate 110 is not limited, that is, the substrate 110 may be a transparent substrate, a semi-transparent substrate or an opaque substrate.

[0052] In some embodiments, the biometric sensing device 10 may optionally include a buffer layer 111 and a buffer layer 112. The buffer layer 111 and the buffer layer 112 are sequentially disposed on the substrate 100 in the normal direction (i.e., the Z-axis) of the substrate 100. The materials of the buffer layers 111 and 112 include, but are not limited to, silicon nitride, silicon oxide, or silicon oxynitride.

[0053] The biometric sensing device 10 includes multiple insulating material layers sequentially disposed on a substrate 100 along the Z-axis. For example, the biometric sensing device 10 includes an insulating layer 120, a gate insulating layer GI, an insulating layer 130, an insulating layer 140, an insulating layer 150, an insulating layer 160, an insulating layer 170, an insulating layer 181, an insulating layer 182, an insulating layer 183, and an insulating layer 190 stacked sequentially along the Z-axis. The insulating layer 120, the gate insulating layer GI, the insulating layer 130, the insulating layer 140, the insulating layer 150, the insulating layer 160, the insulating layer 170, the insulating layer 181, the insulating layer 182, the insulating layer 183, and the insulating layer 190 can be a single layer or a multi-layer structure, and their materials, for example, are insulating materials. For example, it may include an organic material, an inorganic material, or a combination thereof. The organic material may include polyethylene terephthalate (PET), polyethylene (PE), polyethersulfone (PES), polycarbonate (PC), polymethylmethacrylate (PMMA), polyimide (PI), photosensitive polyimide (PSPI), or a combination thereof, and the inorganic material may include silicon nitride, silicon oxide, silicon oxynitride, or a combination thereof, but is not limited thereto.

[0054] The sensing circuit BC is arranged in the above-mentioned multi-layer insulating layer. For example, the first thin film transistor T1, the second thin film transistor T2, the third thin film transistor T3 and the fourth thin film transistor T4 are arranged on the buffer layer 112 and are covered by the insulating layer 120, the gate insulating layer GI, the insulating layer 130, the insulating layer 140, the insulating layer 150 and the insulating layer 160, but are not limited thereto. The above-mentioned thin film transistors respectively include a semiconductor layer, a gate (i.e., a control end), a source (i.e., a first end) and a drain (i.e., a second end). In some embodiments, the semiconductor layers of multiple thin film transistors can be formed by patterning a layer of semiconductor material. In other embodiments, the semiconductor layers of each thin film transistor can be formed separately, and the embodiments disclosed herein are not limited thereto. The semiconductor layer can be formed into an N-type doped region by doping with group V elements, such as arsenic (As), phosphorus (P), other group V elements or a combination thereof.

[0055] The semiconductor layer PS1 of the first thin-film transistor T1, the semiconductor layer PS2 of the second thin-film transistor T2, the semiconductor layer PS3 of the third thin-film transistor T3, and the semiconductor layer PS4 of the fourth thin-film transistor T4 are disposed on the buffer layer 112. An insulating layer 120 covers the semiconductor layers PS1, PS2, PS3, and PS4. The gate G1 of the first thin-film transistor T1 overlaps the semiconductor layer PS1. The gate G2 of the second thin-film transistor T2 overlaps the semiconductor layer PS2. The gate G3 of the third thin-film transistor T3 overlaps the semiconductor layer PS3. The gate G4 of the fourth thin-film transistor T4 overlaps the semiconductor layer PS4. Gate insulating layers GI are located between the gates G1, G2, G3, and G4 and the semiconductor layers PS1, PS2, PS3, and PS4, respectively.

[0056] The insulating layer 130 and the insulating layer 140 are disposed on the gates G1 , G2 , G3 , and G4 and the semiconductor layers PS1 , PS2 , PS3 , and PS4 . The insulating layer 150 is disposed on the insulating layer 140 .

[0057] The conductive layer M2 is disposed on the insulating layer 140. After patterning, the conductive layer M2 can serve as a non-gate electrode terminal of the thin film transistor, such as a source (i.e., a first terminal) or a drain (i.e., a second terminal), and be electrically connected to the semiconductor layer. The first terminal or the second terminal of the thin film transistor can respectively contact the N-type doped region to electrically connect to the semiconductor layer. For example, the second terminal D2 (marked at Figure 1 ) may contact the first doping region NP2. In addition, the third thin film transistor T3 may contact the first doping region NP2, but is not limited thereto.

[0058] In some embodiments, the semiconductor layer PS2 of the second thin film transistor T2 further includes a portion of the semiconductor layer PS2 overlapping the gate G2. Figure 3 The second doped region NM2 extends to the left, but is not limited thereto. At least a portion of the second doped region NM2 extending from the semiconductor layer PS2 may overlap with the photodiode PD, as will be described in subsequent paragraphs. The second doped region NM2 may be doped to serve as an N-type doped region. For example, the first end S2 (marked at) of the second thin film transistor T2 Figure 1 ) may be the second doping region NM2. In some embodiments, the doping concentration in the first doping region NP2 is greater than the doping concentration in the second doping region NM2.

[0059] In this embodiment, the second doped region NM2 may overlap the photodiode PD along the Z-axis. The structural relationship between the photodiode PD and the second doped region NM2 will be described in the following paragraphs.

[0060] Insulating layers 150, 160, and 170 are disposed on the insulating layer and cover the sensing circuit BC (including the first thin-film transistor T1, the second thin-film transistor T2, the third thin-film transistor T3, and the fourth thin-film transistor T4). The insulating layers 120, 130, 140, 150, 160, and 170 may include an opening O1. The opening O1 penetrates the insulating layers 120, 130, 140, 150, 160, and 170 and overlaps the second doped region NM2.

[0061] The conductive layer M3 is disposed on the insulating layer 170 and can be used to reduce the impedance of the photodiode PD. For example, the conductive layer M3 may partially overlap the first thin-film transistor T1, the second thin-film transistor T2, the third thin-film transistor T3, and the fourth thin-film transistor T4 along the Z-axis, but this is not limited to this. The material of the conductive layer M3 can be similar to that of the conductive layer M2 and is not further described here.

[0062] The photodiode PD is disposed on the insulating layer 170. The photodiode PD is, for example, a photodetector, and includes a first doped semiconductor material layer PN, a second doped semiconductor material layer PP, and an intrinsic semiconductor material layer PI located between the first doped semiconductor material layer PN and the second doped semiconductor material layer PP. The first doped semiconductor material layer PN and the second doped semiconductor material layer PP are of opposite doping types. For example, the first doped semiconductor material layer PN may be of N-type doping type, and the second doped semiconductor material layer PP may be of P-type doping type, but the present invention is not limited thereto. In some embodiments, the material of the intrinsic semiconductor material layer PI includes, for example, amorphous silicon. The first doped semiconductor material layer PN may include amorphous silicon doped with a Group V element such as phosphorus, arsenic, antimony, or bismuth. The second doped semiconductor material layer PP may include amorphous silicon doped with a Group III element such as boron, aluminum, gallium, or indium.

[0063] In some embodiments, the first doped semiconductor material layer PN extends from above the insulating layer 170 into the opening O1, then extends onto the insulating layer 170 and contacts the conductive layer M3. The first doped semiconductor material layer PN contacts the second doped region NM2 of the semiconductor layer PS2 of the second thin-film transistor T2 in the opening O1. Under the above configuration, the second doped region NM2 serves as the lower electrode of the photodiode PD. In this embodiment, the photodiode PD can be used to receive visible light and convert it into an electrical signal. That is, the photodiode PD of this embodiment is, for example, a visible light sensor. However, the present disclosure is not limited to this. In other embodiments, the photodiode PD can also be used to detect light having other wavelength ranges.

[0064] A transparent electrode (ITO) 1 is disposed on the second doped semiconductor material layer PP. The transparent electrode (ITO) 1 serves as the top electrode of the photodiode (PD). The material of the transparent electrode (ITO) 1 can be, but is not limited to, indium tin oxide, indium zinc oxide, aluminum zinc oxide, aluminum indium oxide, indium oxide, gallium oxide, carbon nanotubes, silver nanoparticles, a metal or alloy with a thickness of less than 60 nanometers, an organic transparent conductive material, or other suitable transparent conductive materials.

[0065] Insulating layers 181, 182, and 183 are partially disposed on transparent electrode ITO 1. Transparent electrode ITO 2 is disposed on insulating layers 181, 182, and 183 and contacts the portion of transparent electrode ITO 1 not covered by insulating layers 181, 182, and 183. The material of transparent electrode ITO 2 is similar to that of transparent electrode ITO 1 and is therefore not further described here.

[0066] The insulating layer 190 is disposed on the transparent electrode ITO2 to protect the transparent electrode ITO1 and the transparent electrode ITO2 from being affected by external water and oxygen, but the present invention is not limited thereto.

[0067] It is noteworthy that the doping concentration of the first doped semiconductor material layer PN of the photodiode PD is lower than the doping concentration of the second doped region NM2 of the semiconductor layer PS2 of the second thin-film transistor T2, and the doping concentration of the second doped region NM2 is lower than the doping concentration of the first doped region NP2. In other words, the doping concentration of the first doped region NP2 of the semiconductor layer PS2 is higher than the doping concentration of the second doped region NM2, and the doping concentration of the second doped region NM2 is higher than the doping concentration of the first doped semiconductor material layer PN. As a result, the potential of the second doped region NM2 contacting the photodiode PD can be higher than the potential of the first doped region NP2. The potential of the semiconductor layer PS2 of the second thin-film transistor T2 overlapping the gate G2 can be higher than the potential of the second doped region NM2. During the sensed value readout period, when the gate G2 receives the drive signal Tx, the second thin-film transistor T2 can be turned on, thereby lowering the potential of the semiconductor layer PS2 overlapping the gate G2. In this way, the current generated by the photodiode PD can flow from the region of high potential energy to the region of low potential energy, that is, the current flows from the first doped semiconductor material layer PN to the second doped region NM2, and then from the second doped region NM2 to the first doped region NP2, thereby transferring the charge of the photodiode PD to the floating diffusion node FD connected to the second thin film transistor T2 and the third thin film transistor T3 (shown in FIG. Figure 1 ). Therefore, the equivalent capacitance of the floating diffusion node FD can be reduced. Under the above configuration, the photoelectric conversion efficiency CE of the biometric sensing device 10 and its sensing circuit BC can be improved. The biometric sensing device 10 can have good sensitivity or electrical quality.

[0068] The following examples are provided for illustration purposes only. It should be noted that the following examples share the same component numbers and some of the details as the previous examples, with the same numbers used to represent the same or similar components, and descriptions of the same technical details omitted. For the omitted details, please refer to the previous examples, and the following examples will not be repeated.

[0069] Figure 4 This is a cross-sectional diagram of another embodiment of the biometric sensing device disclosed herein. For the sake of clarity and convenience of illustration, Figure 4 The biometrics sensing device 10A of this embodiment is generally similar to Figure 3The present embodiment differs from the biometric sensing device 10 in that the gate G2 of the second thin-film transistor T2 is disposed on the substrate 100 and is covered by the buffer layer 111. For example, the second thin-film transistor T2 may be a bottom-gate transistor. For example, one end of the gate G2 overlaps the first doped region NP2 of the semiconductor layer PS2, and the other end of the gate G2 may completely overlap the portion of the semiconductor layer PS2 that contacts the first doped semiconductor material layer PN, but the present invention is not limited thereto. In some embodiments, a portion of the gate G2 may overlap the opening O1 and the photodiode PD.

[0070] The channel region CH of the semiconductor layer PS2 may partially overlap the opening O1. The channel region CH may contact the photodiode PD located in the opening O1. Specifically, the first doped semiconductor material layer PN of the photodiode PD contacts the channel region CH of the semiconductor layer PS2 in the opening O1. In some embodiments, the channel region CH includes undoped semiconductor material. Under the above-mentioned setting, the potential energy of the channel region CH contacting the photodiode PD may be higher than the potential energy of the first doped region NP2. During the sensing value readout, when the gate G2 receives the driving signal Tx, the second thin film transistor T2 may be turned on to reduce the potential of the semiconductor layer PS2 overlapping the gate G2. In this way, the current generated by the photodiode PD may flow from the area of ​​high potential energy to the area of ​​low potential energy, that is, the current flows from the first doped semiconductor material layer PN to the channel region CH of the semiconductor layer PS2, and then from the channel region CH of the semiconductor layer PS2 to the first doped region NP2, thereby transferring the charge of the photodiode PD to the floating diffusion node FD (shown in FIG. 1 ) connected to the second thin film transistor T2 and the third thin film transistor T3. Figure 1 Under the above configuration, the biometrics sensing device 10A can achieve excellent technical effects similar to those of the above embodiment.

[0071] Figure 5 This is a cross-sectional diagram of a biometric sensing device according to another embodiment of the present disclosure. Figure 5 The biometrics sensing device 10B of this embodiment is generally similar to Figure 4Since the biometric sensing device 10A is described above, the components identical or similar between the two embodiments will not be reiterated here. This embodiment differs from the biometric sensing device 10A primarily in that the gate electrode G2 of the second thin-film transistor T2 partially overlaps the portion of the semiconductor layer PS2 that contacts the first doped semiconductor material layer PN. The portion of the semiconductor layer PS2 extending from the cutoff end to the aforementioned contact portion approximately at the center of the opening O1 can be doped to form a second doped region NM2'. In other words, the second doped region NM2' is located within a portion of the opening O1 and contacts a portion of the first doped semiconductor material layer PN within the opening O1.

[0072] The gate G2 partially overlaps the channel region CH, and the gate G2 also partially overlaps the second doped region NM2'. Under the above configuration, the first doped semiconductor material layer PN can contact a portion of the second doped region NM2'. Because the impedance of the second doped region NM2' can be lower than that of the undoped semiconductor layer PS2, the speed of electron movement can be increased, further improving the electrical quality of the second thin-film transistor T2 or the biometric sensing device 10B. In addition, the potential energy of the channel region CH of the semiconductor layer PS2 contacting the photodiode PD can be higher than the potential energy of the first doped region NP2. During the sensing value readout period, when the gate G2 receives the drive signal Tx, the second thin-film transistor T2 can be turned on to lower the potential of the semiconductor layer PS2 overlapping the gate G2. In this way, the current generated by the photodiode PD can flow from the high potential energy region to the low potential energy region, that is, the current flows from the first doped semiconductor material layer PN to the channel region CH of the semiconductor layer PS2 and the second doped region NM2', and then flows from the channel region CH of the semiconductor layer PS2 to the first doped region NP2, thereby transferring the charge of the photodiode PD to the floating diffusion node FD connected to the second thin film transistor T2 and the third thin film transistor T3 (shown in FIG. Figure 1 With the above configuration, the biometrics sensing device 10B can achieve similar excellent technical effects as the above embodiment.

[0073] Figure 6 Schematic diagram of a cross-section of a display device according to an embodiment of the present disclosure. Figure 6 Several elements are omitted from illustration. Figure 6 The display device 1 shown includes a display panel 20 and a Figure 3 The biometric sensing device 10 shown is not limited thereto. In other embodiments, Figure 6 The biometric sensing device shown can also be Figure 4 The biometric sensing device 10A shown or Figure 5The biometric sensing device 10B shown depends on the needs of the designer. The biometric sensing device 10 is arranged under the display panel 20. In some embodiments, the display panel 20 can be any type of display panel, such as a flat display panel, a curved display panel, a flexible display panel, a spliced ​​display panel or a transparent display panel, but is not limited thereto. The display panel may include a liquid crystal display panel, a light-emitting diode display panel, a quantum dot display panel, a fluorescent display panel or a phosphorescent display panel, but is not limited thereto. The light-emitting diode display panel may include an organic light-emitting diode, a millimeter / sub-millimeter light-emitting diode, a micro light-emitting diode or a quantum dot light-emitting diode, but is not limited thereto. Under the above-mentioned setting, the display device 1 applying the biometric sensing device 10 can be an under-screen optical fingerprint recognition display device, but is not limited thereto. In addition, the display device 1 can achieve excellent technical effects similar to those of the above-mentioned embodiment.

[0074] In summary, in a biometric sensing device or a display device including the same according to an embodiment of the present disclosure, since the sensing circuit can control the second thin film transistor through a driving signal, the second thin film transistor can be turned on during the sensing value readout period, so that the charge stored in the photodiode is selectively transferred to the floating diffusion node due to the charge transfer effect. In this way, the third thin film transistor has cleared the charge stored on the floating diffusion node, so the charge on the floating diffusion node is essentially the charge transferred from the photodiode. The equivalent capacitance on the floating diffusion node can be reduced. Therefore, the photoelectric conversion efficiency of the biometric sensing device or its sensing circuit can be improved. The biometric sensing device can have good sensitivity or electrical quality.

[0075] In addition, since the doping concentration of the first doping region of the semiconductor layer is greater than the doping concentration of the second doping region, and the doping concentration of the second doping region is greater than the doping concentration of the first doped semiconductor material layer, the potential energy of the second doping region contacting the photodiode can be higher than the potential energy of the first doping region. During the reading of the sensing value, the current generated by the photodiode can be controlled by the second thin film transistor and flow from the second doping region with a high potential to the first doping region with a low potential to transfer the charge of the photodiode to the floating diffusion node. Therefore, the equivalent capacitance at the floating diffusion node can be reduced. The photoelectric conversion efficiency of the biometric sensing device and the display device including the same can be improved. The biometric sensing device or the display device can have good sensitivity or electrical quality.

[0076] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them. Although the present disclosure has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present disclosure.

Claims

1. A biometric sensing device, characterized in that: include: The first thin film transistor has a gate; The second thin film transistor comprises a semiconductor layer and a non-gate electrode terminal, wherein the non-gate electrode terminal is electrically connected to the gate of the first thin film transistor; as well as a photodiode comprising a first doped semiconductor material layer, a second doped semiconductor material layer, and an intrinsic semiconductor material layer located between the first doped semiconductor material layer and the second doped semiconductor material layer; a multi-layer insulating layer covering the first thin film transistor and the second thin film transistor, an opening penetrating the multi-layer insulating layer, wherein the first doped semiconductor material layer contacts the semiconductor layer of the second thin film transistor in the opening; as well as A transparent electrode is arranged on the photodiode.

2. The biometric sensing device according to claim 1, wherein: A doping concentration of a portion of the semiconductor layer in contact with the first doped semiconductor material layer is greater than a doping concentration of the first doped semiconductor material layer.

3. The biometric sensing device according to claim 1, wherein: A gate of the second thin film transistor overlaps a portion of the semiconductor layer that contacts the first doped semiconductor material layer.

4. The biometric sensing device according to claim 1, wherein: A gate portion of the second thin film transistor overlaps a portion of the semiconductor layer that contacts the first doped semiconductor material layer.

5. The biometric sensing device according to claim 1, wherein: A third thin film transistor is further included. The third thin film transistor has a non-gate electrode terminal electrically connected to the gate of the first thin film transistor.

6. The biometric sensing device according to claim 1, wherein: A fourth thin film transistor is further included. The fourth thin film transistor has a non-gate electrode terminal electrically connected to the non-gate electrode terminal of the first thin film transistor.

7. The biometric sensing device according to claim 1, wherein: The biometric identification sensing device is a fingerprint sensing device.

8. A display device, characterized in that: include: Display panel; as well as The biometric sensing device according to any one of claims 1 to 7, wherein the biometric sensing device is disposed under the display panel.

9. The display device according to claim 8, wherein The non-gate electrode terminal of the second thin film transistor includes a first terminal or a second terminal, the first terminal is electrically connected to the photodiode, and the second terminal is electrically connected to the gate of the first thin film transistor.

Images