LED chip and manufacturing method thereof

Abstract

The application provides an LED chip and a manufacturing method thereof, wherein the LED chip comprises a substrate, an epitaxial structure, an N-type electrode and an N-type electrode extension part, a P-type electrode and a P-type electrode extension part; the P-type electrode extension part is a plurality of P-type electrode extension strips connected with the P-type electrode, the width of each P-type electrode extension strip is less than the active region light wavelength, each P-type electrode extension strip forms a mesh which crosses each other, through the diffraction effect, the photons blocked by the P-type electrode extension strip can bypass the P-type electrode extension strip and then exit through the mesh gap, so that the P-type electrode extension strip is equivalent to no blocking light emission, and the loss of LED light is avoided; meanwhile, the mesh arranged on the P-type semiconductor layer can make the injected current more evenly distributed in the whole active region; furthermore, the active region light wavelength is λ, the width of each mesh gap is between 0 and 3λ, the light of the active region can be extracted to the maximum extent, and the brightness of the LED chip is improved.

Description

TECHNICAL FIELD

[0001] The present application belongs to the field of LED, more particularly, relates to a LED chip and a manufacturing method thereof. BACKGROUND

[0002] Light emitting diode (LED) as a new generation of environmental protection light source instead of incandescent lamp and fluorescent lamp, is widely used in lighting, display and backlight fields. Compared with the traditional lighting source, LED has many advantages such as high efficiency, low energy consumption, long life, no pollution, small size, rich color and so on.

[0003] At present, in the LED chip, the horizontal distance between P-type electrodes is usually much higher than the vertical distance, and the current is easy to concentrate under the P-type electrode and near the P-type electrode, while the metal material of the P-type electrode has a strong absorption and shielding effect on light, resulting in the reduction of the light efficiency of the LED chip. Therefore, in order to inject uniform distribution of current, the current blocking layer under the P-type electrode, the transparent conductive layer covering the entire active area, the P / N electrode pin of various shapes and other technologies have been applied in the LED chip process.

[0004] The existing LED chip structure is shown in the accompanying drawings Figure 1 , Figure 2 The structure of the existing LED chip mainly includes a substrate 100, an epitaxial structure 200 grown on the substrate 100, the epitaxial structure 200 including an N-type semiconductor layer 210, an active region 220 and a P-type semiconductor layer 230, a step is formed by etching the epitaxial structure 200 to expose the N-type semiconductor layer 210, a transparent conductive layer 300 is provided on the unetched P-type semiconductor layer 230, an N-type electrode 400 and an N-type electrode extension part 410 are provided on the step surface of the N-type semiconductor layer 210, the N-type electrode 400 and the N-type electrode extension part 410 are insulated from the side wall of the epitaxial structure 200 by an insulating protective layer 500, a P-type electrode 600 and a P-type electrode extension part 610 are provided on the transparent conductive layer 300, the P-type electrode extension part 610 is deposited in the light emitting surface of the LED chip as metal, although the area of the P-type electrode extension part 610 is relatively small compared with the light emitting area, but there is still absorption and shielding of light, which will reduce the brightness of the LED chip. Therefore, how to overcome the existing defects and improve the light emitting efficiency is a problem to be solved by technical personnel. SUMMARY

[0005] Therefore, the present application provides a LED chip and a manufacturing method thereof to solve the problem that the P-type electrode extension part easily absorbs and shields the light emitting surface, resulting in the reduction of the brightness of the LED chip.

[0006] To achieve the above object, the technical scheme adopted by the present application is as follows:

[0007] An LED chip, comprising:

[0008] a substrate;

[0009] an epitaxial structure disposed on a surface of the substrate, the epitaxial structure comprising: an N-type semiconductor layer, an active region, and a P-type semiconductor layer stacked on the substrate in order from bottom to top; an upper surface of the P-type semiconductor layer is provided with a groove extending to the N-type semiconductor layer, and the N-type semiconductor layer is exposed to form an N-type region mesa, the N-type region mesa is provided with an N-type electrode and an N-type electrode extension, the N-type electrode and the N-type electrode extension are connected and disposed at a distance from the sidewall of the groove; the P-type semiconductor layer is provided with a P-type electrode and a P-type electrode extension;

[0010] wherein the P-type electrode extension is a plurality of P-type electrode extension strips connected with the P-type electrode, the width of each P-type electrode extension strip is less than the active region light wavelength, each P-type electrode extension strip forms a grid intersecting with each other, the grid covers the P-type semiconductor layer, and the hollow grid gap exposes the P-type semiconductor layer;

[0011] the active region light wavelength is λ, and the width of each grid gap is between 0 and 3λ;

[0012] the N-type electrode extension, the P-type electrode extension, and the exposed surface of the epitaxial structure are covered with an insulating protective layer, and the N-type electrode and the N-type electrode extension are insulated from the sidewall of the groove through the insulating protective layer.

[0013] Preferably, the P-type electrode is provided with a current blocking layer below, the current blocking layer comprises a first through hole; a transparent conductive layer is provided between the P-type electrode and the P-type electrode extension and the P-type semiconductor layer, the transparent conductive layer comprises a second through hole; the P-type electrode is connected with the P-type semiconductor layer through the second through hole and the first through hole; and each grid gap exposes the transparent conductive layer.

[0014] Preferably, the distance between the P-type electrode extension and the insulating protective layer is less than the active region light wavelength.

[0015] Preferably, the material of the P-type electrode extension comprises a metal material or a transparent conductive material, preferably a metal material.

[0016] Preferably, the N-type electrode, the N-type electrode extension, the P-type electrode, and the P-type electrode extension are made of a high-conductivity material, including one or more alloys of Ag, Al, Au, Cr, Ni, Pd, Pt, Ti, Ni, W, etc.

[0017] Preferably, the thickness of the N-type electrode, the N-type electrode extension, the P-type electrode and the P-type electrode extension ranges between 1000 angstroms and 30000 angstroms, preferably 13000 angstroms.

[0018] Preferably, the cross-sectional shape of the grid gap comprises one or more of a circle or a polygon such as a square, a rectangle, a diamond, etc.

[0019] Preferably, each of the P-type electrode extension strips forms a grid that is perpendicular to each other.

[0020] Preferably, the lateral cross-section of each of the P-type electrode extension strips gradually decreases from the bottom to the top.

[0021] The present application also provides a method for manufacturing an LED chip, comprising the following steps:

[0022] Step S1, providing a substrate;

[0023] Step S2, stacking an epitaxial structure on the substrate, the epitaxial structure comprising, in sequence from the direction away from the substrate, a stacked N-type semiconductor layer, an active region and a P-type semiconductor layer;

[0024] Step S3, depositing a current blocking layer on the epitaxial structure, the current blocking layer comprising a first through hole, the first through hole exposing the P-type semiconductor layer;

[0025] Step S4, etching part of the epitaxial structure by a photolithography and ICP etching process to expose the N-type semiconductor layer and form an N-type region mesa;

[0026] Step S5, depositing a transparent conductive layer on the surface of the P-type semiconductor layer and part of the surface of the current blocking layer, the transparent conductive layer comprising a second through hole, the second through hole exposing the first through hole;

[0027] Step S6, depositing an N-type electrode and an N-type electrode extension on the N-type region mesa, the N-type electrode and the N-type electrode extension being connected and arranged at a distance from the side wall of the groove; depositing a P-type electrode and a P-type electrode extension on the transparent conductive layer, the P-type electrode being connected to the P-type semiconductor layer through the second through hole and the first through hole;

[0028] The thickness of the N-type electrode, the N-type electrode extension, the P-type electrode and the P-type electrode extension ranges between 1000 angstroms and 30000 angstroms, preferably 13000 angstroms.

[0029] The material of the P-type electrode extension comprises a metal material or a transparent conductive material, preferably a metal material;

[0030] The P-type electrode extension part is a plurality of P-type electrode extension strips connected with the P-type electrode, the width of each P-type electrode extension strip ranges from less than the active region light-emitting wavelength, each P-type electrode extension strip forms a grid intersecting with each other, the grid covers the transparent conductive layer, and the hollow grid gap exposes the transparent conductive layer.

[0031] The transverse section of each P-type electrode extension strip gradually decreases from the bottom to the top.

[0032] The cross-sectional shape of the grid gap includes one or more of a circle or a square, a rectangle, a rhombus, and other polygons.

[0033] The active region light-emitting wavelength is λ, and the width of each grid gap ranges from 0 to 3λ.

[0034] The step S6 specifically includes the following processes:

[0035] S6a, depositing an overall metal layer;

[0036] S6b, forming an N-type electrode and an N-type electrode extension part on the N-type region mesa through a photolithography and stripping process;

[0037] S6c, using nanoimprint to form a P-type electrode and a P-type electrode extension part on the transparent conductive layer;

[0038] Step S7, depositing an insulating protective layer and exposing the N-type electrode and the P-type electrode through photolithography and etching, the insulating protective layer covers the N-type electrode extension part, the P-type electrode extension part, the transparent conductive layer, and the exposed surface of the epitaxial structure, and the N-type electrode and the N-type electrode extension part are insulated from the side wall of the groove through the insulating protective layer;

[0039] The distance between the P-type electrode extension part and the insulating protective layer ranges from less than the active region light-emitting wavelength.

[0040] Preferably, each P-type electrode extension strip forms a grid intersecting with each other perpendicularly.

[0041] Preferably, the N-type electrode, the N-type electrode extension part, the P-type electrode, and the P-type electrode extension part are high-conductivity materials including one or more alloys of Ag, Al, Au, Cr, Ni, Pd, Pt, Ti, Ni, W, and other metal materials.

[0042] Through the above technical solution, the following effects are achieved:

[0043] 1. The LED chip provided by the present application, by setting the P-type electrode extension part, the P-type electrode extension part is a plurality of P-type electrode extension strips connected with the P-type electrode, the width range of each P-type electrode extension strip is less than the light-emitting wavelength of the active region, each P-type electrode extension strip forms a grid intersecting with each other, and through the diffraction effect, the photons blocked by the P-type electrode extension strip can bypass the P-type electrode extension strip and then exit through the grid gap, so that the P-type electrode extension strip is equivalent to no shielding light emission, avoiding the loss of LED light; at the same time, the setting of the grid covering on the P-type semiconductor layer can make the injected current more evenly distributed in the whole active region; in addition, the light-emitting wavelength of the active region is λ, and the width range of each grid gap is between 0 and 3λ, which can maximize the extraction of the light of the active region and further improve the brightness of the LED chip.

[0044] 2. Further, by setting a current blocking layer under the P-type electrode, the current congestion caused by the vertical injection of current at the P-type electrode can be improved, the current diffusion can be improved, and the light absorption of the P-type electrode can be reduced, thereby improving the quantum efficiency; the transparent conductive layer is arranged between the bottom of the P-type electrode and the P-type semiconductor layer and the P-type electrode extension part, which forms a good ohmic contact between the electrode on the one hand and expands the current injected by the electrode on the other hand, further improving the luminous brightness of the LED chip.

[0045] 3. Further, by setting the thickness range of the N-type electrode, the N-type electrode extension part, the P-type electrode and the P-type electrode extension part to be between 1000 angstrom and 30000 angstrom, preferably 13000 angstrom, the current expansion effect of the N-type electrode extension part and the P-type electrode extension part can be improved.

[0046] 4. Further, by setting each P-type electrode extension strip to form a grid intersecting with each other, a regular grid shape is formed, which can better improve the current expansion effect.

[0047] 5. Further, by setting the lateral section of each P-type electrode extension strip to gradually decrease from the bottom to the top, the contact area of the bottom of the P-type electrode extension strip is larger, which can strengthen the adhesion and improve the stability of the P-type electrode extension part.

[0048] 6. The manufacturing method of the LED chip provided by the present application, which combines nanoimprinting to form a P electrode extension part, is efficient and good in effect, convenient for large-scale production and reduction of production cost, and the LED chip formed by a simple and convenient process can effectively solve the problem of light absorption and shielding of the P-type electrode extension part on the light-emitting surface, thereby improving the brightness of the LED chip. BRIEF DESCRIPTION OF DRAWINGS

[0049] In order to make the technical solutions of the embodiments of the present application or the prior art clearer, the accompanying drawings needed in the embodiments or prior art description will be briefly introduced. Obviously, the accompanying drawings in the following description only need to explain the embodiments of the present application, and for those skilled in the art, other drawings can be obtained without creative effort based on the provided drawings.

[0050] Figure 1 is a top view of a prior art LED chip;

[0051] Figure 2 is a top view of a prior art LED chip; Figure 1 is a sectional view along AA line;

[0052] Figure 3 is a sectional view of an LED chip provided by the embodiment of the present application;

[0053] Figure 4 is a top view of a P-type electrode extension of an LED chip provided by the embodiment of the present application;

[0054] Figure 5 is a sectional view of another LED chip provided by the embodiment of the present application;

[0055] Figures 6.1 to 6.7 is a process sectional view and a corresponding top view of each step of a manufacturing method of an LED chip provided by the embodiment of the present application.

[0056] Explanation of symbols in the drawings:

[0057] 100, substrate; 200, epitaxial structure; 210, N-type semiconductor layer; 220, active layer; 230, P-type semiconductor layer; 300, transparent conductive layer; 400, N-type electrode; 410, N-type electrode extension; 500, insulating protective layer; 600, P-type electrode; 610, P-type electrode extension;

[0058] 1, substrate; 2, epitaxial structure; 21, N-type semiconductor layer; 22, active region; 23, P-type semiconductor layer; 3, current blocking layer; 4, transparent conductive layer; 5, N-type electrode; 51, N-type electrode extension; 6, P-type electrode; 61, P-type electrode extension; 7, insulating protective layer. DETAILED DESCRIPTION

[0059] In order to make the content of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the scope of protection of the present application.

[0060] In the following description, many specific details are set forth in order to provide a thorough understanding of the present application. However, the present application can be practiced in other ways different from those described herein without departing from the scope of the present application, and those skilled in the art can make similar extensions without departing from the connotation of the present application, so the present application is not limited to the specific embodiments disclosed below.

[0061] Secondly, the present application is described in detail in combination with the schematic diagram, and in the detailed description of the embodiments of the present application, the cross-sectional view of the device structure is locally enlarged without the general proportion for the convenience of description, and the schematic diagram is only an example, which should not limit the scope of protection of the present application herein. In addition, the three-dimensional spatial dimensions of length, width and depth should be included in actual manufacture.

[0062] The LED chip provided by the embodiment of the present application, as shown in the figure, comprises: Figure 3

[0063] The substrate 1;

[0064] The specific type of the substrate 1 is not limited in the embodiment, and the substrate 1 can be a semiconductor substrate such as a sapphire substrate, a silicon substrate or a silicon carbide substrate, and the specific material of the substrate 1 can be selected and used according to the demand.

[0065] The epitaxial structure 2 is arranged on the surface of the substrate 1, and the epitaxial structure 2 comprises: an N-type semiconductor layer 21, an active region 22 and a P-type semiconductor layer 23 which are sequentially stacked on the substrate 1 from bottom to top; the upper surface of the P-type semiconductor layer 23 is provided with a groove extending to the N-type semiconductor layer 21, and the N-type semiconductor layer 21 is exposed to form an N-type region mesa, the N-type region mesa is provided with an N-type electrode 5 and an N-type electrode extension part 51, and the N-type electrode 5 and the N-type electrode extension part 51 are formed to be connected and arranged at a distance from the side wall of the groove; the P-type semiconductor layer 23 is provided with a P-type electrode 6 and a P-type electrode extension part 61.

[0066] The specific number of layers and structure of the epitaxial structure 2 are not limited in the embodiment, and the epitaxial structure 2 at least comprises the N-type semiconductor layer 21, the active region 22 and the P-type semiconductor layer 23, and in other embodiments, in order to improve the lattice matching, the epitaxial structure 2 of the LED chip can further comprise a superlattice structure and the like.

[0067] ​Optionally, in one embodiment of the present invention, to ensure that the N-type semiconductor layer 21 is exposed, the height of the upper surface of the P-type semiconductor layer 23 to the N-type mesa ranges from 10,000 angstroms to 16,000 angstroms, preferably 14,000 angstroms.

[0068] Optionally, in one embodiment of the present invention, the thickness of the N-type electrode 5, the N-type electrode extension portion 51, the P-type electrode 6, and the P-type electrode extension portion 61 are all in the range of 1,000 angstroms to 30,000 angstroms, preferably 13,000 angstroms, which can improve the current spreading effect of the N-type electrode extension portion and the P-type electrode extension portion.

[0069] Optionally, in one embodiment of the present invention, the material of the P-type electrode extension portion 61 includes a metallic material or a transparent conductive material, preferably a metallic material.

[0070] In this embodiment, the N-type electrode 5, the N-type electrode extension portion 51, the P-type electrode 6, and the P-type electrode extension portion 61 can be made of the same material or different materials. To enable the N-type electrode 5, the N-type electrode extension portion 51, the P-type electrode 6, and the P-type electrode extension portion 61 to be fabricated in the same step, simplifying the LED chip manufacturing process and reducing manufacturing costs, optionally, in one embodiment of the present invention, the N-type electrode 5, the N-type electrode extension portion 51, the P-type electrode 6, and the P-type electrode extension portion 61 are made of the same material.

[0071] In this embodiment, the specific materials of the N-type electrode 5, the N-type electrode extension portion 51, the P-type electrode 6, and the P-type electrode extension portion 61 are not limited. Optionally, in one embodiment of the present invention, the N-type electrode 5, the N-type electrode extension portion 51, the P-type electrode 6, and the P-type electrode extension portion 61 are materials with high electrical conductivity, including one or more alloys of metal materials such as Ag, Al, Au, Cr, Ni, Pd, Pt, Ti, Ni, and W.

[0072] Among them, such as Figure 4 As shown, the P-type electrode extension portion 61 consists of several P-type electrode extension strips connected to the P-type electrode 6. The width of each P-type electrode extension strip is smaller than the emission wavelength of the active region. Each P-type electrode extension strip forms an intersecting grid, which covers the P-type semiconductor layer 23. The hollowed-out grid gaps expose the P-type semiconductor layer 23.

[0073] Optionally, in one embodiment of the present invention, the transverse cross-section of each P-type electrode extension strip gradually decreases from bottom to top, and the contact area at the bottom of the P-type electrode extension strip is larger, which can enhance adhesion and improve the stability of the P-type electrode extension portion.

[0074] In this embodiment, the specific shape of the cross-section of the mesh gap is not limited. Optionally, in one embodiment of the present invention, the cross-sectional shape of the mesh gap includes one or more of polygons such as circles, squares, rectangles, and rhombuses.

[0075] Optionally, in one embodiment of the present invention, each P-type electrode extension strip forms a grid that intersects perpendicularly with each other, forming a regular grid shape, which can better improve the current spreading effect.

[0076] The active region emits light at a wavelength of λ, and the width of each grid gap ranges from 0 to 3λ.

[0077] Optionally, in one embodiment of the present invention, the width of each P-type electrode extension strip is 300 nm, and the width of each grid gap is 400 nm.

[0078] The exposed surfaces of the N-type electrode extension portion 51, the P-type electrode extension portion 61, and the epitaxial structure 2 are covered with an insulating protective layer 7. The N-type electrode 5 and the N-type electrode extension portion 51 are insulated from the sidewalls of the groove by the insulating protective layer 7.

[0079] Optionally, in one embodiment of the present invention, the distance between the P-type electrode extension portion 61 and the edge protection layer is less than the emission wavelength of the active region.

[0080] like Figure 5 As shown, optionally, in one embodiment of the present invention, a current blocking layer 3 is provided under the P-type electrode 6, the current blocking layer 3 including a first through hole; a transparent conductive layer 4 is provided between the P-type electrode 6 and the P-type electrode extension portion 61 and the P-type semiconductor layer 23, the transparent conductive layer 4 including a second through hole; the P-type electrode 6 is connected to the P-type semiconductor layer 23 through the second through hole and the first through hole; the transparent conductive layer 4 is exposed in each grid gap.

[0081] It should be noted that, in this embodiment, the transparent conductive layer 4 is a material with high transparency, high conductivity, and low contact resistance. This embodiment does not limit the specific material of the transparent conductive layer 4; optionally, in this embodiment, the material of the transparent conductive layer 4 includes one or more of indium tin oxide (ITO), indium zinc oxide, and AZO (aluminum-doped ZnO). This embodiment does not limit the specific thickness of the transparent conductive layer 4; optionally, in this embodiment, the thickness of the transparent conductive layer 4 ranges from 100 angstroms to 3000 angstroms, preferably 1100 angstroms. This embodiment does not limit the specific material of the current blocking layer 3; optionally, in this embodiment, the material of the current blocking layer 3 includes SiO2 and SiN. x One or more of Al2O3; the specific thickness of the current blocking layer 3 is not limited in this embodiment. Optionally, in this embodiment, the thickness of the current blocking layer 3 is between 100 angstroms and 5000 angstroms.

[0082] The LED chip provided in this embodiment features a P-type electrode extension portion, which consists of several P-type electrode extension strips connected to the P-type electrodes. The width of each P-type electrode extension strip is smaller than the emission wavelength of the active region. The P-type electrode extension strips form an intersecting grid. Through diffraction, photons blocked by the P-type electrode extension strips can bypass the strips and exit through the grid gaps, effectively making the P-type electrode extension strips emit light without obstruction, thus avoiding LED light loss. Simultaneously, the grid covering the P-type semiconductor layer allows for a more uniform distribution of the injected current throughout the active region. Furthermore, since the emission wavelength of the active region is λ, and the width of each grid gap ranges from 0 to 3λ, the light from the active region can be extracted to the maximum extent, thereby improving the brightness of the LED chip.

[0083] In addition, by setting a current blocking layer under the P-type electrode, the current congestion caused by the vertical injection of current at the P-type electrode can be improved, the current diffusion can be enhanced and the light absorption of the P-type electrode can be reduced, thereby improving the quantum efficiency. The transparent conductive layer is set between the P-type electrode and the extended part of the P-type electrode and the P-type semiconductor layer. On the one hand, it forms a good ohmic contact with the electrode, and on the other hand, it expands the current injected into the electrode, further improving the luminous brightness of the LED chip.

[0084] This invention also provides a method for manufacturing an LED chip, the method comprising the following steps:

[0085] Step S101: Provide a substrate 1;

[0086] In this embodiment, there is no limitation on the specific type of substrate 1. Optionally, substrate 1 can be a semiconductor substrate such as a sapphire substrate, a silicon substrate, or a silicon carbide substrate. The specific material of substrate 1 can be selected and used according to the requirements.

[0087] Step S102, as follows Figure 6.1 As shown, an epitaxial structure 2 is stacked on a substrate 1. The epitaxial structure 2 includes, in sequence, a stacked N-type semiconductor layer 21, an active region 22, and a P-type semiconductor layer 23 along the direction away from the substrate 1.

[0088] It should be noted that in this embodiment, the epitaxial structure 2 can be grown on the substrate 1 in one step through the epitaxial growth process. In this embodiment, the specific number of layers and structure of the epitaxial structure 2 are not limited. The epitaxial structure 2 includes at least an N-type semiconductor layer 21, an active region 22 and a P-type semiconductor layer 23. In other embodiments, in order to improve lattice matching, the epitaxial structure 2 of the LED chip may also include a superlattice structure, etc.

[0089] Step S103, as follows Figure 6.2 As shown, a current blocking layer 3 is deposited on the epitaxial structure 2. The current blocking layer 3 includes a first via, which exposes the P-type semiconductor layer 23.

[0090] The specific material of the current blocking layer 3 is not limited in the embodiment, and in an embodiment of the application, the material of the current blocking layer 3 includes one or more of SiO2, SiN x , and Al2O3.

[0091] In the embodiment, the thickness of the current blocking layer 3 is optionally between 100 angstroms and 5000 angstroms.

[0092] In step S104, as shown in the figure, the epitaxial structure 2 is etched by photolithography and ICP etching process to expose the N-type semiconductor layer 21 and form an N-type region mesa. Figure 6.3

[0093] In the embodiment, the height of the upper surface of the P-type semiconductor layer 23 to the N-type region mesa is optionally between 10000 angstroms and 16000 angstroms, preferably 14000 angstroms, to ensure that the N-type semiconductor layer 21 is exposed.

[0094] In step S105, as shown in the figure, a transparent conductive layer 4 is deposited on the upper surface of the P-type semiconductor layer 23 and part of the surface of the current blocking layer 3, the transparent conductive layer 4 includes a second through hole, and the second through hole exposes the first through hole. Figure 6.4 The transparent conductive layer 4 in the embodiment is a material with high transparency, high conductivity, and low contact resistance. The specific material of the transparent conductive layer 4 is not limited in the embodiment, and in an embodiment of the application, the material of the transparent conductive layer 4 includes one or more of indium tin oxide (ITO), indium zinc oxide, AZO (aluminum-doped ZnO), and the like.

[0095] In the embodiment, the thickness of the transparent conductive layer 4 is optionally between 100 angstroms and 3000 angstroms, preferably 1100 angstroms.

[0096] In step S106, as shown in the figure, an N-type electrode 5 and an N-type electrode extension part 51 are deposited on the N-type region mesa, the N-type electrode 5 and the N-type electrode extension part 51 are formed to be connected and arranged at a distance from the side wall of the groove; and a P-type electrode 6 and a P-type electrode extension part 61 are deposited on the transparent conductive layer 4, the P-type electrode 6 is connected to the P-type semiconductor layer 23 through the second through hole and the first through hole.

[0097] Figure 6.5 The thickness of the N-type electrode 5, the N-type electrode extension part 51, the P-type electrode 6, and the P-type electrode extension part 61 is between 1000 angstroms and 30000 angstroms, preferably 13000 angstroms, which can improve the current spreading effect of the N-type electrode extension part and the P-type electrode extension part.

[0098] The thickness of the N-type electrode 5, the N-type electrode extension part 51, the P-type electrode 6, and the P-type electrode extension part 61 is between 1000 angstroms and 30000 angstroms, preferably 13000 angstroms, which can improve the current spreading effect of the N-type electrode extension part and the P-type electrode extension part.

[0099] ​​The material of the P-type electrode extension part 61 includes a metal material or a transparent conductive material, and preferably a metal material.

[0100] In the embodiment, the materials of the N-type electrode 5, the N-type electrode extension part 51, the P-type electrode 6 and the P-type electrode extension part 61 can be the same or different. In order to enable the N-type electrode 5, the N-type electrode extension part 51, the P-type electrode 6 and the P-type electrode extension part 61 to be formed by the same step, simplify the process steps of the LED chip and reduce the manufacturing cost, in the embodiment, the materials of the N-type electrode 5, the N-type electrode extension part 51, the P-type electrode 6 and the P-type electrode extension part 61 are the same.

[0101] In the embodiment, the specific materials of the N-type electrode 5, the N-type electrode extension part 51, the P-type electrode 6 and the P-type electrode extension part 61 are not limited. In an embodiment of the present application, the N-type electrode 5, the N-type electrode extension part 51, the P-type electrode 6 and the P-type electrode extension part 61 are high-conductivity materials, including one or more alloys of Ag, Al, Au, Cr, Ni, Pd, Pt, Ti, Ni, W and the like.

[0102] In the embodiment, as shown in FIG. 6, the P-type electrode extension part 61 is a plurality of P-type electrode extension strips connected with the P-type electrode 6, the width of each P-type electrode extension strip is less than the active region light-emitting wavelength, each P-type electrode extension strip forms a grid intersecting with each other, the grid covers the transparent conductive layer 4, and the hollow grid gap exposes the transparent conductive layer 4. Figure 6.6

[0103] The transverse section of each P-type electrode extension strip gradually decreases from the bottom to the top, the contact area of the bottom of the P-type electrode extension strip is larger, the adhesion can be enhanced, and the stability of the P-type electrode extension part can be improved.

[0104] In the embodiment, the specific shape of the cross section of the grid gap is not limited. In the embodiment, the cross section of the grid gap includes one or more of a circle or a polygon such as a square, a rectangle and a rhombus.

[0105] In an embodiment of the present application, each P-type electrode extension strip forms a grid intersecting with each other perpendicularly, and a regular grid shape is formed, so that the current extension effect can be better improved.

[0106] The active region light-emitting wavelength is λ, and the width of each grid gap is between 0 and 3λ.

[0107] In an embodiment of the present application, the width of each P-type electrode extension strip is 300 nm, and the width of each grid gap is 400 nm.

[0108] The step S106 specifically includes the following process:​

[0109] S106a, depositing a full-surface metal layer;

[0110] S106b: An N-type electrode 5 and an N-type electrode extension portion 51 are formed on the N-type region mesa by photolithography and lift-off processes;

[0111] S106c: A P-type electrode 6 and a P-type electrode extension portion 61 are formed on the transparent conductive layer 4 using nanoimprinting.

[0112] Step S107, as follows Figure 6.7 As shown, an insulating protective layer 7 is deposited, and N-type electrode 5 and P-type electrode 6 are exposed by photolithography and etching. The insulating protective layer 7 covers the exposed surfaces of N-type electrode extension portion 51, P-type electrode extension portion 61, transparent conductive layer 4 and epitaxial structure 2. N-type electrode 5 and N-type electrode extension portion 51 are insulated from the sidewalls of the groove by the insulating protective layer 7.

[0113] Optionally, in this embodiment, the distance between the P-type electrode extension portion 61 and the edge protection layer is less than the emission wavelength of the active region.

[0114] This embodiment provides a method for manufacturing an LED chip. Through this method, a P-type electrode extension portion is formed, consisting of several P-type electrode extension strips connected to the P-type electrode. The width of each P-type electrode extension strip is smaller than the emission wavelength of the active region. The P-type electrode extension strips form an intersecting grid. Through diffraction, photons blocked by the P-type electrode extension strips can bypass the strips and exit through the grid gaps, effectively making the P-type electrode extension strips emit light without obstruction, thus avoiding LED light loss. Simultaneously, the grid covering the transparent conductive layer allows for a more uniform distribution of the injected current throughout the active region. Furthermore, since the emission wavelength of the active region is λ, and the width of each grid gap ranges from 0 to 3λ, the light from the active region can be extracted to the maximum extent, thereby improving the brightness of the LED chip.

[0115] In addition, combining nanoimprinting to form the P-electrode extension part is highly efficient and effective, facilitates large-scale production and reduces production costs. The LED chip formed by the simple and convenient process can effectively solve the problem that the P-type electrode extension part easily absorbs and blocks light from the light-emitting surface, which causes the brightness of the LED chip to decrease, thereby improving the brightness of the LED chip.

[0116] Those skilled in the art should understand that the orientation or positional relationship indicated by the terms "transverse", "longitudinal", "upper", "lower" and the like in the disclosure of the present application is based on the orientation or positional relationship shown in the drawings, which is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, therefore the above terms cannot be understood as a limitation on the present application.

[0117] It should be noted that each of the embodiments in the present specification is described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be mutually referred to.

[0118] The above description of the disclosed embodiments enables a person skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to these embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An LED chip, characterized in that, include: Substrate; An epitaxial structure disposed on the surface of the substrate includes: an N-type semiconductor layer, an active region, and a P-type semiconductor layer sequentially stacked on the substrate from bottom to top; the upper surface of the P-type semiconductor layer has a groove extending into the N-type semiconductor layer, exposing the N-type semiconductor layer and forming an N-type region mesa; the N-type region mesa has an N-type electrode and an N-type electrode extension portion, the N-type electrode and the N-type electrode extension portion are connected and spaced apart from the sidewall of the groove; the P-type semiconductor layer has a P-type electrode and a P-type electrode extension portion. The P-type electrode extension portion consists of several P-type electrode extension strips connected to the P-type electrode. The width of each P-type electrode extension strip is smaller than the emission wavelength of the active region. Each P-type electrode extension strip forms an intersecting grid, which covers the P-type semiconductor layer. The hollowed-out grid gaps expose the P-type semiconductor layer. The active region emits light at a wavelength of λ, and the width of each mesh gap ranges from 0 to 3λ. The exposed surfaces of the N-type electrode extension portion, the P-type electrode extension portion, and the epitaxial structure are covered with an insulating protective layer, and the N-type electrode and the N-type electrode extension portion are insulated from the sidewalls of the groove through the insulating protective layer; The distance between the P-type electrode extension and the edge protection layer is less than the emission wavelength of the active region; the transverse cross-section of each P-type electrode extension gradually decreases from bottom to top.

2. The LED chip according to claim 1, characterized in that: A current blocking layer is provided under the P-type electrode, and the current blocking layer includes a first through hole; a transparent conductive layer is provided between the P-type electrode and the extended portion of the P-type electrode and the P-type semiconductor layer, and the transparent conductive layer includes a second through hole; the P-type electrode is connected to the P-type semiconductor layer through the second through hole and the first through hole; and the transparent conductive layer is exposed in each of the grid gaps.

3. The LED chip according to claim 1, characterized in that: The material of the extended portion of the P-type electrode includes metallic materials or transparent conductive materials.

4. The LED chip according to claim 1, characterized in that: The N-type electrode, the N-type electrode extension portion, the P-type electrode, and the P-type electrode extension portion are made of high-conductivity materials, including one or more alloys of Ag, Al, Au, Cr, Ni, Pd, Pt, Ti, Ni, and W.

5. The LED chip according to claim 1, characterized in that: The thickness of the N-type electrode, the N-type electrode extension, the P-type electrode, and the P-type electrode extension all range from 1,000 angstroms to 30,000 angstroms.

6. The LED chip according to claim 1, characterized in that: The cross-sectional shape of the mesh gaps includes one or more of the following: circular, square, rectangular, and rhomboid.

7. The LED chip according to claim 1, characterized in that: The P-type electrode extension strips form a grid that intersects perpendicularly with each other.

8. A method for manufacturing an LED chip, characterized in that, The manufacturing method includes the following steps: Step S1: Provide a substrate; Step S2: An epitaxial structure is stacked on the substrate, wherein the epitaxial structure comprises, in sequence, stacked N-type semiconductor layer, active region and P-type semiconductor layer along the direction away from the substrate; Step S3: Deposit a current blocking layer on the epitaxial structure, the current blocking layer including a first via, the first via exposing the P-type semiconductor layer; Step S4: Using photolithography and ICP etching processes, etch part of the epitaxial structure to expose the N-type semiconductor layer and form an N-type mesa. Step S5: Deposit a transparent conductive layer on the upper surface of the P-type semiconductor layer and part of the surface of the current blocking layer. The transparent conductive layer includes a second via, which exposes the first via. Step S6: Deposit an N-type electrode and an N-type electrode extension portion on the N-type region mesa, wherein the N-type electrode and the N-type electrode extension portion are connected and set at a distance from the sidewall of the groove; deposit a P-type electrode and a P-type electrode extension portion on the transparent conductive layer, wherein the P-type electrode is connected to the P-type semiconductor layer through the second via and the first via; The thickness of the N-type electrode, the N-type electrode extension, the P-type electrode, and the P-type electrode extension all range from 1,000 angstroms to 30,000 angstroms. The material of the extended portion of the P-type electrode includes metallic materials or transparent conductive materials; The P-type electrode extension portion consists of several P-type electrode extension strips connected to the P-type electrode. The width of each P-type electrode extension strip is smaller than the emission wavelength of the active region. The P-type electrode extension strips form an intersecting grid, which covers the transparent conductive layer. The hollowed-out grid gaps expose the transparent conductive layer. The transverse cross-section of each of the P-type electrode extension strips gradually decreases from bottom to top; The cross-sectional shape of the mesh gaps includes one or more of the following: circular or square, rectangular, and rhomboid. The active region emits light at a wavelength of λ, and the width of each mesh gap ranges from 0 to 3λ. Step S6 specifically includes the following procedures: S6a, Deposit a full-surface metal layer; S6b, An N-type electrode and an N-type electrode extension portion are formed on the N-type region mesa by photolithography and lift-off processes; S6c. A P-type electrode and a P-type electrode extension portion are formed on the transparent conductive layer by nanoimprinting. Step S7: Deposit an insulating protective layer, and expose the N-type electrode and the P-type electrode by photolithography and etching. The insulating protective layer covers the extended portion of the N-type electrode, the extended portion of the P-type electrode, the transparent conductive layer, and the exposed surface of the epitaxial structure. The N-type electrode and the extended portion of the N-type electrode are insulated from the sidewall of the groove by the insulating protective layer. The distance between the extended portion of the P-type electrode and the edge protection layer is less than the emission wavelength of the active region.

9. The method for manufacturing an LED chip according to claim 8, characterized in that: The P-type electrode extension strips form a grid that intersects perpendicularly with each other.

10. The method for manufacturing an LED chip according to claim 8, characterized in that: The N-type electrode, the N-type electrode extension portion, the P-type electrode, and the P-type electrode extension portion are made of high-conductivity materials, including one or more alloys of Ag, Al, Au, Cr, Ni, Pd, Pt, Ti, Ni, and W.

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