A flexible direct current low inner ring current control link delay control device

By optimizing the flexible DC low inner loop current control link through parallel computing algorithms and phase-locked loop phase compensation, the problem of AC high-frequency oscillation caused by inner loop current control delay is solved, thereby improving the stability and reliability of the system.

CN114977252BActive Publication Date: 2025-11-11XJ ELECTRIC CO LTD +1
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Patent Information

Application Number
CN202110784243.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-07-12
Publication Date
2025-11-11
Estimated Expiration
2041-07-12

AI Technical Summary

Technical Problem

In existing flexible DC transmission systems, the delay in the inner loop current control link causes high-frequency AC oscillations, affecting system stability and reliability.

Method used

By employing a parallel computing algorithm, the execution time of the inner loop current control algorithm is reduced. Combined with phase-locked loop phase compensation and inner loop current decoupling algorithms, the structure of the flexible DC low inner loop current control link delay control device is optimized, including the coordinated operation of electrical quantity acquisition, phase-locked loop control, outer loop power control and inner loop current control modules.

Benefits of technology

It effectively reduces the delay of the inner loop current control link, suppresses AC high-frequency oscillations, and improves the stability and reliability of the flexible DC transmission system.

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Abstract

This invention discloses a flexible DC low inner loop current control link delay control device, comprising: an electrical quantity acquisition module, a phase-locked loop control module, an outer loop power control module, an inner loop current control module, and a bridge arm voltage reference value calculation module. By reducing the execution time of the inner loop current control algorithm, the inner loop current control link delay is effectively reduced, the AC high-frequency oscillation problem is suppressed, and the normal and stable operation of the AC power grid system and the flexible DC transmission system is ensured, thereby improving the stability and reliability of the flexible DC transmission system.
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Description

Technical Field

[0001] This invention relates to the field of flexible DC transmission technology, and in particular to a flexible DC low inner loop current control link delay control device. Background Technology

[0002] High-voltage direct current (VSC-HVDC) transmission systems based on voltage source converters have the advantages of not requiring AC voltage compensation, eliminating commutation failure issues, providing power to passive systems, simultaneously and independently regulating active power and AC voltage, exhibiting low harmonic levels, and being suitable for constructing multi-terminal DC systems. With the rapid development of clean energy power generation technologies such as wind power and solar power, VSC-HVDC, as a new type of power transmission technology, is being widely used in current practical engineering projects.

[0003] In domestic engineering applications, VSC-HVDC systems typically employ a dual closed-loop control strategy of "outer loop power + inner loop current." The inner loop current closed-loop control uses the converter transformer valve-side current as the control variable for the closed-loop controller. In currently operational flexible DC projects, high-frequency AC oscillation is a particularly prominent system challenge. Reducing the delay of the inner loop current control link is a highly effective method for solving the AC high-frequency oscillation problem in flexible DC transmission systems. Summary of the Invention

[0004] The purpose of this invention is to provide a flexible DC low inner loop current control link delay control device. By using a parallel computing algorithm for the outer loop power control module and the inner loop current control module, and by reducing the execution time of the inner loop current control algorithm, the delay of the inner loop current control link is effectively reduced, the AC high-frequency oscillation problem is suppressed, and the normal and stable operation of the AC power grid system and the flexible DC transmission system is ensured, thereby improving the stability and reliability of the flexible DC transmission system.

[0005] To address the aforementioned technical problems, this invention provides a flexible DC low inner loop current control link delay control device, comprising: an electrical quantity acquisition module, a phase-locked loop control module, an outer loop power control module, an inner loop current control module, and a bridge arm voltage reference value calculation module;

[0006] The electrical quantity acquisition module acquires electrical quantity signals, processes the electrical quantity signals, and then sends them to the phase-locked loop control module, the outer loop power control module, and the inner loop current control module, respectively.

[0007] The phase-locked loop control module calculates the AC voltage tracking angular frequency error based on the processed electrical quantity signal, performs sampling delay compensation, and sends the phase information to the electrical quantity acquisition module, the outer loop power control module, and the inner loop current control module respectively.

[0008] The outer loop power control module calculates and outputs through the PI controller. After selecting between active power and reactive power, it obtains the inner loop current control reference value required for the inner loop current control and sends it to the inner loop current control module.

[0009] The inner loop current control module controls the valve-side current through the inner loop current PI controller, calculates the positive and negative sequence dq components of the submodule voltage required by the converter valve, and sends them to the bridge arm voltage reference value calculation module.

[0010] The arm voltage reference value calculation module calculates the three-phase reference voltage of the converter valve through positive and negative sequence dq inverse transformation, and obtains the reference value of the sub-module capacitor voltage of the six arms of the converter valve through modulation voltage calculation, and sends the arm voltage reference value to the valve control system.

[0011] Furthermore, the electrical quantity acquisition module has a dielectric acquisition port and / or an optical dielectric acquisition port, which respectively acquire signals of grid-side voltage, grid-side current and valve-side current.

[0012] Furthermore, the electrical quantity acquisition module performs analog-to-digital conversion, per-unit conversion, positive and negative sequence extraction, and dq transformation on the electrical quantity signal to obtain the converted digital quantity signal, and sends the digital quantity signal to the phase-locked loop control module, the outer loop power control module, and the inner loop current control module respectively.

[0013] Furthermore, the phase-locked loop control module uses the grid-side positive sequence voltage as the reference synchronization voltage for phase-locking, calculates the AC voltage tracking angular frequency error through the phase-locked loop control PI controller, and compensates for the sampling delay by using phase-locked loop phase compensation.

[0014] Furthermore, the electrical quantity acquisition module, the phase-locked loop control module, and the bridge arm voltage reference value calculation module employ serial calculation.

[0015] Furthermore, the outer loop power control module and the inner loop current control module employ parallel computing.

[0016] Furthermore, the bridge arm voltage reference value calculation module calculates the three-phase reference voltage of the converter valve through an inner loop current decoupling algorithm.

[0017] Furthermore, the inner loop current decoupling algorithm includes: a positive-sequence dq inner loop current decoupling algorithm and a negative-sequence dq inner loop current decoupling algorithm.

[0018] The above-described technical solutions of the embodiments of the present invention have the following beneficial technical effects:

[0019] By employing parallel computing algorithms in the outer-loop power control module and the inner-loop current control module, and by reducing the execution time of the inner-loop current control algorithm, the delay of the inner-loop current control link is effectively reduced, the problem of AC high-frequency oscillation is suppressed, and the normal and stable operation of the AC power grid system and the flexible DC transmission system is ensured, thereby improving the stability and reliability of the flexible DC transmission system. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of the principle of the flexible DC low inner loop current control link delay control device provided in an embodiment of the present invention;

[0021] Figure 2 This is a schematic diagram of the delay control process of the flexible DC low inner loop current control link provided in an embodiment of the present invention;

[0022] Figure 3 This is a block diagram of the inner loop current decoupling algorithm provided in an embodiment of the present invention. Detailed Implementation

[0023] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to specific embodiments and the accompanying drawings. It should be understood that these descriptions are merely exemplary and not intended to limit the scope of the invention. Furthermore, descriptions of well-known structures and techniques are omitted in the following description to avoid unnecessarily obscuring the concept of the invention.

[0024] Figure 1 This is a schematic diagram of the principle of the flexible DC low inner loop current control link delay control device provided in an embodiment of the present invention.

[0025] Figure 2 This is a schematic diagram of the delay control process of the flexible DC low inner loop current control link provided in an embodiment of the present invention.

[0026] Please refer to Figure 1 and Figure 2 This invention provides a flexible DC low inner loop current control link delay control device, including: an electrical quantity acquisition module, a phase-locked loop control module, an outer loop power control module, an inner loop current control module, and a bridge arm voltage reference value calculation module.

[0027] Specifically, the electrical quantity acquisition module acquires electrical quantity signals, processes the signals, and then sends them to the phase-locked loop control module, the outer loop power control module, and the inner loop current control module via the PCIe high-speed backplane bus.

[0028] Furthermore, the electrical quantity acquisition module has a dielectric acquisition port and / or an optical dielectric acquisition port, which respectively acquire electrical quantity signals including grid-side voltage, grid-side current and valve-side current.

[0029] Furthermore, the electrical quantity acquisition module performs analog-to-digital conversion, per-unit conversion, positive and negative sequence extraction, and dq transformation on the electrical quantity signal to obtain the converted digital quantity signal, and sends the digital quantity signal to the phase-locked loop control module, the outer loop power control module, and the inner loop current control module respectively.

[0030] Specifically, the phase-locked loop control module calculates the AC voltage tracking angular frequency error based on the processed electrical quantity signal, performs sampling delay compensation, and sends the phase information to the electrical quantity acquisition module, the outer loop power control module, and the inner loop current control module respectively through the PCIe high-speed backplane bus.

[0031] Furthermore, the phase-locked loop (PLL) control module uses the grid-side positive sequence voltage as the reference synchronization voltage for the phase-locked loop. It calculates the AC voltage tracking angular frequency error by controlling the PI controller through the PLL and compensates for the sampling delay using the PLL phase compensation method.

[0032] Specifically, the outer loop power control module calculates the output through the PI controller, selects between active power class and reactive power class, and obtains the inner loop current control reference values ​​idref and iqref required for the inner loop current control. The inner loop current control reference values ​​idref and iqref are then sent to the inner loop current control module through the PCIe high-speed backplane bus.

[0033] Specifically, the inner loop current control module controls the valve-side current through the inner loop current PI controller. The inner loop current control adopts decoupled control and sets limit values. It calculates the positive and negative sequence dq components of the submodule voltage required by the converter valve and sends them to the bridge arm voltage reference value calculation module through the PCIe high-speed backplane bus.

[0034] Specifically, the bridge arm voltage reference value calculation module calculates the three-phase reference voltage of the converter valve through positive and negative sequence dq inverse transformation, and obtains the reference value of the sub-module capacitor voltage of the six bridge arms of the converter valve through voltage modulation calculation, and sends the bridge arm voltage reference value to the valve control system through high-speed optical fiber.

[0035] Furthermore, the electrical quantity acquisition module, phase-locked loop control module, and bridge arm voltage reference value calculation module employ serial calculation. Specifically, the inner loop current control module has an execution cycle of no more than 20ms, significantly reducing the link delay of the inner loop current control compared to the serial calculation of the outer loop power control module and the inner loop current control module.

[0036] Furthermore, the outer loop power control module and the inner loop current control module employ parallel computing.

[0037] Furthermore, the bridge arm voltage reference value calculation module calculates the three-phase reference voltage of the converter valve through the inner loop current decoupling algorithm.

[0038] Figure 3 This is a block diagram of the inner loop current decoupling algorithm provided in an embodiment of the present invention.

[0039] Further, please refer to Figure 3 The inner loop current decoupling algorithms include: positive sequence dq inner loop current decoupling algorithm and negative sequence dq inner loop current decoupling algorithm.

[0040] This invention aims to protect a flexible DC low inner loop current control link delay control device, comprising: an electrical quantity acquisition module, a phase-locked loop (PLL) control module, an outer loop power control module, an inner loop current control module, and a bridge arm voltage reference value calculation module. The electrical quantity acquisition module acquires electrical quantity signals, processes them, and sends them to the PLL control module, outer loop power control module, and inner loop current control module respectively. The PLL control module calculates the AC voltage tracking angular frequency error based on the processed electrical quantity signals, performs sampling delay compensation, and sends the phase information to the electrical quantity acquisition module, outer loop power control module, and inner loop current control module respectively. The outer-loop power control module calculates the output through a PI controller. After selection between active and reactive power categories, it obtains the inner-loop current control reference value required for inner-loop current control and sends it to the inner-loop current control module. The inner-loop current control module controls the valve-side current through the inner-loop current PI controller, calculates the positive and negative sequence dq components of the submodule voltage required by the converter valve, and sends them to the bridge arm voltage reference value calculation module. The bridge arm voltage reference value calculation module calculates the three-phase reference voltage of the converter valve through positive and negative sequence dq inverse transformation, and obtains the reference values ​​of the submodule capacitor voltages connected to the six bridge arms of the converter valve through modulation voltage calculation, and sends the bridge arm voltage reference values ​​to the valve control system. The above technical solution has the following effects:

[0041] By employing parallel computing algorithms in the outer-loop power control module and the inner-loop current control module, and by reducing the execution time of the inner-loop current control algorithm, the delay of the inner-loop current control link is effectively reduced, the problem of AC high-frequency oscillation is suppressed, and the normal and stable operation of the AC power grid system and the flexible DC transmission system is ensured, thereby improving the stability and reliability of the flexible DC transmission system.

[0042] It should be understood that the specific embodiments described above are merely illustrative or explanatory of the principles of the invention and do not constitute a limitation thereof. Therefore, any modifications, equivalent substitutions, improvements, etc., made without departing from the spirit and scope of the invention should be included within the protection scope of the invention. Furthermore, the appended claims are intended to cover all variations and modifications falling within the scope and boundaries of the appended claims, or equivalent forms of such scope and boundaries.

Claims

1. A flexible DC low inner loop current control link delay control device, characterized in that, include: Electrical quantity acquisition module, phase-locked loop control module, outer loop power control module, inner loop current control module, and bridge arm voltage reference value calculation module; The electrical quantity acquisition module acquires electrical quantity signals, processes the electrical quantity signals, and then sends them to the phase-locked loop control module, the outer loop power control module, and the inner loop current control module, respectively. The phase-locked loop control module calculates the AC voltage tracking angular frequency error based on the processed electrical quantity signal, performs sampling delay compensation, and sends the phase information to the electrical quantity acquisition module, the outer loop power control module, and the inner loop current control module respectively. The outer loop power control module calculates and outputs through the PI controller. After selecting between active power and reactive power, it obtains the inner loop current control reference value required for the inner loop current control and sends it to the inner loop current control module. The inner loop current control module controls the valve-side current through the inner loop current PI controller, calculates the positive and negative sequence dq components of the submodule voltage required by the converter valve, and sends them to the bridge arm voltage reference value calculation module. The arm voltage reference value calculation module calculates the three-phase reference voltage of the converter valve through positive and negative sequence dq inverse transformation, and obtains the reference value of the sub-module capacitor voltage of the six arms of the converter valve through modulation voltage calculation, and sends the arm voltage reference value to the valve control system. The phase-locked loop control module uses the grid-side positive sequence voltage as the reference synchronization voltage for phase-locking. It calculates the AC voltage tracking angular frequency error by controlling the PI controller through the phase-locked loop and compensates for the sampling delay by using phase-locked loop phase compensation. The outer loop power control module and the inner loop current control module employ parallel computing.

2. The flexible DC low inner loop current control link delay control device according to claim 1, characterized in that, The electrical quantity acquisition module has a dielectric acquisition port and / or an optical dielectric acquisition port, which respectively acquire signals of grid-side voltage, grid-side current and valve-side current.

3. The flexible DC low inner loop current control link delay control device according to claim 1, characterized in that, The electrical quantity acquisition module performs analog-to-digital conversion, per-unit conversion, positive and negative sequence extraction, and dq transformation on the electrical quantity signal to obtain the converted digital quantity signal, and sends the digital quantity signal to the phase-locked loop control module, the outer loop power control module, and the inner loop current control module respectively.

4. The flexible DC low inner loop current control link delay control device according to claim 1, characterized in that, The electrical quantity acquisition module, the phase-locked loop control module, and the bridge arm voltage reference value calculation module are calculated in series.

5. The flexible DC low inner loop current control link delay control device according to claim 1, characterized in that, The bridge arm voltage reference value calculation module calculates the three-phase reference voltage of the converter valve through the inner loop current decoupling algorithm.

6. The flexible DC low inner loop current control link delay control device according to claim 5, characterized in that, The inner loop current decoupling algorithm includes: a positive sequence dq inner loop current decoupling algorithm and a negative sequence dq inner loop current decoupling algorithm.

Citation Information

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