Overcharge protection method and voltage converter using overcharge protection method

CN114978069BActive Publication Date: 2026-10-09ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC
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Patent Information

Application Number
CN202110198015.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-02-22
Publication Date
2026-10-09
Estimated Expiration
2041-02-22

AI Technical Summary

Technical Problem

然而,已知的D类放大器无法对应于不同模式而自动改变设定

Benefits of technology

[0008] According to the foregoing embodiments, the voltage converter's mode can be automatically detected, and the OCP mechanism setting can be automatically changed based on the voltage converter's operating mode. Therefore, the problem that known voltage converters cannot automatically change the OCP mechanism setting can be improved.

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Abstract

A method of overcharge protection is applied to a voltage converter, which is operable in a quad modulation mode (Q-mode) or a triad modulation mode (T-mode). The method of overcharge protection comprises: (a) determining whether the voltage converter is operating in the Q-mode or the T-mode; (b) if the voltage converter is operating in the T-mode, setting a current threshold of the voltage converter to a first overcurrent threshold; and (c) if the voltage converter is operating in the Q-mode, setting the current threshold to a second overcurrent threshold, wherein the first overcurrent threshold is less than the second overcurrent threshold.
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Description

Technical Field

[0001] This invention relates to an overcharge protection method and a voltage converter, and more particularly to an overcharge protection method and a voltage converter that can adjust the setting of the overcurrent protection mechanism according to the operating mode of the voltage converter. Background Technology

[0002] Class D amplifiers are known to have overcurrent issues. Overcurrent can be caused by a variety of factors. For example, overcurrent may be caused by overloading the Class D amplifier or a short circuit in the circuit. Therefore, Class D amplifiers may have an overcurrent protection (OCP) mechanism to limit their current and mitigate overcurrent problems.

[0003] Class D amplifiers can operate in different modes, and the OCP mechanism has corresponding appropriate settings for each mode. However, known Class D amplifiers cannot automatically change settings to correspond to different modes. Summary of the Invention

[0004] Therefore, one objective of this invention is to provide an OCP method that can automatically change the OCP mechanism according to different modes.

[0005] Another objective of this invention is to provide a voltage converter that can automatically change the OCP mechanism to correspond to different modes.

[0006] One embodiment of the present invention discloses an overcharge protection method applied to a voltage converter, the voltage converter being operable in a quaternary modulation mode (Q mode) or a ternary modulation mode (T mode). The overcharge protection method includes: (a) determining whether the voltage converter is operating in the Q mode or the T mode; (b) if the voltage converter is operating in the T mode, setting a current threshold value of the voltage converter as a first overcurrent threshold value; and (c) if the voltage converter is operating in the Q mode, setting the current threshold value as a second overcurrent threshold value, wherein the first overcurrent threshold value is less than the second overcurrent threshold value.

[0007] An embodiment of the present invention discloses a voltage converter operable in a quaternary modulation mode (Q mode) or a ternary modulation mode (T mode), comprising: an error amplifier for receiving an input signal; a PWM circuit for generating an initial PWM signal based on the output of the error amplifier; at least one Q / T logic circuit for generating at least one mode PWM signal using quaternary modulation or ternary modulation; an output circuit for generating an output signal based on the mode PWM signal; a mode detection circuit for detecting whether the voltage converter is operating in the Q mode or the T mode; and an overcurrent protection (OCP) circuit for limiting a current of the voltage converter below a current threshold; wherein if the voltage converter is operating in the T mode, the current threshold is set to a first overcurrent threshold; and wherein if the voltage converter is operating in the Q mode, the current threshold is set to a second overcurrent threshold, the second overcurrent threshold being greater than the first overcurrent threshold.

[0008] According to the foregoing embodiments, the voltage converter's mode can be automatically detected, and the OCP mechanism setting can be automatically changed based on the voltage converter's operating mode. Therefore, the problem that known voltage converters cannot automatically change the OCP mechanism setting can be improved. Attached Figure Description

[0009] Figure 1 A block diagram of a voltage converter according to an embodiment of the present invention is shown.

[0010] Figure 2 A flowchart illustrating an overcharge protection method according to an embodiment of the present invention is shown.

[0011] Figure 3 A block diagram of a voltage converter according to another embodiment of the present invention is shown.

[0012] Figure 4 The illustration depicts an embodiment of the present invention. Figure 1 The detailed circuit diagram of the embodiment shown is provided.

[0013] Figure 5 and Figure 6 Illustrations of different embodiments of the present invention Figure 1 and Figure 3 The flowchart shown illustrates the operation of the voltage converter.

[0014] Figure 7 To illustrate Figure 5 and Figure 6 The diagram shows the ignoring of time intervals.

[0015] Figure 8 The illustration depicts an embodiment of the present invention. Figure 1 and Figure 3The waveform diagram of the voltage converter is shown. Detailed Implementation

[0016] The present invention will now be described with reference to several embodiments. Furthermore, the terms "first," "second," and similar descriptions used in the following description are merely for defining different components, parameters, data, signals, or steps, and are not intended to limit their order. For example, a first device and a second device may represent two devices having the same structure.

[0017] Figure 1 A block diagram of a voltage converter 100 according to an embodiment of the present invention is shown. Note that in the following embodiments, a differential input / output voltage converter is used as an example. However, the voltage converter of the present invention can be implemented using a single input / output voltage converter. In one embodiment, the voltage converter 100 is a Class D amplifier, but this is not a limitation.

[0018] like Figure 1 As shown, the voltage converter 100 includes an error amplifier 101, a PWM circuit 103, Q / T logic circuits QTL_1 and QTL_2, and an output circuit 105. The error amplifier 101 receives input signals IN_P and IN_N. The PWM circuit 103 generates initial PWM signals PWM_i1 and PWM_i2 based on the output of the error amplifier 101. The Q / T logic circuits QTL_1 and QTL_2 generate mode PWM signals PWM_P and PWM_N, respectively. In the quaternary modulation mode (hereinafter referred to as Q mode), the Q / T logic circuits QTL_1 and QTL_2 use quaternary modulation to generate the mode PWM signals PWM_P and PWM_N, respectively. The voltage converter 100 has four operating states in Q mode. Details of Q mode and quaternary modulation are described in known documents such as US Patent No. 6262632, and are therefore omitted here for brevity.

[0019] In ternary modulation mode (hereinafter referred to as T mode), Q / T logic circuits QTL_1 and / or Q / T logic circuits QTL_2 use ternary modulation to generate mode PWM signals PWM_P and / or PWM_N, respectively. The voltage converter 100 has three operating states in T mode. Details of T mode and ternary modulation are described in patents such as US Patent No. 6614297, and are therefore omitted here for brevity.

[0020] The pulse width of the mode PWM signal in T mode is shorter than that in Q mode. Therefore, the pulse width of the mode PWM signal in T mode may be shorter than the detection time of OCP (Over Charge Protection), potentially causing circuit problems. Therefore, in this invention, the OCP mechanism setting is automatically changed according to the operating mode of the voltage converter 100. Additionally, the output circuit 105 generates output signals OS_P and OS_N based on the mode PWM signals PWM_P and PWM_N.

[0021] An embodiment of the present invention discloses an overcharge protection method, which can be performed by... Figure 1 The voltage converter 100 shown is used and includes the following: Figure 2 The steps shown are as follows:

[0022] Step 201

[0023] Determine whether voltage converter 100 is operating in Q mode or T mode.

[0024] Step 203

[0025] If the voltage converter operates in T mode, the current threshold of the voltage converter 100 is set to the first overcurrent threshold.

[0026] Step 205

[0027] If the voltage converter operates in Q mode, the current threshold is set as the second overcurrent threshold. Since the voltage converter 100 has a smaller current in T mode, the first current threshold is less than the second overcurrent threshold. In one embodiment, the first overcurrent threshold is half the second overcurrent threshold.

[0028] The first and second overcurrent thresholds are the maximum current of the voltage converter 100. Therefore, in T mode, the OCP mechanism limits the current of the voltage converter 100 to less than or equal to the first overcurrent threshold. Furthermore, in Q mode, the OCP mechanism limits the current of the voltage converter 100 to less than or equal to the second overcurrent threshold. The OCP mechanism can be... Figure 4 The OCP circuit 108 shown is executed, and it can be implemented by various circuits. For example, the OCP circuit 108 can be a processor that executes at least one program to perform the OCP mechanism. As another example, the OCP circuit 108 can be a logic circuit containing multiple logic gates whose logic values ​​can control the current of the voltage converter 100 based on the output signal of the voltage converter 100. Those skilled in the art will understand how to implement this circuit based on the OCP circuit 108 disclosed in this invention; therefore, for the sake of brevity, its description is omitted.

[0029] In one embodiment, step 201 determines whether the voltage converter 100 is operating in Q mode or T mode based on the pulse width of the mode PWM signal PWM_P or PWM_N. Similarly, in one embodiment, step 201 detects the pulse width at the zero-crossing points of the input signals IN_P and IN_N of the voltage converter 100. These steps can be performed by... Figure 3 The circuit shown illustrates a block diagram of a voltage converter according to another embodiment of the present invention.

[0030] like Figure 3 As shown, except Figure 1 In addition to the circuit shown, the voltage converter 100 also includes a PWM width detection circuit 107, an OCP detection circuit 109, and a zero-crossing detection circuit 111. The PWM width detection circuit 107 is used to detect the pulse width of the mode PWM signals PWM_P and PWM_N, and can therefore be considered a mode detection circuit. Furthermore, the OCP detection circuit 109 generates an OCP flag based on the detected pulse width (i.e., based on whether the voltage converter is operating in T mode or Q mode) to adjust the OCP mechanism setting. Additionally, the zero-crossing detection circuit 111 receives the input signals IN_P and IN_N and is used to detect the zero-crossing points of the input signals IN_P and IN_N. The PWM width detection circuit 107, the OCP detection circuit 109, and the zero-crossing detection circuit 111 can be implemented by logic circuits containing multiple logic gates. Based on the information disclosed in this invention, those skilled in the art will understand how to implement the PWM width detection circuit 107, the OCP detection circuit 109, and the zero-crossing detection circuit 111; for the sake of brevity, further details are omitted here.

[0031] Figure 4 The illustration depicts an embodiment of the present invention. Figure 1 The detailed circuit diagram of the embodiment shown is also provided. Please note that... Figure 4 The circuits shown are merely illustrative examples and are not intended to limit the scope of the invention. Figure 4 As shown, the error amplifier 101 includes resistors R_1i and R_2i, and capacitors C_1 and C_2. Furthermore, the PWM circuit 103 includes hysteresis comparators CM_1 and CM_2 to generate initial PWM signals PWM_i1 and PWM_i2 based on the output of the error amplifier 101 and the triangular wave signal Tr. The output circuit 105 generates output signals OS_P and OS_N based on the mode PWM signals PWM_P and PWM_N. The output circuit 105 can have different structures corresponding to different desired circuit designs. For example, the output circuit 105 can have switches and capacitors. The switches charge or discharge the capacitors to generate output signals OS_P and OS_N.

[0032] Figure 5 and Figure 6 Illustrations of different embodiments of the present invention Figure 1 and Figure 3 The flowchart shown illustrates the operation of the voltage converter. Please also note that... Figure 5 and Figure 6 These are merely examples and are not intended to limit the operation of the voltage converter provided by this invention.

[0033] Figure 5 Includes the following steps:

[0034] Step 501

[0035] start.

[0036] Step 503

[0037] Determine whether the voltage converter 100 is operating in Q mode. If yes, proceed to step 509; otherwise, proceed to step 505.

[0038] As described above, many methods can be used to determine which mode the voltage converter 100 is operating in. One method is to detect the pulse width. In another embodiment, the Q / T logic circuit QTL_1 or QTL_2 can generate indication data. For example, the Q / T logic circuit QTL_1 can generate indication data A when operating in Q mode, and can generate indication data B when operating in T mode. Therefore, the operating mode of the voltage converter 100 can be determined based on the indication data.

[0039] Step 505

[0040] Set the current threshold of the voltage converter as the first overcurrent threshold.

[0041] In one embodiment, if the voltage converter operates in T mode, a first time interval (e.g., desurge time) is set for the neglected time interval of the voltage converter 100. If the voltage converter operates in Q mode, a second time interval is set for the neglected time interval of the voltage converter 100. The first time interval is shorter than the second time interval. Therefore, step 505 may further include setting the neglected time interval of the voltage converter 100 to the first time interval. Details of the neglected time interval will be described later.

[0042] Step 506

[0043] Generate an OCP flag corresponding to the T mode.

[0044] Step 507

[0045] In one embodiment, it is further determined whether the pulse width of the mode PWM signal is greater than a pulse width threshold (e.g., 500 ns) in the T mode. If the pulse width is not greater than the pulse width threshold, the current threshold is set (remained) at the first overcurrent threshold (i.e., return to step 505), because this means the pulse width is small. Conversely, if the pulse width is greater than the pulse width threshold, the current threshold is set at the second overcurrent threshold (i.e., go to step 509), because this means the pulse width is large.

[0046] Step 509

[0047] The current threshold of the voltage converter is set as a second overcurrent threshold, which is greater than the first overcurrent threshold. In one embodiment, the first overcurrent threshold is half of the second overcurrent threshold. As described above, if the voltage converter operates in Q mode, the neglected time interval can be set as the second time interval. Therefore, step 509 may include: setting the neglected time interval as the second time interval.

[0048] Step 510

[0049] Generate an OCP flag corresponding to the Q mode.

[0050] Step 511

[0051] Determine if the input signal is at a zero-crossing point. If not, return to step 509 to maintain the second overcurrent threshold and the second time interval. If yes, proceed to step 503. This step represents a re-evaluation of the voltage converter 100's mode when the input signal crosses zero.

[0052] exist Figure 6 In this embodiment, the flowchart further includes step 601, which follows step 503 and precedes steps 505 and 509. In step 601, it is determined whether the frequency of the PWM signal is less than a frequency threshold (e.g., 1MHz). If not, even if the voltage converter operates in Q mode, step 505 is initiated to set the current threshold to a first overcurrent threshold, as this indicates a smaller pulse width. If yes, step 509 is initiated to set the current threshold to a second overcurrent threshold, as this indicates a larger pulse width.

[0053] Figure 7 To illustrate Figure 5 and Figure 6The diagram illustrates the neglect time interval. A surge G may occur when the mode PWM signal PWM_P or PWM_N transitions between different logic levels. Therefore, the OCP mechanism does not compare the current of the voltage converter 100 during the neglect time interval Ti to avoid false OCP triggering. However, for mode PWM signals with smaller pulse widths, the neglect time interval may occupy a larger proportion of the mode PWM signal's pulse width. Therefore, the neglect time interval for mode PWM signals with smaller pulse widths (e.g., T mode) is set to be smaller than the time interval for mode PWM signals with larger pulse widths (e.g., Q mode).

[0054] Therefore, as described above, if the voltage converter operates in T mode, the neglected time interval of the voltage converter 100 is set as a first time interval; if the voltage converter operates in Q mode, the neglected time interval is set as a second time interval. The first time interval is shorter than the second time interval. In one embodiment, the first time interval is 0.

[0055] To make it easier to understand, the following uses a waveform diagram as an example to illustrate the operation of the voltage converter 100. Figure 8 The illustration depicts an embodiment of the present invention. Figure 1 and Figure 3 The waveform diagram of the voltage converter is shown. (As shown) Figure 8 As shown, when the input signals IN_P and IN_N cross zero, the pulse widths of the mode PWM signals PWM_N and PWM_P are detected. In Q mode, the pulse widths of the mode PWM signals PWM_N and PWM_P are larger, and the current threshold of the OCP mechanism is a larger first overcurrent threshold. Conversely, in T mode, the pulse widths of the mode PWM signals PWM_N and PWM_P are smaller, and the current threshold of the OCP mechanism is a smaller second overcurrent threshold. In one embodiment, only one of the mode PWM signals PWM_N and PWM_P is generated in T mode.

[0056] According to the foregoing embodiments, the voltage converter's mode can be automatically detected, and the OCP mechanism setting can be automatically changed based on the voltage converter's operating mode. Therefore, the problem that known voltage converters cannot automatically change the OCP mechanism setting can be improved.

[0057] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made in accordance with the claims of the present invention should be included within the scope of the present invention.

[0058] [Symbol Explanation]

[0059] 100 voltage converter

[0060] 101 Error Amplifier

[0061] 103PWM circuit

[0062] QTL_1, QTL_2 Q / T logic circuits

[0063] 105 output circuit

[0064] 107PWM Width Detection Circuit

[0065] 108OCP circuit

[0066] 109OCP detection circuit

[0067] 111 Zero-crossing detection circuit

[0068] Capacitors C1 and C2

[0069] CM_1, CM_2 hysteresis comparators

[0070] Resistors R_1i, R_2i, R_1f, R_2f

Claims

1. An overcharge protection method applied to a voltage converter, the voltage converter being operable in a quaternary modulation mode (Q mode) or a ternary modulation mode (T mode), the overcharge protection method comprising: Step (a) determines whether the voltage converter is operating in the Q mode or the T mode; Step (b) If the voltage converter is operating in the T mode, a current threshold of the voltage converter is set to a first overcurrent threshold; and Step (c) If the voltage converter is operating in the Q mode, the current threshold is set as a second overcurrent threshold, wherein the first overcurrent threshold is less than the second overcurrent threshold.

2. The overcharge protection method as described in claim 1, further comprising: If the voltage converter operates in the T mode, a neglect time interval of the voltage converter is set as a first time interval; if the voltage converter operates in the Q mode, the neglect time interval is set as a second time interval, wherein the first time interval is shorter than the second time interval.

3. The overcharge protection method as described in claim 2, wherein the first time interval is 0.

4. The overcharge protection method as described in claim 1, The voltage converter also includes an output circuit for generating an output signal based on a mode PWM signal; In step (a), the pulse width of the PWM signal of the mode is detected to determine whether the voltage converter is operating in the Q mode or the T mode.

5. The overcharge protection method as described in claim 4, further comprising: After the voltage converter operates in the T mode and the current threshold is set to the first overcurrent threshold, it is determined whether the pulse width is greater than a pulse width threshold. If the pulse width is not greater than the pulse width threshold, the current threshold is set as the first overcurrent threshold; and if the pulse width is greater than the pulse width threshold, the current threshold is set as the second overcurrent threshold.

6. The overcharge protection method as described in claim 4, further comprising: Before the voltage converter operates in the Q mode and the current threshold is set to the first overcurrent threshold, it is determined whether a frequency of the PWM signal is greater than a frequency threshold. If the frequency is not less than the frequency threshold, the current threshold is set as the first overcurrent threshold; and if the frequency is less than the frequency threshold, the current threshold is set as the second overcurrent threshold.

7. The overcharge protection method as claimed in claim 4, wherein step (a) detects the pulse width at the zero-crossing point of the input signal of the voltage converter.

8. The overcharge protection method as described in claim 1, wherein the first overcurrent threshold value is half of the second overcurrent threshold value.

9. The overcharge protection method as described in claim 1, wherein the voltage converter is a Class D amplifier.

10. A voltage converter operable in a quaternary modulation mode (Q mode) or a ternary modulation mode (T mode), comprising: An error amplifier is used to receive the input signal; A PWM circuit is used to generate an initial PWM signal based on the output of the error amplifier; At least one Q / T logic circuit is used to generate at least one mode PWM signal using quaternary modulation or ternary modulation. An output circuit is used to generate an output signal based on the PWM signal of this mode. A mode detection circuit is used to detect whether the voltage converter is operating in the Q mode or the T mode; An overcurrent protection (OCP) circuit is used to limit the current of the voltage converter below a current threshold. If the voltage converter operates in the T mode, the current threshold is set to a first overcurrent threshold; and If the voltage converter operates in the Q mode, the current threshold is set to a second overcurrent threshold, which is greater than the first overcurrent threshold.

11. The voltage converter of claim 10, wherein if the voltage converter operates in the T mode, a neglect time interval of the OCP circuit is set as a first time interval, and if the voltage converter operates in the Q mode, the neglect time interval is set as a second time interval, wherein the first time interval is shorter than the second time interval.

12. The voltage converter of claim 11, wherein the first time interval is 0.

13. The voltage converter as claimed in claim 10, The mode detection circuit detects the pulse width of the PWM signal for that mode to determine whether the voltage converter is operating in the Q mode or the T mode.

14. The voltage converter as described in claim 13, After the voltage converter operates in the T mode and the current threshold is set to the first overcurrent threshold, the mode detection circuit also determines whether the pulse width is greater than a pulse width threshold. If the pulse width is not greater than the pulse width threshold, the current threshold is set as the first overcurrent threshold; and if the pulse width is greater than the pulse width threshold, the current threshold is set as the second overcurrent threshold.

15. The voltage converter of claim 13, further comprising: Before the voltage converter operates in the Q mode and the current threshold is set to the first overcurrent threshold, the mode detection circuit also determines whether a frequency of the PWM signal is greater than a frequency threshold. If the frequency is not less than the frequency threshold, the current threshold is set as the first overcurrent threshold, and if the frequency is less than the frequency threshold, the current threshold is set as the second overcurrent threshold.

16. The voltage converter of claim 13, wherein the mode detection circuit detects the pulse width at the zero-crossing point of the input signal of the voltage converter.

17. The voltage converter of claim 10, wherein the first overcurrent threshold is half of the second overcurrent threshold.

18. The voltage converter of claim 10, wherein the voltage converter is a Class D amplifier.

Citation Information

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