A method for implementing a two-step mode of a precision time protocol transparent clock
By directly modifying the residence time of PTP packets using switching chips in PTP TC devices, the problem of limited improvement in PTP time synchronization accuracy in the prior art is solved, and more efficient time synchronization and simplified system design is achieved.
Patent Information
- Application Number
- CN202210513151.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-05-12
- Publication Date
- 2025-03-18
- Estimated Expiration
- 2042-05-12
AI Technical Summary
When the prior art realizes the PTP transparent clock, it is difficult to efficiently modify PTP packets during high-speed transmission, resulting in limited improvement in time synchronization accuracy.
The two-step mode of PTP TC is realized through the switching chip, which directly records and calculates the dwell time on the physical layer or the data link layer, and modifies the packets in the switching chip without relying on the software protocol stack.
It simplifies the design of TC equipment system, reduces the delay in PTP message processing, improves the time synchronization accuracy of PTP system, and reduces the system complexity and development difficulty.
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Figure CN114978396B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of Ethernet time synchronization, and in particular to a method for realizing a two-step mode of a precise time protocol transparent clock. Background Art
[0002] PTP (Precision Time Protocol) defined by IEEE1588 is a widely used time synchronization technology solution to meet the needs of distributed network time synchronization for measurement and control applications. Network clock synchronization mainly includes frequency synchronization and time synchronization. PTP calculates and recovers the local clock and frequency by recording the timestamps of specific PTP protocol messages entering and leaving the device. High-precision time synchronization can be achieved with hardware assistance. With the advancement of software and hardware technology, the time synchronization accuracy of PTP can reach tens of nanoseconds.
[0003] TC (Transparent Clock) is an intermediate node in the network. It usually does not need to synchronize with the master clock. However, it is necessary to record the delay of the PTP event message passing through the TC device between the master clock and the slave clock, that is, the residence time. This delay is recorded in the Correction Field (CF correction field) field in the corresponding message for the precise clock synchronization calculation of the slave clock.
[0004] There are two ways of PTP time synchronization: delayed request response E2E (End to End) and peer delay P2P (Peer to Peer) mechanism, see Figure 1 The former calculates the time difference based on the overall path delay between the master and slave clocks, while the latter calculates the time difference based on the delay of each link between the master and slave clocks. Therefore, transparent clock TC is divided into E2E TC and P2PTC. In addition to recording the residence time of the PTP event message passing through the TC device, the P2P TC also needs to record the average link delay connected to the TC in the CorrectionField field in the corresponding message.
[0005] TC can be implemented in one step or two steps. Taking E2E TC as an example, the one-step method requires adding the local ResidenceTime to the CorrectionField in the PTPSync and Delay Req messages. The residence time of the PTP message on the TC is calculated as follows:
[0006] Residence Time = departure timestamp EgressTs – arrival timestamp IngressTs
[0007] The arrival and departure timestamps of messages are usually obtained on the physical layer PHY or the data link layer MAC. The one-step method requires that the residence time of the message be calculated on the physical layer PHY or the data link layer MAC when the message leaves the device and the message be modified in real time. For UDP-type PTP messages, the checksum field in the UDP header of the message also needs to be modified. This places high demands on the current implementation of the physical layer PHY or the data link layer MAC, especially for MAC and PHY with a rate of more than 10Gbps, it is more difficult to modify the message during high-speed transmission.
[0008] like Figure 2 As shown, the two-step method for implementing PTP TC at present usually records the arrival and departure timestamps of Sync and DelayReq messages on the physical layer PHY or the data link layer MAC and then directly forwards the messages. There is no need to modify the messages on the physical layer PHY or the data link layer MAC. After the upper-layer software protocol stack module obtains and calculates the residence time through the CPU, the residence time is added to the FollowUp message corresponding to Sync or the DelayResp message corresponding to DelayReq. Compared with the one-step mode, this solution calculates the residence time through the upper-layer software module and modifies it to the message, which simplifies the difficulty of modifying the message in real time on the hardware physical layer PHY or the data link layer MAC, but it also brings system complexity, especially the delay in calculating the residence time and modifying the message by the software compared to the hardware implementation will introduce errors, resulting in limited improvement in time accuracy. Summary of the invention
[0009] In order to solve the above technical problems, the present invention discloses a method for implementing a two-step mode of a precise time protocol transparent clock, which implements the two-step mode of PTP TC through a switching chip, uses the switching chip to modify the residence time to the message instead of using a software protocol stack, simplifies the design of the TC device system, reduces the processing delay of the PTP message in the TC device, and improves the time synchronization accuracy of the PTP system.
[0010] In an embodiment of the present invention, a method for implementing a two-step mode of a precision time protocol transparent clock includes the following steps: S1: when a PTP message is detected on the inlet physical layer PHY or the data link layer MAC, the arrival timestamp IngressTs is recorded, and then the process proceeds to step S2; S2: the PTP message is parsed by the switching chip, and it is determined whether it is a Sync or DelayReq message. If so, the message feature information and the residence time are stored in the FIFO queue of the switching chip, and the exit PHY / MAC records the departure timestamp EgressTs to the switching chip. The FIFO queue of the switching chip is changed, and then the process goes to step S4, otherwise the process goes to step S3; S3: Determine whether the PTP message is a FollowUp or DelayResp message through the switching chip. If so, search the FIFO according to the message feature information to obtain the residence time, and modify the residence time to the message correction domain. Then, the processed PTP message is forwarded to PHY / MAC and the process goes to step S4, otherwise the switching chip directly forwards the PTP message to the export PHY / MAC and the process goes to step S4; S4: Send the message through the export PHY / MAC.
[0011] In a further technical solution, in step S2, parsing the PTP message includes: parsing the type, domain number, source port identifier and sequence number of the PTP message according to the characteristics of the PTP message.
[0012] In a further technical solution, in step S2, if it is a Sync or Delay Req message, the switching chip records the domain number, source port identifier, and sequence number of the message and stores them in the FIFO queue, and records the message departure timestamp EgressTs to the FIFO queue at the egress MAC / PHY, and calculates the residence time ResidenceTime = EgressTs-IngressTs by the switching chip, and stores it in the FIFO queue with the same feature information as the message.
[0013] In a further technical solution, in step S3, if it is a FollowUp or DelayResp message, the FIFO queue is searched according to the parsed domain number, source port identifier, and sequence number, the matching message feature information is found and the residence time stored in the FIFO queue of the matching entry is obtained, and the residence time is modified to the correction domain of the message.
[0014] In a further technical solution, in step S3, when the dwell time is modified to the correction field of the message, if the message carrying the PTP is a UDP message, it is also necessary to correct the checksum field in the UDP header.
[0015] In a further technical solution, in step S3, the correction of the correction domain includes, in addition to the dwell time, also parameters for delay asymmetry correction.
[0016] In a further technical solution, for a two-step P2P transparent clock, in step S2, only the Sync message needs to be determined and processed, and in step S3, only the FollowUp message needs to be determined and processed. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 It is a schematic diagram of the E2E TC time synchronization method;
[0018] Figure 2 It is a schematic diagram of the two-step E2E TC software modification message implementation method;
[0019] Figure 3 It is a schematic diagram of a two-step E2E TC chip modification message implementation method of the present invention;
[0020] Figure 4 It is a schematic diagram of the two-step E2E TC chip modification message processing flow of the present invention. DETAILED DESCRIPTION
[0021] The technical solution of the present invention is further described below in conjunction with specific embodiments, but the present invention is not limited to these embodiments.
[0022] The main problem solved by the present invention is how to implement the two-step mode of PTP TC through a switching chip, and modify the local residence time of Sync and DelayReq messages to the CorrectionField field of FollowUp corresponding to Sync and DelayResp messages corresponding to DelayReq while forwarding PTP messages. Specific implementation solution:
[0023] 1. For Sync and DelayReq messages: obtain the message arrival timestamp IngressTs on the ingress physical layer PHY or data link layer MAC and transmit it to the egress, obtain the message departure timestamp EgressTs on the egress physical layer PHY or data link layer MAC, calculate the residence time ResidenceTime = EgressTs – IngressTs, store the characteristic information (DomainNumber (domain number), SourcePortIdentity (source port identifier), SequenceID (sequence number)) and residence time ResidenceTime in the message PTP header into a first-in-first-out FIFO (First In First Out) queue of the switching chip, and finally the switching chip forwards the message from the egress;
[0024] 2. For FollowUp and DelayResp messages: the switching chip parses and extracts the characteristic information (DomainNumber, SourcePortIdentity, SequenceID) in the message PTP header and matches the message characteristic information in the FIFO queue that stores the residence time ResidenceTime. After finding the matching entry in the queue, the residence time ResidenceTime of the entry is added to the CorrectionField field in the message PTP header. For UDP type PTP messages, the checksum field in the UDP header of the message also needs to be modified. After the switching chip modifies the message, it forwards the message from the egress.
[0025] See also Figure 3 and Figure 4 , a chip implementation method of a two-step mode of a precision time protocol transparent clock includes several processing steps, including:
[0026] (1) Record the message arrival timestamp IngressTs at MAC / PHY.
[0027] (2) Parse the PTP message and parse the type, domain number, source port identifier, sequence number and other information of the PTP message according to the characteristics of the PTP message.
[0028] (3) Determine whether it is a Sync or Delay Req message. If it is a Sync or Delay Req message, record the message feature information (DomainNumber, SourcePortIdentity, SequenceID) and store it in the FIFO queue. Record the message departure timestamp EgressTs in the MAC / PHY to the FIFO, calculate the residence time ResidenceTime = EgressTs - IngressTs and store it in the FIFO queue together with the message feature information.
[0029] (4) Determine whether it is a FollowUp or DelayResp message. If it is a FollowUp or DelayResp message, search the FIFO queue according to the parsed message feature information (DomainNumber, SourcePortIdentity, SequenceID), find the matching message feature information and obtain the residence time stored in the FIFO queue of the matching entry, and modify the residence event to the CorrectionField correction domain of the message. If the message carrying PTP is a UDP message, it is also necessary to correct the checksum field in the UDP header.
[0030] (5) The switch chip forwards the PTP message to the egress MAC / PHY.
[0031] It can be understood that for the two-step P2P TC, there is no need to process the DelayReq and DelayResp messages, and the processing of the Sync and FollowUp messages is consistent with the processing flow of the two-step E2E TC.
[0032] In addition, for corrections in the correction domain, in addition to the dwell time, there may be parameters for delay asymmetry correction to achieve more accurate time synchronization. For example, for two-step E2E TC: add the ingress delayAsymmetry (delay asymmetry correction) to the correctionField field of the FollowUp message; subtract the egress delayAsymmetry (delay asymmetry correction) from the correctionField field of the DelayResp message.
[0033] In an embodiment of the present invention, a method for implementing a two-step mode of a precision time protocol transparent clock includes the following steps:
[0034] S1: When a PTP message is detected on the ingress physical layer PHY or the data link layer MAC, the arrival timestamp IngressTs is recorded, and then the process proceeds to step S2;
[0035] S2: parse the PTP message through the switching chip and determine whether it is a Sync or DelayReq message. If it is, store the message feature information and residence time in the FIFO queue of the switching chip, and the exit PHY / MAC records the departure timestamp EgressTs in the FIFO queue of the switching chip, and then proceed to step S4, otherwise proceed to step S3;
[0036] S3: Determine whether the PTP message is a FollowUp or DelayResp message through the switching chip. If yes, search the FIFO to obtain the residence time according to the message feature information, and modify the residence time to the message correction field. Then, forward the processed PTP message to PHY / MAC and proceed to step S4. Otherwise, the switching chip directly forwards the PTP message to the egress PHY / MAC and proceeds to step S4.
[0037] S4: Send the message through the egress PHY / MAC.
[0038] In a further technical solution, in step S2, parsing the PTP message includes: parsing the type, domain number, source port identifier and sequence number of the PTP message according to the characteristics of the PTP message.
[0039] In a further technical solution, in step S2, if it is a Sync or Delay Req message, the switching chip records the domain number, source port identifier, and sequence number of the message and stores them in the FIFO queue, and records the message departure timestamp EgressTs to the FIFO queue at the egress MAC / PHY, and calculates the residence time ResidenceTime = EgressTs-IngressTs by the switching chip, and stores it in the FIFO queue with the same feature information as the message.
[0040] In a further technical solution, in step S3, if it is a FollowUp or DelayResp message, the FIFO queue is searched according to the parsed domain number, source port identifier, and sequence number, the matching message feature information is found and the residence time stored in the FIFO queue of the matching entry is obtained, and the residence time is modified to the correction domain of the message.
[0041] In a further technical solution, in step S3, when the dwell time is modified to the correction field of the message, if the message carrying the PTP is a UDP message, it is also necessary to correct the checksum field in the UDP header.
[0042] In a further technical solution, in step S3, the correction of the correction domain includes, in addition to the dwell time, also parameters for delay asymmetry correction.
[0043] In a further technical solution, for a two-step P2P transparent clock, in step S2, only the Sync message needs to be determined and processed, and in step S3, only the FollowUp message needs to be determined and processed.
[0044] The present invention realizes the two-step mode of PTP TC through a switching chip, uses the switching chip to modify the residence time to the message instead of using the software protocol stack, simplifies the design of the TC device system, reduces the processing delay of the PTP message in the TC device, and improves the time synchronization accuracy of the PTP system. While improving the time accuracy, it is not necessary for the upper-layer software module to participate in the PTP message processing, which reduces the difficulty of system development and also reduces the development and maintenance costs of the product.
[0045] The above is only a preferred embodiment of the present invention. It should be pointed out that a person skilled in the art can make several modifications and improvements without departing from the inventive concept of the present invention, which all belong to the protection scope of the present invention.
Claims
1. A method for implementing a two-step mode of a precision time protocol transparent clock, characterized in that: The following steps are involved: S1: When a PTP message is detected on the ingress physical layer PHY or the data link layer MAC, the arrival timestamp IngressTs is recorded, and then the process proceeds to step S2; S2: Parse the PTP message through the switching chip and determine whether it is a Sync or DelayReq message. If it is, the egress PHY / MAC records the departure timestamp EgressTs to the FIFO queue of the switching chip, and stores the message feature information and residence time in the FIFO queue of the switching chip, and then proceeds to step S4, otherwise proceeds to step S3; S3: Determine whether the PTP message is a FollowUp or DelayResp message through the switching chip. If yes, search the FIFO to obtain the residence time according to the message feature information, and modify the residence time to the message correction field. Then, forward the processed PTP message to PHY / MAC and proceed to step S4. Otherwise, the switching chip directly forwards the PTP message to the egress PHY / MAC and proceeds to step S4. S4: Send the message through the egress PHY / MAC; In step S2, if it is a Sync or Delay Req message, the switching chip records the domain number, source port identifier, and sequence number of the message and stores them in the FIFO queue; In step S3, if it is a FollowUp or DelayResp message, the FIFO queue is searched according to the parsed domain number, source port identifier, and sequence number, the matching message feature information is found and the residence time stored in the FIFO queue of the matching entry is obtained, and the residence time is modified to the correction domain of the message.
2. The method according to claim 1, characterized in that In step S2, parsing the PTP message includes: parsing the type, domain number, source port identifier and sequence number of the PTP message according to the characteristics of the PTP message.
3. The method according to claim 1, characterized in that The egress MAC / PHY records the message departure timestamp EgressTs to the FIFO queue, and the switching chip calculates the residence time ResidenceTime = EgressTs - IngressTs, and stores it in the FIFO queue with the same message feature information.
4. The method according to claim 3, characterized in that In step S3, when the dwell time is modified to the correction field of the message, if the message carrying PTP is a UDP message, it is also necessary to correct the checksum field in the UDP header.
5. The method according to claim 3, characterized in that: In step S3, the correction of the correction domain includes parameters for delay asymmetry correction in addition to the dwell time.
6. The method according to claim 1, characterized in that For a two-step P2P transparent clock, in step S2, only the Sync message needs to be determined and processed, and in step S3, only the FollowUp message needs to be determined and processed.
Citation Information
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