Image processing chip, method and electronic device

By combining DDR SDRAM and SRAM in the image processing chip, and batch storage to DDR SDRAM when the SRAM storage data reaches the threshold, the problem of low DDR SDRAM processing efficiency in the image processing chip is solved, and more efficient image data processing is achieved.

CN114979539BActive Publication Date: 2025-04-11GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP LTD
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Patent Information

Application Number
CN202110209322.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-02-24
Publication Date
2025-04-11
Estimated Expiration
2041-02-24

AI Technical Summary

Technical Problem

When electronic devices process image data, the double-rate synchronous dynamic random memory (DDR SDRAM) processing efficiency in the image processing chip that depends on is not high.

Method used

Static random access memory (SRAM) is introduced into the image processing chip. When the amount of data stored in the SRAM reaches a certain threshold, the data is stored in batches to DDR SDRAM to avoid frequent switching of storage addresses and interrupting the stored procedures of image data.

Benefits of technology

Through this method, the processing efficiency of DDR SDRAM when storing image data is improved, and system cost and power consumption are reduced.

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Abstract

The embodiment of the present application discloses an image processing chip, which includes a double rate synchronous dynamic random access memory and a static random access memory, and the double rate synchronous dynamic random access memory and the static random access memory are connected through a system bus; when the amount of data stored in the static random access memory is greater than a first data amount threshold, the data stored in the static random access memory is stored in the double rate synchronous dynamic random access memory. The present application can improve the processing efficiency of the double rate synchronous dynamic random access memory in the image processing chip that the electronic device relies on when processing image data.
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Description

Technical Field

[0001] The present application relates to the field of image technology, and in particular to an image processing chip, method, storage medium and electronic device. Background Art

[0002] With the development of technology, the image processing capabilities of electronic devices are getting stronger and stronger. Based on this, users often use electronic devices to capture images, such as taking photos or recording videos. However, in the related art, the processing efficiency of the double-rate synchronous dynamic random access memory in the image processing chip relied on by the electronic device for image data processing is not high. Summary of the invention

[0003] The embodiments of the present application provide an image processing chip, method, storage medium and electronic device, which can improve the processing efficiency of a double-rate synchronous dynamic random access memory in an image processing chip that the electronic device relies on when processing image data.

[0004] In a first aspect, an embodiment of the present application provides an image processing chip, the image processing chip comprising a double rate synchronous dynamic random access memory and a static random access memory, the double rate synchronous dynamic random access memory and the static random access memory being connected via a system bus;

[0005] When the amount of data stored in the static random access memory is greater than a first data amount threshold, the data stored in the static random access memory is stored in the double rate synchronous dynamic random access memory.

[0006] In a second aspect, an embodiment of the present application further provides a data processing method, which is applied to an image processing chip, wherein the image processing chip includes a double rate synchronous dynamic random access memory and a static random access memory, and the double rate synchronous dynamic random access memory and the static random access memory are connected via a system bus, and the data processing method includes:

[0007] When the amount of data stored in the static random access memory is greater than a first data amount threshold, the data stored in the static random access memory is stored in the double rate synchronous dynamic random access memory.

[0008] In a third aspect, an embodiment of the present application further provides an electronic device, comprising the image processing chip provided by any embodiment of the present application.

[0009] In an embodiment of the present application, the image processing chip includes a double rate synchronous dynamic random access memory and a static random access memory, and the double rate synchronous dynamic random access memory and the static random access memory are connected through a system bus. In the embodiment of the present application, the static random access memory can be used to store data until the amount of stored data reaches a first data amount threshold, and then the stored data is stored in batches into the double rate synchronous dynamic random access memory. Therefore, the double rate synchronous dynamic random access memory does not need to frequently switch storage addresses during the process of storing image data, and will not interrupt the storage process of image data multiple times. Therefore, the processing efficiency of the double rate synchronous dynamic random access memory in the image processing chip that the electronic device relies on when processing image data can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0011] Figure 1 A first structural schematic diagram of the image processing chip provided in an embodiment of the present application.

[0012] Figure 2 A second structural schematic diagram of the image processing chip provided in an embodiment of the present application.

[0013] Figure 3 A first flow chart of a data processing method provided in an embodiment of the present application.

[0014] Figure 4 A second flow chart of the data processing method provided in an embodiment of the present application.

[0015] Figure 5 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0016] Please refer to the drawings, where the same component symbols represent the same components. The principle of the present application is illustrated by implementing it in an appropriate computing environment. The following description is based on the illustrated specific embodiments of the present application, which should not be considered as limiting other specific embodiments of the present application that are not described in detail herein.

[0017] With the development of technology, the image processing capabilities of electronic devices are getting stronger and stronger. Based on this, users often use electronic devices to capture images, such as taking photos or recording videos. However, in the related art, the processing efficiency of the double-rate synchronous dynamic random access memory in the image processing chip relied on by the electronic device for image data processing is not high.

[0018] See also Figure 1 , Figure 1 is a schematic diagram of the first structure of the image processing chip provided in the embodiment of the present application. Figure 1 As shown, the image processing chip 200 provided in the embodiment of the present application may include a double data rate synchronous dynamic random access memory (Double Data Rate SDRAM, DDR SDRAM) 230 and a static random access memory 250 (Static Random Access Memory, SRAM), and the double data rate synchronous dynamic random access memory 230 and the static random access memory 250 are connected through a system bus 260. As the requirements for the image processing capabilities of electronic devices become stronger and stronger, the image processing chip 200 may also include an image signal processor 210, a neural network processor module 220, etc., wherein the image signal processor 210 and the neural network processor module 220 are also connected through the system bus 260. The image signal processor 210, the neural network processor module 220, etc. in the image processing chip 200 are used to process the image data collected by the camera, and store the processed image data into the double data rate synchronous dynamic random access memory 230 through the system bus 260.

[0019] It can be understood that, especially when the image data is a video image, the amount of image data is large, and users have relatively high requirements for the efficiency of image data processing and the quality of image data. Therefore, a large amount of image data interacts with the double-rate synchronous dynamic random access memory 230, requiring a high processing efficiency of the double-rate synchronous dynamic random access memory.

[0020] If multiple double-rate synchronous dynamic random access memories are added, it will lead to a significant increase in cost and power consumption. Therefore, without increasing the double-rate synchronous dynamic random access memory, it is important to ensure that the bandwidth of the double-rate synchronous dynamic random access memory meets the requirements of processing image data and improve the processing efficiency of the double-rate synchronous dynamic random access memory.

[0021] It should be noted that if the double rate synchronous dynamic random access memory 230 stores continuous addresses, the processing efficiency is higher. If the random address storage is frequently switched, such as frequent switching of Bank or row addresses, the processing efficiency is lower.

[0022] In the embodiment of the present application, the image processing chip 200 includes a static random access memory 250. The storage efficiency of the static random access memory 250 is relatively high. The static random access memory 250 can also be used to store data. When the amount of data stored in the static random access memory 250 is greater than the first data amount threshold, the data stored in the static random access memory is stored in the double rate synchronous dynamic random access memory. Therefore, in the process of storing image data, the double rate synchronous dynamic random access memory can first store some data in the static random access memory 250, until the amount of data stored in the static random access memory 250 is greater than the first data amount threshold, and then the stored data is stored in batches in the double rate synchronous dynamic random access memory 230, so that the double rate synchronous dynamic random access memory 230 will not be interrupted multiple times during the process of storing image data, and there is no need to frequently switch the storage address, thereby improving the processing efficiency of the double rate synchronous dynamic random access memory 230.

[0023] In an embodiment of the present application, the first data volume threshold can be set as needed, and can also be evaluated in combination with the cost of the static random access memory 250. For example, the first data volume threshold can be set to 1.5M, so that the amount of data stored in the static random access memory 250 can meet the needs of the image processing chip and save the cost required for the static random access memory 250. In the present application, the first data volume threshold can be configured by software, but the first data volume threshold is not restricted.

[0024] In the embodiment of the present application, the static random access memory 250 is used to store preset type data, and the data volume of each preset type data is less than the second data volume threshold, and the second data volume threshold is less than the first data volume threshold. In the embodiment of the present application, the second data volume threshold can be set as needed, and the second data volume threshold is not limited in the present application.

[0025] Please continue reading Figure 1 , the image processing chip 200 can be connected to the gyroscope 300 and the application processing chip 400 through an interface, for example, the gyroscope 300 is connected to the system bus 260 through a third interface to connect to the image processing chip 200, and the application processing chip 400 is connected to the first interface 270 of the image processing chip 200 through a second interface 310, and the first interface 270 is connected to the system bus 260. Among them, the preset type data can be data with a small amount of data, and the preset type data can be, for example: gyroscope data and data exchanged between the front image signal processing chip and the application processing chip. Among them, the data exchanged between the image processing chip and the application processing chip include: scene configuration information, sensor information, control commands, configuration parameters of the image processing chip and other data. The gyroscope data and the data exchanged between the image processing chip and the application processing chip are also the information required for the image processing chip 200 to process image data.

[0026] If these preset type data with smaller amounts are directly stored in the DDR SDRAM 230 each time, the DDR SDRAM 230 needs to frequently switch storage addresses for storage, and will also frequently interrupt the storage process of the image data, resulting in low processing efficiency of the DDR SDRAM 230.

[0027] The data stored in the double speed synchronous dynamic random access memory 230 includes image data, and the data amount of each image data is not less than the second data amount threshold, that is, the data amount of each image data directly stored in the double speed synchronous dynamic random access memory 230 is greater than the data amount of each preset type of data pre-stored in the static random access memory 250.

[0028] It should be noted that the DDR SDRAM 230 can also store other data besides image data. The present application does not impose any restrictions on other data, nor does it impose any restrictions on the amount of other data.

[0029] In an embodiment of the present application, the static random access memory 250 can be used to store data with a smaller data volume until the stored data volume reaches a first data volume threshold, and then the stored data is stored in batches into the double-speed synchronous dynamic random access memory 230. The double-speed synchronous dynamic random access memory 230 does not need to frequently switch storage addresses, and will not interrupt the storage process of image data multiple times. Therefore, the processing efficiency of the double-speed synchronous dynamic random access memory 230 in the image processing chip that the electronic device relies on when processing image data can be improved.

[0030] It is understandable that if the DDR230 performs frequent read-write switching, the processing efficiency of the DDR230 will also be reduced. In the present application, the static random access memory 250 is used to store preset type data with a small amount of data, and then the data is stored in batches in the DDR230. In addition to not requiring frequent switching of storage addresses, the read-write switching frequency of the DDR230 is also reduced. For example, when image data is being read from the DDR230, if these small amount of data are directly stored in the DDR230 each time, the DDR230 needs to perform more read-write switching. However, in the embodiment of the present application, these small amount of data are stored in batches in the DDR230, which reduces the read-write switching frequency of the synchronous dynamic random access memory 230, thereby improving the processing efficiency of the DDR230.

[0031] See also Figure 2 , Figure 2 2 is a schematic diagram of the second structure of the image processing chip provided by the embodiment of the present application. In the embodiment of the present application, the image processing chip may also include a direct memory access 240 (Direct Memory Access, DMA), the static random access memory 250 is connected to the double-speed synchronous dynamic random access memory 230 through the direct memory access 240, and the direct memory access 240 is used to transfer the data stored in the static random access memory 250 to the double-speed synchronous dynamic random access memory 230 when the amount of data stored in the static random access memory 250 is greater than the first data amount threshold, and the transmission work itself is implemented and completed by the controller of the direct memory access 240, that is, when the amount of data stored in the static random access memory 250 is greater than the first data amount threshold, the direct memory access 240 can be automatically triggered by hardware to perform data transmission, without the need for CPU participation, which can reduce the CPU load.

[0032] In one embodiment, the DDR SDRAM 230 can be set with a data address space of a preset size for storing data of the SRAM 250. Therefore, when the DMA 240 transfers the data stored in the SRAM 250 to the DDR SDRAM 230, the data can be directly transferred to the preset fixed data address space without requesting the storage address from the DDR SDRAM 230 each time, and the DDR SDRAM 230 does not need to randomly allocate the data address space each time, thereby improving the efficiency of data transmission, so that the data stored in the SRAM 250 can be written not only in batches but also in a fixed data address space when being transferred to the DDR SDRAM 230, thereby reducing the random address switching of the DDR SDRAM 230 when storing data, thereby improving the processing efficiency of the DDR SDRAM 230.

[0033] Among them, the data address space of the preset size can be set as needed. For example, it can be combined with the amount of data stored in the static random access memory 250. For example, the first data amount threshold is set to 1.5M, and a data address space of 2M can be set, or a data address space of twice the first data amount threshold can be set, so that the data address space of the preset size can meet the storage requirements without taking up too much storage space of the double-rate synchronous dynamic random access memory 230. The present application does not limit the preset size.

[0034] After storing the data stored in the static random access memory 250 into the DDR SDRAM 230 , the data stored in the static random access memory 250 is cleared so that the static random access memory 250 can continue to receive new data of a preset type.

[0035] In one embodiment, in the embodiment of the present application, the double rate synchronous dynamic random access memory 230 can also preset the timing of writing and reading according to the data requirements corresponding to the actual scene. For example, when the image data is being written into the double rate synchronous dynamic random access memory 230, if other modules need to read data from the double rate synchronous dynamic random access memory 230, the reading can be performed after the image data is stored; for another example, when the image data is being read from the double rate synchronous dynamic random access memory 230, if other modules need to store the data into the double rate synchronous dynamic random access memory 230, the writing can be performed after the image data is read out, thereby reducing the number of read-write switching times of the double rate synchronous dynamic random access memory 230, and effectively improving the processing efficiency of the double rate synchronous dynamic random access memory. Specifically, for example, in a night scene: the image signal processor 210 is storing the processed image data into the double rate synchronous dynamic random access memory 230, and the image signal processor 210 can be waited for to store the processed image data, and then the neural network processor module 220 is notified to read the required data from the double rate synchronous dynamic random access memory 230.

[0036] In one embodiment, the image processing chip may further include a compression module and a decompression module, and the double rate synchronous dynamic random access memory 230 is connected to the compression module and the decompression module. When data needs to be stored in the double rate synchronous dynamic random access memory 230, it can be compressed by the compression module first, thereby reducing the amount of data. When the data needs to be read, it is decompressed by the decompression module. By compressing the data and then storing it in the double rate synchronous dynamic random access memory, the problem of insufficient bandwidth of the double rate synchronous dynamic random access memory can be solved.

[0037] In one embodiment, the IP core bank management method will also affect the processing efficiency of the double-speed synchronous dynamic random access memory 230. Therefore, the IP core bank management method of the double-speed synchronous dynamic random access memory 230 can be improved. For example, when configuring the MIG IP core, the user interface address mapping method adopts the "ROW-BANK-COLUMN" method to reduce the frequency of row switching, that is, switch the row last, thereby improving the processing efficiency of the double-speed synchronous dynamic random access memory 230.

[0038] See also Figure 3 , Figure 3This is a first flow chart of a data processing method provided in an embodiment of the present application. The data processing method can be applied to an image processing chip.

[0039] For example, the image processing chip used in the data processing method provided in the embodiment of the present application may include a double data rate synchronous dynamic random access memory (Double Data Rate SDRAM, DDR SDRAM) and a static random access memory (Static Random Access Memory, SRAM), and the double data rate synchronous dynamic random access memory and the static random access memory are connected through a system bus. The image processing chip may also include an image signal processor, a neural network processor module, etc., wherein the image signal processor and the neural network processor module are also connected through a system bus. The image signal processor, the neural network processor module, etc. in the image processing chip are used to process the image data collected by the camera, and store the processed image data into the double data rate synchronous dynamic random access memory through the system bus.

[0040] It is understandable that the execution subject of the embodiment of the present application may be an electronic device such as a smart phone or a tablet computer having the above-mentioned image processing chip. The process of the data processing method provided in the embodiment of the present application may include:

[0041] In 101, the amount of data stored in the static random access memory is obtained.

[0042] In the embodiment of the present application, the image processing chip includes a static random access memory. The static random access memory has a faster storage efficiency and can also be used to store data. The embodiment of the present application can obtain the amount of data stored in the static random access memory.

[0043] Therefore, in the process of storing image data, the DDR SDRAM can first store some data into the SRAM without interrupting the storage of image data into the DDR SDRAM multiple times.

[0044] In 102, when the data amount is greater than a first data amount threshold, the data stored in the static random access memory is stored in the double data rate synchronous dynamic random access memory.

[0045] When the amount of data stored in the static random access memory is greater than the first data amount threshold, the data stored in the static random access memory is stored in the double rate synchronous dynamic random access memory. Therefore, in the process of storing image data, the double rate synchronous dynamic random access memory can first store some data in the static random access memory until the amount of data stored in the static random access memory is greater than the first data amount threshold, and then the stored data is stored in batches in the double rate synchronous dynamic random access memory, so that the double rate synchronous dynamic random access memory will not interrupt the storage process of image data multiple times, and there is no need to frequently switch the storage address, thereby improving the processing efficiency of the double rate synchronous dynamic random access memory.

[0046] In an embodiment of the present application, the first data volume threshold can be set as needed, and can also be evaluated in combination with the cost of the static random access memory. For example, the first data volume threshold can be set to 1.5M, so that the amount of data stored in the static random access memory can meet the needs of the image processing chip and save the cost required for the static random access memory. In the present application, the first data volume threshold can be configured by software, but the first data volume threshold is not restricted.

[0047] It should be noted that the image data has a large amount of data, and it will be continuously stored in the double-rate synchronous dynamic random access memory during the storage process, without switching the random address storage. However, in addition to the image data, the double-rate synchronous dynamic random access memory also needs to store some data with a smaller amount of data, such as gyroscope data and data for the interaction between the image processing chip and the application processing chip. If these data with a smaller amount of data are directly stored in the double-rate synchronous dynamic random access memory each time, the double-rate synchronous dynamic random access memory will need to frequently switch the storage address for storage, and will also frequently interrupt the storage process of the image data, resulting in low processing efficiency of the double-rate synchronous dynamic random access memory.

[0048] In the embodiment of the present application, the static random access memory can be used to store data with a small amount of data, so that the data with a small amount of data does not need to be directly stored in the double rate synchronous dynamic random access memory. The data with a small amount of data is, for example, gyroscope data and data for interaction between the front image signal processing chip and the application processing chip.

[0049] It should be noted that static random access memory can also be used to store data with a large amount of data, and this application does not impose any limitation on this.

[0050] It is understandable that if the double rate synchronous dynamic random access memory frequently switches between reading and writing, the processing efficiency of the double rate synchronous dynamic random access memory will also be reduced. In the present application, the static random access memory is used to store data with a smaller amount of data, and then the data is stored in batches into the double rate synchronous dynamic random access memory. In addition to not requiring frequent switching of storage addresses, the read-write switching frequency of the synchronous dynamic random access memory is also reduced. For example, when image data is being read out from the double rate synchronous dynamic random access memory, if these data with a smaller amount of data are directly stored in the double rate synchronous dynamic random access memory each time, the double rate synchronous dynamic random access memory needs to perform more read-write switching, but in the embodiment of the present application, these data with a smaller amount of data are stored in batches into the double rate synchronous dynamic random access memory, reducing the read-write switching frequency of the synchronous dynamic random access memory, thereby also improving the processing efficiency of the double rate synchronous dynamic random access memory.

[0051] Moreover, since the embodiment of the present application improves the processing efficiency of the double-rate synchronous dynamic random access memory, the bandwidth of the double-rate synchronous dynamic random access memory meets the demand for processing image data without the need to add multiple double-rate synchronous dynamic random access memories, thereby relatively reducing both the cost and the system power consumption.

[0052] See also Figure 4 , Figure 4 1 is a second flow chart of the data processing method provided in the embodiment of the present application. The data processing method can be applied to the image processing chip provided in the embodiment of the present application.

[0053] The image processing chip used in the data processing method provided in the embodiment of the present application may include a double data rate synchronous dynamic random access memory (Double Data Rate SDRAM, DDR SDRAM) and a static random access memory (Static Random Access Memory, SRAM), and the double data rate synchronous dynamic random access memory and the static random access memory are connected through a system bus. The image processing chip may also include an image signal processor, a neural network processor module, etc., wherein the image signal processor and the neural network processor module are also connected through a system bus. The image signal processor, the neural network processor module, etc. in the image processing chip are used to process the image data collected by the camera, and the processed image data is stored in the double data rate synchronous dynamic random access memory through the system bus.

[0054] For example, when the user clicks the camera icon to open the camera application, the camera service starts the image processing chip to work. After the image processing chip is started, the shooting parameters are initialized, such as resolution, frame rate, gyroscope and other parameters.

[0055] Data processing methods may include:

[0056] In 201, a static random access memory stores preset type data, and the data volume of each preset type data is less than a second data volume threshold.

[0057] In the embodiment of the present application, the static random access memory has a higher storage efficiency, and the static random access memory can also be used to store data. Therefore, in the process of storing image data, the double-speed synchronous dynamic random access memory can first store some data in the static random access memory, without having to interrupt the storage of image data into the double-speed synchronous dynamic random access memory multiple times.

[0058] For example, static random access memory can be used to store data with a small amount of data, so that these small data do not need to be directly stored in double rate synchronous dynamic random access memory. It should be noted that static random access memory can also be used to store data with a large amount of data, and this application does not limit this.

[0059] In one embodiment, the static random access memory stores preset type data, and the data volume of each preset type data is less than the second data volume threshold. The preset type data is data with a small data volume, such as gyroscope data and data exchanged between the image processing chip and the application processing chip. The data exchanged between the image processing chip and the application processing chip include: scene configuration information, sensor information, control commands, configuration parameters of the image processing chip, etc. The gyroscope data and the data exchanged between the image processing chip and the application processing chip are also information required for the image processing chip to process image data.

[0060] It should be noted that the second data volume threshold can be set as needed, and the second data volume threshold is not restricted in this application.

[0061] In one embodiment, the data stored in the double speed synchronous dynamic random access memory includes image data, and the data amount of each image data is not less than a second data amount threshold, that is, the data amount of each image data directly stored in the double speed synchronous dynamic random access memory is greater than the data amount of each preset type of data pre-stored in the static random access memory.

[0062] In 202, the amount of data stored in the static random access memory is obtained.

[0063] The static random access memory can store preset type data, and the embodiment of the present application can obtain the amount of data stored in the static random access memory.

[0064] In 203, the image processing chip includes direct memory access, and when the data amount is greater than a first data amount threshold, the data stored in the static random access memory is transmitted to the double rate synchronous dynamic random access memory through direct memory access.

[0065] The image processing chip may also include direct memory access, which is used to transfer the data stored in the static random access memory to the double rate synchronous dynamic random access memory when the amount of data stored in the static random access memory is greater than the first data amount threshold. The transmission work itself is implemented and completed by the controller of the direct memory access, that is, when the amount of data stored in the static random access memory is greater than the first data amount threshold, the direct memory access can be automatically triggered by hardware to perform data transmission without the participation of the CPU, which can reduce the load of the CPU.

[0066] In one implementation, the double data rate synchronous dynamic random access memory may set a data address space of a preset size, and store the data stored in the static random access memory into the data address space.

[0067] Among them, the data address space of the preset size can be set as needed, for example, it can be combined with the amount of data that can be stored in the static random access memory. For example, the first data amount threshold is set to 1.5M, and a corresponding data address space of 2M can be set, or a data address space of twice the first data amount threshold can be set, so that the data address space of the preset size can meet the storage requirements without taking up too much storage space of the double-rate synchronous dynamic random access memory. This application does not limit the preset size.

[0068] Since the double rate synchronous dynamic random access memory sets a data address space of a preset size for storing data in the static random access memory, when the direct memory access transfers the data stored in the static random access memory to the double rate synchronous dynamic random access memory, the data can be directly transferred to the preset fixed data address space without having to request the storage address from the double rate synchronous dynamic random access memory each time, and the double rate synchronous dynamic random access memory does not need to randomly allocate the data address space each time, which improves the efficiency of data transmission, so that when the data stored in the static random access memory is transferred to the double rate synchronous dynamic random access memory, it can not only be written in batches, but also written in a fixed data address space, which reduces the random address switching of the double rate synchronous dynamic random access memory when storing data, thereby improving the processing efficiency of the double rate synchronous dynamic random access memory.

[0069] In 204, data stored in the static random access memory is cleared.

[0070] After storing the data stored in the static random access memory into the double rate synchronous dynamic random access memory, the data stored in the static random access memory is cleared, so that the static random access memory can continue to receive new data of a preset type.

[0071] The image processing chip used in the data processing method provided in the embodiment of the present application includes a double rate synchronous dynamic random access memory, a static random access memory and a direct memory access, and the double rate synchronous dynamic random access memory, the static random access memory and the direct memory access are connected through a system bus. When the image processing chip stores data, it can be understood that the image data has a large amount of data, and it will be continuously stored in the double rate synchronous dynamic random access memory during the storage process, and there is no need to switch the random address storage. However, if other data with a smaller amount of data is directly stored in the double rate synchronous dynamic random access memory, the double rate synchronous dynamic random access memory needs to frequently switch the storage address for storage, and it will also frequently interrupt the storage process of the image data, resulting in a low processing efficiency of the double rate synchronous dynamic random access memory. In the embodiment of the present application, the static random access memory can be used to store data with a smaller amount of data. If it is detected that the amount of data stored in the static random access memory is greater than the first data amount threshold, the static random access memory transfers the stored data in batches to the double rate synchronous dynamic random access memory through direct memory access, and data transmission is performed through direct memory access, without the need for CPU participation, which can reduce the CPU load. Moreover, in the embodiment of the present application, the double rate synchronous dynamic random access memory can also set a data address space of a preset size for storing data in the static random access memory. Therefore, when direct memory access transfers data stored in the static random access memory to the double rate synchronous dynamic random access memory, the data can be directly transferred to the preset fixed data address space without requesting the storage address from the double rate synchronous dynamic random access memory each time. The double rate synchronous dynamic random access memory also does not need to randomly allocate data address space each time, thereby improving the efficiency of data transmission. When the data stored in the static random access memory is transferred to the double rate synchronous dynamic random access memory, it can not only be written in batches, but also written in a fixed data address space, reducing the random address switching of the double rate synchronous dynamic random access memory when storing data, thereby improving the processing efficiency of the double rate synchronous dynamic random access memory.

[0072] The embodiments of the present application also provide a computer-readable storage medium on which a computer program is stored. When the computer program is executed on a computer, the computer executes the processes in the various data processing methods provided in the embodiments of the present application.

[0073] An embodiment of the present application also provides an electronic device, comprising the image processing chip provided in any embodiment of the present application.

[0074] The electronic device provided in the embodiment of the present application may include an image processing chip, the image processing chip includes a double rate synchronous dynamic random access memory and a static random access memory, and the double rate synchronous dynamic random access memory and the static random access memory are connected via a system bus;

[0075] When the amount of data stored in the static random access memory is greater than a first data amount threshold, the data stored in the static random access memory is stored in the double rate synchronous dynamic random access memory.

[0076] In one embodiment, the static random access memory is used to store preset type data, and the data volume of each preset type data is smaller than a second data volume threshold, and the second data volume threshold is smaller than the first data volume threshold.

[0077] In one implementation, the preset type of data includes gyroscope data and data of interaction between the image processing chip and the application processing chip.

[0078] In one embodiment, the data stored in the double rate synchronous dynamic random access memory includes image data, and the data volume of each image data is not less than a second data volume threshold.

[0079] In one embodiment, the image processing chip includes direct memory access; the direct memory access is used to transfer data stored in the static random access memory to the double rate synchronous dynamic random access memory when the amount of data stored in the static random access memory is greater than a first data amount threshold.

[0080] In one implementation, after the data stored in the static random access memory is stored in the double data rate synchronous dynamic random access memory, the data stored in the static random access memory is cleared.

[0081] In one implementation, the double rate synchronous dynamic random access memory sets a data address space of a preset size, and the data address space is used to store data of the static random access memory.

[0082] The present application also provides an electronic device, including a memory, an image processing chip and an application processing chip. The image processing chip is used to execute the processes in the various data processing methods provided in the present application by calling the computer program stored in the memory. For example, the electronic device can be a mobile terminal such as a tablet computer or a smart phone. Figure 5 , Figure 5 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application.

[0083] The electronic device 400 may include a memory 401, an image processing chip 402 and an application processing chip 403. Those skilled in the art will understand that the structure of the electronic device does not constitute a limitation of the electronic device, and may include more or fewer components than shown in the figure, or a combination of certain components, or a different arrangement of components.

[0084] The memory 401 can be used to store computer programs and data. The computer programs stored in the memory 401 include instructions that can be executed in the processor. The computer programs can be composed of various functional modules.

[0085] The image processing chip 402 executes various image processing functions and data processing by calling the computer program stored in the memory 401 .

[0086] The application processing chip 403 is the control center of the electronic device 400 , and uses various interfaces and lines to connect various parts of the entire electronic device, thereby monitoring the electronic device as a whole.

[0087] In this embodiment, the image processing chip 402 in the electronic device 400 will load instructions corresponding to the processes of one or more computer programs into the memory 401 according to the following steps, and the image processing chip 402 will run the computer program stored in the memory 401 to achieve various functions:

[0088] Obtaining the amount of data stored in the static random access memory;

[0089] When the data amount is greater than a first data amount threshold, the data stored in the static random access memory is stored in the double rate synchronous dynamic random access memory.

[0090] In some embodiments, see Figure 5 The electronic device 400 also includes: a display screen 404, a control circuit 405, an audio circuit 406, a power supply 407 and other components.

[0091] The display screen 404 may be used to display information input by a user or information provided to a user and various graphical user interfaces of the electronic device. These graphical user interfaces may be composed of images, texts, icons, videos and any combination thereof.

[0092] The control circuit 405 is electrically connected to the display screen 403 and is used to control the display screen 403 to display information.

[0093] The audio circuit 406 can provide an audio interface between the user and the electronic device through a speaker and a microphone. The audio circuit 405 includes a microphone. The microphone is used to receive voice information input by the user.

[0094] The power supply 407 is used to supply power to various components of the electronic device 400. In some embodiments, the power supply 406 can manage charging, discharging, power consumption management and other functions through a power management system.

[0095] Although not shown in the figure, the electronic device 400 may also include an input module, a Bluetooth module, a camera, a sensor, etc., which will not be described in detail here.

[0096] In this embodiment, the image processing chip 402 in the electronic device 400 will load instructions corresponding to the processes of one or more computer programs into the memory 401 according to the following steps, and the image processing chip 402 will run the computer program stored in the memory 401 to achieve various functions:

[0097] Obtaining the amount of data stored in the static random access memory;

[0098] When the data amount is greater than a first data amount threshold, the data stored in the static random access memory is stored in the double rate synchronous dynamic random access memory.

[0099] In one embodiment, when the data volume is greater than a first data volume threshold, in a method of storing data stored in a static random access memory into a double rate synchronous dynamic random access memory, the image processing chip 402 executes the static random access memory to store preset type data, the data volume of each preset type of data is less than a second data volume threshold, and the second data volume threshold is less than the first data volume threshold;

[0100] When the data amount of the plurality of preset types of data stored in the static random access memory is greater than a first data amount threshold, the data stored in the static random access memory is stored in the double rate synchronous dynamic random access memory.

[0101] In one embodiment, the image processing chip includes direct memory access. Before storing data stored in the static random access memory in the double-speed synchronous dynamic random access memory, the image processing chip 402 executes the transmission of the data stored in the static random access memory to the double-speed synchronous dynamic random access memory through direct memory access.

[0102] In one embodiment, when storing data stored in the static random access memory into the double rate synchronous dynamic random access memory, the image processing chip 402 executes the double rate synchronous dynamic random access memory to set a data address space of a preset size and stores the data stored in the static random access memory into the data address space.

[0103] In one implementation, after storing the data stored in the static random access memory into the double data rate synchronous dynamic random access memory, the image processing chip 402 clears the data stored in the static random access memory.

[0104] In the above embodiments, the description of each embodiment has its own focus. For the part that is not described in detail in a certain embodiment, please refer to the detailed description of the device control method above, and will not be repeated here.

[0105] The device control apparatus provided in the embodiment of the present application belongs to the same concept as the device control method in the above embodiment. Any method provided in the device control method embodiment can be run on the device control apparatus. The specific implementation process is detailed in the device control method embodiment and will not be repeated here.

[0106] It should be noted that, for the device control method of the embodiment of the present application, ordinary technicians in this field can understand that all or part of the process of implementing the device control method of the embodiment of the present application can be completed by controlling the relevant hardware through a computer program, and the computer program can be stored in a computer-readable storage medium, such as stored in a memory, and executed by at least one processor, and the execution process may include the process of the embodiment of the device control method. Among them, the storage medium can be a disk, an optical disk, a read-only memory (ROM), a random access memory (RAM), etc.

[0107] For the device control device of the embodiment of the present application, each functional module can be integrated into a processing chip, or each module can exist physically separately, or two or more modules can be integrated into one module. The above-mentioned integrated module can be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium, such as a read-only memory, a disk or an optical disk.

[0108] The device control method, apparatus, storage medium and electronic device provided in the embodiments of the present application are introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea; at the same time, for technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. An image processing chip, characterized in that: The image processing chip includes a double rate synchronous dynamic random access memory and a static random access memory, and the double rate synchronous dynamic random access memory and the static random access memory are connected via a system bus; The data stored in the double-rate synchronous dynamic random access memory includes data whose data volume is not less than a second data volume threshold. When the data volume stored in the static random access memory is greater than the first data volume threshold, the data stored in the static random access memory is stored in the double-rate synchronous dynamic random access memory, wherein the static random access memory is used to store preset type data, the data volume of each preset type data is less than the second data volume threshold, and the second data volume threshold is less than the first data volume threshold.

2. The image processing chip according to claim 1, characterized in that: The preset type of data includes gyroscope data and data of interaction between the image processing chip and the application processing chip.

3. The image processing chip according to claim 1, characterized in that: The data stored in the double rate synchronous dynamic random access memory includes image data, and the data volume of each of the image data is not less than the second data volume threshold.

4. The image processing chip according to claim 1, characterized in that: The image processing chip includes direct memory access; The direct memory access is used to transfer the data stored in the static random access memory to the double rate synchronous dynamic random access memory when the amount of data stored in the static random access memory is greater than a first data amount threshold.

5. The image processing chip according to claim 1, characterized in that: After storing the data stored in the static random access memory into the double rate synchronous dynamic random access memory, the data stored in the static random access memory is cleared.

6. The image processing chip according to claim 1, characterized in that: The double rate synchronous dynamic random access memory is provided with a data address space of a preset size, and the data address space is used to store the data of the static random access memory.

7. A data processing method, applied to an image processing chip, characterized in that: The image processing chip includes a double rate synchronous dynamic random access memory and a static random access memory, the double rate synchronous dynamic random access memory and the static random access memory are connected via a system bus, and the data processing method includes: Obtaining the amount of data stored in the static random access memory; The data stored in the double-speed synchronous dynamic random access memory includes data whose data volume is not less than a second data volume threshold. When the data volume is greater than a first data volume threshold, the data stored in the static random access memory is stored in the double-speed synchronous dynamic random access memory, wherein the static random access memory is used to store preset type data, and the data volume of each preset type data is less than the second data volume threshold, and the second data volume threshold is less than the first data volume threshold.

8. The data processing method according to claim 7, characterized in that: The image processing chip includes direct memory access, and storing the data stored in the static random access memory to the double rate synchronous dynamic random access memory includes: The data stored in the static random access memory is transferred to the double rate synchronous dynamic random access memory through the direct memory access.

9. An electronic device, characterized in that: An image processing chip comprising any one of claims 1 to 6.

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