Multiple transform set signaling for video coding

Abstract

A video decoder can be configured to receive a block of video data and determine a value of a multiple transform set index for the block of video data based on a presence of a non-zero transform coefficient other than a DC coefficient in the block of video data. The video decoder can then apply a transform to the block of video data based on the determined value of the multiple transform set index.

Description

[0001] This application claims the benefit of U.S. Application No. 17 / 143,000, filed January 6, 2021, which claims the benefit of U.S. Provisional Application No. 62 / 958,528, filed January 8, 2020, the entire contents of each of which are incorporated herein by reference. TECHNICAL FIELD

[0002] The present disclosure relates to video encoding and video decoding. BACKGROUND

[0003] Digital video capabilities can be incorporated into a wide range of devices, including digital televisions, digital direct broadcast systems, wireless broadcast systems, personal digital assistants (PDAs), laptop or desktop computers, tablet computers, e-book readers, digital cameras, digital recording devices, digital media players, video gaming devices, video game consoles, cellular or satellite radio telephones, so-called “smart phones,” video teleconferencing devices, video streaming devices, and the like. Digital video devices implement video coding techniques, such as those described in the standards defined by MPEG-2, MPEG-4, ITU-T H.263, ITU-T H.264 / MPEG-4, Part 10, Advanced Video Coding (AVC), ITU-T H.265 / High Efficiency Video Coding (HEVC), and extensions of such standards. The video devices can implement such video coding techniques to transmit, receive, encode, decode, and / or store digital video information more efficiently.

[0004] Video coding techniques include spatial (intra-picture) prediction and / or temporal (inter-picture) prediction to reduce or remove redundancy inherent in video sequences. For block-based video coding, a video slice (for example, a video picture or a portion of a video picture) can be partitioned into video blocks, which can also be referred to as coding tree units (CTUs), coding units (CUs), and / or coding nodes. Video blocks in the intra-coded (I) slices of a picture are encoded using spatial prediction with respect to reference samples in neighboring blocks within the same picture. Video blocks in the inter-coded (P or B) slices of a picture can use spatial prediction with respect to reference samples in neighboring blocks in the same picture or temporal prediction with respect to reference samples in other reference pictures. Pictures can be referred to as frames, and reference pictures can be referred to as reference frames. SUMMARY

[0005] In general, this disclosure describes techniques for transform coding, which is an essential element of modern video compression standards. This disclosure describes transform signaling methods that can be used in video codecs to specify one or more transforms selected among multiple transform candidates for encoding / decoding. The techniques of this disclosure can reduce signaling overhead based on available side information.

[0006] For example, a video encoder can be configured to determine whether to signal a multiple transform set index syntax element for a block based on whether there are non-zero transform coefficients other than a DC coefficient in the block. The multiple transform set index specifies which transform kernels to apply along the horizontal and vertical directions of an associated block of video data (e.g., the types of horizontal and vertical transforms). If there are non-zero transform coefficients other than the DC coefficient in the block, the video encoder can signal the multiple transform set index to the video coder.

[0007] If there are no non-zero transform coefficients other than the DC coefficient in the block, the video encoder will not signal the multiple transform set index to the video decoder. Rather, in such cases, the video decoder can infer a value for the multiple transform set index based on certain predetermined rules. In this way, the techniques of this disclosure can reduce signaling overhead to improve coding efficiency by not signaling the multiple transform set index in certain cases. The techniques of this disclosure can be used in advanced video codecs, including extensions of HEVC and next generation video coding standards, such as Versatile Video Coding (VVC / H.266).

[0008] In one example, the disclosure describes an apparatus configured to decode video data, the apparatus comprising a memory configured to store a block of video data; and one or more processors implemented in circuitry and in communication with the memory. The one or more processors are configured to receive the block of video data; determine a value for a multiple transform set index for the block of video data based on there being non-zero transform coefficients other than a DC coefficient in the block of video data; and apply a transform to the block of video data based on the determined value for the multiple transform set index.

[0009] In another example, the disclosure describes a method of decoding video data, the method comprising receiving a block of video data; determining a value for a multiple transform set index for the block of video data based on there being non-zero transform coefficients other than a DC coefficient in the block of video data; and applying a transform to the block of video data based on the determined value for the multiple transform set index.

[0010] In another example, the disclosure describes a non-transitory computer- readable storage medium storing instructions that, when executed, cause one or more processors of a device configured to decode video data to: receive a block of video data; determine a value for a multiple transform set index for the block of video data based on there being non-zero transform coefficients other than a DC coefficient in the block of video data; and apply a transform to the block of video data based on the determined value for the multiple transform set index.

[0011] In another example, the present disclosure describes an apparatus configured to decode video data, the apparatus comprising: means for receiving a block of video data; means for determining a value of a multiple transform set index for the block of video data based on the presence of non-zero transform coefficients other than a DC coefficient in the block of video data; and means for applying a transform to the block of video data based on the determined value of the multiple transform set index.

[0012] The details of one or more examples are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will be apparent from the description, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is a block diagram illustrating an example video encoding and decoding system that may perform the techniques of this disclosure.

[0014] Figure 2A and Figure 2B is a conceptual diagram illustrating an example quadtree binary tree (QTBT) structure and a corresponding coding tree unit (CTU).

[0015] Figure 3 is a block diagram illustrating an example video encoder that may perform the techniques of this disclosure.

[0016] Figure 4 is a block diagram illustrating an example video decoder that may perform the techniques of this disclosure.

[0017] Figure 5 is a flowchart illustrating an example video encoding method of the present disclosure.

[0018] Figure 6 is a flowchart illustrating an example video decoding method of the present disclosure.

[0019] Figure 7 is a flowchart illustrating another example decoding method of the present disclosure. DETAILED DESCRIPTION

[0020] In general, this disclosure describes techniques for transform coding, a fundamental element of modern video compression standards. This disclosure describes transform signaling methods that can be used in video codecs to specify one or more transforms to be selected from multiple transform candidates for encoding / decoding. The disclosed techniques can reduce signaling overhead based on available side information.

[0021] For example, a video encoder can be configured to determine whether to signal a multiple transform set index syntax element for a block based on whether there are non-zero transform coefficients other than the DC coefficient in the block. The multiple transform set index specifies which transform kernels to apply along the horizontal and vertical directions of the associated block of video data (e.g., the types of horizontal and vertical transforms). If there are non-zero transform coefficients other than the DC coefficient in the block, the video encoder can signal the multiple transform set index to the video coder.

[0022] If there are no non-zero transform coefficients other than the DC coefficient in the block, the video encoder will not signal the multiple transform set index to the video decoder. Instead, in such cases, the video decoder can infer the value of the multiple transform set index based on certain predetermined rules. In this way, the techniques of this disclosure can reduce signaling overhead to improve coding efficiency by not signaling the multiple transform set index in certain cases. The techniques of this disclosure can be used in advanced video codecs, including extensions of HEVC and next generation video coding standards, such as Versatile Video Coding (VVC / H.266).

[0023] Figure 1 is a block diagram illustrating an example video encoding and decoding system 100 that can perform the techniques of this disclosure. The techniques of this disclosure generally pertain to coding (encoding and / or decoding) video data. Generally, video data includes any data used for processing video. As such, video data can include raw, unencoded video, encoded video, decoded (e.g., reconstructed) video, and video metadata such as signaling data.

[0024] As Figure 1 shown, in this example, system 100 includes a source device 102 that provides encoded video data to be decoded and displayed by a destination device 116. In particular, source device 102 provides the video data to destination device 116 via a computer-readable medium 110. Source device 102 and destination device 116 can comprise any of a wide variety of devices, including desktop computers, notebook (i.e., laptop) computers, mobile devices, tablet computers, set-top boxes, telephone handsets such as smartphones, televisions, cameras, display devices, digital media players, video gaming consoles, video streaming devices, broadcast receiver devices, and the like. In some cases, source device 102 and destination device 116 can be equipped for wireless communication, and thus can be referred to as wireless communication devices.

[0025] In Figure 1In the example of , source device 102 includes video source 104, memory 106, video encoder 200 and output interface 108. Target device 116 includes input interface 122, video decoder 300, memory 120 and display device 118. According to the present disclosure, the video encoder 200 of source device 102 and the video decoder 300 of target device 116 can be configured to apply technology for multiple transform set signaling. Thus, source device 102 represents an example of a video encoding device, while target device 116 represents an example of a video decoding device. In other examples, the source device and target device can include other components or arrangements. For example, source device 102 can receive video data from an external video source such as an external camera. Similarly, target device 116 can interface with an external display device without including an integrated display device.

[0026] like Figure 1 The illustrated system 100 is merely an example. Generally, any digital video encoding and / or decoding device can implement the techniques for multiple transform set signaling. Source device 102 and destination device 116 are merely examples of such decoding devices, wherein source device 102 generates decoded video data for transmission to destination device 116. This disclosure refers to a "coding" device as a device that performs data decoding (encoding and / or decoding). Thus, video encoder 200 and video decoder 300 represent examples of decoding devices, specifically, examples of a video encoder and a video decoder, respectively. In some examples, source device 102 and destination device 116 can operate in a substantially symmetrical manner, such that each of source device 102 and destination device 116 includes video encoding and decoding components. Thus, system 100 can support one-way or two-way video transmission between source device 102 and destination device 116, for example, for video streaming, video playback, video broadcasting, or video telephony.

[0027] In general, video source 104 represents a source of video data (i.e., raw, uncoded video data) and provides a sequential series of pictures (also referred to as “frames”) of the video data to video encoder 200, which encodes data for the pictures. Video source 104 of source device 102 can include a video capture device, such as a video camera, a video archive containing previously captured raw video, and / or a video feed interface to receive video from a video content provider. As a further alternative, video source 104 can generate computer graphics-based data as the source video, or a combination of live video, archived video, and computer-generated video. In each case, video encoder 200 encodes the captured, pre-captured, or computer-generated video data. Video encoder 200 can rearrange the pictures from the received order (sometimes referred to as “display order”) into the coding order for coding. Video encoder 200 can generate a bitstream including encoded video data. Source device 102 can then output the encoded video data via output interface 108 onto computer-readable medium 110 for reception and / or retrieval by, e.g., destination device 116, via input interface 122.

[0028] Memory 106 of source device 102 and memory 120 of destination device 116 represent general purpose memories. In some examples, memories 106, 120 can store raw video data, such as raw video from video source 104 and raw, decoded video data from video decoder 300. Additionally or alternatively, memories 106, 120 can store software instructions, e.g., for execution by video encoder 200 and video decoder 300, respectively. Although memories 106 and 120 are shown separately from video encoder 200 and video decoder 300 in this example, it should be understood that video encoder 200 and video decoder 300 can also include internal memories for similar or equivalent purposes. Furthermore, memories 106, 120 can store encoded video data, e.g., output from video encoder 200 and input to video decoder 300. In some examples, portions of memories 106, 120 can be allocated as one or more video buffers, e.g., to store raw, decoded, and / or encoded video data.

[0029] Computer-readable medium 110 can represent any type of medium or device capable of storing coding video data for communication to target device 116 from source device 102. In one example, computer-readable medium 110 represents a communication medium to enable source device 102 to transmit encoded video data directly to target device 116 in real-time, e.g., via a radio frequency network or computer-based network. Output interface 108 can modulate a transmission signal including the encoded video data, and input interface 122 can demodulate received signals, according to a communication standard, such as a wireless communication protocol. The communication medium can comprise any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium can form part of a packet-based network, such as a local area network, a wide-area network, or a global network such as the Internet. The communication medium can include routers, switches, base stations, or any other equipment that can be useful to facilitate communication from source device 102 to target device 116.

[0030] In some examples, source device 102 can output encoded data from output interface 108 to storage device 112. Similarly, target device 116 can access encoded data from storage device 112 via input interface 122. Storage device 112 can include any of a variety of distributed or locally accessed data storage media such as a hard drive, Blu-ray discs, DVDs, CD-ROMs, flash memory, volatile or non-volatile memory, or any other suitable digital storage media for storing encoded video data.

[0031] In some examples, source device 102 can output encoded video data to file server 114 or another intermediate storage device that stores encoded video data generated by source device 102. Target device 116 can access stored video data from file server 114 via streaming or download.

[0032] File server 114 can be any type of server device capable of storing encoded video data and transmitting that encoded video data to target device 116. File server 114 can represent a web server (e.g., for a website), a server configured to provide file transfer protocol services (such as File Transfer Protocol (FTP) or File Delivery over Unidirectional Transport (FLUTE) protocol), a content delivery network (CDN) device, a hypertext transfer protocol (HTTP) server, a multimedia broadcast multicast service (MBMS) or enhanced MBMS (eMBMS) server, and / or a network attached storage (NAS) device. File server 114 can additionally or alternatively implement one or more HTTP streaming protocols, such as Dynamic Adaptive Streaming over HTTP (DASH), HTTP Live Streaming (HLS), Real Time Streaming Protocol (RTSP), HTTP Dynamic Streaming, and / or the like.

[0033] Target device 116 can access the encoded video data from file server 114 through any standard data connection including an Internet connection. This can include a wireless channel (e.g., a Wi-Fi connection), a wired connection (e.g., a digital subscriber line (DSL), a cable modem, etc.), or a combination of both that is suitable for accessing encoded video data stored on file server 114. Input interface 122 can be configured to operate according to any one or more of various protocols

[0034] Output interface 108 and input interface 122 can represent wireless transmitters / receivers, modems, wired networking components (e.g., Ethernet cards), wireless communication components operating according to any of a variety of IEEE 802.11 standards, or other physical components. In examples where output interface 108 and input interface 122 comprise wireless components, output interface 108 and input interface 122 can be configured to transmit data such as encoded video data according to a cellular communication standard, such as a 4G, 4G-LTE (Long-Term Evolution), LTE Advanced, 5G, or the like. In some examples where output interface 108 includes a wireless transmitter, output interface 108 and input interface 122 can be configured to transmit data such as encoded video data according to other wireless standards, such as an IEEE 802.11 specification, an IEEE 802.15 specification (e.g., ZigBee®), a Bluetooth® standard, or the like. In some examples, source device 102 and / or target device 116 can include respective system-on-a-chip (SoC) devices. For example, source device 102 can include a SoC device to perform functions attributed to video encoder 200 and / or output interface 108, and target device 116 can include a SoC device to perform functions attributed to video decoder 300 and / or input interface 122. TM TM

[0035] The techniques of this disclosure can be applied to video coding in support of any of a variety of multimedia applications, such as over-the-air television broadcasts, cable television transmissions, satellite television transmissions, Internet streaming video transmissions, digital video that is encoded onto a data storage medium, decoding of digital video stored on a data storage medium, or other applications.

[0036] ​​The input interface 122 of the target device 116 receives an encoded video bitstream from the computer-readable medium 110 (e.g., a communication medium, a storage device 112, a file server 114, etc.). The encoded video bitstream may include signaling information defined by the video encoder 200 and also used by the video decoder 300, such as syntax elements having values ​​that describe the characteristics and / or processing of video blocks or other decoding units (e.g., slices, pictures, groups of pictures, sequences, etc.). The display device 118 displays decoded pictures of the decoded video data to a user. The display device 118 may represent any of a variety of display devices, such as a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or another type of display device.

[0037] Although not in Figure 1 , but in some examples, each of the video encoder 200 and the video decoder 300 can be integrated with an audio encoder and / or an audio decoder and can include appropriate MUX-DEMUX units or other hardware and / or software to process multiplexed streams including audio and video in a common data stream. If applicable, the MUX-DEMUX units can conform to the ITU H.223 multiplexer protocol or other protocols such as the User Datagram Protocol (UDP).

[0038] Each of the video encoder 200 and the video decoder 300 can be implemented as any of a variety of suitable encoder and / or decoder circuits, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware, or any combination thereof. When the technology is partially implemented in software, the device can store instructions for the software in a suitable non-transitory computer-readable medium and execute the instructions in hardware using one or more processors to perform the technology of the present disclosure. Each of the video encoder 200 and the video decoder 300 can be included in one or more encoders or decoders, any of which can be integrated as part of a combined encoder / decoder (codec) in the corresponding device. The device including the video encoder 200 and / or the video decoder 300 may include an integrated circuit, a microprocessor, and / or a wireless communication device such as a cellular telephone.

[0039] Video encoder 200 and video decoder 300 can operate according to a video coding standard, such as ITU-T H.265, also referred to as High Efficiency Video Coding (HEVC), or extensions thereof, such as the multi-view and / or scalable video coding extensions. Alternatively, video encoder 200 and video decoder 300 can operate according to other proprietary or industry standards, such as the Joint Exploration Test Model (JEM) or ITU-T H.266, also referred to as Versatile Video Coding (VVC). A recent draft of the VVC standard is described in Bross, et al., “Versatile Video Coding (Draft 7),” JVET-P2001-vl4, 16thMeeting of ITU-T SG 16 WP 3 and ISO / IEC JTC 1 / SC 29 / WG 11, Geneva, CH, 1-11 October 2019 (hereinafter “VVC Draft 7”). The techniques of this disclosure, however, are not limited to any particular coding standard.

[0040] In general, video encoder 200 and video decoder 300 can perform block-based coding of pictures. The term “block” generally refers to a structure containing data to be processed (e.g., encoded, decoded, or otherwise used in the encoding and / or decoding process). For example, a block can include a two-dimensional matrix of luma and / or chroma samples. In general, video encoder 200 and video decoder 300 can code video data represented in a YUV (e.g., Y, Cb, Cr) format. That is, video encoder 200 and video decoder 300 can code luma and chroma components, where the chroma components can include both red hue and blue hue chroma components, rather than coding red, green, and blue (RGB) data of samples of a picture. In some examples, video encoder 200 converts received RGB format data to a YUV representation prior to encoding, and video decoder 300 converts the YUV representation to the RGB format. Alternatively, pre- and post-processing units (not shown) can perform these conversions.

[0041] This disclosure can generally refer to coding (e.g., encoding and decoding) of pictures to include the process of encoding or decoding picture data. Similarly, this disclosure can refer to coding of blocks of pictures to include the process of encoding or decoding data of the blocks, such as prediction and / or residual coding. An encoded video bitstream generally includes syntax elements representing the coding decisions (e.g., coding modes) and a series of values that partition a picture into blocks. Thus, a reference to a coded picture or block is generally understood to be a reference to the values of the syntax elements used to form the picture or block.

[0042] HEVC defines various blocks, including coding units (CUs), prediction units (PUs), and transform units (TUs). According to HEVC, a video coder (such as video encoder 200) partitions a coding tree unit (CTU) into CUs according to a quad tree structure. That is, the video coder partitions CTUs and CUs into four equal, non overlapping squares, and each node of the quad tree has either zero or four child nodes. Nodes with zero child nodes can be referred to as“leaf nodes,” and CUs of such leaf nodes can include one or more PUs and / or one or more TUs. The video coder can further partition PUs and TUs. For example, in HEVC, a residual quad tree (RQT) represents partitioning of TUs. In HEVC, PUs represent inter prediction data, while TUs represent residual data. CUs that are intra predicted include intra prediction information, such as an intra mode indication.

[0043] As another example, video encoder 200 and video decoder 300 can be configured to operate according to VVC. According to VVC, a video coder (such as video encoder 200) partitions a picture into coding tree units (CTUs). Video encoder 200 can partition CTUs according to a tree structure, such as a quad-tree binary tree (QTBT) structure or Multi-Type Tree (MTT) structure. The QTBT structure removes the concepts of multiple partition types, such as the distinction between CUs, PUs, and TUs of HEVC. The QTBT structure includes two levels: a first level partitioned according to quad tree partitioning, and a second level partitioned according to binary tree partitioning. The root node of the QTBT structure corresponds to a CTU. Leaf nodes of the binary trees correspond to coding units (CUs).

[0044] In the MTT partitioning structure, blocks can be partitioned using quad tree (QT) partitioning, binary tree (BT) partitioning, and one or more types of triple tree (TT) (also referred to as ternary tree (TT)) partitioning. Triple tree or ternary tree partitioning is a partitioning that splits a block into three sub-blocks. In some examples, triple tree or ternary tree partitioning divides one block into three sub-blocks without having to split the original block by a center split. The partition types (e.g., QT, BT, and TT) in the MTT can be symmetric or asymmetric.

[0045] In some examples, video encoder 200 and video decoder 300 can use a single QTBT or MTT structure to represent each of luma and chroma components, while in other examples, video encoder 200 and video decoder 300 can use two or more QTBT or MTT structures, such as one QTBT / MTT structure for luma components and another QTBT / MTT structure for all chroma components (or two QTBT / MTT structures for respective chroma components).

[0046] Video encoder 200 and video decoder 300 can be configured to use quadtree partitioning, QTBT partitioning, MTT partitioning, or other partitioning structures according to HEVC. For purposes of explanation, the description of the techniques of this disclosure is presented with respect to QTBT partitioning. However, it should be understood that the techniques of this disclosure can also be applied to video coders configured to use quadtree partitioning or other types of partitioning.

[0047] In certain examples, a CTU includes a coding tree block (CTB) of luma samples, two corresponding CTBs of chroma samples of a picture having three sample arrays, or a CTB of samples of a monochrome picture or a picture coded using three separate color planes and syntax structures for coding samples. A CTB can be an NxN block of samples for some value of N, such that partitioning a component into CTBs is a partitioning. A component is an array or a single sample from one of three arrays (luma and two chroma) that make up a picture in a color format of 4:2:0, 4:2:2, or 4:4:4, or is an array or a single sample in an array that makes up a picture in a monochrome format. In certain examples, a coding block is an MxN block of samples for some values of M and N, such that partitioning a CTB into coding blocks is a partitioning.

[0048] Blocks (e.g., CTUs or CUs) can be grouped in various ways in a picture. As one example, a brick can represent a rectangular region of CTU rows within a particular tile in a picture. A tile can be a rectangular region of CTUs within a particular tile column and a particular tile row in a picture. A tile list represents a rectangular region of CTUs having a height equal to a height of the picture and a width specified by a syntax element (e.g., in a picture parameter set). A tile row represents a rectangular region of CTUs having a height specified by a syntax element (e.g., in a picture parameter set) and a width equal to a width of the picture.

[0049] In certain examples, a tile can be partitioned into multiple bricks, each of which can include one or more CTU rows within the tile. A tile that is not partitioned into multiple bricks can also be referred to as a brick. However, a brick that is a proper subset of a tile can not be referred to as a tile.

[0050] Bricks in a picture can also be arranged in slices. A slice can be an integer multiple of bricks of a picture, which can be contained exclusively in a single network abstraction layer (NAL) unit. In certain examples, a slice includes a contiguous sequence of complete tiles or complete bricks of only one tile.

[0051] The present disclosure can interchangeably use “NxN” and “N by N” to refer to the sample dimensions of a block, such as a CU or other video block, in terms of vertical and horizontal dimensions, e.g., 16x16 samples or 16 by 16 samples. In general, a 16x16 CU will have 16 samples in a vertical direction (y = 16) and 16 samples in a horizontal direction (x = 16). Likewise, an NxN CU typically has N samples in a vertical direction and N samples in a horizontal direction, where N represents a nonnegative integer value. The samples in a CU can be arranged in rows and columns. Moreover, a CU need not necessarily have the same number of samples in a horizontal direction as in a vertical direction. For example, a CU can comprise NxM samples, where M is not necessarily equal to N.

[0052] Video encoder 200 encodes video data of CUs that represent prediction and / or residual information, among other information. Prediction information indicates how to predict a CU in order to form a prediction block for the CU. Residual information generally represents sample-by-sample differences between samples of the CU prior to encoding and the prediction block.

[0053] To predict a CU, video encoder 200 can generally form a prediction block for the CU through inter-prediction or intra-prediction. Inter-prediction generally refers to predicting the CU from data of a previously coded picture, whereas intra-prediction generally refers to predicting the CU from previously coded data of the same picture. To perform inter-prediction, video encoder 200 can use one or more motion vectors to generate the prediction block. Video encoder 200 can generally perform a motion search to identify a reference block that closely matches the CU, e.g., in terms of differences between the CU and the reference block. Video encoder 200 can calculate a difference metric using a sum of absolute difference (SAD), sum of squared differences (SSD), mean absolute difference (MAD), mean squared differences (MSD), or other such difference calculations to determine whether a reference block closely matches a current CU. In some examples, video encoder 200 can use uni -prediction or bi-prediction to predict a current CU.

[0054] Certain examples of VVC also provide an affine motion compensation mode, which can be considered an inter-prediction mode. In the affine motion compensation mode, video encoder 200 can determine two or more motion vectors that represent non-translational motion, such as scaling or zooming, rotation, perspective motion, or other irregular types of motion.

[0055] To perform intra prediction, video encoder 200 can select an intra prediction mode to generate the prediction block. Certain examples of VVC provide sixty-seven intra prediction modes, including modes for various directions as well as a planar mode and a DC mode. In general, video encoder 200 selects an intra prediction mode that describes a neighboring sample to a current block (e.g., a block of a CU) to predict samples of the current block from the neighboring sample. Assuming video encoder 200 codes CTUs and CUs in a raster scan order (left to right, top to bottom), such a sample can generally be above, above and to the left, or to the left of the current block in the same picture as the current block.

[0056] Video encoder 200 encodes data that represents the prediction mode for the current block. For example, for inter prediction modes, video encoder 200 can encode data that indicates which of various available inter prediction modes is used and motion information for the corresponding mode. For uni-directional or bi-directional inter prediction, video encoder 200 can encode motion vectors using advanced motion vector prediction (AMVP) or merge mode, for example. Video encoder 200 can use a similar mode to encode motion vectors for affine motion compensation modes.

[0057] Following prediction, such as intra prediction or inter prediction, for a block, video encoder 200 can calculate residual data for the block. The residual data, such as a residual block, represents sample-by-sample differences between the block and a prediction block for the block that was formed using the respective prediction mode. Video encoder 200 can apply one or more transforms to the residual block to produce transform data in a transform domain rather than the sample domain. For example, video encoder 200 can apply a discrete cosine transform (DCT), an integer transform, a wavelet transform, or a conceptually similar transform. In addition, video encoder 200 can apply a secondary transform following a first transform, such as a mode-dependent non-separable secondary transform (MDNSST), a mode-dependent transform, a Karhunen-Loeve transform (KLT), and the like. Video encoder 200 produces transform coefficients following application of the one or more transforms.

[0058] As described above, following any transforms to produce transform coefficients, video encoder 200 can perform quantization on the transform coefficients. Quantization generally refers to a process in which transform coefficients are quantized to possibly reduce the amount of data used to represent the transform coefficients, providing further compression. By performing the quantization process, video encoder 200 can reduce the bit depth of some or all of the transform coefficients associated with the transform coefficients. For example, video encoder 200 can round an n-bit value down to an m-bit value during quantization, where n is greater than m. In some examples, to perform quantization, video encoder 200 can perform a bitwise right shift on a value to be quantized.

[0059] After quantization, video encoder 200 can scan the transform coefficients, producing a one-dimensional vector from the two-dimensional matrix including the quantized transform coefficients. The scan can be designed to place higher energy (and hence, lower frequency) transform coefficients at the front of the vector, and lower energy (and hence, higher frequency) transform coefficients at the back of the vector. In some examples, video encoder 200 can utilize a pre-defined scan order to scan the quantized transform coefficients to produce a serialized vector, and then entropy encode the quantized transform coefficients of the vector. In other examples, video encoder 200 can perform an adaptive scan. After scanning the quantized transform coefficients to form a one-dimensional vector, video encoder 200 can entropy encode the one-dimensional vector, e.g., according to context adaptive binary arithmetic coding (CABAC). Video encoder 200 can also entropy encode values for syntax elements that describe metadata associated with the encoded video data used by video decoder 300 in decoding the video data.

[0060] To perform CABAC, video encoder 200 can assign a context within a context model to a symbol to be transmitted. The context can relate to, for example, whether neighboring values of the symbol are zero-valued or not. The probability determination can be based on a context assigned to the symbol.

[0061] Video encoder 200 can further generate syntax data, such as block-based, picture-based, and sequence-based syntax data, to video decoder 300, such as in picture headers, block headers, slice headers, or other syntax data, such as sequence parameter sets (SPS), picture parameter sets (PPS), or video parameter sets (VPS). Video decoder 300 can similarly decode such syntax data to determine how to decode corresponding video data.

[0062] In this way, video encoder 200 can generate a bitstream including encoded video data, e.g., syntax elements describing partitioning of a picture into blocks (e.g., CUs) and prediction and / or residual information for the blocks. Ultimately, video decoder 300 can receive the bitstream and decode the encoded video data.

[0063] In general, video decoder 300 performs a reciprocal process to that performed by video encoder 200 to decode the encoded video data of the bitstream. For example, video decoder 300 can decode values for syntax elements of the bitstream using CABAC in a manner substantially similar, albeit reciprocal, to the CABAC encoding process of video encoder 200. The syntax elements can define partitioning information for partitioning a picture into CTUs and partitioning each CTU according to a corresponding partition structure, such as a QTBT structure, to define CUs of the CTU. The syntax elements can further define prediction and residual information for blocks (e.g., CUs) of the video data.

[0064] The residual information can be represented by, for example, quantized transform coefficients. Video decoder 300 can inverse quantize and inverse transform the quantized transform coefficients of a block to reproduce a residual block for the block. Video decoder 300 forms a prediction block for the block using the signaled prediction mode (intra- or inter-prediction) and related prediction information (e.g., motion information for inter-prediction). Video decoder 300 can then combine (on a sample-by-sample basis) the prediction block and the residual block to reproduce the original block. Video decoder 300 can perform additional processes such as performing a deblocking process to reduce visual artifacts along block boundaries.

[0065] According to techniques of this disclosure, video encoder 200 and video decoder 300 can be configured to code a multiple transform set index for a transform block based on a presence of a non-zero transform coefficient other than a DC coefficient in the transform block. For example, video decoder 300 can be configured to receive a block of video data, determine a value of a multiple transform set index for the block of video data based on a presence of a non-zero transform coefficient other than a DC coefficient in the block of video data, and apply a transform to the block of video data based on the determined value of the multiple transform set index.

[0066] This disclosure can generally refer to “signaling” certain information, such as syntax elements. The term “signaling” can generally refer to a communication of values for syntax elements and / or other data used to decode encoded video data. That is, video encoder 200 can signal values for syntax elements in a bitstream. In general, signaling refers to generating values in a bitstream. As described above, source device 102 can convey the bitstream to destination device 116 in substantially real time, or non-real time, such as can occur when syntax elements are stored to storage device 112 for later retrieval by destination device 116.

[0067] Figure 2A and 2Bis a conceptual diagram illustrating an example quadtree-binary tree (QTBT) structure 130 and a corresponding coding tree unit (CTU) 132. The solid lines represent quadtree splits, while the dashed lines indicate binary tree splits. In each split (i.e., non-leaf) node of the binary tree, a flag is signaled to indicate which split type (i.e., horizontal or vertical) was used, where 0 indicates a horizontal split and 1 indicates a vertical split in this example. For the quadtree splits, since a quadtree node splits a block horizontally and vertically into 4 equally sized sub-blocks, there is no need to indicate the split type. Accordingly, video encoder 200 and video decoder 300 can encode and decode, respectively, syntax elements (e.g., split information) for the region tree level (i.e., solid lines) and syntax elements (e.g., split information) for the prediction tree level (i.e., dashed lines) of the QTBT structure 130. Video encoder 200 and video decoder 300 can encode and decode, respectively, video data (such as prediction and transform data) for CUs represented by terminal leaf nodes of the QTBT structure 130.

[0068] In general, Figure 2B The CTU 132 can be associated with parameters that define the sizes of blocks corresponding to nodes of the QTBT structure 130 at the first and second levels. These parameters can include a CTU size (representing the size of the CTU 132 in samples), a minimum quadtree size (MinQTSize, representing the minimum allowed quadtree leaf node size), a maximum binary tree size (MaxBTSize, representing the maximum allowed binary tree root node size), a maximum binary tree depth (MaxBTDepth, representing the maximum allowed binary tree depth), and a minimum binary tree size (MinBTSize, representing the minimum allowed binary tree leaf node size).

[0069] The root node of the QTBT structure corresponding to a CTU can have four child nodes at the first level of the QTBT structure, each of which can be partitioned according to quadtree partitioning. That is, a node at the first level is either a leaf node (having no child nodes) or has four child nodes. The example of the QTBT structure 130 represents such nodes, including child nodes with solid branches and a parent node. If a node at the first level is not larger than a maximum allowed binary tree root node size (MaxBTSize), the node can be further partitioned by a respective binary tree. The binary tree splitting of a node can be iterated until the split produces nodes that are either at a minimum allowed binary tree leaf node size (MinBTSize) or at a maximum allowed binary tree depth (MaxBTDepth). The example of the QTBT structure 130 represents such nodes as having dashed branches. Binary tree leaf nodes are represented as coding units (CUs), which are used for prediction (e.g., intra- or inter-prediction) and transform without any further partitioning. As noted above, a CU can also be referred to as a “video block” or “block.”

[0070] In one example of a QTBT partitioning structure, the CTU size is set to 128x128 (luma samples and two corresponding 64x64 chroma samples), the MinQTSize is set to 16x16, the MaxBTSize is set to 64x64, the MinBTSize (for both width and height) is set to 4, and the MaxBTDepth is set to 4. First, quadtree partitioning is applied to the CTU to generate quadtree leaf nodes. A quadtree leaf node can have a size from 16x16 (i.e., MinQTSize) to 128x128 (i.e., the CTU size). If a quadtree leaf node is 128x128, it is not further split by binary tree splitting since its size exceeds the MaxBTSize (64x64 in this example). Otherwise, the quadtree leaf node is further partitioned by binary tree. Thus, the quadtree leaf node is also a root node of a binary tree and has a binary tree depth of 0. When the binary tree depth reaches the MaxBTDepth (4 in this example), no further splitting is allowed. A binary tree node with a width equal to the MinBTSize (4 in this example) means that no further vertical splitting (i.e., division of the width) is allowed for that binary tree node. Similarly, a binary tree node with a height equal to the MinBTSize means that no further horizontal splitting (i.e., division of the height) is allowed for that binary tree node. As noted above, the leaf nodes of the binary tree are referred to as CUs and are further processed for prediction and transform without further partitioning.

[0071] Figure 3 FIG. 2 is a block diagram illustrating an example video encoder 200 that can perform the techniques of this disclosure. The video encoder 200 is provided as an example and is not intended to limit the scope of potential implementations. Indeed, the techniques and mechanisms disclosed herein can be applied to any video encoding device, including any device that supports video coding standards, such as the HEVC standard, the VP9 standard, the AV1 standard, and the like. Figure 3are for illustrative purposes, and should not be considered limiting on the technology broadly set forth in the present disclosure. For illustrative purposes, the present disclosure describes a video encoder 200 in accordance with the technology of VVC (ITU-T H.266 under development) and HEVC (ITU-T H.265). However, the technology of the present disclosure can be performed by video encoding devices configured to other video coding standards.

[0072] In Figure 3 In the example of FIG. 2, video encoder 200 includes video data memory 230, mode select unit 202, residual generation unit 204, transform processing unit 206, quantization unit 208, inverse quantization unit 210, inverse transform processing unit 212, reconstruction unit 214, filter unit 216, decoded picture buffer (DPB) 218, and entropy encoding unit 220. Any or all of video data memory 230, mode select unit 202, residual generation unit 204, transform processing unit 206, quantization unit 208, inverse quantization unit 210, inverse transform processing unit 212, reconstruction unit 214, filter unit 216, DPB 218, and entropy encoding unit 220 can be implemented in one or more processors or processing circuits. For instance, the units of video encoder 200 can be implemented as one or more circuits or logic elements as part of hardware circuitry, or as part of a processor, ASIC, or FPGA. Also, video encoder 200 can include additional or alternative processors or processing circuits to perform these and other functions.

[0073] Video data memory 230 can store video data to be encoded by the components of video encoder 200. Video encoder 200 can receive the video data stored in video data memory 230 from, for example, video source 104 Figure 1 DPB 218 can be used as a reference picture memory that stores reference video data used by video encoder 200 in encoding subsequent video data. Video data memory 230 and DPB 218 can be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM) including synchronous DRAM (SDRAM), magneto resistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. Video data memory 230 and DPB 218 can be provided by the same memory device or separate memory devices. In various examples, video data memory 230 can be on-chip with other components of video encoder 200, as illustrated, or off-chip relative to those components.

[0074] In this disclosure, reference to video data memory 230 should not be interpreted as being limited to memory internal to video encoder 200 (unless specifically so stated), or memory external to video encoder 200 (unless specifically so stated). Rather, reference to video data memory 230 should be understood as reference memory that stores video data that video encoder 200 receives for encoding (e.g., video data of a current block to be encoded). Figure 1 Memory 106 of device 100 can also provide temporary storage of outputs from various units of video encoder 200.

[0075] FIG. 1 illustrates Figure 3 The various units of FIG. 2 are shown to help understand the operations performed by video encoder 200. The units can be implemented as fixed function circuits, programmable circuits, or a combination thereof. Fixed function circuits refer to circuits that provide particular functionality and are preset on the operations that can be performed. Programmable circuits refer to circuits that can be programmed to perform various tasks and provide flexible functionality in the operations that can be performed. For instance, the programmable circuits can execute software or firmware that cause the programmable circuits to operate in the manner defined by instructions of the software or firmware. Fixed function circuits can execute software instructions (e.g., to receive parameters or output parameters), but the types of operations that the fixed function circuits perform are generally immutable. In some examples, one or more of the units can be distinct circuit blocks (fixed function or programmable), and in some examples, one or more units can be integrated circuits.

[0076] Video encoder 200 can include arithmetic logic units (ALUs), elementary function units (EFUs), digital circuits, analog circuits, and / or programmable cores formed from programmable circuits. In examples where the operations of video encoder 200 are performed using software executed by the programmable circuits, memory 106 Figure 1 ) can store the instructions (e.g., object code) of the software that video encoder 200 receives and executes, or another memory within video encoder 200 (not shown) can store such instructions.

[0077] Video data memory 230 is configured to store received video data. Video encoder 200 can retrieve pictures of the video data from video data memory 230 and provide the video data to residual generation unit 204 and mode selection unit 202. The video data in video data memory 230 can be raw video data that is to be encoded.

[0078] The mode selection unit 202 includes a motion estimation unit 222, a motion compensation unit 224, and an intra-prediction unit 226. The mode selection unit 202 can include additional functional units to perform video prediction according to other prediction modes. As examples, the mode selection unit 202 can include a palette unit, an intra-block copy unit (which can be part of the motion estimation unit 222 and / or the motion compensation unit 224), an affine unit, a linear model (LM) unit, etc.

[0079] The mode selection unit 202 generally coordinates the various encoding processes to test combinations of encoding parameters and rate-distortion values resulting for these combinations. The encoding parameters can include partitioning of CTUs into CUs, prediction modes for the CUs, transform types for residual data of the CUs, quantization parameters for the residual data of the CUs, etc. The mode selection unit 202 can ultimately select the combination of encoding parameters that has the best rate-distortion value compared to other tested combinations.

[0080] The video encoder 200 can partition a picture retrieved from the video data memory 230 into a series of CTUs, and encapsulate one or more CTUs within a slice. The mode selection unit 202 can partition the CTUs of the picture according to a tree structure such as the QTBT structure or the quad-tree structure of HEVC described above. As described above, the video encoder 200 can form one or more CUs from partitioning a CTU according to the tree structure. Such CUs can also be generally referred to as “video blocks” or “blocks.”

[0081] In general, the mode selection unit 202 also controls its components (e.g., the motion estimation unit 222, the motion compensation unit 224, and the intra-prediction unit 226) to generate a prediction block for a current block (e.g., a current CU, or in HEVC, an overlapping portion of a PU and a TU). To perform inter-prediction for the current block, the motion estimation unit 222 can perform a motion search to identify one or more closely matching reference blocks in one or more reference pictures (e.g., one or more previously coded pictures stored in the DPB 218). Specifically, the motion estimation unit 222 can calculate values that represent how similar a possible reference block is to the current block according to, for example, a sum of absolute difference (SAD), a sum of squared difference (SSD), a mean absolute difference (MAD), a mean squared difference (MSD), etc. The motion estimation unit 222 can generally perform these calculations using the sample-by-sample difference between the current block and the reference block under consideration. The motion estimation unit 222 can identify the reference block with the lowest value generated by these calculations, indicating the reference block that most closely matches the current block.

[0082] Motion estimation unit 222 can form one or more motion vectors (MVs) that define a position of a reference block in a reference picture relative to a position of the current block in the current picture. Motion estimation unit 222 can then provide the motion vector(s) to motion compensation unit 224. For example, for single prediction, motion estimation unit 222 can provide a single motion vector, while for bi-prediction, motion estimation unit 222 can provide two motion vectors. Motion compensation unit 224 can then generate a prediction block using the motion vector(s). For example, motion compensation unit 224 can use the motion vector(s) to retrieve data for the reference block. As another example, if the motion vector(s) have fractional sample precision, motion compensation unit 224 can interpolate the prediction block according to one or more interpolation filters. Moreover, for bi-prediction, motion compensation unit 224 can retrieve data for two reference blocks identified by the respective motion vectors and combine the retrieved data, e.g., by sample-wise averaging or weighted averaging.

[0083] As another example, for intra prediction or intra prediction coding, intra prediction unit 226 can generate a prediction block from samples neighboring the current block. For example, for directional modes, intra prediction unit 226 can mathematically combine neighboring sample values and fill these calculated values across the current block in a defined direction to produce the prediction block. As another example, for a DC mode, intra prediction unit 226 can calculate an average of neighboring samples of the current block and generate the prediction block to include the resulting average for each sample of the prediction block.

[0084] Mode select unit 202 provides the prediction block to residual generation unit 204. Residual generation unit 204 receives the original, unencoded version of the current block from video data memory 230 and the prediction block from mode select unit 202. Residual generation unit 204 calculates the sample-wise difference between the current block and the prediction block. The resulting sample-wise difference defines a residual block for the current block. In some examples, residual generation unit 204 can also determine the difference between sample values in the residual block to generate the residual block using residual differential pulse code modulation (RDPCM). In some examples, residual generation unit 204 can be formed using one or more subtractor circuits that perform binary subtraction.

[0085] In examples where the mode select unit 202 partitions the CU into PUs, each PU can be associated with a luma prediction unit and corresponding chroma prediction units. Video encoder 200 and video decoder 300 can support PUs having various sizes. As indicated above, the size of a CU can refer to the size of the luma coding block of the CU, while the size of a PU can refer to the size of the luma prediction unit of the PU. Assuming that a particular CU has a size of 2Nx2N, video encoder 200 can support 2Nx2N or NxN PU sizes for intra-prediction, and 2Nx2N, 2NxN, Nx2N, NxN, or similar symmetric PU sizes for inter-prediction. Video encoder 200 and video decoder 300 can also support non-symmetric partitioning for 2NxnU, 2NxnD, nLx2N, and nRx2N PU sizes for inter-prediction.

[0086] In examples where the mode select unit 202 does not partition the CU into PUs, each CU can be associated with a luma coding block and corresponding chroma coding blocks. As described above, the size of a CU can refer to the size of the luma coding block of the CU. Video encoder 200 and video decoder 300 can support CU sizes of 2Nx2N, 2NxN, or Nx2N.

[0087] For other video coding techniques, such as intra-block copy mode coding, affine mode coding, and linear model (LM) mode coding as certain examples, the mode select unit 202 generates a prediction block for the current block being encoded via a respective unit associated with the coding technique. In certain examples, such as palette mode encoding, the mode select unit 202 can not generate a prediction block, but rather generate syntax elements that indicate a way to reconstruct the block based on a palette. In such modes, the mode select unit 202 can provide these syntax elements to the entropy encoding unit 220 for encoding.

[0088] As described above, the residual generation unit 204 receives video data for the current block and the corresponding prediction block. The residual generation unit 204 then generates a residual block for the current block. To generate the residual block, the residual generation unit 204 calculates a sample-by-sample difference between the prediction block and the current block.

[0089] Transform processing unit 206 applies one or more transforms to the residual block to produce a block of transform coefficients (referred to herein as a "transform coefficient block"). Transform processing unit 206 can apply various transforms to the residual block to form the transform coefficient block. For example, transform processing unit 206 can apply a discrete cosine transform (DCT), a directional transform, a Karhunen-Loeve transform (KLT), or a conceptually similar transform. In some examples, transform processing unit 206 can perform multiple transforms, e.g., a primary transform and a secondary transform such as a rotational transform, on the residual block. In some examples, transform processing unit 206 does not apply a transform to the residual block.

[0090] Quantization unit 208 can quantize the transform coefficients in the transform coefficient block to produce a quantized transform coefficient block. Quantization unit 208 can quantize transform coefficients of the transform coefficient block according to a quantization parameter (QP) value associated with the current block. Video encoder 200 (e.g., via mode select unit 202) can adjust the degree of quantization applied to the transform coefficient block associated with the current block by adjusting the QP value associated with the CU. Quantization can introduce loss of information, and thus, quantized transform coefficients can have lower precision than the original transform coefficients produced by transform processing unit 206.

[0091] Inverse quantization unit 210 and inverse transform processing unit 212 can apply inverse quantization and inverse transforms, respectively, to a quantized transform coefficient block to reconstruct a residual block from the transform coefficient block. Reconstruction unit 214 can produce a reconstructed block corresponding to the current block (albeit with some degree of distortion) based on the reconstructed residual block and the prediction block generated by mode select unit 202. For example, reconstruction unit 214 can add samples of the reconstructed residual block to corresponding samples from the prediction block generated by mode select unit 202 to produce the reconstructed block.

[0092] Filter unit 216 can perform one or more filtering operations on the reconstructed block. For example, filter unit 216 can perform a deblocking operation to reduce blocking artifacts along the boundaries of the CU. In some examples, the operations of filter unit 216 can be skipped.

[0093] Video encoder 200 stores the reconstructed blocks in DPB 218. For instance, in examples where the operations of filter unit 216 are not performed, reconstructed unit 214 can store the reconstructed blocks to DPB 218. In examples where the operations of filter unit 216 are performed, filter unit 216 can store the filtered reconstructed blocks to DPB 218. Motion estimation unit 222 and motion compensation unit 224 can retrieve reference pictures from DPB 218, which are formed from reconstructed (and possibly filtered) blocks, to inter-predict blocks of subsequent coded pictures. In addition, intra-prediction unit 226 can use reconstructed blocks in DPB 218 of the current picture to intra-predict other blocks in the current picture.

[0094] In general, entropy encoding unit 220 can entropy encode syntax elements received from other functional components of video encoder 200. For example, entropy encoding unit 220 can entropy encode quantized transform coefficient blocks from quantization unit 208. As another example, entropy encoding unit 220 can entropy encode prediction syntax elements (e.g., motion information for inter-prediction or intra-mode information for intra-prediction) from mode select unit 202. Entropy encoding unit 220 can perform one or more entropy encoding operations on the syntax elements, which are another example of video data, to generate entropy encoded data. For example, entropy encoding unit 220 can perform a context- adaptive variable length coding (CAVLC) operation, a CABAC operation, a variable to variable (V2V) length coding operation, a syntax-based context-adaptive binary arithmetic coding (SBAC) operation, a Probability Interval Partitioning Entropy (PIPE) coding operation, an Exponential-Golomb coding operation, or another type of entropy encoding operation on the data. In some examples, entropy encoding unit 220 can operate in a bypass mode in which the syntax elements are not entropy encoded.

[0095] Video encoder 200 can output a bitstream that includes the entropy encoded syntax elements needed to reconstruct the blocks of a slice or picture. Specifically, entropy encoding unit 220 can output the bitstream.

[0096] The operations described above are described in terms of blocks. Such descriptions should be understood to be operations for luma coding blocks and / or chroma coding blocks. As described above, in some examples, luma coding blocks and chroma coding blocks are luma and chroma components of a CU. In some examples, luma coding blocks and chroma coding blocks are luma and chroma components of a PU.

[0097] In some examples, operations performed for luma coding blocks need not be repeated for chroma coding blocks. As one example, operations to identify motion vectors (MVs) and reference pictures for luma coding blocks need not be repeated to identify MVs and reference pictures for chroma blocks. Rather, the MVs for luma coding blocks can be scaled to determine the MVs for chroma blocks, and the reference pictures can be the same. As another example, intra prediction processing can be the same for luma coding blocks and chroma coding blocks.

[0098] Video encoder 200 represents an example of a device configured to encode video data, including a memory configured to store video data, and one or more processing units implemented in circuitry and configured to encode a multiple transform set index for a transform block based on a presence of non-zero transform coefficients other than a DC coefficient in the transform block.

[0099] Figure 4 is a block diagram illustrating an example video decoder 300 that can perform the techniques of this disclosure. Video decoder 300 is provided as an example Figure 4 is for purposes of explanation and is not limiting on the extensive examples and descriptions set forth in this disclosure. For purposes of illustration, this disclosure describes video decoder 300 in accordance with the techniques of VVC (ITU-T H.266 under development) and HEVC (ITU-T H.265). However, the techniques of this disclosure can be performed by video coding devices configured to other video coding standards.

[0100] In Figure 4 In the example of FIG. 3, video decoder 300 includes coded picture buffer (CPB) memory 320, entropy decoding unit 302, prediction processing unit 304, inverse quantization unit 306, inverse transform processing unit 308, reconstruction unit 310, filter unit 312, and decoded picture buffer (DPB) 314. Any or all of CPB memory 320, entropy decoding unit 302, prediction processing unit 304, inverse quantization unit 306, inverse transform processing unit 308, reconstruction unit 310, filter unit 312, and DPB 314 can be implemented in one or more processors or in processing circuitry. For instance, the units of video decoder 300 can be implemented as one or more circuits or logic elements as part of hardware circuitry, or as part of a processor, ASIC, or FPGA. Moreover, video decoder 300 can include additional or alternative processors or processing circuitry to perform these and other functions.

[0101] The prediction processing unit 304 includes a motion compensation unit 316 and an intra-prediction unit 318. The prediction processing unit 304 can include additional units to perform prediction from other prediction modes. As examples, the prediction processing unit 304 can include a palette unit, a block copy unit (which can form a part of the motion compensation unit 316), an affine unit, a linear model (LM) unit, etc. In other examples, the video decoder 300 can include more, less, or different functional components.

[0102] The CPB memory 320 can store video data, such as encoded video bitstreams, to be decoded by the components of the video decoder 300. The video data stored in the CPB memory 320 can be obtained, for example, from a computer- readable medium 110 Figure 1 The CPB memory 320 can include a CPB that stores encoded video data (e.g., syntax elements) from an encoded video bitstream. Also, the CPB memory 320 can store video data other than syntax elements of a coded picture, such as temporary data representing outputs from the various units of the video decoder 300. The DPB 314 generally stores decoded pictures, which the video decoder 300 can output and / or use as reference video data when decoding subsequent data or pictures of the encoded video bitstream. The CPB memory 320 and the DPB 314 can be formed by any of a plurality of memory devices, such as DRAM, including SDRAM, MRAM, RRAM, or other types of memory devices. The CPB memory 320 and the DPB 314 can be provided by the same memory devices or independent memory devices. In various examples, the CPB memory 320 can be on-chip with other components of the video decoder 300, or off-chip relative to those components.

[0103] Additionally or alternatively, in certain examples, the video decoder 300 can retrieve coded video data from the memory 120 Figure 1 That is, the memory 120 can store data as discussed above in connection with the CPB memory 320. Also, when some or all functions of the video decoder 300 are implemented in software, the memory 120 can store the instructions that are to be executed by the processing circuitry of the video decoder 300.

[0104] FIGURE Figure 4 The various units shown are meant to illustrate the operations performed by the video decoder 300. These units can be implemented as fixed- function circuits, programmable circuits, or a combination thereof. Similar to the video encoder 200, the video decoder 300 can include more, less, or different functional components. Figure 3Fixed function circuits are circuits that provide specific functionality, and that have preset operations that can be performed. Programmable circuits are circuits that can be programmed to perform a wide variety of tasks, and that provide flexible functionality among the operations that can be performed. For instance, a programmable circuit can execute software or firmware that causes the programmable circuit to operate in a manner defined by the instructions of the software or firmware. Fixed function circuits can execute software instructions (e.g., to receive parameters or output parameters), but the types of operations that the fixed function circuit performs are generally immutable. In some examples, one or more units can be distinct circuit blocks (fixed function or programmable), and in some examples, one or more units can be an integrated circuit.

[0105] Video decoder 300 can include ALUs, EFUs, digital circuits, analog circuits, and / or programmable cores formed from programmable circuits. In examples where the operations of video decoder 300 are performed by software executing on the programmable circuits, on-chip or off-chip memory can store instructions (e.g., object code) of the software that video decoder 300 receives and executes.

[0106] Entropy decoding unit 302 can receive encoded video data from a CPB and entropy decode the video data to reconstruct syntax elements. Prediction processing unit 304, inverse quantization unit 306, inverse transform processing unit 308, reconstruction unit 310, and filter unit 312 can generate decoded video data based on the syntax elements extracted from the bitstream.

[0107] In general, video decoder 300 reconstructs a picture on a block-by-block basis. Video decoder 300 can perform reconstruction operations on each block individually (where the block that is currently undergoing reconstruction (i.e., decoding) can be referred to as the “current block”).

[0108] Entropy decoding unit 302 can entropy decode syntax elements defining quantized transform coefficients of a block of quantized transform coefficients, as well as transform information such as a quantization parameter (QP) and / or transform mode indication(s). Inverse quantization unit 306 can use the QP associated with the block of quantized transform coefficients to determine a degree of quantization, and likewise a degree of inverse quantization for inverse quantization unit 306 to apply. Inverse quantization unit 306 can de-quantize the quantized transform coefficients (e.g., perform a bitshift operation to). Inverse quantization unit 306 can thereby form a block of transform coefficients including transform coefficients.

[0109] After inverse quantization unit 306 forms a transform coefficient block, inverse transform processing unit 308 can apply one or more inverse transforms to the transform coefficient block to generate a residual block associated with the current block. For example, inverse transform processing unit 308 can apply an inverse DCT, an inverse integer transform, an inverse Karhunen-Loeve Transform (KLT), an inverse rotational transform, an inverse directional transform, or another inverse transform to the transform coefficient block.

[0110] Furthermore, prediction processing unit 304 generates a prediction block from the prediction information syntax elements entropy decoded by entropy decoding unit 302. For example, if the prediction information syntax elements indicate that the current block is inter-predicted, motion compensation unit 316 can generate the prediction block. In this case, the prediction information syntax elements can indicate a reference picture in DPB 314 from which to retrieve a reference block, and a motion vector identifying a position of the reference block in the reference picture relative to a position of the current block in the current picture. Motion compensation unit 316 can generally perform the inter-prediction process in a manner substantially similar to that described for motion compensation unit 224 Figure 3 ) above.

[0111] As another example, if the prediction information syntax elements indicate that the current block is intra-predicted, intra-prediction unit 318 can generate the prediction block according to an intra-prediction mode indicated by the prediction information syntax elements. Again, intra-prediction unit 318 can generally perform the intra-prediction process in a manner substantially similar to that described for intra-prediction unit 226 Figure 3 ) above. Intra-prediction unit 318 can retrieve data for neighboring samples of the current block from DPB 314.

[0112] Reconstruction unit 310 can reconstruct the current block using the prediction block and the residual block. For example, reconstruction unit 310 can add the samples of the residual block to corresponding samples of the prediction block to reconstruct the current block.

[0113] Filter unit 312 can perform one or more filtering operations on the reconstructed block. For example, filter unit 312 can perform a deblocking operation to reduce blocking artifacts along the edges of the reconstructed block. The operations of filter unit 312 are not necessarily performed in all examples.

[0114] Video decoder 300 can store the reconstructed blocks in DPB 314. For example, in examples where operations of filter unit 312 are not performed, reconstructed unit 310 can store the reconstructed blocks to DPB 314. In examples where operations of filter unit 312 are performed, filter unit 312 can store the filtered reconstructed blocks to DPB 314. As described above, DPB 314 can provide reference information, such as samples of a current picture for intra prediction and previously decoded pictures for subsequent motion compensation, to prediction processing unit 304. In addition, video decoder 300 can output decoded pictures (e.g., a decoded video) from DPB 314 for subsequent presentation on a display device, such as display device 118 of FIG. 1. Figure 1

[0115] Video decoder 300 represents an example of a video decoding device including a memory configured to store video data, and one or more processors implemented in circuitry and configured to receive a block of video data, determine a value of a multiple transform set index for the block of video data based on a presence of a non-zero transform coefficient other than a DC coefficient in the block of video data, and apply a transform to the block of video data based on the determined value of the multiple transform set index.

[0116] In video coding standards prior to HEVC, only fixed separable transforms were used. For example, a video coder can be configured to use a type 2 discrete cosine transform (DCT-2) in both the vertical and horizontal directions. In HEVC, in addition to DCT-2, a type 7 discrete sine transform (DST-7) was used as a fixed separable transform for 4x4 blocks. U.S. Patent No. 10,306,229 and U.S. Patent Application Publication No. 20180020218 describe adaptive extensions of those fixed transforms, and examples of multiple transform selection (MTS) techniques were adopted in the Joint Exploration Model (JEM) of the Joint Video Team (JVT) (Joint Video Team (JVT) of ITU-T SG 16 WP 3 and ISO / IEC JTC 1 / SC 29 / WG 11, JEM Software, available at jvet.hhi.fraunhofer.de / svn / svn_HMJEMSoftware / tags / HM-16.6-JEM-7.0). MTS is also referred to as adaptive multiple transform (AMT).

[0117] ​An example MTS design in VVC uses six transform candidates and supports combinations with DST-7 and Type 8 DCT (DCT-8) instead of using a single type of transform in both horizontal and vertical directions (e.g., applying identity transform (IDT), DCT-2, or DST-7 horizontally and vertically). Video encoder 200 and video decoder 300 can be configured to apply transforms to blocks of video data (e.g., transform blocks) using the MTS design. The MTS design can be defined by assigning transforms to syntax elements of a designated signaling method. For example, in VVC Draft 7, a syntax element mts idx (MTS index) specifies which transform kernels (e.g., types of horizontal and vertical transforms) to apply along the horizontal and vertical directions of an associated luma transform block of video data in a current coding unit.

[0118] In other examples, video encoder 200 and video decoder 300 can be configured to apply a low-frequency non-separable transform (LFNST) in conjunction with MTS. To indicate the type of LFNST, video encoder 200 and video decoder 300 can be configured to code a syntax element lfnst idx (LFNST index) that specifies whether to use an LFNST and which one of a plurality of LFNST kernels from a selected transform set to use. A syntax element lfnst idx equal to 0 specifies that no LFNST is used in the current coding unit.

[0119] In VVC Draft 7, video encoder 200 encodes and signals MTS index and LFNST index (e.g., mts idx and lfnst idx, respectively) after residual coding if the following set of conditions are met.

[0120]

[0121] wherein,

[0122] - LfnstDcOnly (initialized to one) is set to zero according to the following condition depending on the last scan position (e.g., last scan position is greater than 0) indicating whether there is a DC coefficient (i.e., whether there is a non-zero DC coefficient):

[0123]

[0124] - MtsZeroOutSigCoeffFlag is set to zero according to the following condition depending on the last significant coefficient position:

[0125]

[0126] In the above example, video encoder 200 can be configured to signal the LFNST index when there are non-zero coefficients other than the DC coefficient (LfnstDcOnly = = 0) and when there are significant coefficients in the zero-out region of the block (LfnstZeroOutSigCoeffFlag = = 1), among other conditions. Video encoder 200 can be configured to signal the MTS index (mtx_idx) when there are non-zero coefficients in the MTS zero-out region (MtsZeroOutSigCoeffFlag = = 1) and there is at least one non-zero coefficient in the block (tu_cbf_luma), among other conditions.

[0127] However, a problem in the above conditions for setting the value of MtsZeroOutSigCoeffFlag is that applying the MTS transform can result in the presence of undesired non-zero coefficients outside the top-left 16x16 region in the 32x32 TU (e.g., outside the LFNST region). To address this problem, the inventors of the current application describe a technique to solve this problem by introducing a coefficient group (CG) based restriction as shown below in co-pending U.S. Provisional Application No. 62 / 951,975 (hereinafter “the ‘975 application”), filed on December 20, 2019, which is incorporated by reference herein:

[0128]

[0129] A coefficient group is a sub-block of coefficients in a transform block.

[0130] coded_sub_block_flag indicates whether a sub-block has non-zero transform coefficients. Similar details are described by the inventors of the current application in M. Coban et al., “Coefficient group based restriction on MTS signaling,” in 17th Meeting (hereinafter “JVET-Q0057”), Brussels, Belgium, 7-17 January 2020, of the Joint Video Expert Team (JVET) of ITU-T SG 16 WP 3 and ISO / IEC JTC 1 / SC 29 / WG 11.

[0131] The present disclosure describes the following specific transform signaling method that can be used in VVC. Specifically, the techniques described by the present disclosure are that video encoder 200 and video decoder 300 use a unified LFNST and MTS signaling scheme by restricting the signaling of the LFNST index and the MTS index based on the presence of non-zero coefficients other than the DC coefficient.

[0132] In VVC Draft 7, when only the DC transform coefficient is available (e.g., as indicated by coded sub block flag when only the DC coefficient is non-zero), video encoder 200 does not signal the LFNST index. Instead, video decoder 300 infers the value of the LFNST index to be 0. In this context, inferring the value of a syntax element means determining the value of the syntax element without receiving or decoding the syntax element from the bitstream.

[0133] According to the techniques of this disclosure, video encoder 200 and video decoder 300 can be configured to apply similar solutions to MTS signaling. For example, if only the DC coefficient of a block (e.g., a transform block) is available (e.g., only the DC coefficient is non-zero), then MTS signaling is skipped without allowing the DST-7 and DCT-8 combination (e.g., lfnst idx > 1). That is, video encoder 200 can be configured to not signal the MTS idx only if the DC coefficient in the block is non-zero. In this case, video decoder 300 can be configured to infer the value of the MTS idx.

[0134] For example, video encoder 200 can be configured to form a transform coefficient block using any of the techniques described above. Video decoder 300 can then encode a multiple transform set (MTS) index (mts idx) based on the presence of non-zero transform coefficients other than the DC coefficient in the block of video data. If the DC coefficient is the only non-zero transform coefficient in the block of video data, then video encoder 200 can not encode and signal the MTS index. In this example, video decoder 300 can be configured to infer the value of the MTS index to be a certain default value. For example, when mts idx is not signaled, then video decoder 300 infers the value of the MTS index to be 0. This indicates that the MTS process is skipped. Again, inferring the value of a syntax element includes determining the value of the syntax element without explicitly receiving the syntax element.

[0135] In the case where the DC coefficient is not the only non-zero transform coefficient in the block of video data, video encoder 200 can be configured to determine one or more transforms for the block of video data and encode and signal an MTS index indicating the one or more transforms. Video decoder 300 can be configured to receive the multiple transform set index in the case where the DC coefficient is not the only non-zero transform coefficient in the block of video data and decode the value of the received multiple transform set index.

[0136] According to the techniques of this disclosure, the VVC Draft 7 coding block flag check can be replaced with the condition of variable MtsDcOnly == 0, as shown below, since video encoder 200 signals the MTS index if there is a non-zero coefficient other than the DC coefficient. The variable MtsDcOnly being equal to zero indicates that the DC coefficient is not the only non-zero coefficient in the block. As shown below, by first setting the MtsDcOnly variable to 1, video encoder 200 and video decoder 300 can be configured to determine that there is a non-zero transform coefficient other than the DC coefficient in the block of video data, where the MtsDcOnly variable having a value of 1 indicates that the only non-zero transform coefficient in the block of video data is the DC coefficient. Then, in the case that the last scan position is greater than zero and the last subblock of the block is equal to zero, video encoder 200 and video decoder 300 reset the MtsDcOnly variable to 0, where the MtsDcOnly variable having a value of 0 indicates that there is a non-zero transform coefficient other than the DC coefficient in the block of video data. The last scan position being greater than zero indicates that the scan of the transform coefficients for the block started at a position that is not the DC coefficient (e.g., at position 0).

[0137] Increases relative to the text of VVC Draft 7 are shown between the tags <add>and< / add>

[0138] Deletions relative to the text of VVC Draft 7 are shown between the tags <del>and< / del>

[0139]

[0140] MtsDcOnly (initialized to one) is set to zero according to the following condition:

[0141] <add>if (lastSubBlock == 0 && lastScanPos > 0) < / add> MtsDcOnly = 0

[0142] ​​Since the sub-blocks are inverse scanned (e.g., from high frequency coefficients to low frequency coefficients), “lastSubBlock == 0” indicates the top-left coefficient group (CG) (e.g., the CG containing the DC) in the transform unit (TU), and “lastScanPos > 0” corresponds to checking whether there is a non-zero coefficient in the CG other than the top-left coefficient. Since the “DC coefficient” is the top-left coefficient in the TU (by definition), the condition if (lastSubBlock == 0 && lastScanPos > 0) combines to check the top-left coefficient in the top-left CG (e.g., corresponding to the top-left position in the TU). As an example, if (lastSubBlock == 0 && lastScanPos == 0) is true, which means the only non-zero coefficient in the TU is the DC coefficient and there is no other non-zero coefficient. In that case, the video encoder 200 does not signal mts_idx. If (lastSubBlock == 0 && lastScanPos > 0) is true, which means the DC coefficient is not the only non-zero coefficient. That is, other transform coefficients in the transform block are non-zero other than the DC coefficient. In that case, the video encoder 200 does signal mts_idx.

[0143] In general, this disclosure describes the following set of changes relative to VVC Draft 7. The additions to the text proposed in this disclosure relative to VVC Draft 7 are shown between tags <add>and< / add> The deletions to the text proposed in this disclosure relative to VVC Draft 7 are shown between tags <del>and< / del> The additions to the text proposed in this disclosure relative to VVC Draft 7 are shown between tags <prevadd>and< / prevadd> The deletions to the text proposed in this disclosure relative to VVC Draft 7 are shown between tags <prevdel>and< / prevdel> The additions to the text proposed in this disclosure relative to VVC Draft 7 are shown between tags

[0144] 7.3.9.4 Coding tree syntax

[0145]

[0146]

[0147] 7.3.9.11 Residual coding syntax

[0148]

[0149]

[0150] Figure 5is a flowchart illustrating an example method for encoding a current block. The current block can include a current CU. Although described with respect to video encoder 200 Figure 1 and 3 ) it should be understood that other devices can be configured to perform methods similar to the methods of Figure 5

[0151] In this example, first, video encoder 200 predicts the current block (350). For example, video encoder 200 can form a prediction block for the current block. Then, video encoder 200 can calculate a residual block for the current block (352). To calculate the residual block, video encoder 200 can calculate a difference between the initial unencoded block and the prediction block for the current block. Then, video encoder 200 can transform the residual block and quantize transform coefficients of the residual block (354). Next, video encoder 200 can scan the quantized transform coefficients of the residual block (356). During or after the scan, video encoder 200 can entropy encode the transform coefficients (358). For example, video encoder 200 can encode the transform coefficients, e.g., using CAVLC or CABAC. Then, video encoder 200 can output entropy encoded data for the coefficients of the block (360).

[0152] Figure 6 is a flowchart illustrating an example method for decoding a current block of video data. The current block can include a current CU. Although described with respect to video decoder 300 Figure 1 and 4 ) it should be understood that other devices can be configured to perform methods similar to the methods of Figure 6

[0153] Video decoder 300 can receive entropy encoded data for the current block, such as entropy encoded prediction information and entropy encoded data for coefficients of a residual block corresponding to the current block (370). Video decoder 300 can entropy decode the entropy encoded data to determine prediction information for the current block and to reproduce the coefficients for the residual block (372). Video decoder 300 can predict the current block, e.g., using an intra or inter prediction mode indicated by the prediction information for the current block, to calculate a prediction block for the current block (374). Then, video decoder 300 can inverse scan the reproduced coefficients to create a block of quantized transform coefficients (376). Then, video decoder 300 can inverse quantize and inverse transform the transform coefficients to produce a residual block (378). Video decoder 300 can finally decode the current block by combining the prediction block and the residual block (380).

[0154] Figure 7 ​​is a flowchart illustrating another example decoding method of the present disclosure. The method can be performed by one or more structural units of video decoder 300 including inverse decoding processing unit 308 Figure 7 techniques.

[0155] In one example of the present disclosure, video decoder 300 can be configured to receive a block of video data (400), and determine a value of a multiple transform set index for the block of video data based on a presence of a non-zero transform coefficient other than a DC coefficient in the block of video data (402). Video decoder 300 can then apply a transform to the block of video data based on the determined value of the multiple transform set index (404). In one example, the block of video data is a transform block of video data.

[0156] In one example, to determine the value of the multiple transform set index, video decoder 300 can be configured to infer the value of the multiple transform set index in a case where the DC coefficient is the only non-zero transform coefficient in the block of video data. In one example, inferring the value of the multiple transform set index includes not receiving the multiple transform set index.

[0157] In another example, to determine the value of the multiple transform set index, video decoder 300 can be configured to receive the multiple transform set index in a case where the DC coefficient is not the only non-zero transform coefficient in the block of video data, and decode the received value of the multiple transform set index.

[0158] In a further example of the present disclosure, video decoder 300 can be configured to determine a presence of a non-zero transform coefficient other than a DC coefficient in the block of video data. In one example, to determine the presence of the non-zero transform coefficient other than the DC coefficient in the block of video data, video decoder 300 can be configured to: set an MtsDcOnly variable to one, where the MtsDcOnly variable having a value of one indicates that the only non-zero transform coefficient in the block of video data is the DC coefficient; reset the MtsDcOnly variable to zero in a case where a last scan position is greater than zero and a last subblock of the block is equal to zero, where the MtsDcOnly variable having a value of zero indicates that there is a non-zero transform coefficient other than the DC coefficient in the block of video data; and determine the presence of the non-zero transform coefficient other than the DC coefficient in the block of video data based on the value of the MtsDcOnly variable.

[0159] In one example, the multiple transform set index specifies transform kernels to be applied along horizontal and vertical directions of a transform block in a current coding unit. In this example, to apply the transform to the block of video data based on the determined value of the multiple transform set index, video decoder 300 can be configured to apply the specified transform kernels to the block of video data.

[0160] Other illustrative aspects of the present disclosure are described below.

[0161] Clause 1 - A method of coding video data, the method comprising coding a multiple transform set index for a transform block based on a presence of a non-zero transform coefficient other than a DC coefficient in the transform block.

[0162] Clause 2 - The method of clause 1, wherein coding the multiple transform set index comprises not coding the multiple transform set index in a case that the DC coefficient is the only non-zero transform coefficient in the transform block.

[0163] Clause 3 - The method of clause 1, wherein coding the multiple transform set index comprises coding the multiple transform set index in a case that the DC coefficient is not the only non-zero transform coefficient in the transform block.

[0164] Clause 4 - The method of clause 1, wherein the multiple transform set index specifies a transform kernel to apply in a horizontal and vertical direction of the transform block in a current coding unit.

[0165] Clause 5 - The method of clause 4, further comprising applying the transform kernel to the transform block.

[0166] Clause 6 - The method of any of clauses 1-5, wherein coding comprises decoding.

[0167] Clause 7 - The method of any of clauses 1-5, wherein coding comprises encoding.

[0168] Clause 8 - An apparatus for coding video data, the apparatus comprising one or more means for performing the method of any of clauses 1-7.

[0169] Clause 9 - The apparatus of clause 8, wherein the one or more means comprise one or more processors implemented in circuitry.

[0170] Clause 10 - The apparatus of any of clauses 8 and 9, further comprising a memory for storing the video data.

[0171] Clause 11 - The apparatus of any of clauses 8-10, further comprising a display configured to display decoded video data.

[0172] Clause 12 - The apparatus of any of clauses 8-11, wherein the apparatus comprises one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

[0173] Clause 13 - The apparatus of any of clauses 8-12, wherein the apparatus comprises a video decoder.

[0174] Clause 14 - The device of any of clauses 8-13, wherein the device comprises a video encoder.

[0175] Clause 15 - A computer-readable storage medium having stored thereon instructions that, when executed, cause one or more processors to perform the method of any of clauses 1-7.

[0176] Clause 16 - Any combination of the techniques described in this disclosure.

[0177] It is to be recognized that depending on the example, certain acts or events of any of the techniques described herein can be performed in a different sequence, can be added, merged, or left out altogether (e.g., not all described acts or events are necessary for the practice of the techniques). Moreover, in certain examples, acts or events can be performed concurrently, e.g., through multi-threaded processing, interrupt processing, or multiple processors, rather than sequentially.

[0178] In one or more examples, the functions described can be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions can be stored on or transmitted over as one or more instructions or code on a computer-readable medium and executed by a hardware-based processing unit. Computer-readable media can include computer-readable storage media, which corresponds to a tangible medium such as data storage media, or communication media including any medium that facilitates transfer of the computer program from one place to another, e.g., according to a communication protocol. In this manner, computer- readable media generally can correspond to (1) tangible computer-readable storage media which is non-transitory or (2) a communication medium such as a signal or carrier wave. Data storage media can be any available media that can be accessed by one or more computers or one or more processors to retrieve instructions, code, and / or data structures for implementation of the techniques described in this disclosure. A computer program product can include a computer-readable medium.

[0179] By way of example, and not limitation, such computer-readable storage media can include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage, or other magnetic storage devices, flash memory, or any other storage medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer. Also, any

[0180] Instructions can be executed by one or more processors, such as one or more DSPs, general purpose microprocessors, ASICs, FPGAs, or other equivalent integrated or discrete logic circuitry. Accordingly, as used herein the term "processor" and "processing circuitry" can refer to any of the foregoing structures or any other structure suitable for implementation of the techniques described herein. In addition, in some aspects, the functionality described herein can be provided within dedicated hardware and / or software modules configured for encoding and decoding, or incorporated in a combined codec. Also, the techniques could be fully implemented in one or more circuits or logic elements.

[0181] The techniques of this disclosure can be implemented in a variety of devices or apparatuses, including a wireless handset, an integrated circuit (IC) or a set of ICs (e.g., a chip set). Various components, modules, or units are described herein to emphasize their implementation as software or hardware modules within the device, but do not imply that they need to be implemented as distinct hardware or software modules. As such, the various components, modules, or units can be combined in a codec hardware unit, or provided by a set of inter-operating hardware units, including one or more processors as described above, in conjunction with suitable software and / or firmware.

[0182] Various examples have been described. These and other examples are within the scope of the following claims.

Claims

1. An apparatus configured to decode video data, the apparatus comprising: a memory configured to store video data blocks; as well as one or more processors implemented in circuitry and in communication with the memory, the one or more processors configured to: receiving the video data block; setting a MtsDcOnly variable to 1, wherein the MtsDcOnly variable having a value of 1 indicates that the only non-zero transform coefficient in the video data block is a DC coefficient; resetting the MtsDcOnly variable to 0 if the last scan position is greater than zero and the last sub-block of the video data block is equal to zero, wherein the MtsDcOnly variable having a value of 0 indicates that non-zero transform coefficients other than the DC coefficient are present in the video data block; determining, based on a value of the MtsDcOnly variable, that non-zero transform coefficients other than a DC coefficient are present in the video data block; determining a value of a multiple transform set index for the block of video data based on the presence of non-zero transform coefficients other than the DC coefficient in the block of video data; and A transform is applied to the block of video data based on the determined value of the multiple transform set index.

2. The device according to claim 1, wherein To determine the value of the multiple transform set index, the one or more processors are further configured to: If the DC coefficient is the only non-zero transform coefficient in the block of video data, a value of the multiple transform set index is inferred.

3. The device according to claim 1, wherein Inferring a value of the multiple transform set index includes not receiving the multiple transform set index.

4. The device according to claim 1, wherein To determine the value of the multiple transform set index, the one or more processors are further configured to: receiving the multiple transform set index if the DC coefficient is not the only non-zero transform coefficient in the block of video data; and The received value of the multiple transform set index is decoded.

5. The device according to claim 1, wherein The multiple transform set index specifies the transform kernel applied along the horizontal direction and the vertical direction of the transform block in the current decoding unit.

6. The device according to claim 5, wherein To apply the transform to the block of video data based on the determined value of the multiple transform set index, the one or more processors are further configured to: A specified transform kernel is applied to the block of video data.

7. The device according to claim 1, wherein The video data block is a transformed block of video data.

8. The apparatus according to claim 1, further comprising: The display is configured to display a picture including the video data block.

9. A method for decoding video data, the method comprising: receiving video data blocks; setting a MtsDcOnly variable to 1, wherein the MtsDcOnly variable having a value of 1 indicates that the only non-zero transform coefficient in the video data block is a DC coefficient; resetting the MtsDcOnly variable to 0 if the last scan position is greater than zero and the last sub-block of the video data block is equal to zero, wherein the MtsDcOnly variable having a value of 0 indicates that non-zero transform coefficients other than the DC coefficient are present in the video data block; determining, based on a value of the MtsDcOnly variable, that non-zero transform coefficients other than a DC coefficient are present in the video data block; determining a value of a multiple transform set index for the block of video data based on the presence of non-zero transform coefficients other than the DC coefficient in the block of video data; and A transform is applied to the block of video data based on the determined value of the multiple transform set index.

10. The method according to claim 9, wherein: Determining the value of the multiple transform set index includes: A value of the multiple transform set index is inferred if the DC coefficient is the only non-zero transform coefficient in the block of video data.

11. The method according to claim 9, wherein Inferring a value of the multiple transform set index includes not receiving the multiple transform set index.

12. The method according to claim 9, wherein Determining the value of the multiple transform set index includes: receiving the multiple transform set index if the DC coefficient is not the only non-zero transform coefficient in the block of video data; and The received value of the multiple transform set index is decoded.

13. The method according to claim 9, wherein: The multiple transform set index specifies the transform kernel applied along the horizontal direction and the vertical direction of the transform block in the current decoding unit.

14. The method according to claim 13, wherein Applying a transform to the block of video data based on the determined value of the multiple transform set index comprises: A specified transform kernel is applied to the block of video data.

15. The method according to claim 9, wherein The video data block is a transformed block of video data.

16. The method according to claim 9, further comprising: A picture including the video data block is displayed.

17. A non-transitory computer-readable storage medium storing instructions that, when executed, cause one or more processors of a device configured to decode video data to: receiving video data blocks; Set the MtsDcOnly variable to 1, where The MtsDcOnly variable having a value of 1 indicates that the only non-zero transform coefficient in the video data block is a DC coefficient; resetting the MtsDcOnly variable to 0 if the last scan position is greater than zero and the last sub-block of the video data block is equal to zero, wherein the MtsDcOnly variable having a value of 0 indicates that non-zero transform coefficients other than the DC coefficient are present in the video data block; determining, based on a value of the MtsDcOnly variable, that non-zero transform coefficients other than a DC coefficient are present in the video data block; determining a value of a multiple transform set index for the block of video data based on the presence of non-zero transform coefficients other than the DC coefficient in the block of video data; as well as A transform is applied to the block of video data based on the determined value of the multiple transform set index.

18. An apparatus configured to decode video data, the apparatus comprising: means for receiving a block of video data; means for setting a MtsDcOnly variable to 1, wherein the MtsDcOnly variable having a value of 1 indicates that the only non-zero transform coefficient in the block of video data is a DC coefficient; means for resetting the MtsDcOnly variable to zero if a last scan position is greater than zero and a last sub-block of the video data block is equal to zero, wherein the MtsDcOnly variable having a value of 0 indicates the presence of non-zero transform coefficients other than the DC coefficient in the video data block; means for determining, based on a value of the MtsDcOnly variable, the presence of non-zero transform coefficients other than a DC coefficient in the block of video data; means for determining a value of a multiple transform set index for the block of video data based on the presence of non-zero transform coefficients other than the DC coefficient in the block of video data; and Means for applying a transform to the block of video data based on the determined value of the multiple transform set index.

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