A method for implementing matrix decomposition and lower triangular matrix inversion

By blocking large matrices and using two-dimensional pulsating arrays for matrix calculation, the problem of low throughput of matrix decomposition calculation in the prior art is solved, and more efficient matrix processing is achieved.

CN114996649BActive Publication Date: 2025-04-11SHENZHEN STATE MICROELECTRONICS CO LTD
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202210499747.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-05-09
Publication Date
2025-04-11
Estimated Expiration
2042-05-09

AI Technical Summary

Technical Problem

In the prior art, in matrix decomposition calculation, the operation throughput is low, making it difficult to meet the needs of efficient information processing.

Method used

By obtaining the matrix dimension of the matrix to be found, when the dimension is greater than the number of registers in the preset register group, block processing is performed, and the matrix calculation is performed using a two-dimensional pulsating array to determine the target matrix of each block matrix, and finally separate the upper triangle matrix and the lower triangle matrix.

Benefits of technology

The throughput of matrix decomposition calculation is improved, and more efficient matrix processing is achieved through blocking processing and two-dimensional pulsating array calculation.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN114996649B_ABST
    Figure CN114996649B_ABST
Patent Text Reader

Abstract

The present application is applicable to the field of data processing technology, and provides an implementation method for matrix decomposition and lower triangular matrix inversion. In the embodiment of the present application, the matrix dimension of the matrix to be obtained is obtained; when the matrix dimension is greater than the number of registers of the preset register group, the matrix to be obtained is divided into blocks according to the number of registers to obtain multiple block matrices; the matrix data of each block matrix is ​​processed in the register group according to the decomposition algorithm corresponding to each block matrix, and the matrix data of each block matrix after data processing is sequentially calculated through a preset two-dimensional pulsation array to determine the target matrix corresponding to each block matrix; the decomposition algorithm corresponding to the block matrix is ​​determined according to the relative position of the block matrix; the results of multiple target matrices are separated to determine the upper triangular matrix and the lower triangular matrix corresponding to the matrix to be obtained, thereby improving the throughput of the matrix when performing decomposition calculation.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present application belongs to the field of data processing technology, and in particular relates to a method for implementing matrix decomposition and lower triangular matrix inversion. Background Art

[0002] With the development of society, modern information processing has received more and more attention. Matrix operation is an important part of modern information processing. For example, matrix decomposition calculation is often used in real-time control, Kalman filtering, radar signal processing and other fields. However, the existing matrix decomposition calculation through a single floating point will result in low calculation throughput. Summary of the invention

[0003] The embodiments of the present application provide a method, apparatus, terminal device and storage medium for implementing matrix decomposition, which can solve the problem of low throughput when performing matrix decomposition calculations.

[0004] In a first aspect, an embodiment of the present application provides a method for implementing matrix decomposition, including:

[0005] Get the matrix dimension of the matrix to be found;

[0006] When the matrix dimension is greater than the number of registers in the preset register group, the matrix to be calculated is divided into blocks according to the number of registers to obtain multiple block matrices;

[0007] Data processing is performed on matrix data of each block matrix in a register group according to a decomposition algorithm corresponding to each block matrix, and matrix calculation is performed on the matrix data of each block matrix after data processing in turn through a preset two-dimensional systolic array to determine a target matrix corresponding to each block matrix; the decomposition algorithm corresponding to the block matrix is ​​determined according to the relative position of the block matrix;

[0008] Separate the results of multiple target matrices and determine the upper triangular matrix and lower triangular matrix corresponding to the matrix to be calculated.

[0009] In a second aspect, an embodiment of the present application provides a method for implementing the inversion of a lower triangular matrix, including:

[0010] Get the lower triangular matrix dimension of the lower triangular matrix to be solved;

[0011] When the dimension of the lower triangular matrix is ​​greater than the number of registers of the preset register group, the lower triangular matrix is ​​divided into blocks along the main diagonal direction of the lower triangular matrix according to the number of registers to obtain multiple lower triangular block matrices;

[0012] According to the inversion algorithm corresponding to each lower triangular block matrix, data processing is performed on the matrix data of each lower triangular block matrix in the register group, and matrix calculation is performed on the matrix data of each lower triangular block matrix after data processing through a preset two-dimensional systolic array to determine the lower triangular target matrix corresponding to each lower triangular block matrix; the inversion algorithm corresponding to the lower triangular block matrix is ​​determined according to the relative position of the lower triangular block matrix;

[0013] Determine the inverse of a lower triangular matrix from multiple lower triangular target matrices.

[0014] In a third aspect, an embodiment of the present application provides a device for implementing matrix decomposition, including:

[0015] A dimension acquisition module is used to obtain the matrix dimension of the matrix to be obtained;

[0016] A matrix block module is used to divide the matrix to be calculated into blocks according to the number of registers to obtain multiple block matrices when the matrix dimension is greater than the number of registers in a preset register group;

[0017] A matrix calculation module is used to perform data processing on the matrix data of each block matrix in the register group according to the decomposition algorithm corresponding to each block matrix, and perform matrix calculation on the matrix data of each block matrix after data processing in turn through a preset two-dimensional systolic array to determine the target matrix corresponding to each block matrix; the decomposition algorithm corresponding to the block matrix is ​​determined according to the relative position of the block matrix;

[0018] The result separation module is used to separate the results of multiple target matrices and determine the upper triangular matrix and the lower triangular matrix corresponding to the matrix to be determined.

[0019] In a fourth aspect, an embodiment of the present application provides a terminal device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the processor implements the steps of any one of the above-mentioned matrix decomposition implementation methods or any one of the above-mentioned lower triangular matrix inversion implementation methods.

[0020] In a fifth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of implementing any of the above-mentioned matrix decomposition implementation methods or any of the above-mentioned lower triangular matrix inversion implementation methods are implemented.

[0021] In the sixth aspect, an embodiment of the present application provides a computer program product. When the computer program product is run on a terminal device, the terminal device executes any one of the matrix decomposition implementation methods in the first aspect or any one of the lower triangular matrix inversion implementation methods in the second aspect.

[0022] In the embodiment of the present application, the matrix dimension of the matrix to be obtained is obtained. When the matrix dimension is greater than the number of registers of the preset register group, the matrix to be obtained is divided into blocks according to the number of registers to obtain multiple block matrices, so as to process the block matrices separately and improve the processing speed of the matrix to be obtained. Specifically, the matrix data of each block matrix is ​​processed in the register group according to the decomposition algorithm corresponding to each block matrix, and the matrix data of each block matrix after the data processing is sequentially calculated by a preset two-dimensional systolic array to determine the target matrix corresponding to each block matrix. The decomposition algorithm corresponding to the block matrix is ​​determined according to the relative position of the block matrix. Finally, the results of the multiple target matrices are separated to determine the upper triangular matrix and the lower triangular matrix corresponding to the matrix to be obtained according to the separation results of the multiple target matrices, so as to improve the throughput of the matrix when the matrix is ​​decomposed and calculated by processing the two-dimensional systolic array. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0024] Figure 1 It is a flowchart of a method for implementing matrix decomposition provided in an embodiment of the present application;

[0025] Figure 2 is a structural diagram of a data processing system provided in an embodiment of the present application;

[0026] Figure 3 It is a schematic diagram of in-situ replication processing provided by an embodiment of the present application;

[0027] Figure 4 is a schematic diagram of the longitudinal diffusion mapping process provided by an embodiment of the present application;

[0028] Figure 5 is a schematic diagram of horizontal diffusion mapping processing provided by an embodiment of the present application;

[0029] Figure 6 It is a schematic diagram of cross-group unidirectional in-situ mapping processing provided in an embodiment of the present application;

[0030] Figure 7 Schematic diagram of diagonal normalization processing provided by an embodiment of the present application;

[0031] Figure 8 1 is a flow chart of a method for implementing the inversion of a lower triangular matrix provided in an embodiment of the present application;

[0032] Fig. 9 It is a schematic diagram of the intra-group horizontal diffusion processing provided by an embodiment of the present application;

[0033] Fig.10 Schematic diagram of the lower triangle inversion process provided by the embodiment of the present application;

[0034] Fig.11 1 is a schematic diagram of the inversion processing of the lower triangle without the main diagonal provided in an embodiment of the present application;

[0035] Fig.12 It is a structural schematic diagram of a device for implementing matrix decomposition provided in an embodiment of the present application;

[0036] Fig.13 It is a schematic diagram of the structure of the terminal device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0037] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present application.

[0038] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, wholes, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or combinations thereof.

[0039] In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.

[0040] Embodiment 1

[0041] Figure 1 FIG. 1 is a flow chart of a method for implementing matrix decomposition in an embodiment of the present application. The execution subject of the method may be a terminal device, such as Figure 1 As shown, the implementation method of the above matrix decomposition may include the following steps:

[0042] Step S101, obtaining the matrix dimension of the matrix to be determined.

[0043] In one embodiment, Figure 2 As shown, Figure 22 is a structural diagram of a data processing system, which can implement a method for matrix decomposition and a method for inverting a lower triangular matrix, and can include a controller 21, a register group 22, a two-dimensional systolic array 23, a high-speed bus 24, and a data storage module 25. The controller 21 is responsible for starting and controlling various components in the data processing system to implement a method for matrix decomposition and a method for inverting a lower triangular matrix, which is equivalent to the terminal device in this embodiment; the register group 22 can be composed of N*N registers, that is, the data can be divided into N groups, each with N, N is a power of 2, the register width can be set according to user needs, and the register group needs to be cleared when calculating the register group; the two-dimensional systolic array 23 is a rectangular structure, which can be composed of N*N multiplication and addition units of the same type, and the two-dimensional systolic array 23 can be used to calculate matrix bitwise addition, subtraction, multiplication, and matrix multiplication, matrix multiplication and addition, and matrix multiplication and subtraction; the high-speed bus 24 inputs or outputs data to the data storage module 25 through high-speed interconnection; the data storage module 25 is used to store data.

[0044] It can be understood that the register group 22 may include at least one group of register groups. For example, in this embodiment, three groups of register groups with completely identical structures and functions may be used to implement the implementation method of matrix decomposition and the implementation method of lower triangular matrix inversion. Specifically, the three groups of register groups are the first register group 221, the second register group 222, and the third register group 223, and the first register group 221 includes register group A and register group BA, the second register group 222 includes register group B and register group BB, and the third register group 223 includes register group C and register group BC. Among them, the register group BA, register group BB, and register group BC can be used to cache data, but are not interconnected with the computing array, that is, equivalent to the cache register group, and the register group A, register group B, and register group C can be used to cache and process data, that is, equivalent to the processing register group.

[0045] Step S102: determine whether the matrix dimension is greater than the number of registers in the preset register group.

[0046] If yes, execute step S103 to step S105; if no, execute step S106 and subsequent steps.

[0047] In this embodiment, the number of registers in the register group is N*N, denoted by k.

[0048] Step S103: Divide the matrix to be calculated into blocks according to the number of registers to obtain multiple block matrices.

[0049] In this embodiment, the terminal device groups the data of the matrix to be determined with a granularity of k, which is equivalent to dividing the data length of the matrix to be determined by k, and obtaining a quotient q and a remainder r, which is equivalent to obtaining q+1 block matrices. For example, if the data of the matrix to be determined is n*n, and the matrix to be determined is divided into 4 block matrices, then the 4 block matrices are in the order from left to right and from top to bottom: The block matrix E of size is The block matrix F of size is The block matrix G and size are The block matrix H of .

[0050] Step S104: data processing is performed on the matrix data of each block matrix in the register group according to the decomposition algorithm corresponding to each block matrix, and matrix calculation is performed on the matrix data of each block matrix after data processing in turn through a preset two-dimensional systolic array to determine the target matrix corresponding to each block matrix.

[0051] In this embodiment, since each block matrix has a different decomposition algorithm due to its different relative position, the terminal device can process the matrix data of the block matrix according to the decomposition algorithm corresponding to the block matrix. The above decomposition algorithm can be based on the non-singular matrix LU decomposition control algorithm and is determined according to the relative position of the block matrix.

[0052] In one embodiment, the register group includes a first processing register group, i.e., register group A in the first register group 221; a second processing register group, i.e., register group B in the second register group 222; a result register group and a cache register group, wherein the result register group and the cache register group are connected, the result register is register group C in the third register group 223, and the cache register group connected to the result register group is register group BC in the third register group 223.

[0053] Step S104 may include: inputting matrix data of the block matrix into the cache register group; determining at least one processing method from in-situ copy processing, vertical diffusion mapping processing, horizontal diffusion mapping processing and cross-group unidirectional in-situ mapping processing according to the decomposition algorithm; performing data processing on the matrix data of the block matrix in the cache register group according to the processing method, and inputting the matrix data of the block matrix after the data processing into the register group corresponding to the processing method, and the register group corresponding to the processing method includes at least one of a first processing register group, a second processing register group and a result register group.

[0054] Specifically, the above-mentioned in-situ copy processing can be used to copy the data in the cache register group to the processing register group in the same group, or vice versa, that is, copy the data in the processing register group to the cache register group in the same group, such as Figure 3 As shown, when N is 8, the data of register group BA in the first register group 221 is copied to the register group A in the first register group 221.

[0055] Specifically, the vertical diffusion mapping process can be used to copy the data in the cache register group to the processing register group in the same group. The data in any register on the main diagonal of the cache register group can be vertically copied to all registers in the column direction where the register is located and then mapped to the processing register group, or vice versa. Figure 4 As shown, when N is 8, when the data of register group BA in the first register group 221 is copied to register group A in the first register group 221, the data in any register on the main diagonal line of register group BA is selected to be longitudinally copied to all registers in the column direction where the register is located and then mapped to register group A, as shown in FIG. Figure 4 x10 in.

[0056] Specifically, the above-mentioned horizontal diffusion mapping process can be used to copy the data in the cache register group to the processing register group in the same group. The data in each register on the main diagonal line of the cache register group can be copied to all the registers in the row where the registers are located and then mapped to the processing register group, or vice versa. Figure 5 As shown, when N is 8, when the data of register group BA in the first register group 221 is copied to register group A in the first register group 221, the data in each register on the main diagonal line of register group BA is copied to all registers in the row where the register is located and then mapped to register group A.

[0057] Specifically, the above cross-group unidirectional in-situ mapping process can be used to copy a register group in one group of register groups to a register group in another group of register groups in a unidirectional in-situ manner when there are multiple groups of register groups. Figure 6 As shown, register set BA in one register group can map data unidirectionally in-situ across groups to register set B or register set C in another register group; register set BB in one register group can map data unidirectionally in-situ across groups to register set B or register set A in another register group; register set BC in one register group can map data unidirectionally in-situ across groups to register set A or register set B in another register group; register set C in one register group can map data unidirectionally in-situ across groups to register set A or register set B in another register group, and so on.

[0058] In one embodiment, performing matrix calculations on matrix data of each block matrix after data processing in sequence by using a preset two-dimensional systolic array in step S104 may include: determining a target register position on a main diagonal corresponding to the longitudinal diffusion mapping process; determining an enable signal of the two-dimensional systolic array according to the target register position; controlling the two-dimensional systolic array to perform matrix calculations on the first processing register group and the second processing register group according to the enable signal, and inputting the calculation results into the result register group; accordingly, determining the target matrix corresponding to each block matrix in step S103 includes: determining the target matrix corresponding to the block matrix according to the matrix data in the result register group.

[0059] In one embodiment, performing matrix calculations on the matrix data of each block matrix after data processing in sequence through a preset two-dimensional systolic array in step S104 may include: if there are adjacent block matrices to the left and / or above the block matrix, determining adjacent target matrices corresponding to the adjacent block matrices to the left and / or above the block matrix; inputting the matrix data of the adjacent target matrices into the target register group, and performing matrix calculations on the matrix data of the block matrix after data processing and the target register group through the two-dimensional systolic array.

[0060] For example, when processing a size of When the block matrix E is , step S104 includes the following steps:

[0061] The first step is to move the matrix data of the block matrix E into the register group BC according to the storage location of the matrix to be calculated, and set the initial value of the loop variable i to 1.

[0062] In the second step, the in-situ copy processing method is determined according to the decomposition algorithm, and the data in register group BC is mapped to register group B according to the in-situ copy processing method. The cross-group unidirectional in-situ mapping processing method is determined according to the decomposition algorithm, and the data in register group BC is mapped to register group C according to the cross-group unidirectional in-situ mapping processing method.

[0063] The third step is to determine the vertical diffusion mapping processing method according to the decomposition algorithm, and map the i-th data in the diagonal of the register group BC to the register group A according to the vertical diffusion mapping processing method.

[0064] The fourth step is to turn on the i+1th to kth enable signals of the computing units in the i-th column of the two-dimensional systolic array to prompt the two-dimensional systolic array to calculate the matrix bitwise division results of the register group A and the register group B, and store the matrix bitwise division results in the register group C, which is equivalent to the formula C=B. / A, which can be described by Matlab language.

[0065] In the fifth step, a cross-group unidirectional in-situ mapping processing method is determined according to the decomposition algorithm, and the data in register group C is mapped to register group A according to the cross-group unidirectional in-situ mapping processing method.

[0066] The sixth step is to turn on the i+1th to kth enable signals of the computing units in the i+1th to kth columns in the two-dimensional systolic array to prompt the two-dimensional systolic array to calculate the matrix multiplication and subtraction results of the register group A and the register group B, and store the matrix multiplication and subtraction results in the register group C, which is equivalent to the formula C=CA*B, which can be described by Matlab language.

[0067] In the seventh step, the in-situ copy processing method is determined according to the decomposition algorithm, and the data in the register group C is mapped to the register group BC according to the in-situ copy processing method, and the value of the loop variable i is updated to i+1, and the third step is executed again. After the third step to the seventh step are executed k times in a loop, n*n data are moved from the register group C to the data storage module with the storage position of the U matrix as the calculation result as the first address. The n*n data are the data of the target matrix corresponding to the above-mentioned block matrix E.

[0068] For example, when processing a size of When the block matrix F is , step S104 comprises the following steps:

[0069] The first step is to group the block matrix F with a granularity of k, which is equivalent to dividing the data length of the block matrix F by k, obtaining the quotient q1 and the remainder r1, and setting the initial value of the loop variable i to 1.

[0070] In the second step, the matrix data of the target matrix corresponding to the block matrix E is input into the register group A from the data storage module.

[0071] The third step is to move the k consecutive matrix data of the block matrix F into the register group BC according to the storage location of the block matrix F. The in-situ copy processing method is determined according to the decomposition algorithm, and the data in the register group BC is mapped to the register group B according to the in-situ copy processing method. The cross-group unidirectional in-situ mapping processing method is determined according to the decomposition algorithm, and the data in the register group BC is mapped to the register group C according to the cross-group unidirectional in-situ mapping processing method.

[0072] The fourth step is to turn on the i+1th to kth enable signals of the computing units in the i+1th to kth columns in the two-dimensional systolic array to prompt the two-dimensional systolic array to calculate the matrix multiplication and subtraction results of the register group A and the register group B, and store the matrix multiplication and subtraction results in the register group C, which is equivalent to the formula C=CA*B, which can be described by Matlab language.

[0073] Step 7: Determine the cross-group unidirectional in-situ mapping processing method according to the decomposition algorithm, map the data in register group C to register group B according to the cross-group unidirectional in-situ mapping processing method, update the value of loop variable i to i+1, and return to execute step 4. After looping step 4 k times, k calculation results are obtained, and then the k calculation results are transferred to the data storage module, so as to obtain step 2 to step 7 by looping step 1+1 times. The calculation results are The data are the data of the target matrix corresponding to the above block matrix F.

[0074] For example, when processing a size of When the block matrix G is , step S104 includes the following steps:

[0075] The first step is to group the block matrix G with a granularity of k, which is equivalent to dividing the data length of the block matrix G by k, obtaining the quotient q2 and the remainder r2, and setting the initial value of the loop variable i to 1.

[0076] In the second step, the matrix data of the target matrix corresponding to the block matrix E is input into the register group BA from the data storage module.

[0077] The third step is to determine the horizontal diffusion mapping processing method according to the decomposition algorithm, and to horizontally diffuse the data on the main diagonal of the register group BA and then map it to the register group A according to the horizontal diffusion mapping processing method.

[0078] In the fourth step, the k consecutive matrix data of the block matrix G are moved into the register group BC according to the storage location of the block matrix G. The in-situ copy processing method is determined according to the decomposition algorithm, and the data in the register group BC is mapped to the register group B according to the in-situ copy processing method. The cross-group unidirectional in-situ mapping processing method is determined according to the decomposition algorithm, and the data in the register group BC is mapped to the register group C according to the cross-group unidirectional in-situ mapping processing method.

[0079] The fifth step is to turn on the enable signal of the calculation unit in the i-th column of the two-dimensional systolic array to prompt the two-dimensional systolic array to calculate the matrix bitwise division calculation result of the register group A and the register group B, and store the matrix bitwise division calculation result in the register group C, which is equivalent to the formula C=B. / A, which can be described by Matlab language.

[0080] In the sixth step, a cross-group unidirectional in-situ mapping processing method is determined according to the decomposition algorithm, and the data in register group BA is mapped to register group B according to the cross-group unidirectional in-situ mapping processing method.

[0081] The seventh step is to turn on the enable signals of the calculation units from the i+1th column to the kth column in the two-dimensional systolic array to prompt the two-dimensional systolic array to calculate the matrix multiplication and subtraction results of the register group A and the register group B, and store the matrix multiplication and subtraction results in the register group C, which is equivalent to the formula C=CA*B, which can be described by Matlab language.

[0082] In the eighth step, the cross-group unidirectional in-situ mapping processing mode and the in-situ copy processing mode are determined according to the decomposition algorithm. The data in register group C is mapped to register group B according to the cross-group unidirectional in-situ mapping processing mode. The data in register group BA is mapped to register group A according to the in-situ copy processing mode. The value of the loop variable i is updated to i+1, and the process returns to the fifth step. After looping through the fifth step to the eighth step k times, k calculation results are obtained, and then the k calculation results are transferred to the data storage module, so as to obtain the result by looping through the second step to the eighth step q2+1 times. The calculation results are The data are the data of the target matrix corresponding to the above block matrix G.

[0083] For example, when processing a size of When the block matrix H is , step S104 includes the following steps:

[0084] The first step is to group the block matrix H with a granularity of k, which is equivalent to dividing the data length of the block matrix H by k to obtain the quotient q3 and the remainder r3.

[0085] The second step is to input the matrix data of the target matrix corresponding to the block matrix G into the register group A from the data storage module.

[0086] The third step is to input the matrix data of the target matrix corresponding to the block matrix F into the register group B from the data storage module.

[0087] The fourth step is to move the k consecutive matrix data of the block matrix H into the register group BC according to the storage location of the block matrix H.

[0088] The fifth step is to calculate the matrix multiplication and subtraction results of register group A and register group B through a two-dimensional systolic array, and store the matrix multiplication and subtraction results in register group C, which is equivalent to the formula C=CA*B, which can be described by Matlab language.

[0089] Step 6: Loop through steps 1 to 5 (q3+1) 2 times, get A calculation result.

[0090] It is understandable that the q value and the r value may be further judged to determine whether there is any unprocessed matrix data in the matrix to be determined, and the q value may be updated to the q value minus 1, and the q value may be judged.

[0091] When q is not zero, the storage position of the L matrix as the calculation result is updated to the sum of the previous round storage position of the L matrix as the calculation result and the word length of the k data storage; the storage position of the U matrix as the calculation result is updated to the sum of the previous round storage position of the U matrix as the calculation result and the word length of the k data storage, the n value is updated to nk, and the remaining data in the matrix to be calculated is continued to be processed according to the above steps; when the q value is 0, the r value is judged.

[0092] When the r value is not zero, the storage position of the L matrix as the calculation result is updated to the sum of the previous round storage position of the L matrix as the calculation result and the product of the word length of n and k data storage; the storage position of the U matrix as the calculation result is updated to the sum of the previous round storage position of the U matrix as the calculation result and the product of the word length of n and k data storage, the n value is updated to the r value, and the data corresponding to the r value is processed according to the operation steps of the above-mentioned block matrix E, so as to finally obtain the matrix data of at least one target matrix corresponding to the matrix to be calculated, and the at least one target matrix includes the target matrix corresponding to q and the target matrix corresponding to r; when the r value is zero, the calculation ends, and the currently existing at least one target matrix corresponds to the entire matrix to be calculated.

[0093] Step S105 , separating the results of multiple target matrices to determine the upper triangular matrix and the lower triangular matrix corresponding to the matrix to be determined.

[0094] In one embodiment, step S105 may include: inputting matrix data of a target matrix into a register group; performing in-situ copy processing, diagonal normalization processing, and cross-group unidirectional in-situ mapping processing on the matrix data of the target matrix in the register group to obtain matrix data of the processed target matrix; performing matrix calculation on the matrix data of the processed target matrix through a two-dimensional systolic array, and determining an upper triangular matrix and a lower triangular matrix corresponding to the target matrix according to the calculation results.

[0095] Specifically, the above diagonal normalization process can be used to assign the values ​​of all registers on the main diagonal in a register group to 1. Figure 7 As shown, the values ​​of all registers on the main diagonal within register A are assigned a value of 1.

[0096] Exemplarily, step S105 includes the following steps:

[0097] In the first step, the enable signal of the two-dimensional systolic array is configured as the lower triangular mode, and the target matrix data corresponding to the k matrices to be calculated are sequentially moved from the data storage module to the register group BA according to the storage location of the U matrix as the calculation result.

[0098] In the second step, the diagonal normalization processing method is determined according to the decomposition algorithm, and the data in register group BA is mapped to register group A according to the diagonal normalization processing method; the cross-group unidirectional in-situ mapping processing method is determined according to the decomposition algorithm, and the data in register group BA is mapped to register group C according to the cross-group unidirectional in-situ mapping processing method.

[0099] The third step is to calculate the matrix multiplication result of register group A and register group B through the two-dimensional systolic array, and store the matrix multiplication result in register group C, which is equivalent to the formula C = A * B, which can be described by Matlab language. Finally, according to the storage location of the L matrix as the calculation result, the matrix multiplication result is moved from register group C to the data storage module, thereby obtaining the decomposed L matrix.

[0100] The fourth step is to clear register group B, invert the enable signal, and determine the diagonal normalization processing method according to the decomposition algorithm, and map the data in register group BA to register group A according to the diagonal normalization processing method; determine the cross-group unidirectional in-situ mapping processing method according to the decomposition algorithm, and map the data in register group BA to register group C according to the cross-group unidirectional in-situ mapping processing method.

[0101] The fifth step is to calculate the matrix multiplication result of register group A and register group B through the two-dimensional systolic array, and store the matrix multiplication result in register group C, which is equivalent to the formula C = A * B, which can be described by Matlab language. Finally, according to the storage location of the U matrix as the calculation result, the matrix multiplication result is moved from register group C to the data storage module, thereby obtaining the decomposed U matrix.

[0102] Step S106: The decomposition algorithm corresponding to the matrix to be determined is used to perform data processing on the matrix to be determined in the register group, and matrix calculation is performed on the matrix to be determined after the data processing through a preset two-dimensional systolic array to determine the target matrix.

[0103] Exemplarily, step S106 includes the following steps:

[0104] The first step is to move the matrix data of the matrix to be calculated into the register group BC according to the storage location of the matrix to be calculated, and set the initial value of the loop variable i to 1.

[0105] In the second step, the in-situ copy processing method is determined according to the decomposition algorithm, and the data in register group BC is mapped to register group B according to the in-situ copy processing method. The cross-group unidirectional in-situ mapping processing method is determined according to the decomposition algorithm, and the data in register group BC is mapped to register group C according to the cross-group unidirectional in-situ mapping processing method.

[0106] The third step is to determine the vertical diffusion mapping processing method according to the decomposition algorithm, and map the i-th data in the diagonal of the register group BC to the register group A according to the vertical diffusion mapping processing method.

[0107] The fourth step is to turn on the i+1th to kth enable signals of the computing units in the i-th column of the two-dimensional systolic array to prompt the two-dimensional systolic array to calculate the matrix bitwise division results of the register group A and the register group B, and store the matrix bitwise division results in the register group C, which is equivalent to the formula C=B. / A, which can be described by Matlab language.

[0108] In the fifth step, a cross-group unidirectional in-situ mapping processing method is determined according to the decomposition algorithm, and the data in register group C is mapped to register group A according to the cross-group unidirectional in-situ mapping processing method.

[0109] The sixth step is to turn on the i+1th to kth enable signals of the computing units in the i+1th to kth columns in the two-dimensional systolic array to prompt the two-dimensional systolic array to calculate the matrix multiplication and subtraction results of the register group A and the register group B, and store the matrix multiplication and subtraction results in the register group C, which is equivalent to the formula C=CA*B, which can be described by Matlab language.

[0110] Step 7, determine the in-situ copy processing method according to the decomposition algorithm, map the data in register group C to register group BC according to the in-situ copy processing method, update the value of the loop variable i to i+1, and return to execute step 3. After looping step 3 to step 7 k times, move n*n data from register group C to the data storage module with the storage location of the U matrix as the calculation result as the first address. The n*n data are the data of the target matrix corresponding to the above-mentioned matrix to be calculated.

[0111] Step S107, separate the results of the target matrix to determine the upper triangular matrix and the lower triangular matrix corresponding to the matrix to be determined.

[0112] Exemplarily, step S107 includes the following steps:

[0113] In the first step, the enable signal of the two-dimensional systolic array is configured as the lower triangular mode, and the target matrix data corresponding to the n*n matrices to be calculated are moved from the data storage module to the register group BA according to the storage location of the U matrix as the calculation result.

[0114] In the second step, the diagonal normalization processing method is determined according to the decomposition algorithm, and the data in register group BA is mapped to register group A according to the diagonal normalization processing method; the cross-group unidirectional in-situ mapping processing method is determined according to the decomposition algorithm, and the data in register group BA is mapped to register group C according to the cross-group unidirectional in-situ mapping processing method.

[0115] The third step is to calculate the matrix multiplication result of register group A and register group B through the two-dimensional systolic array, and store the matrix multiplication result in register group C, which is equivalent to the formula C = A * B, which can be described by Matlab language. Finally, according to the storage location of the L matrix as the calculation result, the matrix multiplication result is moved from register group C to the data storage module, thereby obtaining the decomposed L matrix.

[0116] The fourth step is to clear register group B, invert the enable signal, and determine the diagonal normalization processing method according to the decomposition algorithm, and map the data in register group BA to register group A according to the diagonal normalization processing method; determine the cross-group unidirectional in-situ mapping processing method according to the decomposition algorithm, and map the data in register group BA to register group C according to the cross-group unidirectional in-situ mapping processing method.

[0117] The fifth step is to calculate the matrix multiplication result of register group A and register group B through the two-dimensional systolic array, and store the matrix multiplication result in register group C, which is equivalent to the formula C = A * B, which can be described by Matlab language. Finally, according to the storage location of the U matrix as the calculation result, the matrix multiplication result is moved from register group C to the data storage module, thereby obtaining the decomposed U matrix.

[0118] In the embodiment of the present application, the matrix dimension of the matrix to be obtained is obtained. When the matrix dimension is greater than the number of registers of the preset register group, the matrix to be obtained is divided into blocks according to the number of registers to obtain multiple block matrices, so as to process the block matrices separately and improve the processing speed of the matrix to be obtained. Specifically, the matrix data of each block matrix is ​​processed in the register group according to the decomposition algorithm corresponding to each block matrix, and the matrix data of each block matrix after the data processing is sequentially calculated by a preset two-dimensional systolic array to determine the target matrix corresponding to each block matrix. The decomposition algorithm corresponding to the block matrix is ​​determined according to the relative position of the block matrix. Finally, the results of the multiple target matrices are separated to determine the upper triangular matrix and the lower triangular matrix corresponding to the matrix to be obtained according to the separation results of the multiple target matrices, so as to improve the throughput of the matrix when the matrix is ​​decomposed and calculated by processing the two-dimensional systolic array.

[0119] Embodiment 2

[0120] Figure 8 FIG. 1 is a flow chart of a method for implementing a lower triangular matrix inversion in an embodiment of the present application. The execution subject of the method may be a terminal device, such as Figure 8 As shown, the implementation method of the above lower triangular matrix inversion may include the following steps:

[0121] Step S801: Obtain the lower triangular matrix dimension of the lower triangular matrix to be solved.

[0122] In this embodiment, the lower triangular matrix may be a lower triangular matrix obtained by the matrix decomposition method of the first embodiment.

[0123] Step S802: Determine whether the dimension of the lower triangular matrix is ​​greater than the number of registers in the preset register group.

[0124] If yes, execute step S803 to step S805; if no, execute step S806.

[0125] In this embodiment, if the number of registers in the register group is N*N, it is represented by k.

[0126] Step S803 , dividing the lower triangular matrix into blocks along the main diagonal direction of the lower triangular matrix according to the number of registers to obtain multiple lower triangular block matrices.

[0127] In this embodiment, the terminal device groups the lower triangular matrix with a granularity of k, which is equivalent to dividing the data length of the lower triangular matrix by k, and obtains the quotient q4 and the remainder r4, that is, the lower triangular matrix is ​​divided into blocks along the main diagonal direction of the lower triangular matrix to obtain q4 lower triangular block matrices of size k and 1 lower triangular block matrix of size r4.

[0128] Step S804: Data processing is performed on the matrix data of each lower triangular block matrix in the register group according to the inversion algorithm corresponding to each lower triangular block matrix, and matrix calculation is performed on the matrix data of each lower triangular block matrix after data processing through a preset two-dimensional systolic array to determine the lower triangular target matrix corresponding to each lower triangular block matrix; the inversion algorithm corresponding to the lower triangular block matrix is ​​determined according to the relative position of the lower triangular block matrix. The above-mentioned inversion algorithm can be a lower triangular inversion control algorithm.

[0129] Step S805 : determining the inverse result of the lower triangular matrix according to multiple lower triangular target matrices.

[0130] In one embodiment, in step S804, data processing is performed on matrix data of each lower triangular block matrix in a register group according to an inversion algorithm corresponding to each lower triangular block matrix, including: determining at least one processing method from in-situ copy processing, diagonal normalization processing, intra-group horizontal diffusion processing, lower triangular inversion processing, lower triangular inversion processing without a main diagonal, and cross-group unidirectional in-situ mapping processing according to the inversion algorithm; and data processing is performed on the matrix data of the lower triangular block matrix in the register group according to the processing method.

[0131] Specifically, the above-mentioned intra-group horizontal diffusion process can be used to copy the data in the registers on the main diagonal line of the register group to all the registers in the same line. Fig. 9 As shown, the data in the registers on the main diagonal of register group BA can be copied to all registers in the same row.

[0132] Specifically, the above lower triangular inversion process can be used to invert all lower triangular data values ​​in the register group. Fig.10 As shown, all the lower triangular data values ​​of register group A are inverted.

[0133] Specifically, the above-mentioned lower triangle negation processing without the main diagonal can be used to negate all other lower triangle data values ​​in the register group, including data without the main diagonal. Fig.11 As shown, all other lower triangular data values ​​of register group A, including the data on the main diagonal, are inverted.

[0134] Exemplarily, the above step S804 may include the following steps:

[0135] In the first step, k calculation data are input from the data storage module to the register group BA according to the storage position of the lower triangular matrix, and the in-situ copy processing method is determined according to the decomposition algorithm, and the data in the register group BA is mapped to the register group A according to the in-situ copy processing method; the cross-group unidirectional in-situ mapping processing method is determined according to the decomposition algorithm, and the data in the register group BA is mapped to the register group B according to the cross-group unidirectional in-situ mapping processing method.

[0136] In the second step, a diagonal normalization processing method is determined according to the decomposition algorithm, and the values ​​of the diagonals of register group B are all set to 1 according to the diagonal normalization processing method.

[0137] The third step is to perform a bitwise division operation through a two-dimensional systolic array to obtain a bitwise division operation result, and store the result in register group C, which is equivalent to the formula C=B. / A, which can be described by Matlab language.

[0138] The fourth step is to determine the intra-group horizontal diffusion processing method and the cross-group unidirectional in-situ mapping processing method according to the decomposition algorithm, map the data in register group C to register group BC according to the intra-group horizontal diffusion processing method, and map the data in register group C to register group BC according to the cross-group unidirectional in-situ mapping processing method.

[0139] The fifth step is to turn on the enable signal of the computing unit below the main diagonal of the two-dimensional systolic array, so as to prompt the two-dimensional systolic array to perform the matrix bitwise multiplication operation, obtain the bitwise multiplication operation result, and store the result in the register group C, which is equivalent to the formula C=A.*B, which can be described by Matlab language.

[0140] In the sixth step, a cross-group unidirectional in-situ mapping processing method is determined according to the decomposition algorithm, and the data in register group C is mapped to register group B and register group A according to the cross-group unidirectional in-situ mapping processing method.

[0141] In the seventh step, a lower triangle inversion processing method without the main diagonal is determined according to the decomposition algorithm, and the value of register group A is remapped to register group A according to the lower triangle inversion processing method without the main diagonal.

[0142] In the eighth step, the in-situ copy processing method is determined according to the decomposition algorithm, and the value of the register group BC is mapped to the register group C according to the in-situ copy processing method.

[0143] In the ninth step, the enable signals of the 1st to ith computing units in the i+1th row of the two-dimensional systolic array are turned on, so that the two-dimensional systolic array performs matrix multiplication, which is equivalent to the formula C=A*B, which can be described by Matlab language. According to the storage location of the calculation result, k data are transferred from the register group C to the data storage module, the q4 value is updated to the q4 value minus 1, and the q4 value is judged.

[0144] Step 10. When the q4 value is not 0, the storage position of the lower triangular matrix is ​​updated to the sum of the previous storage position of the lower triangular matrix and the product of the word length of the n and k data storages; the storage position of the calculation result is updated to the sum of the previous storage position of the calculation result and the product of the word length of the n and k data storages, and return to execute the first step; when the q4 value is 0, the r4 value is judged.

[0145] In the eleventh step, when the r4 value is not 0, the storage position of the lower triangular matrix is ​​updated to the sum of the previous storage position of the lower triangular matrix and the product of the word length of the n and k data storages; the storage position of the calculation result is updated to the sum of the previous storage position of the calculation result and the product of the word length of the n and k data storages, after returning to execute the first step once, the q4 value is updated to the initial value of the q4 value, and the twelfth step is continued; when the r4 value is 0, the q4 value is updated to the q4 value minus 1, the r4 value is updated to k, and the twelfth step is continued.

[0146] Step 12: Input the k calculation result data obtained in step 9 into register group A from the data storage module according to the storage location of the calculation result.

[0147] Step 13: Update the storage position of the lower triangular matrix to the difference between the previous storage position of the lower triangular matrix and the word length of the k data storage, and input k matrix data from the data storage module to the register group B according to the updated storage position of the lower triangular matrix.

[0148] Step 14: determine the lower triangular inversion processing method according to the decomposition algorithm, and remap the data of register A to register A according to the lower triangular inversion processing method.

[0149] Step 15: Perform matrix multiplication operation through the two-dimensional systolic array to obtain the result of the matrix multiplication operation, and store the result in register group C, which is equivalent to the formula C=A*B, which can be described by Matlab language.

[0150] Step 16: Determine the cross-group unidirectional in-situ mapping processing method according to the decomposition algorithm, map the value of register group C to register group A according to the cross-group unidirectional in-situ mapping processing method, and clear register group C.

[0151] Step 17: Update the storage location of the calculation results to the difference between the storage location of the previous round of calculation results and the product of the word length of n and k data storages, and input k calculation results from the data storage module to register group B according to the updated storage location of the calculation results.

[0152] Step 18: Perform matrix multiplication operation through the two-dimensional systolic array to obtain the result of the matrix multiplication operation, and store the result in register group C, which is equivalent to the formula C=A*B, which can be described by Matlab language.

[0153] Step 19. Set the variable position to the sum of the storage position of the calculation result and the product of the word length of n and k data storage. According to the variable position, move the result data from the register group C to the data storage module, and update the q4 value to q4 value minus 1, and judge the q4 value.

[0154] Step 20. When the q value is not 0, update the storage location of the calculation result to the product of the difference and the word length of the k data storage. The difference is the previous round storage location of the calculation result minus the word length of the k data storage minus the value of n. Update the r4 value to the sum of the initial value of r4 and k, and return to execute step 12. When the q4 value is 0, the calculation ends.

[0155] Step S806: The decomposition algorithm corresponding to the lower triangular matrix to be solved performs data processing on the lower triangular matrix to be solved in the register group, and performs matrix calculation on the lower triangular matrix to be solved after the data processing through a preset two-dimensional systolic array to determine the inverse result of the lower triangular matrix.

[0156] Exemplarily, the above step S806 may include the following steps:

[0157] In the first step, according to the storage position of the lower triangular matrix, n*n calculation data are input from the data storage module to the register group BA, and the in-situ copy processing method is determined according to the decomposition algorithm, and the data in the register group BA is mapped to the register group A according to the in-situ copy processing method; according to the decomposition algorithm, the cross-group unidirectional in-situ mapping processing method is determined, and the data in the register group BA is mapped to the register group B according to the cross-group unidirectional in-situ mapping processing method.

[0158] In the second step, a diagonal normalization processing method is determined according to the decomposition algorithm, and the values ​​of the diagonals of register group B are all set to 1 according to the diagonal normalization processing method.

[0159] The third step is to perform a bitwise division operation through a two-dimensional systolic array to obtain a bitwise division operation result, and store the result in register group C, which is equivalent to the formula C=B. / A, which can be described by Matlab language.

[0160] The fourth step is to determine the intra-group horizontal diffusion processing method and the cross-group unidirectional in-situ mapping processing method according to the decomposition algorithm, map the data in register group C to register group BC according to the intra-group horizontal diffusion processing method, and map the data in register group C to register group BC according to the cross-group unidirectional in-situ mapping processing method.

[0161] The fifth step is to turn on the enable signal of the computing unit below the main diagonal of the two-dimensional systolic array, so as to prompt the two-dimensional systolic array to perform the matrix bitwise multiplication operation, obtain the bitwise multiplication operation result, and store the result in the register group C, which is equivalent to the formula C=A.*B, which can be described by Matlab language.

[0162] In the sixth step, a cross-group unidirectional in-situ mapping processing method is determined according to the decomposition algorithm, and the data in register group C is mapped to register group B and register group A according to the cross-group unidirectional in-situ mapping processing method.

[0163] In the seventh step, a lower triangle inversion processing method without the main diagonal is determined according to the decomposition algorithm, and the value of register group A is remapped to register group A according to the lower triangle inversion processing method without the main diagonal.

[0164] In the eighth step, the in-situ copy processing method is determined according to the decomposition algorithm, and the value of the register group BC is mapped to the register group C according to the in-situ copy processing method.

[0165] In the ninth step, the enable signals of the 1st to ith computing units in the i+1th row of the two-dimensional systolic array are turned on to prompt the two-dimensional systolic array to perform matrix multiplication calculations, which is equivalent to the formula C=A*B, which can be described by Matlab language.

[0166] In the tenth step, the cross-group unidirectional in-situ mapping processing method is determined according to the decomposition algorithm, and the data in register group C is mapped to register group B according to the cross-group unidirectional in-situ mapping processing method. The value of the loop variable i is updated to i+1, and the process jumps to the above-mentioned ninth step. After looping through steps nine to ten k times, the n*n data are moved from register group C to the data storage module according to the storage location of the calculation results. The calculation ends here.

[0167] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the second embodiment described above can refer to the corresponding process in the first embodiment, which will not be repeated here.

[0168] Embodiment 3

[0169] Corresponding to the implementation method of matrix decomposition described in the first embodiment, Fig.12 FIG. 1 is a schematic diagram of a structure of a device for implementing matrix decomposition in an embodiment of the present application. Fig.12 As shown, the implementation device of the above matrix decomposition may include:

[0170] The dimension acquisition module 121 is used to acquire the matrix dimension of the matrix to be determined.

[0171] The matrix block module 122 is used to divide the matrix to be calculated into blocks according to the number of registers to obtain multiple block matrices when the matrix dimension is greater than the number of registers of the preset register group.

[0172] The matrix calculation module 123 is used to perform data processing on the matrix data of each block matrix in the register group according to the decomposition algorithm corresponding to each block matrix, and perform matrix calculation on the matrix data of each block matrix after data processing in turn through a preset two-dimensional systolic array to determine the target matrix corresponding to each block matrix; the decomposition algorithm corresponding to the block matrix is ​​determined according to the relative position of the block matrix.

[0173] The result separation module 124 is used to separate the results of multiple target matrices and determine the upper triangular matrix and the lower triangular matrix corresponding to the matrix to be determined.

[0174] In one embodiment, the register group includes a first processing register group, a second processing register group, a result register group and a cache register group, and the result register group and the cache register group are connected. The matrix calculation module 123 may include:

[0175] The first data input unit is used to input matrix data of the block matrix into the cache register group.

[0176] The first mode determination unit is used to determine at least one processing mode from in-situ replication processing, longitudinal diffusion mapping processing, horizontal diffusion mapping processing and cross-group unidirectional in-situ mapping processing according to the decomposition algorithm.

[0177] The first data processing unit is used to perform data processing on the matrix data of the block matrix in the cache register group according to the processing method, and input the matrix data of the block matrix after the data processing into the register group corresponding to the processing method, and the register group corresponding to the processing method includes at least one of the first processing register group, the second processing register group and the result register group.

[0178] In one embodiment, the matrix calculation module 123 may further include:

[0179] The position determination unit is used to determine the target register position on the main diagonal corresponding to the longitudinal diffusion mapping process.

[0180] A signal determination unit is used to determine an enable signal of the two-dimensional systolic array according to a target register position.

[0181] The first matrix calculation unit is used to control the two-dimensional systolic array to perform matrix calculation on the first processing register group and the second processing register group according to the enable signal, and input the calculation result into the result register group.

[0182] The first matrix determination unit is used to determine the target matrix corresponding to the block matrix according to the matrix data in the result register group.

[0183] In one embodiment, the result separation module 124 may include:

[0184] The second data input unit is used to input matrix data of the target matrix into the register group.

[0185] The second data processing unit is used to perform in-situ copy processing, diagonal normalization processing, and cross-group unidirectional in-situ mapping processing on the matrix data of the target matrix in the register group to obtain the processed matrix data of the target matrix.

[0186] The second matrix calculation unit is used to perform matrix calculation on the matrix data of the processed target matrix through a two-dimensional systolic array, and determine the upper triangular matrix and the lower triangular matrix corresponding to the target matrix according to the calculation result.

[0187] In one embodiment, the matrix calculation module 123 may further include:

[0188] The second matrix determination unit is used to determine the adjacent target matrix corresponding to the adjacent block matrix to the left and / or above the block matrix if there is an adjacent block matrix to the left and / or above the block matrix.

[0189] The third matrix calculation unit is used to input the matrix data of the adjacent target matrix into the target register group, and perform matrix calculation on the matrix data of the block matrix after data processing and the target register group through a two-dimensional systolic array.

[0190] In the embodiment of the present application, the matrix dimension of the matrix to be obtained is obtained. When the matrix dimension is greater than the number of registers of the preset register group, the matrix to be obtained is divided into blocks according to the number of registers to obtain multiple block matrices, so as to process the block matrices separately and improve the processing speed of the matrix to be obtained. Specifically, the matrix data of each block matrix is ​​processed in the register group according to the decomposition algorithm corresponding to each block matrix, and the matrix data of each block matrix after the data processing is sequentially calculated by a preset two-dimensional systolic array to determine the target matrix corresponding to each block matrix. The decomposition algorithm corresponding to the block matrix is ​​determined according to the relative position of the block matrix. Finally, the results of the multiple target matrices are separated to determine the upper triangular matrix and the lower triangular matrix corresponding to the matrix to be obtained according to the separation results of the multiple target matrices, so as to improve the throughput of the matrix when the matrix is ​​decomposed and calculated by processing the two-dimensional systolic array.

[0191] Embodiment 4

[0192] Corresponding to the method for implementing matrix decomposition described in the second embodiment, the device for implementing matrix decomposition may include:

[0193] The matrix dimension acquisition module is used to obtain the lower triangular matrix dimension of the lower triangular matrix to be solved.

[0194] The block module is used to divide the lower triangular matrix into blocks along the main diagonal direction of the lower triangular matrix according to the number of registers when the dimension of the lower triangular matrix is ​​greater than the number of registers of the preset register group, so as to obtain multiple lower triangular block matrices.

[0195] The data processing module is used to perform data processing on the matrix data of each lower triangular block matrix in the register group according to the inversion algorithm corresponding to each lower triangular block matrix, and perform matrix calculation on the matrix data of each lower triangular block matrix after data processing through a preset two-dimensional systolic array to determine the lower triangular target matrix corresponding to each lower triangular block matrix; the inversion algorithm corresponding to the lower triangular block matrix is ​​determined according to the relative position of the lower triangular block matrix.

[0196] The result determination module is used to determine the inversion result of the lower triangular matrix according to multiple lower triangular target matrices.

[0197] In one embodiment, the above-mentioned matrix decomposition implementation device may further include:

[0198] The second mode determination unit is used to determine at least one processing mode from in-situ copy processing, diagonal normalization processing, intra-group horizontal diffusion processing, lower triangle inversion processing excluding the lower triangle inversion processing of the main diagonal, and cross-group unidirectional in-situ mapping processing according to the inversion algorithm.

[0199] The third data processing unit is used to perform data processing on the matrix data of the lower triangular block matrix in the register group according to the processing method.

[0200] Those skilled in the art can clearly understand that, for the convenience and simplicity of description, the specific working process of the above-described device and module can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here. In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, refer to the relevant description of other embodiments.

[0201] It should be understood that the order of execution of the steps in the above embodiments does not necessarily mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the above embodiments.

[0202] Embodiment 5

[0203] Fig.13 This is a schematic diagram of the structure of a terminal device provided in an embodiment of the present application. For ease of explanation, only the parts related to the embodiment of the present application are shown.

[0204] like Fig.13 As shown, the terminal device 13 of this embodiment includes: at least one processor 1300 ( Fig.13Only one is shown in the figure), a memory 1301 connected to the above-mentioned processor 1300, and a computer program 1302 stored in the above-mentioned memory 1301 and executable on the above-mentioned at least one processor 1300, such as a matrix decomposition implementation program. When the above-mentioned processor 1300 executes the above-mentioned computer program 1302, the steps in the above-mentioned matrix decomposition implementation method embodiments are implemented, such as Figure 1 Steps S101 to S107 shown or Figure 8 Alternatively, when the processor 1300 executes the computer program 1302, the functions of the modules in the above-mentioned device embodiments are realized, for example, Fig.12 The functions of modules 121 to 124 are shown.

[0205] Exemplarily, the computer program 1302 may be divided into one or more modules, and the one or more modules are stored in the memory 1301 and executed by the processor 1300 to complete the present application. The one or more modules may be a series of computer program instruction segments capable of completing specific functions, and the instruction segments are used to describe the execution process of the computer program 1302 in the terminal device 13. For example, the computer program 1302 may be divided into a dimension acquisition module 121, a matrix block module 122, a matrix calculation module 123, and a result separation module 124, and the specific functions of each module are as follows:

[0206] The dimension acquisition module 121 is used to acquire the matrix dimension of the matrix to be determined.

[0207] The matrix block module 122 is used to divide the matrix to be calculated into blocks according to the number of registers to obtain multiple block matrices when the matrix dimension is greater than the number of registers of the preset register group.

[0208] The matrix calculation module 123 is used to perform data processing on the matrix data of each block matrix in the register group according to the decomposition algorithm corresponding to each block matrix, and perform matrix calculation on the matrix data of each block matrix after data processing in turn through a preset two-dimensional systolic array to determine the target matrix corresponding to each block matrix; the decomposition algorithm corresponding to the block matrix is ​​determined according to the relative position of the block matrix.

[0209] The result separation module 124 is used to separate the results of multiple target matrices and determine the upper triangular matrix and the lower triangular matrix corresponding to the matrix to be determined.

[0210] The terminal device 13 may include, but is not limited to, a processor 1300 and a memory 1301. Those skilled in the art will appreciate that Fig.13It is only an example of the terminal device 13 and does not constitute a limitation on the terminal device 13. It may include more or fewer components than shown in the figure, or a combination of certain components, or different components. For example, it may also include input and output devices, network access devices, buses, etc.

[0211] The processor 1300 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor, etc.

[0212] In some embodiments, the memory 1301 may be an internal storage unit of the terminal device 13, such as a hard disk or memory of the terminal device 13. In other embodiments, the memory 1301 may also be an external storage device of the terminal device 13, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. equipped on the terminal device 13. Further, the memory 1301 may also include both an internal storage unit of the terminal device 13 and an external storage device. The memory 1301 is used to store an operating system, an application program, a boot loader, data, and other programs, such as the program code of the computer program. The memory 1301 may also be used to temporarily store data that has been output or is to be output.

[0213] The technicians in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In practical applications, the above-mentioned function allocation can be completed by different functional units and modules as needed, that is, the internal structure of the above-mentioned device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated in a processing unit, or each unit can exist physically alone, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the above-mentioned method embodiment, which will not be repeated here. In the above-mentioned embodiments, the description of each embodiment has its own emphasis. For the part that is not described or recorded in detail in a certain embodiment, refer to the relevant description of other embodiments.

[0214] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0215] In the embodiments provided in the present application, it should be understood that the disclosed devices / terminal equipment and methods can be implemented in other ways. For example, the device / terminal equipment embodiments described above are only schematic. For example, the division of the above modules or units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0216] The units described above as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0217] If the above-mentioned integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present application implements all or part of the processes in the above-mentioned embodiment method, which can be completed by instructing the relevant hardware through a computer program. The above-mentioned computer program can be stored in a computer-readable storage medium, and the computer program can implement the steps of the above-mentioned various method embodiments when executed by the processor. Among them, the above-mentioned computer program includes computer program code, and the above-mentioned computer program code can be in source code form, object code form, executable file or some intermediate form. The above-mentioned computer-readable medium may at least include: any entity or device that can carry the computer program code to the camera / terminal device, recording medium, computer memory, read-only memory (ROM, Read-Only Memory), random access memory (RAM, RandomAccess Memory), electric carrier signal, telecommunication signal and software distribution medium. For example, a USB flash drive, a mobile hard disk, a magnetic disk or an optical disk. In some jurisdictions, according to legislation and patent practice, computer-readable media cannot be electric carrier signals and telecommunication signals.

[0218] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A method for implementing matrix decomposition, characterized in that: include: Get the matrix dimension of the matrix to be found; When the matrix dimension is greater than the number of registers of a preset register group, the matrix to be obtained is divided into blocks according to the number of registers to obtain a plurality of block matrices; the register group includes a first processing register group, a second processing register group, a result register group and a cache register group, and the result register group is connected to the cache register group; According to the decomposition algorithm corresponding to each of the block matrices, the matrix data of each of the block matrices is processed in the register group, including: inputting the matrix data of the block matrix into the cache register group; determining at least one processing method from in-situ copy processing, longitudinal diffusion mapping processing, horizontal diffusion mapping processing and cross-group unidirectional in-situ mapping processing according to the decomposition algorithm; the in-situ copy processing is used to copy the data in the cache register group to the processing register group of the same group, or copy the data in the processing register group to the cache register group of the same group, the longitudinal diffusion mapping processing is used to longitudinally copy the data in any register on the main diagonal of the cache register group to all registers in the column direction where the register is located and then map it to the processing register group of the same group, or longitudinally copy the data in any register on the main diagonal of the processing register group to all registers in the column direction where the register is located and then map it to the cache register group of the same group, and the horizontal diffusion mapping processing is used to longitudinally copy the data in any register on the main diagonal of the cache register group to all registers in the column direction where the register is located and then map it to the cache register group of the same group. The data in each register on the processing register group are copied to all registers in the row where the register is located and then mapped to the processing register group of the same group, or the data in each register on the main diagonal line of the processing register group are copied to all registers in the row where the register is located and then mapped to the cache register group of the same group, and the cross-group unidirectional in-situ mapping processing is used for unidirectional in-situ copying of a register group in one register group to a register group in another register group when there are multiple register groups; data processing is performed on the matrix data of the block matrix in the cache register group according to the processing method, and the matrix data of the block matrix after data processing is input into the register group corresponding to the processing method, and the register group corresponding to the processing method includes at least one of the first processing register group, the second processing register group and the result register group; and matrix calculation is performed on the matrix data of each block matrix after data processing in turn through a preset two-dimensional systolic array to determine the target matrix corresponding to each block matrix; the decomposition algorithm corresponding to the block matrix is ​​determined according to the relative position of the block matrix; Separating the results of the plurality of target matrices to determine the upper triangular matrix and the lower triangular matrix corresponding to the matrix to be determined includes: inputting the matrix data of the target matrix into the register group; performing in-situ copy processing, diagonal normalization processing, and cross-group unidirectional in-situ mapping processing on the matrix data of the target matrix in the register group to obtain the matrix data of the processed target matrix; the diagonal normalization processing is used to assign the values ​​of all registers on the main diagonal in the register group to 1; performing matrix calculation on the matrix data of the processed target matrix through the two-dimensional systolic array, and determining the upper triangular matrix and the lower triangular matrix corresponding to the target matrix according to the calculation results.

2. The method for implementing matrix decomposition according to claim 1, characterized in that: The matrix calculation is performed on the matrix data of each of the block matrices after data processing in sequence by using a preset two-dimensional systolic array, including: Determining a target register position on a main diagonal corresponding to the longitudinal diffusion mapping process; determining an enable signal of the two-dimensional systolic array according to the target register position; Control the two-dimensional systolic array to perform matrix calculation on the first processing register group and the second processing register group according to the enable signal, and input the calculation result into the result register group; Accordingly, determining the target matrix corresponding to each of the block matrices includes: A target matrix corresponding to the block matrix is ​​determined according to the matrix data in the result register group.

3. The method for implementing matrix decomposition according to claim 1, characterized in that: The matrix calculation is performed on the matrix data of each of the block matrices after data processing in sequence by using a preset two-dimensional systolic array, including: If there is an adjacent block matrix to the left and / or above the block matrix, then determine an adjacent target matrix corresponding to the adjacent block matrix to the left and / or above the block matrix; The matrix data of the adjacent target matrix is ​​input into the target register group, and the matrix calculation is performed on the matrix data of the block matrix after the data processing and the target register group through the two-dimensional systolic array.

4. A method for implementing the inversion of a lower triangular matrix, characterized in that: include: Get the lower triangular matrix dimension of the lower triangular matrix to be solved; When the dimension of the lower triangular matrix is ​​greater than the number of registers of the preset register group, the lower triangular matrix is ​​divided into blocks along the main diagonal direction of the lower triangular matrix according to the number of registers to obtain a plurality of lower triangular block matrices; According to the inversion algorithm corresponding to each of the lower triangular block matrices, data processing is performed on the matrix data of each of the lower triangular block matrices in the register group, including: according to the inversion algorithm, at least one processing method is determined from in-situ copy processing, diagonal normalization processing, intra-group horizontal diffusion processing, lower triangular inversion processing, lower triangular inversion processing without the main diagonal, and cross-group unidirectional in-situ mapping processing; the in-situ copy processing is used to copy the data in the cache register group to the processing register group in the same group, or copy the data in the processing register group to the cache register group in the same group, the diagonal normalization processing is used to assign the values ​​of all registers on the main diagonal in the register group to 1, and the intra-group horizontal diffusion processing is used to copy the data in the registers on the main diagonal in the register group to all registers in the same row , the lower triangular inversion processing is used to invert all lower triangular data values ​​in the register group, the lower triangular inversion processing excluding the main diagonal is used to invert all other lower triangular data values ​​in the register group including the data excluding the main diagonal, and the cross-group unidirectional in-situ mapping processing is used to copy one register group in one register group to one register group in another register group in one direction in-situ when there are multiple register groups; data processing is performed on the matrix data of the lower triangular block matrix in the register group according to the processing method; and matrix calculation is performed on the matrix data of each lower triangular block matrix after data processing through a preset two-dimensional systolic array to determine the lower triangular target matrix corresponding to each lower triangular block matrix; the inversion algorithm corresponding to the lower triangular block matrix is ​​determined according to the relative position of the lower triangular block matrix; An inversion result of the lower triangular matrix is ​​determined according to a plurality of the lower triangular target matrices.

5. A device for implementing matrix decomposition, characterized in that: include: A dimension acquisition module is used to obtain the matrix dimension of the matrix to be obtained; A matrix block module, used for dividing the matrix to be obtained into blocks according to the number of registers when the dimension of the matrix is ​​greater than the number of registers of a preset register group, so as to obtain a plurality of block matrices; the register group includes a first processing register group, a second processing register group, a result register group and a cache register group, and the result register group is connected to the cache register group; A matrix calculation module, used for performing data processing on the matrix data of each block matrix in the register group according to the decomposition algorithm corresponding to each block matrix, including: inputting the matrix data of the block matrix into the cache register group; determining at least one processing method from in-situ copy processing, vertical diffusion mapping processing, horizontal diffusion mapping processing and cross-group unidirectional in-situ mapping processing according to the decomposition algorithm; the in-situ copy processing is used to copy the data in the cache register group to the processing register group of the same group, or copy the data in the processing register group to the cache register group of the same group, the vertical diffusion mapping processing is used to vertically copy the data in any register on the main diagonal of the cache register group to all registers in the column direction where the register is located and then map it to the processing register group of the same group, or copy the data in any register on the main diagonal of the processing register group to all registers in the column direction where the register is located and then map it to the cache register group of the same group, and the horizontal diffusion mapping processing is used to vertically copy the data in the cache register group The data in each register on the inner main diagonal is copied to all registers in the row where the register is located and then mapped to the processing register group of the same group, or the data in each register on the main diagonal in the processing register group is copied to all registers in the row where the register is located and then mapped to the cache register group of the same group. The cross-group unidirectional in-situ mapping process is used to copy a register group in one register group to a register group in another register group in one direction in-situ when there are multiple register groups; the matrix data of the block matrix is ​​processed in the cache register group according to the processing method, and the matrix data of the block matrix after the data processing is input into the register group corresponding to the processing method, and the register group corresponding to the processing method includes at least one of the first processing register group, the second processing register group and the result register group; and the matrix data of each block matrix after the data processing is sequentially calculated through a preset two-dimensional systolic array to determine the target matrix corresponding to each block matrix; the decomposition algorithm corresponding to the block matrix is ​​determined according to the relative position of the block matrix; The result separation module is used to perform result separation on the multiple target matrices and determine the upper triangular matrix and the lower triangular matrix corresponding to the matrix to be determined, including: inputting the matrix data of the target matrix into the register group; performing in-situ copy processing, diagonal normalization processing, and cross-group unidirectional in-situ mapping processing on the matrix data of the target matrix in the register group to obtain the matrix data of the processed target matrix; the diagonal normalization processing is used to assign the values ​​of all registers on the main diagonal in the register group to 1; performing matrix calculation on the matrix data of the processed target matrix through the two-dimensional systolic array, and determining the upper triangular matrix and the lower triangular matrix corresponding to the target matrix according to the calculation results.

6. A terminal device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the processor implements the steps of the method for implementing matrix decomposition as described in any one of claims 1 to 3 or the method for implementing the inversion of the lower triangular matrix as described in claim 4.

7. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the steps of the method for implementing matrix decomposition as described in any one of claims 1 to 3 or the method for implementing the inversion of the lower triangular matrix as described in claim 4 are implemented.

Citation Information

Patent Citations

  • Parallel LU decomposition for corner sparse matrix based on FPGA

    CN101533387A

  • Realization method of parallelization matrix inversion hardware device

    CN104360986A