An EDA verification method and device for a FlexE subsystem

Abstract

The present invention relates to an EDA verification method and device for a FlexE subsystem, belonging to the technical field of chip verification, and solves the problems of difficult data traceability, low problem location efficiency, and abnormal resource consumption in the prior art. It includes splitting each service packet into multiple first atomic data packets in the proxy component at each client level, and putting them into their respective queues and scoreboards; the driver at the channel level obtains the tx output signal of the DUT, calculates the proxy component identifier corresponding to each channel, takes out a first atomic data packet from the corresponding queue, and drives it to the DUT through the interface instance at each channel level; the monitor at the channel level samples the rx output signal of the DUT, calculates the proxy component identifier corresponding to each channel, encapsulates the received data into a second atomic data packet, and transfers it to the scoreboard of the corresponding proxy component according to the output port for comparison between the second atomic data packet and the first atomic data packet. The efficient and flexible verification of the FlexE subsystem is realized.

Description

Technical Field

[0001] The present invention relates to the technical field of chip verification, and in particular, to an EDA verification method and device for a FlexE subsystem. Background Art

[0002] FlexE (Flexible Ethernet) technology is an extension proposed by the Optical Internetworking Forum based on the IEEE 802.3 Ethernet standard protocol. It adds a Shim layer between the physical layer (PHY) and the data link layer (MAC) in the OSI seven-layer model. FlexE is defined based on the Client / Group architecture, supports Calendar to flexibly allocate time slots, supports the mapping and transmission of any number of different sub-interfaces (FlexE Clients) on any group of PHYs (FlexE Groups), supports functions such as sub-interface bundling, channelization, and sub-rate, thus realizing the decoupling of MAC and PHY, so that the relationship between MAC and PHY is no longer one-to-one.

[0003] Due to its flexibility, FlexE technology has great practical value in engineering. However, precisely because of its flexibility, it brings huge challenges to both chip design and verification work. In the verification of the FlexE subsystem, the PHY supports up to M channels, supports 50G - 400G and different bandwidth channels can be used in combination. The interface provided by FlexE to the upper-layer integration side is also M channels. However, the number of MAC clients that the integration side can support is as many as X (the value of X is random within the range supported by the subsystem). Then, it will be a huge challenge for drivers, reference models, etc. in the verification environment.

[0004] From the perspective of the subsystem interface, the prior art has the following problems: First, the stimuli are generated by M random sources corresponding to M channels, but the data on these M channels is not completely random. Therefore, in actual work, a large number of constraints are added to it, which brings great difficulty to the process of the EDA tool to solve randomness, consumes a long time, and there is no anti-backpressure mechanism when the data is generated, resulting in a large amount of data being cached, and thus the real-time memory consumption situation is extremely unoptimistic. Second, a large number of parallel processes are used to process the data in the reference model and each component processes independently. The parallel resource consumption is large, the core components are not universal, the data traceability is difficult, and the difficulty of problem location is relatively high. Summary of the Invention

[0005] In view of the above analysis, embodiments of the present invention aim to provide an EDA verification method and apparatus for a FlexE subsystem, so as to solve the problems of difficult data traceability after data aggregation, low positioning efficiency caused by repeated iterations, and abnormal resource consumption caused by difficult optimization of the platform structure.

[0006] On the one hand, embodiments of the present invention provide an EDA verification method for a FlexE subsystem, including the following steps:

[0007] After the simulation starts, each service packet generated in the proxy component at the client level is split into multiple first atomic data packets, and the multiple first atomic data packets are placed into their respective queues and scoreboards;

[0008] When the DUT requests data from the verification environment, the driver at the channel level acquires the tx output signal of the DUT corresponding to each interface instance at the channel level, calculates the proxy component identifier corresponding to the data required for each channel based on the calendar at the data link layer, retrieves a first atomic data packet from the queue of the corresponding proxy component according to the proxy component identifier, and drives it to the DUT through each interface instance at the channel level;

[0009] The monitor at the channel level samples the rx output signal of the DUT through each interface instance at the channel level, calculates the proxy component identifier corresponding to the data received by each channel based on the calendar at the data link layer, encapsulates the received data into a second atomic data packet, and transmits it to the scoreboard of the corresponding proxy component according to the output port corresponding to the proxy component identifier for comparison between the second atomic data packet and the first atomic data packet to complete one verification.

[0010] Based on a further improvement of the above method, the method further includes: after the simulation starts, the tx output signal and rx output signal in each interface instance at the channel level are presented in the waveform diagram according to the clock cycle; after the simulation ends, the timestamp and proxy component identifier are obtained from the error message in the simulation log, and the corresponding position is found on the waveform diagram for tracking to locate the problem.

[0011] Based on a further improvement of the above method, the proxy component at the client level includes: a configuration class at the client level, a transaction class at the client level, a sequencer at the client level, a driver class at the client level, and a scoreboard;

[0012] Each service packet generated in the proxy component at the client level is split into multiple first atomic data packets and sequentially placed into the corresponding queue and scoreboard, including:

[0013] The sequencer at the client level generates service packets according to the configuration class at the client level;

[0014] The transaction class at the client level splits the service packet into multiple first atomic data packets;

[0015] The driver class at the client level continuously obtains instances of the transaction class at the client level, and simultaneously puts the multiple first atomic data packets obtained by splitting into the queue and the scoreboard until the queue length threshold is reached.

[0016] Based on the further improvement of the above method, the attributes of the configuration class at the client level include the proxy component identifier, the service packet encoding, and multiple restrictive attributes. The proxy component identifier is used to identify the client corresponding to the data link layer of the current proxy component; the driver class at the client level inherits the uvm_driver class or the uvm_component class.

[0017] Based on the further improvement of the above method, the first atomic data packet and the second atomic data packet are instances of the atomic data class, and the atomic data class is used to define a unified data structure; the multiple first atomic data packets obtained by splitting each service packet have the same proxy component identifier.

[0018] Based on the further improvement of the above method, the data bit width of the first atomic data packet is 8 bytes, and the sum of the byte lengths of all attributes of each service packet is divided by 8, and the value obtained by rounding up is used as the splitting quantity of the first atomic data packet.

[0019] Based on the further improvement of the above method, the calendar in the data link layer is a two-dimensional table of M×Q generated according to the number of channels M and the length Q of the DUT output signal, where the one-hot encoding of the tx output signal or the rx output signal is used as the index of each column, and different proxy component identifiers are used as the values of each cell.

[0020] Based on the further improvement of the above method, the attributes of the interface at the channel level include the attributes of the tx output signal and the attributes of the rx output signal. The attributes of the tx output signal and the attributes of the rx output signal both include the attributes of the atomic data class; each instance of the interface at the channel level corresponds to each channel of the DUT.

[0021] Based on the further improvement of the above method, the driver at the channel level contains multiple proxy components at the client level and 1 interface at the channel level. The monitor at the channel level contains multiple output port components at the client level and 1 interface at the channel level; the output port of each output port component is connected to the input port of the scoreboard in the corresponding proxy component at the client level as the transmission channel of the second atomic data packet.

[0022] On the other hand, an embodiment of the present invention provides an EDA verification device for a FlexE subsystem, including a channel-level driver and a channel-level monitor; the channel-level driver includes multiple client-level proxy components and one channel-level interface, and the channel-level monitor includes multiple client-level output port components and one channel-level interface; wherein,

[0023] The client-level proxy component is used to split each service packet generated after the simulation starts into multiple first atomic data packets, and put the multiple first atomic data packets into their respective queues and scoreboards;

[0024] The channel-level driver is used to, when the DUT requests data from the verification environment, obtain the tx output signal of the DUT corresponding to each channel-level interface instance, calculate the proxy component identifier corresponding to the data required by each channel based on the calendar of the data link layer, take out a first atomic data packet from the queue of the corresponding proxy component according to the proxy component identifier, and drive it to the DUT through each channel-level interface instance;

[0025] The channel-level monitor samples the rx output signal of the DUT through each channel-level interface instance, calculates the proxy component identifier corresponding to the data received by each channel based on the calendar of the data link layer, encapsulates the received data into a second atomic data packet, and transfers it to the scoreboard of the corresponding proxy component according to the output port corresponding to the proxy component identifier, and compares the second atomic data packet with the first atomic data packet to complete a verification.

[0026] Compared with the prior art, the present invention can at least achieve one of the following beneficial effects:

[0027] 1. Deeply optimize and reorganize the channel-level driver and monitor. Through multiple proxy components corresponding to Mac clients, it conforms to the existence form of real FlexE clients, which is more in line with the design idea of the upper-layer system integration layer. The multiple proxy components are respectively connected to multiple output port components, transforming the intricate data flow inspection into independent inspection by client. The structure is clear and easy to locate the root cause of problems;

[0028] 2. By constructing client-level proxy components, independently control the service packet structure of each client, and obtain data on demand by setting thresholds, effectively avoiding computer memory failures caused by the continuous expansion of data volume;

[0029] 3. By constructing an atomic data class to define a unified data structure, the minimum processing unit of any component follows the same specification, and the data types passed through ports are also consistent when components are interconnected. For complex verification platforms such as FlexE, this improves the operability and team collaboration efficiency.

[0030] 4. By constructing interfaces at the channel level, including two groups of signals, TX for transmission and RX for reception, and corresponding to the attributes of the atomic data class, the position of the error signal can be quickly located through the proxy component identifier client_id corresponding to each client.

[0031] In the present invention, the above technical solutions can also be combined with each other to achieve more preferred combination solutions. Other features and advantages of the present invention will be described in the following specification, and some advantages can be made obvious from the specification or understood by implementing the present invention. The objectives and other advantages of the present invention can be realized and obtained through the content specifically pointed out in the specification and the drawings. Brief Description of the Drawings

[0032] The drawings are only for the purpose of showing specific embodiments and are not considered as limiting the present invention. Throughout the drawings, the same reference signs denote the same components.

[0033] Figure 1 It is a flowchart of the EDA verification method for the FlexE subsystem in Embodiment 1 of the present invention;

[0034] Figure 2 It is a schematic structural diagram of the proxy component at the client level in Embodiment 1 of the present invention;

[0035] Figure 3 It is a schematic structural diagram of the EDA verification device for the FlexE subsystem in Embodiment 2 of the present invention. Detailed Description of the Embodiments

[0036] The following will specifically describe the preferred embodiments of the present invention in conjunction with the drawings. The drawings form a part of this application and are used together with the embodiments of the present invention to illustrate the principles of the present invention, rather than to limit the scope of the present invention.

[0037] FlexE is a technology developed based on Ethernet technology to meet the requirements of high-speed transmission, flexible bandwidth configuration, etc. The user-side interface of FlexE supports M channels to work independently or in a bound manner, supports X upper-layer user clients, and at most X user service flows converge and are sent out after entering from at most M channels. Therefore, the mapping relationship between the client and the FlexE Mac interface, and between the FLexe Shim interface and the FlexE MAC is very complex. EDA (Electronic design automation) technology runs through the entire process of integrated circuit engineering design, and in particular provides simulation, debugging, and error correction capabilities at all levels during the IP design stage, such as a visual graphical interface (GUI) that supports single-step fixed-point debugging, hierarchical output of simulation logs (LOG verbosity), etc.

[0038] Embodiment 1

[0039] A specific embodiment of the present invention discloses an EDA verification method for a FlexE subsystem, as Figure 1 shown, including the following steps:

[0040] S11: After the simulation starts, each service packet generated in the proxy component at the client level is split into multiple first atomic data packets, and the multiple first atomic data packets are placed into their respective queues and scoreboards.

[0041] It should be noted that, as Figure 2 shown, the proxy component at the client level includes: a configuration class at the client level, a transaction class at the client level, a sequencer at the client level, a driver class at the client level, and a scoreboard. This step is used for data preparation, specifically including:

[0042] ① The sequencer at the client level generates service packets according to the configuration class at the client level;

[0043] Specifically, the attributes of the client-level configuration class flexe_mac_config include the proxy component identifier, service packet encoding, and multiple restrictive attributes. Exemplarily, it includes the integer-type proxy component identifier client_id and service packet encoding trans_id, and integer-type variables idle_len_min / max, data_len_min / max, orderset_len_min / max with random attributes. Among them, the proxy component identifier client_id is used to identify the client corresponding to the current proxy component in the data link layer; idle_len_min / max is used to limit the minimum and maximum lengths of the Idle characters in the service packet, data_len_min / max is used to limit the minimum and maximum lengths of the payload, and orderset_len_min / max is used to limit the minimum and maximum lengths of the Orderset characters. The number of instances of this configuration class depends on the number of clients in the data link layer. This configuration class realizes the control of the randomization of the service packet structure of a certain client and meets the requirement of independent control of the service packet structure of each client.

[0044] ② The transaction class at the client level splits the service packet into multiple first atomic data packets;

[0045] Specifically, the transaction class at the client level is flexe_mac_transaction. This transaction class is organized according to the structure of the upper-layer network layer service and is used to split a service packet generated by the sequencer into multiple first atomic data packets.

[0046] It should be noted that the first atomic data packet is an instance of the atomic data class. The atomic data class flexe_atom_item is used to define a unified data structure. The minimum processing unit of any component follows the same specification, and the data types passed through the ports during component interconnection are also consistent. For a complex verification platform such as FlexE, this improves the operability and team collaboration efficiency.

[0047] The attributes of the atomic data class are defined according to the interfaces defined in the design document spec. Exemplarily, the atomic data class includes the following attributes: data with a 64-bit width, is_start, is_stop, is_fcs, is_idle, is_orderset with a single-bit width, and the integer-type proxy component identifier client_id and proxy component bandwidth client_sp.

[0048] The data bit width of the first atomic data packet is 64 bits, which is 8 bytes. Divide the sum of the byte lengths of all attributes of each service packet by 8, and round up the obtained value to get the splitting quantity of the first atomic data packet.

[0049] Exemplarily, the attributes of the service packet provided by the upper-layer integration side to the subsystem include: IDLE / ORDERSET, START, HEADER, LEN_TYPE, PAYLOAD, FCS, and STOP. The unit of each attribute is byte. Among them, the lengths of START, HEADER, LEN_TYPE, FCS, and STOP are fixed, and the lengths of IDLE, ORDERSET, and PAYLOAD are determined by *_len_min / max in the corresponding client-level configuration class flexe_mac_config, and are random between [min:max]. Obtain the total byte length total len of all attributes, then the number of the first atomic data packets that the service packet can be split into where represents rounding up.

[0050] Multiple first atomic data packets obtained by splitting each service packet have the same proxy component identifier.

[0051] ③ The client-level driver class continuously obtains the client-level transaction class instance, and puts the multiple first atomic data packets obtained by splitting into the queue and the scoreboard at the same time until the queue length threshold is reached.

[0052] It should be noted that the client-level driver class flexe_mac_driver is different from the uvm_driver class or its derived classes in the existing verification environment. It does not generate the actual driving behavior with the DUT, but in a more abstract way, from the perspective of the FlexE client to implement the behavior of the client, similar to the application layer in the TCP / IP protocol. Therefore, in implementation, this driver class is flexible enough and can inherit the uvm_driver class or the uvm_component class.

[0053] Functionally, this driver class is used to continuously obtain client-level transaction class instances from the sequencer, and sequentially store the atomic data class instances generated by the transaction class in a dynamic array or queue. An array or queue length threshold is also defined in this driver class. When the number of cached atomic data class instances exceeds the threshold, obtaining transaction class instances from the sequencer will stop, and the generated atomic data class instances will also be passed to the scoreboard flexe_mac_scoreboard as reference data to participate in subsequent data comparison. Compared with the prior art, this processing method realizes data acquisition on demand and effectively avoids computer memory failures caused by continuous expansion of the data volume.

[0054] S12: When the DUT requests data from the verification environment, the driver at the channel level acquires the tx output signal of the DUT corresponding to each channel-level interface instance, calculates the proxy component identifier corresponding to the data required for each channel based on the calendar at the data link layer, and retrieves a first atomic data packet from the queue of the corresponding proxy component according to the proxy component identifier, and drives it to the DUT through each channel-level interface instance.

[0055] It should be noted that the calendar at the data link layer is extended based on the Calendar of the Flexe protocol. The generation method of the calendar at the data link layer in this embodiment is not limited, and the optional proxy component identifier client_id for each channel can be set according to actual requirements.

[0056] In this embodiment, the calendar at the data link layer is a two-dimensional table of M×Q generated according to the number of channels M and the length Q of the DUT output signal. Among them, the one-hot encoding of the tx output signal or rx output signal is used as the index of each column, and different proxy component identifiers are used as the values of each cell.

[0057] Exemplarily, the lengths of the tx output signal tx_cyc10 and rx output signal rx_cyc10 of the DUT are 10, and the number of channels is 8, then an 8×10 two-dimensional table is generated. The output signals tx_cyc10 / rx_cyc10 of the DUT are equivalent to the index of a certain column in the table, and the decoding efficiency is improved by adopting one-hot encoding, that is, the index of each column in the table is: 10'b0000000001, 10'b0000000010, ……, 10'b1000000000.

[0058] It should be noted that the channel-level driver flexe_driver includes multiple client-level proxy components and one channel-level interface. One channel-level interface interface generates multiple instances, and each instance of the channel-level interface corresponds to each channel of the DUT, that is, the interface generates M instances corresponding to M channels.

[0059] The attributes of the channel-level interface interface include the attributes of the tx output signal and the attributes of the rx output signal.

[0060] Exemplarily, the attributes of the interface include: an integer-type client_id, 64-bit tx_data, 1-bit tx_valid, tx_start, tx_idle, tx_oset, 8-bit tx_stop and tx_fcs, 64-bit rx_data, 1-bit rx_valid, rx_start, rx_idle, rx_oset, 8-bit rx_stop and rx_fcs, and other received process status output signals, such as the error signal crc_err.

[0061] It is worth noting that compared with the above-mentioned atomic data class flexe_atom_item, the attributes of the tx output signal and the attributes of the rx output signal both include the attributes of the atomic data class, that is, the attributes of the interface correspond to the attributes of the atomic data class, and only some attributes change due to considerations of the input / output timing or structure of the DUT. This way of keeping the basic data structure consistent with the attributes of the interface interface is very convenient for problem tracking in the scenario of multi-client data interleaving in combination with the client_id identifier.

[0062] Each time the channel-level driver flexe_driver requests a data packet of a certain flexe_mac_client instance, it pops up an instance of flexe_atom_item from the head of the queue of this proxy component, that is, retrieves a first atomic data packet for the flexe_driver to complete the packet fetching operation. It can be seen from this that the channel-level driver in this embodiment is different from the conventional driver. It does not directly and actively generate a large number of service packets at one time and then select the ones that meet the conditions to drive the DUT, but provides them on demand, and passively generates service packets that meet the conditions according to the current working state of the DUT and provides them to the DUT. Such a method is more in line with the working mode of the upper-layer integration side in terms of structure, and is also more reasonable in terms of simulation efficiency and server resource consumption.

[0063] S13: The monitor at the channel level samples the rx output signal of the DUT through each interface instance at the channel level, calculates the proxy component identifier corresponding to the data received on each channel based on the calendar at the data link layer, encapsulates the received data into a second atomic data packet, and transmits it to the scoreboard of the corresponding proxy component according to the output port corresponding to the proxy component identifier for comparison between the second atomic data packet and the first atomic data packet, thus completing one verification.

[0064] It should be noted that the channel-level monitor flexe_monitor includes multiple output port components at the client level and 1 interface at the channel level; the output port port in each output port component flexe_client_port is connected to the input port of the scoreboard in the corresponding proxy component at the client level, serving as the transmission channel for the second atomic data packet. It should be noted that both the second atomic data packet and the first atomic data packet are instances of the atomic data class, and the "first" and "second" are used to distinguish the two atomic data packets to be compared in one verification, without any other special meaning.

[0065] In the channel-level monitor, the interface at the channel level generates multiple interface instances, which respectively sample the outputs on multiple channel interfaces of the DUT, and based on the calendar at the data link layer, calculate the proxy component identifier client_id to which the data of each channel in the current cycle belongs, complete the unpacking operation, that is, encapsulate the sampled data into an instance of the atomic data class as the second atomic data packet, mark the corresponding client_id, and then write it into the corresponding output port component flexe_client_port instance, and transmit it through the output port port therein to the scoreboard flexe_mac_scoreboard in the corresponding flexe_mac_client instance in the flexe_driver for comparison.

[0066] Compared with the prior art, this embodiment transforms the intricate data flow inspection into independent inspection by client, which is clear and easy to locate the root cause of the problem in terms of structure.

[0067] After the simulation starts, the tx output signal and rx output signal in the M channel-level interface instances are presented in the waveform diagram according to the clock cycle; after the simulation ends, the timestamp and proxy component identifier are obtained from the error message in the simulation log, and the corresponding position is found on the waveform diagram for tracking to locate the problem.

[0068] Specifically, in this embodiment, the minimum data unit is the atomic data class. Whether it is the first atomic data packet (an instance of the atomic data class serving as reference data) or the second atomic data packet (an instance of the atomic class data obtained through actual sampling), it will be marked with the proxy component identifier client_id. Moreover, whether it is the channel-level driver flexe_driver or the channel-level monitor flexe_monitor, corresponding client_id signals will be marked at the channel-level interface interface in clock cycles on both the sending and receiving paths (this signal is only used for simulation debugging and will not have any impact on the function of the DUT). Since the waveform can theoretically give all the transition states of the signal from the start to the end of the simulation, the variables in the verification components (flexe_driver and flexe_monitor) also appear on the waveform like the DUT signals. This means that the arrangement rules of all data streams in the verification components will also be presented in the waveform file. Then when the data comparison fails, based on the proxy component identifier client_id and the timestamp given in the error message UVM_ERROR in the simulation log, the corresponding positions of the DUT received data or the data source can be quickly searched from the waveform diagram, which is easy to confirm whether the structure before and after the data is damaged or whether the data source meets the expectations. Compared with the prior art, this embodiment avoids the processes of repeatedly setting the UVM log printing level, the time overhead of multiple compilations, and the cumbersome log analysis, etc., and the efficiency is greatly improved.

[0069] Embodiment 2

[0070] Another embodiment of the present invention discloses an EDA verification device for the FlexE subsystem, so as to implement the verification method in Embodiment 1. The specific implementation manners of each component refer to the corresponding descriptions in Embodiment 1. As Figure 3 shown, the verification device includes a channel-level driver and a channel-level monitor; the channel-level driver includes multiple client-level proxy components and one channel-level interface, and the channel-level monitor includes multiple client-level output port components and one channel-level interface; wherein,

[0071] The client-level proxy component is used to split each service packet generated after the simulation starts into multiple first atomic data packets, and put the multiple first atomic data packets into their respective queues and scoreboards;

[0072] A channel-level driver, which is used to obtain the tx output signal of the DUT corresponding to each channel-level interface instance when the DUT requests data from the verification environment, calculate the proxy component identifier corresponding to the data required for each channel based on the calendar of the data link layer, retrieve a first atomic data packet from the queue of the corresponding proxy component according to the proxy component identifier, and drive it to the DUT through each channel-level interface instance;

[0073] The channel-level monitor samples the rx output signal of the DUT through each channel-level interface instance, calculates the proxy component identifier corresponding to the data received by each channel based on the calendar of the data link layer, encapsulates the received data into a second atomic data packet, and transmits it to the scoreboard of the corresponding proxy component according to the output port corresponding to the proxy component identifier for comparison between the second atomic data packet and the first atomic data packet to complete one verification.

[0074] The EDA verification device of this embodiment is more in line with the existence form of the real FlexE client in terms of architecture and more conforms to the design idea of the upper-layer system integration layer, and the expansion is also very simple. For example, when it is necessary to support the implementation of the China Mobile SPN small-granularity protocol based on the FlexE protocol, since the bandwidth is further segmented, the number of supported users will further increase. In this verification device, the instantiation numbers of flexe_mac_client and flexe_client_port can be dynamically adjusted through parameterized configuration, and the interface signals and debugging signal attributes corresponding to the requirements can be added to the interface at the channel level, so that problems can be traced and located on the waveform diagram.

[0075] Since the EDA verification device for the FlexE subsystem in this embodiment can be mutually referred to with the foregoing verification method in relevant parts, and there is no need to repeat the description here. Since the principle of this device embodiment is the same as that of the above method embodiment, this device also has the corresponding technical effects of the above method embodiment.

[0076] Those skilled in the art can understand that all or part of the processes for implementing the methods of the above embodiments can be completed by instructing relevant hardware through a computer program, and the program can be stored in a computer-readable storage medium. Among them, the computer-readable storage medium is a disk, an optical disc, a read-only memory or a random access memory, etc.

[0077] The above is only a preferred specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention should be covered by the protection scope of the present invention.

Claims

1. An EDA verification method for a FlexE subsystem, characterized in that, It includes the following steps: After the simulation starts, each service packet generated in each proxy component at the client level is split into multiple first atomic data packets, and the multiple first atomic data packets are placed into their respective queues and scoreboards; When the DUT requests data from the verification environment, the driver at the channel level obtains the tx output signal of the DUT corresponding to each interface instance at the channel level, calculates the proxy component identifier corresponding to the data required for each channel based on the calendar of the data link layer, takes out a first atomic data packet from the queue of the corresponding proxy component according to the proxy component identifier, and drives it to the DUT through each interface instance at the channel level; The monitor at the channel level samples the rx output signal of the DUT through each interface instance at the channel level, calculates the proxy component identifier corresponding to the data received by each channel based on the calendar of the data link layer, encapsulates the received data into a second atomic data packet, and transmits it to the scoreboard of the corresponding proxy component according to the output port corresponding to the proxy component identifier for comparison between the second atomic data packet and the first atomic data packet to complete one verification.

2. The EDA verification method for a FlexE subsystem according to claim 1, characterized in that, The method further includes: after the simulation starts, the tx output signal and rx output signal in each interface instance at the channel level are presented in the waveform diagram according to the clock cycle; after the simulation ends, the timestamp and proxy component identifier are obtained from the error message in the simulation log, and the corresponding position is found on the waveform diagram for tracking to locate the problem.

3. The EDA verification method for a FlexE subsystem according to claim 1 or 2, characterized in that, The proxy component at the client level includes: the configuration class at the client level, the transaction class at the client level, the sequencer at the client level, the driver class at the client level, and the scoreboard; The splitting of each service packet generated in each proxy component at the client level into multiple first atomic data packets and sequentially placing them into the corresponding queue and scoreboard includes: The sequencer at the client level generates service packets according to the configuration class at the client level; The transaction class at the client level splits the service packet into multiple first atomic data packets; The driver class at the client level continuously obtains the instance of the transaction class at the client level, and simultaneously places the multiple first atomic data packets obtained by splitting into the queue and the scoreboard until the queue length threshold is reached.

4. The EDA verification method for a FlexE subsystem according to claim 3, characterized in that, The attributes of the configuration class at the client level include the proxy component identifier, the service packet encoding, and multiple restrictive attributes. The proxy component identifier is used to identify the client corresponding to the current proxy component at the data link layer; the driver class at the client level inherits from the uvm_driver class or the uvm_component class.

5. The EDA verification method for a FlexE subsystem according to claim 4, characterized in that, The first atomic data packet and the second atomic data packet are instances of the atomic data class, and the atomic data class is used to define a unified data structure; the multiple first atomic data packets obtained by splitting each service packet have the same proxy component identifier.

6. The EDA verification method for a FlexE subsystem according to claim 5, characterized in that, The data bit width of the first atomic data packet is 8 bytes. The sum of the byte lengths of all attributes of each service packet is divided by 8, and the rounded-up value is used as the splitting quantity of the first atomic data packet.

7. The EDA verification method for a FlexE subsystem according to claim 3, characterized in that, The calendar of the data link layer is a two-dimensional table of M×Q generated according to the number of channels M and the length Q of the DUT output signal. Among them, the one-hot encoding of the tx output signal or rx output signal is used as the index of each column, and different proxy component identifiers are used as the values of each cell.

8. The EDA verification method for a FlexE subsystem according to claim 5, characterized in that, The attributes of the channel-level interface include the attributes of the tx output signal and the attributes of the rx output signal. The attributes of the tx output signal and the attributes of the rx output signal both include the attributes of the atomic data class; each channel-level interface instance corresponds to each channel of the DUT.

9. The EDA verification method for a FlexE subsystem according to claim 3, characterized in that, The channel-level driver includes multiple client-level proxy components and 1 channel-level interface. The channel-level monitor includes multiple client-level output port components and 1 channel-level interface; the output port of each output port component is connected to the input port of the scoreboard in the corresponding client-level proxy component as the transmission channel of the second atomic data packet.

10. An EDA verification device for a FlexE subsystem, characterized in that, It includes a channel-level driver and a channel-level monitor; the channel-level driver includes multiple client-level proxy components and 1 channel-level interface, and the channel-level monitor includes multiple client-level output port components and 1 channel-level interface; among them, The client-level proxy component is used to split each generated service packet into multiple first atomic data packets after the simulation starts, and put the multiple first atomic data packets into their respective queues and scoreboards; The channel-level driver is used to obtain the tx output signal of the DUT corresponding to each channel-level interface instance when the DUT requests data from the verification environment, calculate the proxy component identifier corresponding to the data required for each channel based on the calendar of the data link layer, take out a first atomic data packet from the queue of the corresponding proxy component according to the proxy component identifier, and drive it to the DUT through each channel-level interface instance; The channel-level monitor samples the rx output signal of the DUT through each channel-level interface instance, calculates the proxy component identifier corresponding to the data received by each channel based on the calendar of the data link layer, encapsulates the received data into a second atomic data packet, and transmits it to the scoreboard of the corresponding proxy component through the output port corresponding to the proxy component identifier for comparison between the second atomic data packet and the first atomic data packet to complete one verification.

Images