Semiconductor structure and method of forming the same

Abstract

The present disclosure provides a semiconductor structure and a forming method thereof. The semiconductor structure formed by the forming method comprises: a substrate, an insulating layer formed on the substrate, a metal conductive layer on the insulating layer, and an isolation structure between adjacent metal conductive layers. On one hand, the semiconductor structure has less by-products, so that the short circuit between adjacent metal conductive layers is less likely to occur, and thus the yield of the semiconductor structure is higher. On the other hand, the metal conductive layer in the semiconductor structure is less damaged, and the metal conductive layer is more complete, so that the conductivity of the metal conductive layer can be improved.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor technology, and includes, but is not limited to, a semiconductor structure and a method for forming the same. Background Technology

[0002] In the manufacturing process of memory devices, the semiconductor structure is typically divided into an array region and a peripheral region. The array region includes memory transistors, capacitor structures, and landing pads between them; the peripheral region includes circuits controlling data input / output and other circuits. To input or output data, a conductive metal layer needs to be formed in the peripheral region. However, during the formation of the conductive metal layer, byproducts are easily left behind. These byproducts consist of multiple substances and can easily cause short circuits between adjacent conductive metal layers. Therefore, a new method for forming the conductive metal layer is needed to simplify the composition of residual byproducts and reduce the occurrence of short circuits between adjacent conductive metal layers. Summary of the Invention

[0003] In view of this, embodiments of the present disclosure provide a semiconductor structure and a method for forming the same.

[0004] In a first aspect, embodiments of this disclosure provide a method for forming a semiconductor structure, the method comprising: providing a substrate on which an insulating layer, an initial metal conductive layer, an initial protective layer, and a mask layer are sequentially stacked, the initial protective layer comprising a silicon nitride compound layer; etching the initial protective layer and the initial metal conductive layer using an oxygen source gas as an etching gas based on a patterned mask layer to form a metal conductive layer and a protective layer located on the metal conductive layer; ashing the patterned mask layer using an oxygen source gas as an etching gas to remove the patterned mask layer; cleaning byproducts formed during the etching and ashing processes using an alkaline etchant to expose the protective layer; and forming an isolation structure between adjacent metal conductive layers.

[0005] In some embodiments, the method for forming the initial protective layer includes: planarizing the initial metal conductive layer; forming the initial protective layer on the planarized initial metal conductive layer; wherein the process for forming the initial protective layer includes at least one of the following: atomic layer deposition, low-pressure chemical vapor deposition, and plasma-enhanced chemical vapor deposition; the materials of the initial metal conductive layer and the metal conductive layer include tungsten, and the materials of the initial protective layer and the protective layer include silicon nitride and / or silicon oxynitride.

[0006] In some embodiments, the mask layer includes an amorphous carbon layer; based on the patterned mask layer, the initial protective layer and the initial metal conductive layer are etched using an oxygen source gas as the etching gas to form a metal conductive layer and a protective layer located on the metal conductive layer, including: forming a patterned amorphous carbon layer on the initial protective layer; and based on the patterned amorphous carbon layer, etching the initial protective layer and the initial metal conductive layer using an in-situ oxygen etching process to form the metal conductive layer and the protective layer located on the metal conductive layer.

[0007] In some embodiments, the patterned mask layer is ashed using an oxygen source gas as an etching gas to remove the patterned mask layer, including: ashing the patterned amorphous carbon layer using oxygen plasma to remove the patterned amorphous carbon layer.

[0008] In some embodiments, the byproducts formed during the etching and ashing processes include tungsten oxide.

[0009] In some embodiments, before exposing the protective layer by cleaning the byproducts formed during the etching and ashing processes with an alkaline etchant, the method further includes: pretreating the surface of the protective layer to remove native oxides on the protective layer and expose the protective layer and the byproducts formed during the etching and ashing processes.

[0010] In some embodiments, forming an isolation structure between adjacent conductive metal layers includes: sequentially forming a first dielectric layer and a second dielectric layer between adjacent conductive metal layers and on the top surface of the protective layer; the protective layer, the first dielectric layer, and the second dielectric layer together constitute the isolation structure.

[0011] In some embodiments, forming an isolation structure between adjacent conductive metal layers includes: etching the protective layer with an acidic etchant to remove a portion of the protective layer; sequentially forming a first dielectric layer and a second dielectric layer between adjacent conductive metal layers and on the top surface of the remaining protective layer; the remaining protective layer, the first dielectric layer, and the second dielectric layer together constitute the isolation structure.

[0012] In some embodiments, after the protective layer is etched with an acidic etchant to remove part of the protective layer, the process further includes: cleaning the surface of the remaining protective layer to remove any residual alkaline and acidic etchants; and drying the metal conductive layer and the remaining protective layer.

[0013] In some embodiments, isopropanol and nitrogen are used to dry the metal conductive layer and the remaining protective layer.

[0014] In some embodiments, the alkaline corrosive solution includes a mixed solution of ammonia and deionized water, wherein the volume ratio of ammonia to deionized water in the mixed solution ranges from 5:1 to 1000:1; the acidic corrosive solution includes a diluted hydrofluoric acid solution, wherein the volume ratio of hydrogen fluoride to deionized water in the diluted hydrofluoric acid solution ranges from 10:1 to 1000:1.

[0015] In some embodiments, an initial barrier layer is further formed on the substrate between the insulating layer and the initial conductive metal layer; based on a patterned mask layer, the initial protective layer and the initial conductive metal layer are etched using an oxygen source gas as an etching gas to form a conductive metal layer and a protective layer on the conductive metal layer, including: based on a patterned mask layer, the initial protective layer, the initial conductive metal layer, and the initial barrier layer are etched using an oxygen source gas as an etching gas to form a trench, and a barrier layer, the conductive metal layer, and the protective layer are formed sequentially stacked on both sides of the trench; an isolation structure is formed between adjacent conductive metal layers, including: forming the isolation structure in the trench.

[0016] Secondly, embodiments of this disclosure also provide a semiconductor structure formed using the method described in the first aspect, comprising: a substrate on which an insulating layer is formed; a metal conductive layer located on the insulating layer; and an isolation structure located between adjacent metal conductive layers.

[0017] In some embodiments, the metal conductive layer includes a tungsten layer.

[0018] In some embodiments, the isolation structure includes: at least a portion of the protective layer, and a first dielectric layer located on both sides of the metal conductive layer and a second dielectric layer in contact with the first dielectric layer; wherein the first dielectric layer and the second dielectric layer fill the gaps between adjacent metal conductive layers.

[0019] In some embodiments, the structure further includes a barrier layer located between the insulating layer and the metal conductive layer.

[0020] In this embodiment, firstly, an insulating layer, an initial conductive metal layer, an initial protective layer, and a mask layer are sequentially stacked on a substrate. The initial protective layer includes a silicon nitride compound layer, which protects the initial conductive metal layer and reduces damage to it during subsequent removal of the patterned mask layer. Secondly, based on the patterned mask layer, an oxygen source gas is used as the etching gas to etch the initial protective layer and the initial conductive metal layer. This yields the desired patterned conductive metal layer and the protective layer on top of it, ensuring that the byproducts formed during the etching process primarily consist of metal oxides. Thirdly, an ashing process using an oxygen source gas is performed to remove the patterned mask. During the layering process, the oxygen source gas further causes the byproducts formed during the ashing process to mainly consist of metal oxides. Next, an alkaline etching solution is used for cleaning to remove the byproducts formed during the etching and ashing processes and expose the protective layer. Since the alkaline etching solution reacts with the byproducts but not with the conductive metal layer, damage to the conductive metal layer is reduced. Furthermore, because the byproducts formed during etching and ashing mainly consist of metal oxides, a single solution can remove the byproducts in one step, simplifying the process. Finally, an isolation structure is formed between adjacent conductive metal layers, further reducing the possibility of short circuits between them. Attached Figure Description

[0021] In the accompanying drawings (which are not necessarily drawn to scale), similar reference numerals may describe similar parts in different views. Similar reference numerals with different letter suffixes may indicate different examples of similar parts. The drawings illustrate, by way of example and not limitation, the various embodiments discussed herein.

[0022] Figure 1 A schematic diagram illustrating the implementation process of a method for forming a semiconductor structure according to an embodiment of this disclosure;

[0023] Figures 2a to 2e A schematic diagram of the composition structure of a semiconductor structure formation process provided in an embodiment of this disclosure;

[0024] Figure 3a and Figure 3b A schematic diagram of the composition structure of a semiconductor structure formation process provided in an embodiment of this disclosure;

[0025] Figures 4a to 4c A schematic diagram of the composition structure of a semiconductor structure formation process provided in an embodiment of this disclosure;

[0026] Figure 5a A schematic diagram illustrating the implementation flow of another method for forming a semiconductor structure provided in this embodiment of the disclosure;

[0027] Figures 5b to 5h This is a schematic diagram illustrating the composition of a semiconductor structure formation process provided in an embodiment of the present disclosure. Detailed Implementation

[0028] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the specific embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0029] In the following description, numerous specific details are set forth in order to provide a more thorough understanding of this disclosure. However, it will be apparent to those skilled in the art that this disclosure may be practiced without one or more of these details. In other instances, to avoid confusion with this disclosure, certain technical features well-known in the art have not been described; that is, not all features of actual embodiments are described herein, nor are well-known functions and structures described in detail.

[0030] In the accompanying drawings, for clarity, the dimensions of layers, areas, and elements, as well as their relative dimensions, may be exaggerated. The same reference numerals denote the same elements throughout.

[0031] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this disclosure, the first element, component, area, layer, or portion discussed below may be referred to as a second element, component, area, layer, or portion. And the discussion of a second element, component, area, layer, or portion does not imply that the first element, component, area, layer, or portion necessarily exists in this disclosure.

[0032] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprise” and / or “comprising,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0033] This disclosure provides a method for forming a semiconductor structure, with reference to... Figure 1 The method includes steps S101 to S105, wherein:

[0034] Step S101: A substrate is provided, on which an insulating layer, an initial metal conductive layer, an initial protective layer and a mask layer are formed in sequence, wherein the initial protective layer includes a silicon nitride compound layer.

[0035] The substrate can be a silicon substrate, a silicon-on-insulator substrate, etc. The substrate may also include other semiconductor elements or semiconductor compounds, such as silicon carbide (SiC), gallium arsenide (GaAs), gallium phosphide (GaP), indium phosphide (InP), indium arsenide (InAs), or indium antimonide (InSb), or other semiconductor alloys, such as gallium arsenide phosphide (GaAsP), aluminum indium arsenide (AlInAs), aluminum gallium arsenide (AlGaAs), gallium indium arsenide (GaInAs), gallium indium phosphide (GaInP), and / or gallium indium arsenide phosphide (GaInAsP) or combinations thereof.

[0036] The insulating layer can be made of at least one of the following materials: silicon oxide, silicon nitride, silicon nitride oxide, silicon carbide oxide, borosilicate glass, phosphosilicate glass, and borosilicate phosphosilicate glass. The insulating layer can be formed using processes such as chemical vapor deposition, physical vapor deposition, and atomic layer deposition.

[0037] The initial metal conductive layer can be made of at least one of the following materials: tungsten (W), tantalum (Ta), or titanium (Ti).

[0038] The purpose of the initial protective layer is to protect the initial conductive metal layer from damage during subsequent processes. The material of the initial protective layer can be a silicon nitride or silicon oxynitride, or other silicon nitride compounds.

[0039] Specific portions of the mask layer can be transformed into a patterned mask layer in subsequent processes. The mask layer can be a double-layer or even multi-layer structure, or a single-layer structure; in a double-layer or multi-layer structure, the upper mask layer protects the lower mask layer, reducing damage to the lower mask layer during subsequent processing, thereby reducing defects in the patterned mask layer and improving the pattern transfer effect. The mask layer can be made of one or more of the following materials: silicon oxide, silicon nitride, silicon carbide, silicon oxynitride, amorphous carbon, polycrystalline silicon, hafnium oxide, titanium oxide, zirconium oxide, titanium nitride, and tantalum nitride. The mask layer can be formed by any of the following processes: chemical vapor deposition, physical vapor deposition, atomic layer deposition, spin coating, or any other suitable process. This disclosure does not limit the type or number of mask layers.

[0040] In some embodiments, a photoresist layer and an anti-reflective layer may also be formed on the mask layer. In practice, the photoresist layer can be exposed, developed, and washed. The portion of the photoresist layer retained is used to etch the anti-reflective layer and the mask layer, preserving the portion protected by the photoresist, thus forming a patterned mask layer. This improves the accuracy of the pattern formation in the mask layer, thereby increasing the yield of semiconductor devices.

[0041] Step S102: Based on the patterned mask layer, oxygen source gas is used as the etching gas to etch the initial protective layer and the initial metal conductive layer to form the metal conductive layer and the protective layer located on the metal conductive layer.

[0042] Here, the oxygen source gas can include oxygen and / or ozone, etc. In practice, the oxygen source gas can be excited under radio frequency power to generate ionization and form plasma. Under the impact of electrons, the gas in the reaction chamber not only transforms into ions but also absorbs energy and forms a large number of reactive functional groups. These reactive functional groups react chemically with the surface of the etched material (including the initial protective layer and the initial conductive metal layer) to form volatile reaction products. These reaction products then detach from the surface of the etched material and are extracted from the reaction chamber by a vacuum system, thereby forming the desired patterned conductive metal layer and the protective layer located on top of the conductive metal layer.

[0043] Step S103: Use oxygen source gas as etching gas to ashing process the patterned mask layer in order to remove the patterned mask layer.

[0044] The oxygen source gas can include oxygen and / or ozone. Ashing refers to the removal of residual photoresist, patterned mask layers, or other organic matter.

[0045] If nitrogen gas is used as the etching gas for ashing to remove the patterned mask layer, the nitrogen will react with the conductive metal layer to form metal nitrides, such as tungsten nitride. Since the generated tungsten nitride is difficult to remove and the byproducts formed during ashing and etching are different, different solutions are needed to remove these byproducts separately. Furthermore, residual tungsten nitride can migrate between adjacent conductive metal layers during subsequent cleaning, causing short circuits between them. Therefore, a nitrogen-free gas, such as an oxygen source, should be used for ashing. This simplifies the process by allowing a single solution to remove byproducts from both ashing and etching processes in one step, and reduces the likelihood of short circuits between adjacent conductive metal layers by eliminating the formation of metal nitrides.

[0046] Step S104: Use an alkaline etching solution to clean the byproducts formed during the etching and ashing processes to expose the protective layer.

[0047] The alkaline corrosive solution may contain a base having a pKb of less than or equal to about 5, less than or equal to about 4.8, less than or equal to about 4.75, less than or equal to about 4.7, less than or equal to about 4.5, less than or equal to about 3, less than or equal to about 2, or less than or equal to about 1. In some embodiments, the base may include an organic base (e.g., pyridine, methylamine, imidazole, hydroxides of organic cations). In some embodiments, the base may include a basic salt (e.g., sodium carbonate, sodium acetate, compounds having a weak acid component that hydrolyzes to form an alkaline solution). In some embodiments, the base may include an alkali metal. In some embodiments, the base may include hydroxide ions. In some embodiments, the base may include at least one of sodium hydroxide (NaOH), potassium hydroxide (KOH), or ammonium hydroxide (NH4OH).

[0048] The alkaline corrosive solution in this embodiment may include an ammonia-deionized water mixture (ADM), wherein the volume ratio of ammonia to deionized water in the ammonia-deionized water mixture ranges from 5:1 to 1000:1.

[0049] Byproducts formed during etching and ashing processes may include tungsten oxide (W). x O y In this case, x can be equal to 1 and y can be equal to 3, and the tungsten oxide is tungsten trioxide. ADM can react with the byproducts in formula (1), where tungsten oxide W x O yIt reacts with ammonium hydroxide to produce ammonium tungstate, which is soluble in water, thus removing this byproduct. At the same time, ADM does not react with the metal conductive layer, thereby reducing damage to the metal conductive layer.

[0050] W x O y +NH4OH→(NH4)6W7O 24 ·6H2O formula (1)

[0051] Step S105: An isolation structure is formed between adjacent conductive metal layers.

[0052] The isolation structure is used to isolate adjacent metal conductive layers, further reducing the possibility of short circuits between adjacent metal conductive layers.

[0053] In this embodiment, firstly, an insulating layer, an initial conductive metal layer, an initial protective layer, and a mask layer are sequentially stacked on a substrate. The initial protective layer includes a silicon nitride compound layer, which protects the initial conductive metal layer and reduces damage to it during subsequent removal of the patterned mask layer. Secondly, based on the patterned mask layer, an oxygen source gas is used as the etching gas to etch the initial protective layer and the initial conductive metal layer. This yields the desired patterned conductive metal layer and the protective layer on top of it, ensuring that the byproducts formed during the etching process primarily consist of metal oxides. Thirdly, an ashing process using an oxygen source gas is performed to remove the patterned mask. During the layering process, the oxygen source gas further causes the byproducts formed during the ashing process to mainly consist of metal oxides. Next, an alkaline etching solution is used for cleaning to remove the byproducts formed during the etching and ashing processes and expose the protective layer. Since the alkaline etching solution reacts with the byproducts but not with the conductive metal layer, damage to the conductive metal layer is reduced. Furthermore, because the byproducts formed during etching and ashing mainly consist of metal oxides, a single solution can remove the byproducts in one step, simplifying the process. Finally, an isolation structure is formed between adjacent conductive metal layers, further reducing the possibility of short circuits between them.

[0054] The following is combined with Figures 2a to 2e Steps S101 to S105 will be further explained.

[0055] refer to Figure 2a An insulating layer 202, an initial metal conductive layer 203a, an initial protective layer 204a and a mask layer 205a are formed on the substrate 201 in sequence. The initial protective layer 204a includes a silicon nitride compound layer.

[0056] refer to Figure 2b A patterned mask layer 205 is formed on the initial protective layer 204a. It can be seen that the patterned mask layer 205 exposes part of the initial protective layer 204a and defines the position for subsequent etching.

[0057] Also refer to Figure 2b and Figure 2c Based on the patterned mask layer 205, oxygen source gas is used as the etching gas to etch the initial protective layer 204a and the initial metal conductive layer 203a to form the metal conductive layer 203 and the protective layer 204 located on the metal conductive layer 203. Since part of the patterned mask layer 205 is consumed during the etching process, it can be observed that… Figure 2c The patterned mask layer in the middle is 205 times Figure 2b The patterned mask layer 205 is short. During implementation, refer to... Figure 2c During the etching process, the etched initial metal conductive layer 203b is redeposited onto the upper surface and sidewalls of the patterned mask layer 205. Some of the initial metal conductive layer 203b is oxidized into metal oxides (e.g., tungsten oxide) and becomes a byproduct formed during the etching process. The initial metal conductive layer 203b that is not oxidized during the etching process will be further oxidized during the ashing process and become a byproduct of the ashing process.

[0058] Also refer to Figure 2c and reference Figure 2d Oxygen source gas is used as the etching gas for ashing treatment to remove the patterned mask layer 205 and form byproducts 206 on the protective layer 204. In practice, byproducts 206 may also be located between adjacent metal conductive layers 203.

[0059] Also refer to Figure 2d and Figure 2e The process involves cleaning with an alkaline etching solution to remove byproducts 206 formed during the etching and ashing processes, thereby exposing the protective layer 204 and forming an isolation structure 207 between adjacent conductive metal layers 203.

[0060] In some embodiments, based on the etching rate and etching depth, the etching time required to completely etch through the initial conductive metal layer 203a without etching down to the insulating layer 202 can be obtained. Based on this etching time, the desired etching result can be obtained. Figure 2c The structure shown is illustrated. In other embodiments, etching time can be disregarded, and the etching process can involve etching to a portion of the insulating layer (i.e., over-etching), with the insulating layer serving as an etching stop layer. This simplifies the process flow.

[0061] Based on the semiconductor structure formation method provided in steps S101 to S105, this disclosure provides a semiconductor structure, with reference to... Figure 2e The semiconductor structure includes:

[0062] Substrate 201, on which an insulating layer 202 is formed;

[0063] The metal conductive layer 203 is located on the insulating layer 202;

[0064] The conductive metal layer may include a tungsten layer.

[0065] An isolation structure 207 is located between adjacent conductive metal layers 203.

[0066] In this embodiment, the semiconductor structure formed by the above method includes an insulating layer and a metal conductive layer on a substrate, as well as an isolation structure between the metal conductive layers. On one hand, during the formation of this semiconductor structure, byproducts between adjacent metal conductive layers or on the metal conductive layers can be removed using a solution. Therefore, the process for forming this semiconductor structure is relatively simple and the yield of the formed semiconductor structure is high. On the other hand, during the formation of this semiconductor structure, since the protective layer protects the metal conductive layers, the damage caused to the metal conductive layers by the ashing process can be reduced. In other words, the metal conductive layers in this semiconductor structure are relatively intact, thereby improving the performance of the metal conductive layers.

[0067] In some embodiments, reference Figure 2e The isolation structure 207 may include a protective layer 204 located on the metal conductive layer 203.

[0068] In some embodiments, the method for forming the initial protective layer may include steps S11 to S12, wherein:

[0069] Step S11: Planarize the initial metal conductive layer.

[0070] refer to Figure 3a The initial conductive metal layer 203a is planarized using chemical mechanical polishing (CMP) to obtain a surface that is both flat and free of scratches and impurities, which is beneficial to improving the flatness and quality of the subsequent initial protective layer.

[0071] Step S12: An initial protective layer is formed on the initial conductive metal layer after planarization. The process for forming the initial protective layer includes at least one of the following: atomic layer deposition, low-pressure chemical vapor deposition, and plasma-enhanced chemical vapor deposition; the materials of the initial conductive metal layer and the conductive metal layer include tungsten, and the materials of the initial protective layer and the protective layer include silicon nitride and / or silicon oxynitride.

[0072] refer to Figure 3b An initial protective layer 204a is formed on the initial metal conductive layer 203c after planarization using atomic layer deposition or other processes.

[0073] In this embodiment, because atomic layer deposition (ALD) involves sequential deposition of single atomic layers, an initial protective layer with uniform thickness and good consistency can be formed. Since low-pressure chemical vapor deposition (LPCVD) requires the reactor pressure to be reduced to below a certain value (e.g., 133 Pa), the molecular free path and gas diffusion coefficient increase, thereby accelerating the mass transfer rate of gaseous reactants and byproducts, ultimately increasing the reaction rate for forming the initial protective layer. Furthermore, LPD does not require a carrier gas, thus significantly reducing particulate contamination sources. Because plasma-enhanced chemical vapor deposition (PECVD) requires a lower deposition temperature, it reduces the impact on the structure and physical properties of the initial conductive metal layer. In addition, the initial protective layer formed using PCVD exhibits good uniformity, fewer pinholes, and is dense.

[0074] In practice, silicon oxynitride can be either oxygen-rich silicon oxynitride or silicon-rich silicon oxynitride. Compared to ordinary silicon oxynitride, the advantages of using silicon-rich silicon oxynitride include: firstly, the residual tensile stress of the silicon-rich silicon oxynitride film is lower, thus allowing for the formation of a thicker film, which in turn enhances the protection of the initial conductive metal layer; secondly, the silicon-rich silicon oxynitride film can reduce the etching rate of acidic etching solutions (such as diluted hydrofluoric acid solutions), retaining a portion of the silicon-rich silicon oxynitride film, thereby enabling further removal of residual impurities in subsequent processes.

[0075] In some embodiments, the mask layer includes an amorphous carbon layer, and step S102, "based on the patterned mask layer, using oxygen source gas as the etching gas to etch the initial protective layer and the initial metal conductive layer to form a metal conductive layer and a protective layer located on the metal conductive layer," may include steps S1021 and S1022, wherein:

[0076] Step S1021: A patterned amorphous carbon layer is formed on the initial protective layer.

[0077] Step S1022: Based on the patterned amorphous carbon layer, the initial protective layer and the initial metal conductive layer are etched using an in-situ oxygen etching process to form a metal conductive layer and a protective layer located on the metal conductive layer.

[0078] Correspondingly, step S103, "using oxygen source gas as etching gas to ashing the patterned mask layer to remove the patterned mask layer," may include:

[0079] Step S1031: The patterned amorphous carbon layer is removed by oxygen plasma ashing treatment.

[0080] In this embodiment, the mask layer includes an amorphous carbon layer. During the in-situ oxygen plasma etching process, the oxygen plasma reacts with the amorphous carbon to generate carbon dioxide, thereby removing part of the patterned amorphous carbon layer. Compared with the metal conductive layer and the protective layer, the etching selectivity of amorphous carbon is relatively high. Therefore, in the subsequent ashing process using oxygen source gas as the etching gas, damage to the metal conductive layer can be reduced.

[0081] In some embodiments, step S1040 may be included before step S104, which involves pretreating the surface of the protective layer to remove native oxides from the protective layer and expose the protective layer and the byproducts formed during the etching and ashing processes.

[0082] The pretreatment of the protective layer can include wetting the surface of the protective layer and cleaning the surface of the protective layer with a small amount of diluted hydrofluoric acid (DHF) solution. This can remove the natural oxides and some micro-dust particles on the protective layer, thereby exposing the protective layer and the by-products formed during the etching and ashing processes, which is beneficial for the subsequent removal of these by-products.

[0083] In some embodiments, step S105 "forming an isolation structure between adjacent conductive metal layers" may include step S1051a, in which a first dielectric layer and a second dielectric layer are sequentially formed between adjacent conductive metal layers and on the top surface of the protective layer; wherein the protective layer, the first dielectric layer and the second dielectric layer together constitute an isolation structure.

[0084] The first dielectric layer can be made of insulating materials such as silicon nitride or silicon oxide, and the second dielectric layer can be made of silicon nitride or silicon oxide doped with impurities (such as fluorine, carbon, or boron). The doped impurity ions can reduce the dielectric constant of silicon nitride or silicon oxide, thereby reducing the parasitic capacitance between the metal conductive layers and thus reducing the power consumption of the device.

[0085] The first dielectric layer can be formed by chemical vapor deposition, physical vapor deposition, atomic layer deposition, low-pressure chemical vapor deposition, plasma-enhanced chemical vapor deposition, spin coating, or any other suitable process; the second dielectric layer can be formed by first forming a dielectric layer by chemical vapor deposition, then doping the dielectric layer with impurity ions by ion doping, and finally annealing the dielectric layer doped with impurity ions to obtain the second dielectric layer.

[0086] refer to Figure 4a A first dielectric layer 207a and a second dielectric layer 207b are sequentially formed between adjacent conductive metal layers and on the top surface of the protective layer to form an isolation structure 207. The isolation structure 207 may include a protective layer 204, a first dielectric layer 207a, and a second dielectric layer 207b.

[0087] refer to Figure 4b If other metal contact structures are to be formed on the metal conductive layer 203 in the future, the isolation structure 207 on the metal conductive layer 203 can be removed, and the first dielectric layer 207a and the second dielectric layer 207b between adjacent metal conductive layers 203 can be retained to expose the upper surface of the metal conductive layer 203, so that other metal contact structures can be electrically connected to the metal conductive layer 203.

[0088] In some embodiments, step S105, "forming an isolation structure between adjacent conductive metal layers," may include steps S1051b and S1052b, wherein:

[0089] In step S1051b, the protective layer is etched with an acidic etchant to remove part of the protective layer.

[0090] The acidic etching solution can include diluted hydrofluoric acid solution, hot phosphoric acid solution, nitric acid solution, etc. The volume ratio of hydrogen fluoride to deionized water in the diluted hydrofluoric acid solution ranges from 10:1 to 1000:1. By setting this range, the rate of protective layer removal can be increased.

[0091] The purpose of partially removing the protective layer is twofold: firstly, the exposed surface of the protective layer may contain byproducts and impurities, which can be removed simultaneously with the partial removal of the protective layer. Secondly, polymers may re-adhere to the surface of the protective layer, and this re-adhesive polymer can be removed along with the partial removal of the protective layer.

[0092] refer to Figure 4a The protective layer 204 is etched using an acidic etching solution to remove part of the protective layer 204, leaving a portion of the protective layer 204, which is the remaining portion. Figure 4c The remaining protective layer 204b is shown. (Comparison) Figure 4c and Figure 4a It can be observed that, Figure 4c The thickness of the protective layer (i.e. the remaining protective layer 204b) on the middle metal conductive layer 203 has been reduced.

[0093] In step S1052b, a first dielectric layer and a second dielectric layer are sequentially formed between adjacent conductive metal layers and on the top surface of the remaining protective layer; the remaining protective layer, the first dielectric layer, and the second dielectric layer together constitute an isolation structure.

[0094] Continue to refer to Figure 4c Between adjacent conductive metal layers 203 and on the top surface of the remaining protective layer 204b, a first dielectric layer 207a and a second dielectric layer 207b are formed sequentially; at this time, the isolation structure 207 includes the first dielectric layer 207a, the second dielectric layer 207b and the remaining protective layer 204b.

[0095] During implementation, after each step of the chemical solution treatment (acidic or alkaline etching solution), residual chemical solution may react with subsequent chemical solutions. For example, if an alkaline etching solution is used followed by an acidic etching solution, the acidic solution may react with the alkaline solution. Therefore, rinsing is required after each chemical solution treatment to remove residual chemical solution.

[0096] In some embodiments, step S1051b, "etching the protective layer with an acidic etchant to remove part of the protective layer," may further include steps S1053b and S1054b, wherein:

[0097] Step S1053b: Clean the surface of the remaining protective layer to remove any residual alkaline and acidic corrosive solutions.

[0098] Here, after removing the byproducts formed during the etching and ashing processes using alkaline etching solution, the surface of the protective layer can be cleaned with deionized water to remove the residual alkaline etching solution; after removing part of the protective layer using acidic etching solution, the surface of the protective layer can be cleaned with deionized water to remove the residual acidic etching solution.

[0099] Step S1054b involves drying the metal conductive layer and the remaining protective layer.

[0100] Here, after cleaning away the residual alkaline and acidic corrosive solutions, the conductive metal layer and the remaining protective layer need to be dried to remove any residual deionized water.

[0101] As semiconductor manufacturing linewidths continue to shrink, the centrifugal drying process, which requires high-speed rotation to subject the liquid to centrifugal force and remove it from the surface, increases the risk of semiconductor structure collapse. In this embodiment, to reduce this risk, isopropanol (IPA) drying technology can be used to dry the metal conductive layer and the remaining protective layer. Specifically, the metal conductive layer and the remaining protective layer can be dried in a nitrogen atmosphere. This reduces the possibility of oxygen in the air re-oxidizing the metal conductive layer, thereby minimizing the impact on its conductivity.

[0102] In other embodiments, the Marangoni drying technique can also be used to dry the conductive metal layer and the remaining protective layer. The Marangoni drying technique differs fundamentally from the IPA drying technique; the Marangoni drying technique achieves drying by drawing water back to the surface through a surface tension gradient, while the IPA drying technique relies on water evaporation. Using the Marangoni drying technique not only saves on the amount of IPA used but also overcomes the dehydration difficulties in deep and narrow channels.

[0103] This disclosure also provides a method for forming a semiconductor structure, see embodiments thereof. Figure 5a The method includes steps S501 to S505, wherein:

[0104] Step S501: A substrate is provided, on which an insulating layer, an initial barrier layer, an initial metal conductive layer, an initial protective layer and a mask layer are formed in sequence, wherein the initial protective layer includes a silicon nitride compound layer.

[0105] Here, the initial barrier layer is located between the insulating layer and the initial metal conductive layer to prevent the metal in the initial metal conductive layer from diffusing into the insulating layer.

[0106] In step S502, based on the patterned mask layer, oxygen source gas is used as the etching gas to etch the initial protective layer, the initial metal conductive layer, and the initial barrier layer to form a trench, and a barrier layer, a metal conductive layer, and a protective layer are formed in sequence on both sides of the trench.

[0107] Step S503: Use oxygen source gas as etching gas to ashing the patterned mask layer in order to remove the patterned mask layer.

[0108] Step S504: Use an alkaline etching solution to clean the byproducts formed during the etching and ashing processes to expose the protective layer.

[0109] Step S505: Form an isolation structure in the trench.

[0110] Here, steps S503 to S505 can be implemented by referring to steps S103 to S105 respectively.

[0111] The following is combined with Figures 5b to 5h Steps S501 to S504 will be further explained.

[0112] refer to Figure 5b An insulating layer 202, an initial barrier layer 208a, an initial metal conductive layer 203a, an initial protective layer 204a, and a mask layer 205a are sequentially formed on a substrate 201. The insulating layer 202 can be a silicon nitride layer, the initial metal conductive layer 203a can be an initial tungsten layer, the initial protective layer 204a can be a silicon nitride layer, the initial barrier layer 208a can be a titanium nitride layer, and the mask layer 205a can be an amorphous carbon layer.

[0113] refer to Figure 5c A patterned mask layer 205 is formed on the initial protective layer 204a. (See reference) Figure 5c and Figure 5d Based on the patterned mask layer 205, oxygen source gas is used as the etching gas to etch the initial protective layer 204a, the initial conductive metal layer 203a, and the initial barrier layer 208a. Simultaneously, a portion of the insulating layer 202 is also etched to form a trench 207'. A barrier layer 208, a conductive metal layer 203, and a protective layer 204 are then formed and stacked sequentially on both sides of the trench 207'. Here, the depth of the trench 207' is less than the sum of the thicknesses of the barrier layer, the conductive metal layer, the protective layer, and the insulating layer.

[0114] In some embodiments, the depth of trench 207' can be equal to the sum of the thicknesses of barrier layer 208, metal conductive layer 203, and protective layer 204. That is, when trench 207' is formed, the initial protective layer 204a, initial metal conductive layer 203a, and initial barrier layer 208a are etched, but the insulating layer 202 is not etched.

[0115] Also refer to Figure 5d and Figure 5e Oxygen source gas is used as the etching gas for ashing treatment to remove the patterned mask layer 205. During the etching and ashing processes, byproducts 206 formed will adhere to the surface of the protective layer 204.

[0116] Also refer to Figure 5e and Figure 5f The process involves cleaning with an alkaline etching solution to remove the byproducts 206 formed during the etching and ashing processes, and to expose the protective layer 204.

[0117] refer to Figure 5g or Figure 5hA first dielectric layer 207a and a second dielectric layer 207b are sequentially formed between the top surface of the protective layer 204 (or the remaining protective layer 204b) and the adjacent conductive metal layer 203 to form an isolation structure 207 in the trench. The isolation structure 207 may include the first dielectric layer 207a, the second dielectric layer 207b, and the protective layer 204 (or the remaining protective layer 204b).

[0118] Based on the semiconductor structure formation method provided in steps S501 to S505, this disclosure provides a semiconductor structure, with reference to... Figure 5g or Figure 5h The isolation structure 207 in the semiconductor structure includes: at least a partial protective layer, and a first dielectric layer 207a located on both sides of the metal conductive layer 203 and a second dielectric layer 207b in contact with the first dielectric layer 207a; wherein the first dielectric layer 207a and the second dielectric layer 207b fill the gap between adjacent metal conductive layers 203.

[0119] It should be noted that the isolation structure 207 in the semiconductor structure includes at least a partial protective layer, meaning that the isolation structure 207 may include a partial protective layer, namely the remaining protective layer 204b, or it may include the entire protective layer, namely the protective layer 204 that has not been etched by acidic etchant.

[0120] In some embodiments, reference Figure 5h The semiconductor structure also includes a barrier layer 208 located between the insulating layer 202 and the metal conductive layer 203.

[0121] In the several embodiments provided in this disclosure, it should be understood that the disclosed structures and methods can be implemented in a non-target manner. The structural embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components may be combined, or integrated into another system, or some features may be ignored or not executed. In addition, the various components shown or discussed are coupled or directly coupled to each other.

[0122] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the units may be selected to achieve the purpose of this embodiment according to actual needs.

[0123] The features disclosed in the several method or structural embodiments provided in this disclosure can be arbitrarily combined without conflict to obtain new method or structural embodiments.

[0124] The above descriptions are merely some embodiments of this disclosure, but the protection scope of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this disclosure should be included within the protection scope of this disclosure. Therefore, the protection scope of this disclosure should be determined by the scope of the claims.

Claims

1. A method of forming a semiconductor structure, characterized by, The method comprises the following steps: A substrate is provided, and an insulating layer, an initial metal conductive layer, an initial protective layer and a mask layer are sequentially stacked on the substrate, wherein the initial protective layer comprises a nitrogen-silicon compound layer; Based on the patterned mask layer, the initial protective layer and the initial metal conductive layer are etched by using an oxygen source gas as an etching gas to form a metal conductive layer and a protective layer on the metal conductive layer; The patterned mask layer is ashed by using the oxygen source gas as the etching gas to remove the patterned mask layer; the by-products formed during the etching and the ashing mainly comprise metal oxides; The by-products formed during the etching and the ashing are cleaned by using an alkaline etching liquid to expose the protective layer; An isolation structure is formed between adjacent metal conductive layers.

2. The method of claim 1, wherein, The method for forming the initial protective layer comprises the following steps: The initial metal conductive layer is planarized; The initial protective layer is formed on the initial metal conductive layer after the planarization; The process for forming the initial protective layer at least comprises one of the following: atomic layer deposition, low-pressure chemical vapor deposition and plasma-enhanced chemical vapor deposition; The materials of the initial metal conductive layer and the metal conductive layer comprise tungsten, and the materials of the initial protective layer and the protective layer comprise silicon nitride and / or silicon oxynitride.

3. The method of claim 1, wherein, The mask layer comprises an amorphous carbon layer; based on the patterned mask layer, the initial protective layer and the initial metal conductive layer are etched by using an oxygen source gas as an etching gas to form a metal conductive layer and a protective layer on the metal conductive layer, which comprises the following steps: The patterned amorphous carbon layer is formed on the initial protective layer; Based on the patterned amorphous carbon layer, the initial protective layer and the initial metal conductive layer are etched by using an in-situ oxygen etching process to form the metal conductive layer and the protective layer on the metal conductive layer.

4. The method of claim 3, wherein, The patterned mask layer is ashed by using the oxygen source gas as the etching gas to remove the patterned mask layer, which comprises the following steps: The patterned amorphous carbon layer is ashed by using an oxygen plasma ashing process to remove the patterned amorphous carbon layer.

5. The method according to any one of claims 1 to 4, characterized in that, The by-products formed during the etching and the ashing comprise oxides of tungsten.

6. The method according to any one of claims 1 to 4, characterized in that, Before the by-products formed during the etching and the ashing are cleaned by using the alkaline etching liquid to expose the protective layer, the method further comprises the following steps: The surface of the protective layer is pretreated to remove the natural oxides on the protective layer and expose the protective layer and the by-products formed during the etching and the ashing.

7. The method according to any one of claims 1 to 4, characterized in that, The isolation structure is formed between adjacent metal conductive layers, which comprises the following steps: A first dielectric layer and a second dielectric layer are sequentially formed between adjacent metal conductive layers and on the top surface of the protective layer; The protective layer, the first dielectric layer and the second dielectric layer jointly constitute the isolation structure.

8. The method according to any one of claims 1 to 4, characterized in that, The isolation structure is formed between adjacent metal conductive layers, which comprises the following steps: The protective layer is etched by using an acidic etching liquid to remove part of the protective layer; A first dielectric layer and a second dielectric layer are sequentially formed between the adjacent metal conductive layers and on the top surface of the remaining protective layer; the remaining protective layer, the first dielectric layer and the second dielectric layer together constitute the isolation structure.

9. The method of claim 8, wherein, After the protective layer is subjected to the etching treatment by the acidic etching liquid to remove part of the protective layer, the method further comprises: cleaning the surface of the remaining protective layer of the residual alkaline etching liquid and the acidic etching liquid; subjecting the metal conductive layer and the remaining protective layer to a drying treatment.

10. The method of claim 9, wherein, The metal conductive layer and the remaining protective layer are subjected to a drying treatment by isopropyl alcohol and nitrogen.

11. The method of claim 9, wherein, The alkaline etching liquid comprises an ammonia deionized water mixed solution, and the volume ratio of ammonia water to deionized water in the ammonia deionized water mixed solution ranges from 5:1 to 1000:1; the acidic etching liquid comprises a dilute hydrofluoric acid solution, and the volume ratio of hydrogen fluoride to deionized water in the dilute hydrofluoric acid solution ranges from 10:1 to 1000:

1.

12. The method of claim 1, wherein, An initial barrier layer is further formed on the substrate between the insulating layer and the initial metal conductive layer; Based on the patterned mask layer, the initial protective layer and the initial metal conductive layer are subjected to an etching treatment by using an oxygen source gas as an etching gas to form a metal conductive layer and a protective layer on the metal conductive layer, which comprises: based on the patterned mask layer, the initial protective layer, the initial metal conductive layer and the initial barrier layer are subjected to an etching treatment by using an oxygen source gas as an etching gas to form a groove, and a barrier layer, the metal conductive layer and the protective layer are sequentially stacked on both sides of the groove; The isolation structure is formed between the adjacent metal conductive layers, which comprises: the isolation structure is formed in the groove.

13. A semiconductor structure, characterized by The semiconductor structure is formed by the method according to any one of claims 1 to 12, which comprises: a substrate, the substrate has an insulating layer formed thereon; a metal conductive layer on the insulating layer; an isolation structure between the adjacent metal conductive layers.

14. The structure of claim 13, wherein The metal conductive layer comprises a tungsten layer.

15. The structure of claim 13, wherein The isolation structure comprises: at least part of the protective layer, and a first dielectric layer on both sides of the metal conductive layer and a second dielectric layer in contact with the first dielectric layer; wherein the first dielectric layer and the second dielectric layer fill the gap between the adjacent metal conductive layers.

16. The structure of claim 13, wherein Further comprising: a barrier layer between the insulating layer and the metal conductive layer.

Images