Control modeling method for variable frequency modulation power supply

Abstract

This invention discloses a control modeling method for a variable frequency modulated power supply in the field of power electronics, comprising the following steps: Step 1) The difference between the output voltage sampling signal and the output given voltage of the variable frequency modulated power supply is sent to the voltage loop controller; Step 2) A control-to-output current transfer function is established, and the periodic control signal output by the voltage loop controller is input to the control-to-output current transfer function to obtain the output current signal; Step 3) A current-to-voltage transfer function is established, and the output current signal of the control-to-output current transfer function is input to the current-to-voltage transfer function to obtain the output voltage signal of the variable frequency modulated power supply. The output voltage signal of the variable frequency modulated power supply is then fed back to obtain the output voltage sampling signal. This invention solves the problem of difficulty in designing control parameters caused by the inaccuracy of the current variable frequency flyback converter control model.

Description

Technical Field

[0001] This invention relates to the fields of power electronics and electrical engineering, and in particular to a control modeling method for frequency conversion modulation power supplies. Background Technology

[0002] Flyback converters have been widely studied due to their advantages such as compact structure, simple control, electrical isolation, and high boost ratio. They are frequently used as auxiliary power supplies with wide input and multiple outputs in systems such as three-phase converters and photovoltaic energy storage. Traditional PWM (Pulse Width Modulation) modulation technology uses a fixed switching period and adjusts the on-time to generate the duty cycle control signal. However, under light load conditions, it often exhibits a "hiccup" phenomenon, resulting in low efficiency and failing to meet the regulations set by the European Commission and the European Association of Consumer Electronics Manufacturers (EACEC) for consumer products, which stipulate that the maximum no-load power consumption of all power supply products must not exceed 0.3W. PFM (Pulse Frequency Modulation) modulation, on the other hand, generates a periodic duty cycle signal by using a constant on-time (COT) and adjusting the switching period. This method offers advantages such as high efficiency under light loads and fast transient response. Therefore, flyback converters based on the NCP1351B controller for PFM control are widely used in network routers, high-power grid-connected inverters, and energy storage devices to provide multi-output auxiliary power for their control circuits, sampling circuits, drive circuits, and relay circuits.

[0003] ON Semiconductor's NCP1351B controller is a current-mode control chip with a fixed on-time and varying switching cycles to achieve power factor flux (PFF). It boasts excellent conversion efficiency, performs exceptionally well under light and no-load conditions, and meets green and energy-saving design standards. However, the single primary-side peak current control model of the variable frequency flyback power supply is inaccurate, making it difficult to tune the control parameters. Summary of the Invention

[0004] To address the shortcomings of existing technologies, this invention provides a control modeling method for variable frequency modulation power supplies, solving the problem of difficulty in designing control parameters caused by inaccurate control models of current variable frequency flyback converters.

[0005] The objective of this invention is achieved as follows: a control modeling method for a frequency conversion modulation power supply, comprising the following steps:

[0006] Step 1) The difference between the output voltage sampling signal of the frequency conversion modulation power supply and the output given voltage is sent to the voltage loop controller;

[0007] Step 2) Establish the control-to-output current transfer function. The periodic control signal output by the voltage loop controller is input into the control-to-output current transfer function to obtain the output current signal.

[0008] Step 3) Establish the current-to-voltage transfer function, control the output current signal of the output current transfer function to input the current-to-voltage transfer function, obtain the output voltage signal of the frequency conversion modulation power supply, and obtain the sampling signal of the output voltage of the frequency conversion modulation power supply through feedback gain.

[0009] As a further limitation of the present invention, the control-to-output current transfer function includes a PFM modulation periodic gain and a current closed-loop transfer function. The periodic control signal output by the voltage loop controller is input to the PFM modulation periodic gain to obtain a periodic duty cycle signal. The periodic duty cycle signal is then passed through the current closed-loop transfer function to obtain the output current signal.

[0010] As a further limitation of the present invention, the current closed-loop transfer function includes a duty cycle to output current transfer function and a current error to duty cycle transfer function. The duty cycle to output current transfer function receives a periodic duty cycle signal and outputs two current signals. The difference between one current signal and the reference current is sent to the current error to duty cycle transfer function and then outputs a disturbance duty cycle signal. The other current signal is input to the current to voltage transfer function.

[0011] As a further limitation of the present invention, the current error to duty cycle transfer function includes the error current to conduction time transfer function and PFM modulation conduction gain. The error current to conduction time transfer function receives a current signal output by the duty cycle to output current transfer function to obtain the conduction time signal of the switching transistor in the frequency conversion modulation power supply. The conduction time signal is output as a disturbance duty cycle signal by PFM modulation conduction gain.

[0012] As a further limitation of the present invention, the PFM modulation period gain and PFM modulation turn-on gain are designed respectively in the control-to-output current transfer function model:

[0013] By differentiating the periodic signal output by the voltage loop controller, the periodic duty cycle signal can be obtained, thereby deriving the transfer function from period to duty cycle and establishing the PFM modulation periodic gain model.

[0014] By differentiating the conduction time disturbance signal caused by the peak current error, the disturbance duty cycle signal can be obtained, thereby deriving the transfer function from the peak current error to the duty cycle and establishing the PFM modulation conduction gain model.

[0015] The current closed-loop transfer function is derived from the PFM modulation on-gain model, the duty cycle to output current transfer function, and the error current to on-time transfer function.

[0016] Then, the control transfer function to the output current is derived from the PFM modulation period gain and the current closed-loop transfer function, thereby establishing the control model of the peak current inner loop.

[0017] As a further limitation of the present invention, duty cycle To output current transfer function G id (s) is:

[0018]

[0019] Current to voltage transfer function G vi (s) is:

[0020]

[0021] The transfer function G from error current to conduction time ti (s):

[0022]

[0023] Among them, V I Where is the input voltage, N is the turns ratio of the primary winding to the secondary winding of the transformer, D is the DC component of the duty cycle, C is the energy storage capacitor, R is the load resistance, and L is the secondary inductance of the transformer.

[0024] As a further limitation of the present invention, the PFM modulation period gain KT PFM (s) is:

[0025]

[0026] The PFM modulation on-gain KO PFM (s) is:

[0027]

[0028]

[0029] Among them, V O For the output feedback voltage, T on V is the on-time of the voltage regulator. c Rs1 is the output voltage of the voltage regulator, Rs2 is the internal resistance of the FB pin, and C is the voltage divider resistor of the controller. Ct For the oscillation capacitor, C TR The FB pin has a built-in capacitor, I Ct It serves as the internal constant current source for the CT pin chip.

[0030] As a further limitation of the present invention, the voltage loop controller G c(s) is:

[0031]

[0032] Where R1 is the input resistor of the voltage controller, R2 is the feedback resistor of the voltage controller, C1 is the charging capacitor of the controller, and C2 is the differentiating capacitor of the controller.

[0033] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0034] This invention introduces PFM modulation period gain and PFM modulation turn-on gain to establish the control-to-output current transfer function of the variable frequency modulation power supply, thereby obtaining a modeling method for the variable frequency modulation power supply control system. This provides a theoretical basis for tuning the voltage loop controller parameters, ensuring system stability. The variable frequency control modeling method of this invention has accurate models, thus contributing to the correct design of the voltage outer loop control parameters.

[0035] Other advantages and effects of the present invention will be described below.

[0036] The term used in this invention is: PFM (Pulse Frequency Modulation). Attached Figure Description

[0037] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0038] Figure 1 This is a system control block diagram of the present invention.

[0039] Figure 2 This is a system control block diagram and a block diagram for controlling the output current according to the present invention.

[0040] Figure 3 This is the flyback converter circuit topology in this invention.

[0041] Figure 4 This is the equivalent small-signal model of the switching device in this invention.

[0042] Figure 5 This is the small-signal equivalent model of the flyback converter circuit in this invention.

[0043] Figure 6 This is a schematic diagram (CS pin) of the peak current control of the present invention.

[0044] Figure 7This invention relates to an improved PI regulator circuit.

[0045] Figure 8 These are the open-loop Bode plot and closed-loop step response of the system before compensation in this invention.

[0046] Figure 9 These are the open-loop Bode plot and closed-loop step response of the system after compensation in this invention.

[0047] Figure 10 This is the simulation model of the flyback converter in this invention.

[0048] Figure 11 The simulated waveforms of the flyback converter in this invention are shown.

[0049] Figure 12 This is a schematic diagram of the flyback converter circuit in this invention.

[0050] Figure 13 This is a waveform diagram of the driving signal of the experimental prototype in an embodiment of the present invention.

[0051] Figure 14 The diagram shows the output signal waveform of the experimental prototype in an embodiment of the present invention.

[0052] Figure 1 Symbol names in:

[0053]

[0054]

[0055] Figure 2 The symbol names in Figure 1 .

[0056] Figure 3 Symbol names in:

[0057] <![CDATA[V ap ]]> Input power Np, Ns T1 Primary and Secondary Side Turns <![CDATA[I CS ]]> CS internal current source <![CDATA[i a (t)、i c (t)、i o (t)]]> Branch current <![CDATA[R c ]]> Capacitor Equivalent Resistance <![CDATA[V cp ]]> Load voltage

[0058] Figure 4 Symbol names in:

[0059] AC small-signal model of a switching transistor;

[0060] Figure 5 Symbol names in:

[0061]

[0062] Other symbols and Figure 4 Same as above.

[0063] Figure 6 Symbol names in:

[0064] <![CDATA[V offset ]]> bias voltage <![CDATA[V th ]]> CS internal voltage source <![CDATA[I CS ]]> CS internal current source <![CDATA[C Bulk ]]> Bulk capacitors Lp T1 transformer primary inductance ILp Current in inductor

[0065] Figure 7 Symbol names in:

[0066] <![CDATA[R1]]> Input resistance <![CDATA[R b ]]> Balance resistor <![CDATA[R2]]> Feedback resistor C Charging capacitor <![CDATA[C2]]> Differential capacitor <![CDATA[V PI ]]> PI calibrator output

[0067] Figure 12 Symbol names in:

[0068] Detailed Implementation

[0069] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0070] like Figure 1 , Figure 2 As shown, the components of the present invention are configured as follows:

[0071] The voltage loop controller 1 controls the output current transfer function 2, the current-to-voltage transfer function 3, and the feedback gain 4. The voltage loop controller 1 can be derived from the current-to-voltage transfer function 3. The voltage loop controller 1 includes a three-terminal regulator TL431, three resistors R1, R2, and R3, and capacitors C1 and C2. The output of the voltage loop controller is a periodic control signal. In the control-to-output current transfer function 2, a current inner-loop control strategy consisting of the PFM modulation period gain, the duty cycle-to-output current transfer function, the error current-to-on-time transfer function, and the PFM modulation on-time gain is implemented to obtain the output increment. Output current increment The output voltage increment of the frequency modulation power supply is obtained through the current-to-voltage transfer function. Output voltage increment of frequency modulation power supply The sampling signal of the output voltage and the reference voltage V are obtained through feedback gain 4. ref The differential voltage is fed into voltage loop controller 1, ultimately resulting in a stable output voltage for the frequency conversion modulation power supply. In voltage loop controller 1, resistors R1, R2, R3 and capacitors C1 and C2, under the control of the PI regulator, are fed through a reference voltage V. ref and feedback gain H vf (s), thereby establishing the PFM modulation conduction gain model and ensuring the stability of the system.

[0072] A control modeling method for a frequency conversion modulation power supply is proposed, wherein the inner current loop model consists of four components: PFM modulation period gain, duty cycle to output current transfer function, error current to conduction time transfer function, and PFM modulation conduction gain. The control model consists of the sampled signal of the output voltage of the frequency conversion modulation power supply and the output given voltage V. ref The difference is sent to the voltage loop controller, which outputs a periodic control signal. The signal is sent to the PFM modulation period gain. The period duty cycle signal output by the PFM modulation period gain is added to the disturbance duty cycle signal output by the PFM modulation turn-on gain to form the duty cycle signal of the frequency conversion modulation power supply. Duty cycle signal The current signal is then sent to the duty cycle and the output current transfer function to obtain the current signal. Divided into two paths, one for current signal. With reference current i ref The difference is fed into the transfer function from the error current to the conduction time to obtain the conduction time increment of the switching transistor in the frequency modulation power supply. The output perturbation duty cycle increment signal is obtained by PFM modulation of the conduction gain; the other channel's current signal... The output voltage increment of the frequency modulation power supply is obtained through the current-to-voltage transfer function. Output voltage increment of frequency modulation power supply The sampling signal of the output voltage is obtained through feedback gain, thereby enabling the variable frequency modulation power supply to output a stable voltage. This invention uses PFM modulation periodic gain and PFM modulation turn-on gain to establish the control-to-output current transfer function of the variable frequency modulation power supply, thus obtaining a modeling method for the variable frequency modulation power supply control system. This provides a theoretical basis for tuning the voltage loop controller parameters and ensures the stability of the system.

[0073] Current output signal Delivered to Figure 1 The current is transferred to the voltage transfer function 3, and then after feedback gain 4, it is used as the input of the voltage controller 1, so that the flyback converter outputs a stable DC current.

[0074] The following section provides further explanation based on the theoretical derivation process of small-signal modeling and controller design.

[0075] The flyback converter circuit topology is shown in the figure. Assume the duty cycle of the flyback converter is d, and the voltage at the input side of the model is v. ap The current is i a Output current i c Output voltage v cp Because of the high switching frequency, averaging can be used simply. When the circuit reaches steady state, it can be considered that the AC component is superimposed on the DC component to obtain d and v. api a i c and v cp ,according to Figure 3 The circuit formula can be obtained as shown in equation (1).

[0076]

[0077] in, and These are the AC components; D and I, respectively. c and V ap Let be the corresponding DC component. Neglecting second-order insignificants, we can obtain: Figure 4 The small-signal equivalent model of the switching device in the flyback converter circuit shown is presented.

[0078] Will Figure 4 Substitution Figure 3 By replacing the transformer and MOSFET and representing them as equivalent to the secondary side of the transformer, the equivalent small-signal model of the flyback converter circuit is obtained as follows: Figure 5 As shown. Where V I V is the input voltage. O The output voltage is N, and N is the turns ratio of the primary winding to the secondary winding of the transformer.

[0079] Performing a DC analysis on the circuit, removing the AC components from the model, and short-circuiting the inductor and opening the capacitor (ignoring the parasitic impedance of the inductor), we obtain equation (2):

[0080]

[0081] Next, perform an AC analysis on the circuit, assuming... By selecting two voltage loops and one current node P, we obtain equation (3):

[0082]

[0083] Using equations (2) and (3), the duty cycle can be derived. To output current Transfer function:

[0084]

[0085] Using equations (2) and (3), the output current can be derived. To output voltage Small signal transfer function:

[0086]

[0087] Substituting the secondary inductance value into equation (2), and reflecting the primary peak current to the secondary current, the primary voltage of the transformer equals the input voltage. The transfer function G from the error current to the conduction time can then be derived.ti (s):

[0088]

[0089] like Figure 6 The voltage difference V between the CS terminal and the GND terminal CS It needs to be maintained between 0.5V and 1V; 0.9V can be used here. It is also known that the built-in current source I... CS Taking 270μA, the bias resistor R can be solved. offset for:

[0090]

[0091] The converter is designed for a power of 30W. Taking a certain current margin, the peak current protection value I is... lp The sampling resistor R is set to 1A. sense for:

[0092]

[0093] The time it takes for the voltage across the sampling resistor to rise from 0 to 0.89V is the same as the time it takes for the primary current to rise from 0 to 1A, which is the switch turn-on time. The formula for the primary inductance voltage of a transformer is shown in equation (9), and the switch turn-on time can be calculated from this formula.

[0094]

[0095] Capacitor C CT Voltage increases from 0 to V FB The time is the switching period T, which can be obtained from the constant current charging formula for a capacitor:

[0096]

[0097] Right now:

[0098]

[0099] make: The duty cycle D is obtained as shown in equation (12):

[0100]

[0101] From equation (12), we know that the duty cycle D is affected by the disturbances of the voltage regulator output Vc and the conduction time Ton (i.e., the disturbances of the change in the transformer primary current). Therefore, by differentiating the duty cycle and its independent variable in equation (12), we obtain equation (13):

[0102]

[0103] The frequency modulation period gain KT can be obtained from equation (13).PFM (s):

[0104]

[0105] Then, the frequency modulation turn-on gain KO is derived from equation (13). PFM (s):

[0106]

[0107] Combining (6) and (15), the transfer function T from current error to duty cycle can be obtained. di (s):

[0108]

[0109] Figure 1 and Figure 2 These are the system control block diagram and the system current inner loop closed-loop block diagram, combined with... Figure 1 As can be seen from equation (16), the inner loop of the system current is controlled by the control-output current transfer function G. id (s) represents the forward path, with peak current error (duty cycle disturbance) minus the duty cycle transfer function T. di (s) represents the feedback path. The transfer function G of the duty cycle disturbance-output current can be derived. di_cl (s) as in equation (17).

[0110]

[0111] Therefore, the uncorrected open-loop transfer function of the voltage loop is:

[0112] T vc (s)=KT PFM (s)·G id_cl (s)·G vi (s)·H vf (s) (18)

[0113] Based on the above control principle, a voltage controller and a voltage loop PI compensation network for peak current mode can be designed. Here, an improved PI regulator is used as the compensation network. The improved PI regulator circuit is shown below. Figure 7 As shown.

[0114] Compared to the traditional PI controller, the improved PI controller introduces a pole through capacitor C2, which can correct equation (18) to a type I system. The frequency characteristic of the improved PI controller is given by equation (19):

[0115]

[0116] The system's compensated open-loop transfer function is:

[0117] Gvc (s)=G c (s)·KT PFM (s)·G id_cl (s)·G vi (s)·H vf (s) (20)

[0118] A specific embodiment of the present invention is as follows:

[0119] The main circuit parameters of the flyback converter are as follows: the control chip is NCP1351B, and the internal resistor R of the FB terminal is... s2 =45kΩ, external capacitor C connected to CT terminal CT =270pF, CT terminal internal constant current source I CT =11μA, the optocoupler used is SFH615A-3, and the optocoupler gain C TR =0.7, the three-terminal regulator is TL431, the switching transistor Q1 is FQP6N90C, and the sensing resistor R sense =0.85Ω, starting resistor R start =880kΩ, bias resistor R offset =3.3kΩ, input voltage 240V, primary inductance L = 1.3mH, transformer turns ratio N = 50 / 7, switching frequency 65kHz, output load 10Ω, output voltage 12V. The voltage loop controller, PFM modulation period gain, current closed-loop transfer function, and current-to-voltage transfer function in the control method are obtained using equations (19)(14)(17)(5), respectively.

[0120] Substituting the parameters into equation (11) yields the relationship between the PI controller output Vc and the switching period T:

[0121] T = 2.811 × 10 -3 -2.3427×10 -4 V c (twenty one)

[0122] In equation (21), VC is the static operating point, which is taken here as the controller output when the maximum switching frequency fs = 65kHz. Substituting this into equation (21), we get Vc = 11.933V. Substituting this into equation (9), we obtain the frequency modulation period gain KT. PFM =5.304.

[0123] The loop cutoff frequency is chosen to be 1 / 6 to 1 / 10 of the switching frequency. Considering the light load condition, 3kHz is selected in this paper. The uncorrected transfer function of the system is calculated using equation (18) in Matlab:

[0124]

[0125] The Bode plot of the uncorrected system is plotted according to equation (22) as follows: Figure 8 As shown, the phase-frequency response curve is unsatisfactory, the system crossover frequency is large, and it does not meet the correction requirements for low-frequency operation. Furthermore, the closed-loop step response has a large overshoot and a long settling time, failing to achieve stability.

[0126] The zero in the right half-plane of equation (22) is much larger than the desired system cutoff frequency of 3kHz, which can be ignored for controller design. Therefore, equation (21) can be simplified to:

[0127]

[0128] Based on the zero-pole situation of equation (23), an improved PI controller is used as the compensation network. The improved PI controller is shown in equation 19.

[0129] In the uncompensated system, s = -1860 is the dominant pole, which can be canceled by configuring a zero; another pole is configured to cancel the zero s = 1.667 × 10⁶ of the uncompensated system. Therefore, equation (19) is configured as shown in equation (24), where K is the gain of the compensation network:

[0130]

[0131] The open-loop system formed by the above equation and the original system should have a gain of 1 at 3kHz, i.e., 0dB. Thus, the gain K of the compensation network can be solved, and the coefficients can be compared with equation (19) to obtain the RC parameters: R1 = 20kΩ, R2 = 3.78kΩ, C1 = 142.07nF, C2 = 158.55pF.

[0132] The open-loop Bode plot and closed-loop step response of the system after compensation are as follows: Figure 9 As shown, the amplitude-frequency response curve passes through the 0dB line at 3kHz with a slope of -40dB / dec, the amplitude margin is 35.2dB (@57.4kHz), and the phase margin is 79.9° (@3kHz), both of which are positive. The closed-loop step response reaches stability in a short time, with fast response speed, good system stability, and good compensation effect.

[0133] To verify the correctness of the design, a circuit model was built in the PSIM simulation software, such as... Figure 10 As shown in Table 1, the main circuit parameters are presented, and the improved PI compensation network parameters are designed as described above. The simulation step size is set to 1×10⁻⁷ s, and the total simulation time is 0.3 s.

[0134] The simulation uses a Dynamic Link Library (DLL) module in the PSIM software to implement the internal workings of the NCP1351B chip, sampling the PI controller output Vm, the feedback signal Vof of the 12V output voltage, and the voltage Vs across the peak current sensing resistor. A DLL program is written to output the drive control signal PFM for the switching transistor.

[0135] The program uses equation (21) to convert the PI output Vm into the switching period T. When the period count point i_count ≥ T, the drive signal PFM is set to 1 and i_count is cleared to 0. After the switching transistor is turned on, Vs rises linearly. When Vs ≥ 0.89V, the drive signal PFM is set to 0. i_count starts to increment by 1 while being cleared to 0, starting the next cycle. That is, the PI output controls the turn-on time, and the peak current controls the turn-off time, thus realizing PFM. The output voltage waveform when the circuit is fully loaded is shown in the figure. Figure 12 .

[0136] Figure 11 From top to bottom, the components are: 12V output voltage, PI controller output, cycle counting point, voltage across the peak current sensing resistor, and drive signal. It can be seen that the output voltage Vo stabilizes to 12V in a short time, and the output waveform is good. This demonstrates that the simulation model can output stably from light load to full load. As the load increases, the PI regulator output decreases, the switching cycle shortens (switching frequency increases), the conduction time of 6μs remains almost constant, the cycle duty cycle increases, and the circuit output energy increases. This aligns with the theoretical analysis, verifying the correctness of the circuit modeling method and control parameter design.

[0137] The circuit schematic of the auxiliary power supply prototype based on NCP1351B is shown below. Figure 12 As shown, the improved PI compensation network parameters are also designed as described above. Under full load, the circuit outputs a stable 12V voltage, with a conduction time of 5.4μs and a switching period of 19.4μs. The DRV waveform of the drive signal is shown below. Figure 13 As shown, the channel is CH4.

[0138] The primary input voltage is 240V, and the experimental waveform of the output under actual operation is as follows: Figure 14 As shown, channel CH1 was used. It can be seen that the +12V output voltage is stable, and the output waveform is good. The experimental waveform is consistent with the simulated waveform, indicating that the theory and the actual product of this invention are consistent. The conduction time is infinitely close to the theoretical simulation value, verifying the PFM frequency conversion modulation theory, and the conduction time is related to the detection resistor R. sense This corroborates the correctness of equations (8) and (9).

[0139] As can be seen from the above description, the control modeling method for the variable frequency modulation power supply invented accurately establishes the control model of the variable frequency modulation converter, which helps in the design of control parameters and ensures the stable operation of the variable frequency flyback converter.

[0140] This invention solves the technical problem of difficult-to-tune control parameters in current flyback converters, and has the following advantages:

[0141] (1) A control modeling method for a variable frequency modulated power supply, which can accurately establish the control model of a variable frequency flyback converter;

[0142] (2) The method of the present invention can also be applied to other converters based on frequency conversion control.

[0143] The above description of the embodiments is only for the purpose of helping to understand the method and core ideas of the present invention. It should be noted that those skilled in the art can make several improvements and modifications to the present invention without departing from the principles of the present invention, and these improvements and modifications also fall within the protection scope of the claims of the present invention.

Claims

1. A control modeling method for a frequency conversion modulation power supply, characterized in that, Includes the following steps: Step 1) The difference between the output voltage sampling signal and the given output voltage of the frequency conversion modulation power supply is sent to the voltage loop controller; Step 2) Establish the control-to-output current transfer function. The periodic control signal output by the voltage loop controller is input into the control-to-output current transfer function to obtain the output current signal. Step 3) Establish the current-to-voltage transfer function, control the output current signal of the output current transfer function to input the current-to-voltage transfer function, obtain the output voltage signal of the frequency conversion modulation power supply, and obtain the sampling signal of the output voltage of the frequency conversion modulation power supply through feedback gain; The control-to-output current transfer function includes a PFM modulation periodic gain and a current closed-loop transfer function. The periodic control signal output by the voltage loop controller is input to the PFM modulation periodic gain to obtain the periodic duty cycle signal. The periodic duty cycle signal is then passed through the current closed-loop transfer function to obtain the output current signal. The current closed-loop transfer function includes a duty cycle to output current transfer function and a current error to duty cycle transfer function. The duty cycle to output current transfer function receives a periodic duty cycle signal and outputs two current signals. The difference between one current signal and the reference current is sent to the current error to duty cycle transfer function and then outputs a disturbance duty cycle signal. The other current signal is input to the current to voltage transfer function. The current error to duty cycle transfer function includes the error current to conduction time transfer function and PFM modulation conduction gain. The error current to conduction time transfer function receives a current signal output from the duty cycle to output current transfer function to obtain the conduction time signal of the switching transistor in the frequency conversion power supply. The conduction time signal is output as a disturbance duty cycle signal through PFM modulation conduction gain. In the control-to-output current transfer function model, design the PFM modulation period gain and PFM modulation turn-on gain respectively: By differentiating the periodic signal output by the voltage loop controller, the periodic duty cycle signal can be obtained, thereby deriving the transfer function from period to duty cycle and establishing the PFM modulation periodic gain model. By differentiating the conduction time disturbance signal caused by the peak current error, the disturbance duty cycle signal can be obtained, thereby deriving the transfer function from the peak current error to the duty cycle and establishing the PFM modulation conduction gain model. The current closed-loop transfer function is derived from the PFM modulation on-gain model, the duty cycle to output current transfer function, and the error current to on-time transfer function. Then, the control transfer function to the output current is derived from the PFM modulation period gain and the current closed-loop transfer function, thereby establishing the control model of the peak current inner loop.

2. The control modeling method for a frequency conversion modulation power supply according to claim 1, characterized in that, Duty cycle To output current transfer function for: Current to voltage transfer function for: Transfer function from error current to conduction time : Among them, V I Where is the input voltage, N is the turns ratio of the primary winding to the secondary winding of the transformer, D is the DC component of the duty cycle, C is the energy storage capacitor, R is the load resistance, and L is the secondary inductance of the transformer.

3. The control modeling method for a frequency conversion modulation power supply according to claim 2, characterized in that, The PFM modulation period gain KT PFM (s) is: The PFM modulation on-gain KO PFM (s) is: Among them, V O For the output feedback voltage, T on V is the on-time of the voltage regulator. c Rs1 is the output voltage of the voltage regulator, Rs2 is the internal resistance of the FB pin, and C is the voltage divider resistor of the controller. Ct For the oscillation capacitor, C TR The FB pin has a built-in capacitor, I Ct It serves as the internal constant current source for the CT pin chip.

4. The control modeling method for a frequency conversion modulation power supply according to claim 3, characterized in that, The voltage loop controller for: Where R1 is the input resistor of the voltage controller, R2 is the feedback resistor of the voltage controller, C1 is the charging capacitor of the controller, and C2 is the differentiating capacitor of the controller.

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