Cap oxidation for finfet formation

Abstract

Executable processing methods can produce semiconductor structures that can include high-k dielectric materials. A method can include forming a silicon layer over a semiconductor substrate. The semiconductor substrate can include silicon germanium. The method can include oxidizing a portion of the silicon layer while maintaining a portion of the silicon layer in contact with the semiconductor substrate to form a sacrificial oxide. The method can include removing the sacrificial oxide. The method can include oxidizing the portion of the silicon layer in contact with the semiconductor substrate to form an oxygen-containing material. The method can include forming a high-k dielectric material overlying the oxygen-containing material.

Description

[0001] Cross Reference to Related Applications

[0002] This application claims the benefit of priority to U.S. Patent Application No. 62 / 929,332, filed November 1, 2019, the contents of which are incorporated herein by reference in their entirety for all purposes. TECHNICAL FIELD

[0003] The present technology relates to semiconductor systems, processes, and equipment. More specifically, the present technology relates to treatments to enhance material formation in gate structures. BACKGROUND

[0004] Logic gate performance is related to the properties of the materials used and the thickness and area of the structure layers. However, as some gate properties are adjusted to accommodate device scaling, challenges arise. For example, for silicon oxide gate dielectrics, as thickness is reduced, capacitance can increase, which can lead to higher channel mobility and faster device performance. However, as thickness is continually reduced, gate leakage can impact devices and can lead to device yield degradation. Additionally, the quality of the oxide can degrade with thickness reduction and lead to shorts. High-k materials have been used for gate dielectrics to reduce the effective oxide thickness while limiting the impact on gate leakage. Efforts to maximize certain high-k materials have been limited due to morphological issues related to formation of the high-k materials.

[0005] Accordingly, there is a need for improved systems and methods that can be used to maximize the performance of high-k materials and enable production of high quality devices and structures. These and other needs are addressed by the present technology. SUMMARY

[0006] A process method can be performed to produce a semiconductor structure that can include a high-k dielectric material. The method can include the step of forming a silicon layer over a semiconductor substrate. The semiconductor substrate can include silicon germanium. The method can include the step of oxidizing a portion of the silicon layer while maintaining a portion of the silicon layer in contact with the semiconductor substrate to form a sacrificial oxide. The method can include the step of removing the sacrificial oxide. The method can include the step of oxidizing the portion of the silicon layer in contact with the semiconductor substrate to form an oxygen-containing material. The method can include the step of forming a high-k dielectric material over the oxygen-containing material.

[0007] In some embodiments, the removing step can include an in-situ dry chemical treatment. The removing step can be performed in a first processing chamber, and the method can include the step of transferring the semiconductor substrate from the first processing chamber to a second processing chamber prior to forming the high-k dielectric material. The method can be performed in one or more processing chambers without exposing the semiconductor substrate to the atmosphere. The silicon layer can be formed epitaxially over the silicon germanium. The step of forming the sacrificial oxide can include a first oxidation process, and the step of oxidizing the portion of the silicon layer in contact with the semiconductor substrate can include a second oxidation process different from the first oxidation process. The step of oxidizing the portion of the silicon layer in contact with the semiconductor substrate can include the step of delivering a nitrogen and oxygen containing precursor to the semiconductor substrate. The step of oxidizing the portion of the silicon layer in contact with the semiconductor substrate can occur at a temperature less than or about 750 °C. The method can further include the step of introducing a reactive ligand on the oxygen containing material with a nitrogen containing precursor or an oxygen containing precursor prior to forming the high-k dielectric material. The nitrogen containing precursor can be or include ammonia. The high-k dielectric material can be or include at least one element selected from the group including hafnium, zirconium, silicon, lanthanum, aluminum, titanium, or strontium.

[0008] Some embodiments of the present technology can encompass a method of forming a semiconductor structure. The method can include the step of removing an oxide from a surface of a substrate contained in a semiconductor processing chamber. The substrate can include a silicon germanium fin. The method can include the step of forming a silicon layer over the surface of the substrate. The method can include the step of oxidizing a portion of the silicon layer while maintaining a portion of the silicon layer in contact with the substrate to form a sacrificial oxide. The method can include the step of removing the sacrificial oxide. The method can include the step of delivering dinitrogen monoxide to the substrate to form an oxygen containing material. The method can include the step of pre-treating the oxygen containing material by contacting the substrate with a nitrogen containing precursor. The method can include the step of forming a high-k dielectric material over the pre-treated oxygen containing material.

[0009] In some embodiments, the removing step can include an in-situ dry chemical treatment. The removing step can be performed in a first processing chamber, and the method can include the step of transferring the substrate from the first processing chamber to a second processing chamber prior to forming the high-k dielectric material. The step of forming the sacrificial oxide can include delivering dinitrogen monoxide to the substrate to form an oxygen containing material. The step of forming the sacrificial oxide can include the step of delivering an oxygen containing precursor and a hydrogen containing precursor to the substrate to form an oxygen containing material. The step of delivering dinitrogen monoxide to the substrate to form an oxygen containing material can occur at a temperature less than or about 750 °C. The step of pre-treating the oxygen containing material can form a reactive ligand on the oxygen containing material. The method can further include the step of post-treating the high-k dielectric material.

[0010] Some implementations of the technology can encompass a method of forming a semiconductor structure. The method can include the step of removing native oxide from a surface of a substrate included in a semiconductor processing chamber. The substrate can be or include silicon germanium. The method can include the step of forming a silicon layer over the surface of the substrate. The method can include the step of oxidizing a portion of the silicon layer while maintaining a portion of the silicon layer in contact with the substrate to form a sacrificial oxide. The method can include the step of removing the sacrificial oxide. The method can include the step of oxidizing the portion of the silicon layer in contact with the substrate to form an oxygen-containing material. The method can include the step of forming a high-k dielectric material overlying the oxygen-containing material.

[0011] Such technology can provide numerous benefits over conventional systems and technology. For example, processing can result in a high quality oxide layer for a gate oxide. Additionally, the creation of the gate oxide can limit oxidation from spreading to underlying layers. These and other implementations, along with many of their advantages and features, are described in more detail in conjunction with the below description and attached figures. BRIEF DESCRIPTION OF DRAWINGS

[0012] A further understanding of the nature and advantages of the disclosed technology can be realized by reference to the remaining portions of the specification and the attached drawings.

[0013] Figure 1 A top plan view of an exemplary processing system in accordance with implementations of the technology is shown.

[0014] Figure 2 Selected operations in a method of forming a semiconductor structure in accordance with implementations of the technology are shown.

[0015] Figures 3A-3I A schematic cross-sectional view of an exemplary substrate in accordance with implementations of the technology is shown.

[0016] The accompanying drawings, which are included to provide a further understanding of the technology and are incorporated in and constitute a part of this specification, illustrate embodiments and together with the description serve to explain the principles of the technology. In the drawings:

[0017] In the appended figures, similar components and / or features can have the same reference label. Further, various components of the same type can be distinguished by adding a letter suffix, wherein the letter denotes the differentiation between the components. If only the first reference label is used in the specification, the description is applicable to any one of the similar components having the same first reference label irrespective of the letter suffix. DETAILED DESCRIPTION

[0018] As logic gate structures are scaled down to smaller sizes, new material structures are being sought to provide improvements. The use of high-k dielectrics increases the dielectric constant of the gate stack compared to conventional gate stacks that utilize materials such as silicon oxide. However, similar to silicon oxide, as the material thickness is reduced, gate leakage increases. For example, gate leakage increases as the effective oxide thickness is reduced. Thus, the inverse relationship between gate leakage and effective oxide thickness can limit the performance of the transistors and devices produced.

[0019] For FinFET structures, the gate oxide that is overlaid on the fin can perform many functions. For example, the gate oxide can form a conductive channel region under the gate. Defects or holes within the gate oxide, such as from lower quality oxide, can create shorts and damage to the structure. Additionally, the gate oxide can prevent the diffusion of germanium in the PFET or P-MOS regions of the device. Conventional techniques often use wet oxidation techniques, such as chemox, to form the gate oxide along with other oxidation methods. Conventional techniques can produce lower quality oxide layers and can not be well controlled, which can over-oxidize into the fin. This can create a less robust germanium oxide material that is more likely to fail under thermal or electrical stress. The present techniques overcome these problems by forming a controlled gate oxide layer from a defined silicon-containing material. These gate oxide layers can limit over-oxidation of the SiGe fin material and can provide more improved electrical and thermal performance than conventional techniques.

[0020] While the remaining disclosure will routinely determine specific deposition and disposal processes with the disclosed techniques, it will be readily understood that the systems and methods are equally applicable to a variety of other processes that can occur in the described chambers. Thus, the techniques should not be considered limited to use with the described disposal and deposition processes. The present disclosure will discuss one possible system that can be used with the present techniques to perform deposition or disposal operations before describing the operation of an exemplary process sequence according to the present techniques. It should be understood that the techniques are not limited to the described equipment, and the discussed processes can be performed in any number of processing chambers and systems.

[0021] Figure 1 A top plan view of one embodiment of a processing system 100 of a deposition, etch, bake, and / or cure chamber according to embodiments is shown. Figure 1The depicted tool or processing system 100 can contain a plurality of processing chambers 114A-D, a transfer chamber 110, a service chamber 116, an integrated metrology chamber 117, and a pair of load lock chambers 106A-B. The processing chambers can include any number of structures or components, and any number or combination of processing chambers. It should be understood that the system 100 is not intended to be limiting of tools that can incorporate chambers to perform the processes described below. Any tool including any number of chambers can also be used in accordance with some embodiments of the present technology.

[0022] To transport substrates between chambers, the transfer chamber 110 can contain a robot transport mechanism 113. The transport mechanism 113 can have a pair of substrate transport blades 113A attached to the distal ends of extendable arms 113B, respectively. The blades 113A can be used to carry individual substrates to and from the processing chambers. In operation, one of the substrate transport blades, such as blade 113A of transport mechanism 113, can retrieve a substrate W from one of the load lock chambers, such as chambers 106A-B, and carry the substrate W to a first stage of processing (e.g., a pre-treatment process in chambers 114A-D as described below). The chambers can include operations to perform the described techniques individually or in combination. For example, while one or more chambers can be configured to perform deposition or formation operations, one or more other chambers can be configured to perform the described pre-treatment operations and / or one or more post-treatment operations. The present technology encompasses any number of configurations that can also perform any number of additional fabrication operations typically performed in semiconductor processing.

[0023] If a chamber is occupied, the robot can wait until the processing is complete and then remove the processed substrate from the chamber with one blade 113A and can insert a new substrate with a second blade (not shown). Once the substrate is processed, it can be moved to a second stage of processing. For each movement, the transport mechanism 113 can generally have one blade carrying a substrate and one empty blade to perform substrate exchange. The transport mechanism 113 can wait at each chamber until the exchange can be completed.

[0024] Once processing is complete within the processing chambers, the transfer mechanisms 113 can move the substrates W from the last processing chamber and transfer the substrates W to a cassette within the load lock chambers 106A-B. The substrates can be moved from the load lock chambers 106A-B into the factory interface 104. The factory interface 104 can generally be operable to transfer substrates between the pod loaders 105A-D in an atmospheric clean environment and the load lock chambers 106A-B. The clean environment in the factory interface 104 can generally be provided, for example, by air filtration treatment, such as HEPA filtration. The factory interface 104 can also include a substrate orienter / aligner (not shown) that can be used to properly align the substrates prior to processing. At least one substrate robot, such as the robots 108A-B, can be positioned in the factory interface 104 to transfer substrates between various locations / positions within the factory interface 104 and between other locations in communication therewith. The robots 108A-B can be configured to travel along a track system within the factory interface 104 from a first end to a second end of the factory interface 104.

[0025] The processing system 100 can further include an integrated metrology chamber 117 to provide control signals that can provide adaptive control over any processing performed in the processing chambers. The integrated metrology chamber 117 can include any of a variety of metrology devices to measure various film properties, such as thickness, roughness, composition, and the metrology devices can further be capable of characterizing in-line parameters under vacuum, such as critical dimensions, sidewall angles, and feature heights, in an automated fashion.

[0026] Each of the processing chambers 114A-D can be configured to perform one or more processing steps in the fabrication of semiconductor structures, and any number of processing chambers and combinations of processing chambers can be used on the multi-chamber processing system 100. For example, any of the processing chambers can be configured to perform a number of substrate processing operations, including any number of deposition processes (including cyclic layer deposition, atomic layer deposition, chemical vapor deposition, physical vapor deposition) and other operations (including etching, precleaning, pre-treatment, post-treatment, annealing, plasma treatment, degassing, orientation, and other substrate processing). Some particular processes that can be performed in any one of the chambers or any combination of chambers can be metal deposition, surface cleaning and preparation, thermal annealing (such as rapid thermal processing), and plasma treatment. As will be readily appreciated by one skilled in the art, any other processing, including any processing described below, can similarly be performed in the particular chambers incorporated into the multi-chamber processing system 100.

[0027] Figure 2A method 200 for forming a semiconductor structure is shown. The operation of method 200 can be performed, for example, in one or more chambers incorporated in a multi-chamber processing system 100 or any other multi-chamber system as previously described. Method 200 may include one or more operations prior to the initiation of the claimed method operations, including front-end processing, deposition, etching, polishing, cleaning, or any other operations that may be performed prior to said operations. The method may include a number of optional operations as shown in the figures, which may or may not be specifically associated with the method according to the present technology. For example, many operations are described to provide a wider range of structure formation processes, but are not critical to the technology, or may be performed by alternative methods, as will be discussed further below. Method 200 describes... Figures 3A-3I The operations shown schematically in the diagram will be described in conjunction with the operations of method 200. Figures 3A-3I The following is a description. It should be understood that Figure 3 shows only a partial schematic diagram, and the substrate may contain any number of transistor portions and additional materials having the aspects shown in the figure.

[0028] Method 200 may include optional operations such as developing a semiconductor structure for a specific manufacturing operation. Although in some embodiments, method 200 may be performed on a substrate structure, in other embodiments, the method may be performed after other materials have been formed. Figure 3A As shown, after certain processing is performed, the semiconductor structure may represent device 300. For example, substrate 305 may be a planar material or a structured device that may include one or more materials configured to define pillars, trenches, or other structures, as will be understood to be similarly covered by this technology. Substrate 305 may include any number of materials, including silicon, silicon-germanium, or silicon-containing materials (such as oxides, nitrides, and carbides of silicon) and any other materials that may be incorporated within the structure. In some embodiments covered by this technology, substrate 305 may be part of a silicon-germanium fin, such as that associated with a FinFET structure, and may be part of a P-MOS region. Prior to method 200, a silicon-germanium layer may be formed on a silicon substrate or other substrate and may be patterned thereto to form a fin structure. An isolation dielectric may be formed around the fin, and trimming operations may be performed to thin the upper portion of the fin. It should be understood that the figures are not to scale.

[0029] Following this process or as a result of substrate transfer, substrate 305 may include natural oxide 310 or residual particulate material on the surface of silicon-germanium, such as Figure 3AThe illustrated. In some embodiments, the exposed material at the surface of the substrate 305 can be etched, planarized, or otherwise processed to produce the interrupted pattern. Although shown as a single example, it should be understood that the apparatus 300 can comprise a fraction of a larger processing integration, which can include any number of additional portions similar or different from those shown. For example, N-MOS regions can be located in the vicinity of the illustrated structure, and can include any number of patterning or operations performed in conjunction with or separate from the described methods. The substrate 305 can be housed or positioned in a processing region of a semiconductor processing chamber, and can perform the method 200 to produce a semiconductor material, such as a high-k dielectric material, on the substrate.

[0030] The method 200 can include removing native oxide 310 from the substrate 305 in operation 205. The native oxide 310 can be removed by any number of processes. For example, reduction can be performed by utilizing a hydrogen-containing precursor, which can reduce the oxide to ensure a relatively clean surface of the silicon germanium. Additionally, the process can include a plasma treatment or disposition, which can include a fluorine-containing precursor and a hydrogen-containing precursor. The fluorine-containing precursor can be or include nitrogen trifluoride, as well as any other fluorine-containing precursor. The hydrogen-containing precursor can be characterized by an amine group [-NH2] or other nitrogen- or hydrogen-containing group. For example, the hydrogen-containing precursor can be or include a nitrogen- and hydrogen-containing precursor, such as ammonia, as a non-limiting example. The plasma can be generated locally or in a remote plasma region that can be fluidly coupled to the substrate processing region. The flow rate of the fluorine-containing precursor and the flow rate of the hydrogen-containing precursor can be controlled to maintain a flow ratio of hydrogen to fluorine atoms less than 1 :2. As Figure 3B As shown, the oxide 310 or residual material can be removed by the plasma effluent 315, and the process can further include a thermal disposition to remove byproducts from the etching process.

[0031] The native oxide can be removed in operation 205 by an in-situ dry chemical process, in which the substrate surface can not be exposed to an atmosphere or oxygen-containing environment. In some embodiments of the method, the removal of the native oxide in operation 205 can be performed in a first processing chamber. The method 200 can include transferring the substrate from the first processing chamber to a second processing chamber prior to forming the high-k dielectric material, as will be explained below. The method 200 can include performing operations in one or more processing chambers without exposing the substrate surface to an atmosphere or air, such as by maintaining a vacuum within the system 100 while transferring the substrate between one or more chambers to perform operations of the method 200. Maintaining an integrated vacuum can advantageously reduce surface contamination as well as undesirable oxide formation. The transfer can occur between one or more chambers on a single platform, or can occur between chambers on multiple platforms. However, by utilizing a single platform, it can be better ensured that the substrate is avoided from being exposed to an oxygen environment.

[0032] In operation 210, a silicon-containing material can be formed or deposited on the pre-processed or cleaned substrate surface. For example, a silicon layer or silicon-containing material, such as doped silicon, alloyed silicon, or silicon or silicon and metalloid or silicon and metal materials, can be formed or deposited by a variety of methods to form a layer 320 covering the surface of the substrate 305, as shown. In some non-limiting embodiments, silicon can be epitaxially grown on the surface of the silicon germanium fin. The epitaxial layer can be formed to any height and can result in relatively high quality silicon. For example, in various embodiments, the silicon layer 320 can be formed to a height of a few angstroms or a few nanometers. Figure 3C

[0033] After forming the silicon layer, a portion of the layer can be oxidized at operation 215. The oxidation can be performed in a variety of ways, although the oxidation can not extend completely through the silicon layer. The oxidation operation 215 can result in a sacrificial oxide 322 by converting a portion of the silicon layer 320 to silicon oxide. The oxidation operation 215 can oxidize a portion of the silicon layer 320 while at least partially maintaining a portion of the silicon layer 320 in contact with the semiconductor substrate 305. For example, a controlled oxidation can be performed to limit the spread of oxidation through the silicon-containing layer. Operation 215 can include a thermal-based reaction using a vapor, such as an in-situ vapor generation process, whereby the oxidation occurs at a lower rate as compared to conventional thermal techniques. In addition, the oxidation can utilize hydrogen and oxygen together as a thermal oxidation process, as well as additional precursors. For example, in some embodiments, an oxygen-containing precursor can be used, such as a nitrogen and oxygen containing precursor. For example, nitrous oxide or some other nitrogen and oxygen containing precursor, and / or additional precursors such as hydrogen, for example, can be used to oxidize a portion of the silicon-containing material.

[0034] The nitrogen can act as a carrier for the oxygen and can not become part of the interface or substrate. The process can also be slow, which can result in a more controllable oxidation and can be controlled to maintain a particular silicon thickness along the surface of the substrate 305. After forming the sacrificial oxide, a number of other fabrication operations can occur, including forming a dummy polysilicon mask followed by forming a dummy gate on the substrate. After performing the process, a gate oxide formation process can occur.

[0035] One or more removal operations can be performed at operation 220 to remove the sacrificial oxide covering the maintained silicon 320. As shown in Figure 3E The maintained silicon can be characterized by a thickness sufficient to maintain coverage on the silicon germanium substrate material, for example. For example, in some embodiments, the silicon layer 320 can be maintained at less than or about 5 nm, and can be maintained at less than or about 4 nm, less than or about 3 nm, less than or about 2 nm, less than or about 1 nm, less than or about 0.5 nm, less than or about 0.1 nm, or less than or about 0.05 nm, for example. In some embodiments, the silicon layer 320 can be maintained at greater than or about 0.01 nm, greater than or about 0.1 nm, greater than or about 0.5 nm, greater than or about 1 nm, greater than or about 2 nm, greater than or about 3 nm, greater than or about 4 nm, or greater than or about 5 nm, for example. ​or less. The removal operation can include a selective etch, such as an oxide selective etch. In some embodiments, a plasma etch process can be performed, such as using a fluorine containing precursor and a hydrogen containing precursor. The removal operation can include any of the operations described above, such as by utilizing a nitrogen trifluoride and ammonia plasma etch, which can also include additional thermal treatment or sublimation operations. In some embodiments, additional or alternative fluorine and hydrogen containing precursors can also be used. By performing the oxide selective etch process at operation 220, the underlying portion of silicon can be maintained or substantially maintained.

[0036] After the silicon cap material is exposed, a second oxidation operation can be performed to oxidize the remaining silicon layer of the material covering the silicon germanium fin. At operation 225, any of the previous oxidation operations can be performed to produce an oxygen containing material 324, such as silicon oxide, as shown. In some embodiments, the remaining silicon material can be completely converted to silicon oxide, and no residual silicon layer can be left. In some embodiments, as described above, the oxidation can utilize nitrous oxide and hydrogen. This can strictly control the oxidation to be substantially limited to the silicon material, while limiting or preventing over-oxidation into the silicon germanium material. As described above, such a thermal oxidation process can provide a number of benefits. For example, unlike wet oxidation, for example, the present oxidation can produce a high quality oxide, which can limit diffusion of germanium. Figure 3F Additionally, some conventional oxidation processes, including wet and dry oxidation processes, can over-oxidize into the silicon germanium, which can produce a germanium oxide material. Germanium oxide can be characterized by less stable bonds than silicon oxide, and thus, subsequent operations can break the germanium oxide bonds. This can damage the oxide formed, or degrade the interface quality between the materials, which can limit transistor efficiency or damage the device. Forming a high quality oxide can also beneficially protect the structure in later operations. For example, the conventional process to produce a less dense oxide can be further degraded by additional manufacturing operations. As will be explained below, additional high-k dielectric operations can be performed, as well as subsequent manufacturing, which can include high temperature processing. For example, at some point in the manufacturing, a rapid thermal anneal can be performed at up to 1000 °C. For a lower quality or less dense oxide, this can promote additional diffusion of germanium due to the more porous oxide structure. The more dense thermal oxide process according to some embodiments of the present technology can prevent diffusion during subsequent manufacturing operations. By maintaining control of the oxidation according to embodiments of the present technology, a high quality oxide material can be provided with a particular depth at any of the reduced thicknesses described above.

[0037] Additionally, some conventional oxidation processes, including wet and dry oxidation processes, can over-oxidize into the silicon germanium, which can produce a germanium oxide material. Germanium oxide can be characterized by less stable bonds than silicon oxide, and thus, subsequent operations can break the germanium oxide bonds. This can damage the oxide formed, or degrade the interface quality between the materials, which can limit transistor efficiency or damage the device. Forming a high quality oxide can also beneficially protect the structure in later operations. For example, the conventional process to produce a less dense oxide can be further degraded by additional manufacturing operations. As will be explained below, additional high-k dielectric operations can be performed, as well as subsequent manufacturing, which can include high temperature processing. For example, at some point in the manufacturing, a rapid thermal anneal can be performed at up to 1000 °C. For a lower quality or less dense oxide, this can promote additional diffusion of germanium due to the more porous oxide structure. The more dense thermal oxide process according to some embodiments of the present technology can prevent diffusion during subsequent manufacturing operations. By maintaining control of the oxidation according to embodiments of the present technology, a high quality oxide material can be provided with a particular depth at any of the reduced thicknesses described above.

[0038] The formed oxygen-containing material can be of high quality and highly ordered, meaning a defect-free or substantially defect-free crystalline structure. This can provide an interface that can prevent other materials from approaching the channel region, thereby preventing leakage. The resulting oxygen-containing material 324 can include silicon dioxide. The formed oxygen-containing material 324 can have a thickness of up to or about and can have a thickness greater than or about greater than or about greater than or about greater than or about greater than or about greater than or about or more.

[0039] The method 200 can include, in optional operation 230, delivering a pre-treatment precursor to the substrate. The pre-treatment precursor can be or include a nitrogen-containing precursor or an oxygen-containing precursor. The precursor can contact the substrate and can form or introduce a reactive ligand on the exposed surface of the substrate, which is shown in FIG. 3 as ligand 325. Unlike conventional techniques, the present techniques can utilize a pre-treatment configured to produce an ordered growth of high-k dielectric material in a subsequent operation. Figure 3G

[0040] The pre-treatment precursor can be or include any nitrogen-containing or oxygen-containing precursor. The oxygen-containing precursor can be characterized by a hydroxyl group [-OH], which can bind on the surface of the substrate oxygen-containing material 324. The nitrogen-containing precursor can be characterized by an amine group [-NH2] or other nitrogen-containing group. For example, the nitrogen-containing precursor can be or include a nitrogen and hydrogen containing precursor, such as ammonia as one non-limiting example, or a nitrogen and oxygen containing precursor, or any other precursor that includes nitrogen.

[0041] In some embodiments, the surface termination can be or include a hydroxyl or amine group terminated surface. The method 200 can then include, at operation 235, forming a high-k dielectric material overlying the oxygen-containing material. The present techniques can encompass any formation or deposition of high-k material, although in some embodiments, the formation operation 235 can be or include atomic layer deposition, which can utilize any number of atomic layer deposition chambers. The formation can be performed directly after the pre-treatment of the substrate or the surface of the oxygen-containing material, and if performed, can be performed in the same chamber as the pre-treatment, or in another chamber, such as another chamber incorporated on the same system, such as system 100. In some embodiments, vacuum conditions can be maintained while the substrate is transported from the pre-treatment chamber to the deposition or formation chamber, which can limit exposure of the substrate to air.

[0042] ​In the case of performing atomic layer deposition processing to form a high-k dielectric material, a metal-containing precursor can be delivered to the substrate to react with the reactive ligands exposed on the substrate from the pre-treatment. For example, a transition metal-containing precursor, a poor metal-containing precursor, or a lanthanide metal-containing precursor can be delivered to the processing chamber to interact with the reactive ligands exposed on the substrate from the pre-treatment. An oxygen-containing precursor can then be delivered in a second operation, such as after purging the metal-containing precursor. This can produce an oxide layer by atomic layer deposition, such as Figure 3H In one non-limiting example, a hafnium-containing precursor can be delivered in a first operation, and an oxidizing agent can be delivered in a second operation to produce a hafnium oxide film. Additional metal-containing precursors can include a zirconium-containing precursor for producing a zirconium-containing material, as well as any other number of metal-containing precursors for producing additional metal oxide structures. For the hafnium-containing precursor, and similarly for any alternative metal, the precursor can be or include any halogen-containing precursor, oxygen-containing precursor, hydrogen-containing precursor, or carbon-containing precursor with hafnium incorporated therein.

[0043] For the oxidizing agent, any oxygen-containing precursor that can react with the metal-containing material can be used. For example, the oxygen-containing precursor can be or include water, diatomic oxygen, ozone, a hydroxyl-containing precursor or alcohol, a nitrogen and oxygen-containing precursor, plasma enhanced oxygen including local or remote enhancement, or any other material that can incorporate oxygen with a metal, such as hafnium, to produce a layer of metal oxide material covering the substrate. Again, any of the metal-containing materials mentioned above can be used in embodiments of the present technology, and can include any group of metals, which can include, but are not limited to, hafnium, zirconium, silicon, lanthanum, aluminum, titanium, strontium, or combinations of these materials, such as, for example, hafnium silicate.

[0044] When performing the pre-treatment according to embodiments of the present technology, the structure of the metal-containing material can be formed or deposited in an ordered manner to produce a more uniform grain structure. This can be produced by forming the reactive ligands of the pre-treatment precursor on a more structured surface material, such as a higher quality silicon or silicon oxide produced by embodiments of the present technology. Additionally, by performing the pre-treatment under certain conditions, other improvements can be provided.

[0045] The pre-treatment can be performed at a temperature configured to activate the precursor and / or surface of the substrate. For example, where a nitrogen and hydrogen containing precursor is used as the pre-treatment precursor, the substrate can be maintained at a temperature greater than or about 300 °C while the precursor is delivered. Similarly, a pre-treatment can also be performed with an oxygen containing precursor while maintaining the substrate temperature greater than or about 300 °C. For any pre-treatment operation, the substrate can also be maintained at a temperature greater than or about 400 °C, greater than or about 500 °C, greater than or about 600 °C, greater than or about 700 °C, greater than or about 800 °C, or higher. As the temperature for pre-treatment decreases below or about 500 °C, effectiveness can decrease. Similarly, as the temperature increases above or about 700 °C, nucleation can not improve and excess precursor can be incorporated into the surface, which can decrease mobility of the device. Thus, in some embodiments, the temperature can be maintained between about 500 °C and about 700 °C during pre-treatment.

[0046] Similar temperature ranges can affect operation of one or both oxidation operations, which can carefully control the amount of silicon cap material maintained in the first oxidation and can limit over-oxidation in the second oxidation. To control the slow ingress of oxygen into the silicon material, the temperature can be maintained less than or about 900 °C, and can be maintained less than or about 850 °C, less than or about 800 °C, less than or about 750 °C, less than or about 700 °C, less than or about 650 °C, less than or about 600 °C, or lower.

[0047] Similarly, the exposure time can affect the amount of nitrogen containing precursor incorporated, and thus to limit mobility loss of the produced device, the precursor exposure can be less than or about 3 minutes, and in some embodiments, the exposure time can be less than or about 2.5 minutes, less than or about 2 minutes, less than or about 1.5 minutes, less than or about 1 minute, less than or about 45 seconds, less than or about 30 seconds, less than or about 15 seconds, or less. Once an appropriate amount of amine group is incorporated, formation can be performed. Formation, including atomic layer formation, can be performed at any temperature, although in some embodiments, atomic layer deposition can be performed at a temperature lower than or about the temperature at which the pre-treatment is performed, regardless of whether the operations are performed in the same or different chambers. For example, the atomic layer deposition can be performed at a second temperature relative to the pre-treatment temperature, and in embodiments, the formation temperature can be less than or about 500 °C, and can be less than or about 450 °C, less than or about 400 °C, less than or about 350 °C, less than or about 300 °C, less than or about 250 °C, or lower.

[0048] After the high-k material layer has been formed or deposited, one or more post-treatments can be performed. In some embodiments, at optional operation 240, the substrate can be transferred from the deposition chamber to another chamber or set of chambers for post-treatment of the material. Similar to the above-described, the transfer can be performed on a single processing system having multiple chambers, and thus can be transferred from or between the chambers while maintaining a vacuum condition. The method 200 can then include one or more additional post-treatment operations as indicated by optional operation 245. The post-treatment operations can include one or more operations performed in one or more chambers, including multiple chambers on the same cluster tool. The post-treatment operations can include oxidation, nitridation, and / or thermal annealing.

[0049] As described above, a pre-treatment operation can be performed to provide sufficient end portions to provide the uniform growth described above while limiting excess precursor from binding to the substrate. For example, a bound nitrogen interface can reduce the mobility of the resulting transistor, or how fast the charge carriers can move through the structure. While the above-described pre-treatment can further improve the scaling of the high-k film, if not controlled, the pre-treatment can actually reduce the mobility of the device. However, in some embodiments, a post-treatment can include oxidizing the formed high-k material with a second oxygen-containing precursor relative to a first oxygen-containing precursor that can be used in the pre-treatment operation.

[0050] For example, an oxidation operation can be performed with any of the above-described oxygen-containing precursors to further oxidize the film after formation. The deposition or formation of the high-k film can result in a porous film or a film that includes vacancies in the structure. By performing an oxidation operation, oxygen species can penetrate into the film to fill the vacancies as shown by layer 330b and create an oxide material at the interface of the high-k material, such as optional layer 320, that can not have been formed in the above-described previous operations. This can improve the underlying interface from the amine end group, which can improve the mobility performance of the device. To limit an excessive increase in the thickness of the underlying oxide layer, the oxidation operation can be performed for a limited period of time, and can be performed within any of the previously mentioned time ranges.

[0051] The post-treatment operation can additionally include further contacting the substrate with a second nitrogen-containing precursor when used relative to the pre-treated nitrogen-containing precursor. The second nitrogen-containing precursor can include any of the above-described nitrogen-containing precursors, and can include nitrogen gas as well as any of the nitrogen-containing precursors mentioned elsewhere. The second nitrogen-containing precursor can include a plasma activated or enhanced nitrogen-containing precursor, a thermally activated nitrogen, or some other nitrogen precursor that can allow nitrogen radicals or nitrogen atoms to incorporate into the high-k structure, which can stabilize the film or settle the film to an equilibrium state. Unlike the oxidation operation, the nitridation can not increase the thickness of the underlying layer, such as silicon oxide, and can also slightly increase the k value of the resulting film.

[0052] To maintain structural and electrical properties, the incorporation of nitrogen can be controlled to limit incorporation in the film. In some embodiments, the post-treatment nitridation can incorporate less than or about 20 atomic % of nitrogen at the surface region of the high-k film, and can incorporate less than or about 15 atomic % of nitrogen, less than or about 10 atomic % of nitrogen, less than or about 8 atomic % of nitrogen, less than or about 6 atomic % of nitrogen, less than or about 4 atomic % of nitrogen, less than or about 2 atomic % of nitrogen, or less. In some embodiments, incorporation between about 3 atomic % and about 7 atomic % can maintain a higher k value as compared to higher nitrogen incorporation, and can better stabilize the film as compared to lower nitrogen incorporation. The surface region can be taken to mean the exposed surface of the material, although the incorporation of nitrogen can extend to any distance within the film, and can be uniform, or form a decreasing gradient through the material.

[0053] The post-treatment oxidation or nitridation can be performed at any of the temperatures previously mentioned, although in some embodiments, the post-treatment oxidation and / or nitridation can be performed at a temperature range less than or about 500 °C, and can be performed at a temperature range less than or about 400 °C, less than or about 300 °C, less than or about 200 °C, less than or about 100 °C, or less, depending on the operation being performed.

[0054] A post-treatment anneal can be performed after any of the operations, including any of the post-treatment operations described. The post-treatment anneal can be performed in any of the chambers in which the previous operations were performed, or can be transferred to a different chamber, such as a chamber configured to perform a rapid thermal anneal process, for example. Again, the chambers can be incorporated on the same platform as the other chambers, which can allow for transfer between chambers while maintaining vacuum conditions. The post-treatment anneal can further align the film junctions and further stabilize the film. In embodiments, the post-treatment anneal can be performed at a temperature higher than the deposition or oxidation temperature in some embodiments. For example, the post-treatment anneal can be performed at a temperature higher or about 400 °C, and in embodiments can be performed at a temperature higher or about 500 °C, higher or about 600 °C, higher or about 700 °C, higher or about 800 °C, higher or about 900 °C, or higher.

[0055] By performing the pre-treatment, oxidation, and / or post-treatment according to embodiments of the present technology, improved high-k materials and semiconductor structures can be produced. The high-k material layers can be produced to any thickness, including up to or about a few nanometers. However, due to the preferred grain structure produced by the present technology, a thinner effective oxide thickness can be produced without loss of gate leakage performance. The high-k materials produced according to the present technology can be characterized by a k value greater than or about 10, and can be characterized by a k value greater than or about 15, greater than or about 20, greater than or about 21, greater than or about 22, greater than or about 23, greater than or about 24, greater than or about 25, or greater.

[0056] Compared to conventional techniques, the present technology also allows for improved dielectric constant. Additionally, because of the resulting grain structure, gate leakage current associated with the film can be less than or about one-tenth of the gate leakage current of a silicon oxide film of similar thickness, and the gate leakage current can be less than or about one-hundredth, less than or about one-thousandth, less than or about 1 / 5,000, less than or about 1 / 10,000, less than or about 1 / 20,000, less than or about 1 / 50,000, less than or about 1 / 100,000, or less of the gate leakage current of a silicon oxide film of similar thickness. By producing films according to embodiments of the present technology, shaped films can be produced with beneficial morphologies that can enhance the electrical properties of the films compared to conventional techniques.

[0057] In the preceding description, for purposes of explanation, numerous details are set forth in order to provide an understanding of various embodiments of the present technology. However, it will be apparent to one skilled in the art that certain embodiments can be practiced without some or all of these details.

[0058] Having disclosed several embodiments, those skilled in the art will recognize that various modifications, alternative constructions, and equivalent components can be used without departing from the spirit of the embodiments. Additionally, many well known processes and elements have not been described in order to avoid unnecessarily obscuring the present technology. Accordingly, the foregoing description should not be taken as limiting the scope of the present technology.

[0059] Where a range of values is provided, it is understood that each intervening value, to the minimum resolvable between the upper and lower limits of that range is also specifically disclosed. Any narrower range or value within that range is also specifically disclosed. Unless otherwise indicated, the same indication can hold true across all disclosed and / or

[0060] As used in this and the following claims, the singular forms "a," "an," and "the" include plural references unless the context clearly dictates otherwise. Thus, for example, reference to "a layer" includes a plurality of such layers, and reference to "the precursor" includes reference to one or more precursors and equivalents thereof known to those skilled in the art, and so forth.

[0061] Furthermore, as used in this specification and the following claims, the terms "comprise(s)," "comprising," "contain(s)," "containing," "include(s)," and "including" are intended to be open-ended and non-limiting.

Claims

1. A method of forming a semiconductor structure, the method comprising the steps of: forming a silicon layer over a semiconductor substrate, wherein the semiconductor substrate comprises silicon germanium; oxidizing a portion of the silicon layer while maintaining a portion of the silicon layer in contact with the semiconductor substrate to form a sacrificial oxide; removing the sacrificial oxide; oxidizing the portion of the silicon layer in contact with the semiconductor substrate to form an oxygen-containing material; and forming a high-k dielectric material over the oxygen-containing material, wherein all of the oxidizing steps are in-situ vapor generation processes.

2. The method of forming a semiconductor structure of claim 1, wherein the step of removing comprises an in-situ dry chemical process, wherein the step of removing is performed in a first processing chamber, and wherein the method further comprises the step of transferring the semiconductor substrate from the first processing chamber to a second processing chamber prior to forming the high-k dielectric material.

3. The method of forming a semiconductor structure of claim 1, wherein the method is performed in one or more processing chambers without exposing the semiconductor substrate to the atmosphere.

4. The method of forming a semiconductor structure of claim 1, wherein the silicon layer is formed epitaxially over the silicon germanium.

5. The method of forming a semiconductor structure of claim 1, wherein the step of oxidizing the portion of the silicon layer in contact with the semiconductor substrate comprises the step of delivering a nitrogen and oxygen containing precursor to the semiconductor substrate, and wherein the step of oxidizing the portion of the silicon layer in contact with the semiconductor substrate occurs at a temperature less than or equal to 750 °C.

6. The method of forming a semiconductor structure of claim 1, further comprising the step of introducing a reactive ligand on the oxygen-containing material with an ammonia or oxygen containing precursor prior to forming the high-k dielectric material.

7. The method of forming a semiconductor structure of claim 1, wherein the high-k dielectric material comprises at least one element selected from the group consisting of hafnium, zirconium, silicon, lanthanum, aluminum, titanium, or strontium.

8. A method of forming a semiconductor structure, the method comprising the steps of: removing an oxide from a surface of a substrate contained in a semiconductor processing chamber, wherein the substrate comprises a silicon germanium fin; forming a silicon layer over the surface of the substrate; oxidizing a portion of the silicon layer while maintaining a portion of the silicon layer in contact with the substrate to form a sacrificial oxide; removing the sacrificial oxide; oxidizing the portion of the silicon layer in contact with the substrate to form an oxygen-containing material by delivering nitrous oxide to the substrate; pre-treating the oxygen-containing material by contacting the substrate with a nitrogen containing precursor; and forming a high-k dielectric material over the pre-treated oxygen-containing material, wherein all of the oxidizing steps are in-situ vapor generation processes.

9. The method of forming a semiconductor structure of claim 8, wherein the step of removing comprises an in-situ dry chemical process, wherein the step of removing is performed in a first processing chamber, and wherein the method further comprises the step of transferring the substrate from the first processing chamber to a second processing chamber prior to forming the high-k dielectric material.

10. The method of forming a semiconductor structure of claim 8, wherein the step of forming the sacrificial oxide comprises delivering nitrous oxide to the substrate to form an oxygen-containing material, and wherein the step of delivering nitrous oxide to the substrate to form an oxygen-containing material occurs at a temperature less than or equal to 750 °C.

11. The method of forming a semiconductor structure of claim 8, wherein the step of forming the sacrificial oxide comprises the step of delivering an oxygen-containing precursor and a hydrogen-containing precursor to the substrate to form an oxygen-containing material.

12. The method of forming a semiconductor structure of claim 8, wherein the step of pre-treating the oxygen-containing material forms reactive ligands on the oxygen-containing material.

13. The method of forming a semiconductor structure of claim 8, further comprising the step of post-treating the high-k dielectric material.

14. A method of forming a semiconductor structure, the method comprising the steps of: removing native oxide from a surface of a substrate comprised in a semiconductor processing chamber, wherein the substrate comprises silicon germanium; forming a silicon layer over the surface of the substrate; oxidizing a portion of the silicon layer to form a sacrificial oxide while maintaining a portion of the silicon layer in contact with the substrate; removing the sacrificial oxide; oxidizing the portion of the silicon layer in contact with the substrate to form an oxygen-containing material; and forming a high-k dielectric material overlying the oxygen-containing material, wherein all of the above oxidizing steps are in-situ vapor generation processes. ​

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